1 // SPDX-License-Identifier: BSD-3-Clause
2 /* Copyright(c) 2019 Broadcom All rights reserved. */
7 #include <rte_bitmap.h>
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
10 #include <rte_memory.h>
11 #if defined(RTE_ARCH_X86)
12 #include <tmmintrin.h>
14 #error "bnxt vector pmd: unsupported target."
19 #include "bnxt_ring.h"
20 #include "bnxt_rxtx_vec_common.h"
30 bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)
32 struct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];
33 struct rte_mbuf **rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];
34 struct rte_mbuf *mb0, *mb1;
37 const __m128i hdr_room = _mm_set_epi64x(RTE_PKTMBUF_HEADROOM, 0);
38 const __m128i addrmask = _mm_set_epi64x(UINT64_MAX, 0);
41 * Number of mbufs to allocate must be a multiple of two. The
42 * allocation must not go past the end of the ring.
44 nb = RTE_MIN(rxq->rxrearm_nb & ~0x1,
45 rxq->nb_rx_desc - rxq->rxrearm_start);
47 /* Allocate new mbufs into the software ring */
48 if (rte_mempool_get_bulk(rxq->mb_pool, (void *)rx_bufs, nb) < 0) {
49 rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += nb;
54 /* Initialize the mbufs in vector, process 2 mbufs in one loop */
55 for (i = 0; i < nb; i += 2, rx_bufs += 2) {
56 __m128i buf_addr0, buf_addr1;
62 /* Load address fields from both mbufs */
63 buf_addr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);
64 buf_addr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);
66 /* Load both rx descriptors (preserving some existing fields) */
67 rxbd0 = _mm_loadu_si128((__m128i *)(rxbds + 0));
68 rxbd1 = _mm_loadu_si128((__m128i *)(rxbds + 1));
70 /* Add default offset to buffer address. */
71 buf_addr0 = _mm_add_epi64(buf_addr0, hdr_room);
72 buf_addr1 = _mm_add_epi64(buf_addr1, hdr_room);
74 /* Clear all fields except address. */
75 buf_addr0 = _mm_and_si128(buf_addr0, addrmask);
76 buf_addr1 = _mm_and_si128(buf_addr1, addrmask);
78 /* Clear address field in descriptor. */
79 rxbd0 = _mm_andnot_si128(addrmask, rxbd0);
80 rxbd1 = _mm_andnot_si128(addrmask, rxbd1);
82 /* Set address field in descriptor. */
83 rxbd0 = _mm_add_epi64(rxbd0, buf_addr0);
84 rxbd1 = _mm_add_epi64(rxbd1, buf_addr1);
86 /* Store descriptors to memory. */
87 _mm_store_si128((__m128i *)(rxbds++), rxbd0);
88 _mm_store_si128((__m128i *)(rxbds++), rxbd1);
91 rxq->rxrearm_start += nb;
92 bnxt_db_write(&rxr->rx_db, rxq->rxrearm_start - 1);
93 if (rxq->rxrearm_start >= rxq->nb_rx_desc)
94 rxq->rxrearm_start = 0;
96 rxq->rxrearm_nb -= nb;
100 bnxt_parse_pkt_type(__m128i mm_rxcmp, __m128i mm_rxcmp1)
102 uint32_t flags_type, flags2;
105 flags_type = _mm_extract_epi16(mm_rxcmp, 0);
106 flags2 = _mm_extract_epi32(mm_rxcmp1, 0);
110 * bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
111 * bit 1: RX_CMPL_FLAGS2_IP_TYPE
112 * bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
113 * bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
115 index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
116 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
117 RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
118 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
120 return _mm_set_epi32(0, 0, 0, bnxt_ptype_table[index]);
124 bnxt_set_ol_flags(__m128i mm_rxcmp, __m128i mm_rxcmp1)
126 uint16_t flags_type, errors, flags;
129 /* Extract rxcmp1->flags2. */
130 flags = _mm_extract_epi32(mm_rxcmp1, 0) & 0x1F;
131 /* Extract rxcmp->flags_type. */
132 flags_type = _mm_extract_epi16(mm_rxcmp, 0);
133 /* Extract rxcmp1->errors_v2. */
134 errors = (_mm_extract_epi16(mm_rxcmp1, 4) >> 4) & flags & 0xF;
136 ol_flags = bnxt_ol_flags_table[flags & ~errors];
138 if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID)
139 ol_flags |= PKT_RX_RSS_HASH;
142 ol_flags |= bnxt_ol_flags_err_table[errors];
144 return _mm_set_epi64x(ol_flags, 0);
148 bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
151 struct bnxt_rx_queue *rxq = rx_queue;
152 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
153 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
154 uint32_t raw_cons = cpr->cp_raw_cons;
157 struct rx_pkt_cmpl *rxcmp;
158 const __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);
159 const __m128i shuf_msk =
160 _mm_set_epi8(15, 14, 13, 12, /* rss */
161 0xFF, 0xFF, /* vlan_tci (zeroes) */
163 0xFF, 0xFF, 3, 2, /* pkt_len */
164 0xFF, 0xFF, 0xFF, 0xFF); /* pkt_type (zeroes) */
167 /* If Rx Q was stopped return */
168 if (unlikely(!rxq->rx_started))
171 if (rxq->rxrearm_nb >= rxq->rx_free_thresh)
172 bnxt_rxq_rearm(rxq, rxr);
174 /* Return no more than RTE_BNXT_MAX_RX_BURST per call. */
175 nb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);
178 * Make nb_pkts an integer multiple of RTE_BNXT_DESCS_PER_LOOP.
179 * nb_pkts < RTE_BNXT_DESCS_PER_LOOP, just return no packet
181 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);
185 /* Handle RX burst request */
186 for (i = 0; i < nb_pkts; i++) {
187 struct rx_pkt_cmpl_hi *rxcmp1;
188 struct rte_mbuf *mbuf;
189 __m128i mm_rxcmp, mm_rxcmp1, pkt_mb, ptype, rearm;
191 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
193 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
194 rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cons + 1];
196 if (!CMP_VALID(rxcmp1, raw_cons + 1, cpr->cp_ring_struct))
199 mm_rxcmp = _mm_load_si128((__m128i *)rxcmp);
200 mm_rxcmp1 = _mm_load_si128((__m128i *)rxcmp1);
203 cons = rxcmp->opaque;
205 mbuf = rxr->rx_buf_ring[cons];
206 rxr->rx_buf_ring[cons] = NULL;
208 /* Set fields from mbuf initializer and ol_flags. */
209 rearm = _mm_or_si128(mbuf_init,
210 bnxt_set_ol_flags(mm_rxcmp, mm_rxcmp1));
211 _mm_store_si128((__m128i *)&mbuf->rearm_data, rearm);
213 /* Set mbuf pkt_len, data_len, and rss_hash fields. */
214 pkt_mb = _mm_shuffle_epi8(mm_rxcmp, shuf_msk);
216 /* Set packet type. */
217 ptype = bnxt_parse_pkt_type(mm_rxcmp, mm_rxcmp1);
218 pkt_mb = _mm_blend_epi16(pkt_mb, ptype, 0x3);
221 * Shift vlan_tci from completion metadata field left six
222 * bytes and blend into mbuf->rx_descriptor_fields1 to set
225 pkt_mb = _mm_blend_epi16(pkt_mb,
226 _mm_slli_si128(mm_rxcmp1, 6), 0x20);
228 /* Store descriptor fields. */
229 _mm_storeu_si128((void *)&mbuf->rx_descriptor_fields1, pkt_mb);
231 rx_pkts[nb_rx_pkts++] = mbuf;
236 RING_ADV(rxr->rx_ring_struct, rxr->rx_prod, nb_rx_pkts);
238 rxq->rxrearm_nb += nb_rx_pkts;
239 cpr->cp_raw_cons = raw_cons;
241 !!(cpr->cp_raw_cons & cpr->cp_ring_struct->ring_size);
249 bnxt_tx_cmp_vec(struct bnxt_tx_queue *txq, int nr_pkts)
251 struct bnxt_tx_ring_info *txr = txq->tx_ring;
252 struct rte_mbuf **free = txq->free;
253 uint16_t cons = txr->tx_cons;
254 unsigned int blk = 0;
257 struct bnxt_sw_tx_bd *tx_buf;
258 struct rte_mbuf *mbuf;
260 tx_buf = &txr->tx_buf_ring[cons];
261 cons = RING_NEXT(txr->tx_ring_struct, cons);
262 mbuf = rte_pktmbuf_prefree_seg(tx_buf->mbuf);
263 if (unlikely(mbuf == NULL))
267 if (blk && mbuf->pool != free[0]->pool) {
268 rte_mempool_put_bulk(free[0]->pool, (void **)free, blk);
274 rte_mempool_put_bulk(free[0]->pool, (void **)free, blk);
280 bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)
282 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
283 uint32_t raw_cons = cpr->cp_raw_cons;
285 uint32_t nb_tx_pkts = 0;
286 struct tx_cmpl *txcmp;
287 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
288 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
289 uint32_t ring_mask = cp_ring_struct->ring_mask;
292 cons = RING_CMPL(ring_mask, raw_cons);
293 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons];
295 if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct))
298 if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))
299 nb_tx_pkts += txcmp->opaque;
302 "Unhandled CMP type %02x\n",
304 raw_cons = NEXT_RAW_CMP(raw_cons);
305 } while (nb_tx_pkts < ring_mask);
307 cpr->valid = !!(raw_cons & cp_ring_struct->ring_size);
309 bnxt_tx_cmp_vec(txq, nb_tx_pkts);
310 cpr->cp_raw_cons = raw_cons;
316 bnxt_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
319 struct bnxt_tx_queue *txq = tx_queue;
320 struct bnxt_tx_ring_info *txr = txq->tx_ring;
321 uint16_t prod = txr->tx_prod;
322 struct rte_mbuf *tx_mbuf;
323 struct tx_bd_long *txbd = NULL;
324 struct bnxt_sw_tx_bd *tx_buf;
327 nb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));
329 if (unlikely(nb_pkts == 0))
332 /* Handle TX burst request */
335 tx_mbuf = *tx_pkts++;
336 rte_prefetch0(tx_mbuf);
338 tx_buf = &txr->tx_buf_ring[prod];
339 tx_buf->mbuf = tx_mbuf;
342 txbd = &txr->tx_desc_ring[prod];
343 txbd->address = tx_mbuf->buf_iova + tx_mbuf->data_off;
344 txbd->len = tx_mbuf->data_len;
345 txbd->flags_type = bnxt_xmit_flags_len(tx_mbuf->data_len,
347 prod = RING_NEXT(txr->tx_ring_struct, prod);
351 /* Request a completion for last packet in burst */
353 txbd->opaque = nb_pkts;
354 txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
357 rte_compiler_barrier();
358 bnxt_db_write(&txr->tx_db, prod);
366 bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
370 struct bnxt_tx_queue *txq = tx_queue;
372 /* Tx queue was stopped; wait for it to be restarted */
373 if (unlikely(!txq->tx_started)) {
374 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
378 /* Handle TX completions */
379 if (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)
380 bnxt_handle_tx_cp_vec(txq);
385 num = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);
386 ret = bnxt_xmit_fixed_burst_vec(tx_queue,
399 bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)
401 return bnxt_rxq_vec_setup_common(rxq);