drivers/net/bnxt/bnxt_rxtx_vec_sse.c

   1 /* SPDX-License-Identifier: BSD-3-Clause */
   2 /* Copyright(c) 2019-2021 Broadcom All rights reserved. */
   3
   4 #include <inttypes.h>
   5 #include <stdbool.h>
   6
   7 #include <rte_bitmap.h>
   8 #include <rte_byteorder.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memory.h>
  11 #include <rte_vect.h>
  12
  13 #include "bnxt.h"
  14 #include "bnxt_cpr.h"
  15 #include "bnxt_ring.h"
  16
  17 #include "bnxt_txq.h"
  18 #include "bnxt_txr.h"
  19 #include "bnxt_rxtx_vec_common.h"
  20
  21 /*
  22  * RX Ring handling
  23  */
  24
  25 #define GET_OL_FLAGS(rss_flags, ol_index, errors, pi, ol_flags)                \
  26 {                                                                              \
  27         uint32_t tmp, of;                                                      \
  28                                                                                \
  29         of = _mm_extract_epi32((rss_flags), (pi)) |                            \
  30                 rxr->ol_flags_table[_mm_extract_epi32((ol_index), (pi))];      \
  31                                                                                \
  32         tmp = _mm_extract_epi32((errors), (pi));                               \
  33         if (tmp)                                                               \
  34                 of |= rxr->ol_flags_err_table[tmp];                            \
  35         (ol_flags) = of;                                                       \
  36 }
  37
  38 #define GET_DESC_FIELDS(rxcmp, rxcmp1, shuf_msk, ptype_idx, pi, ret)           \
  39 {                                                                              \
  40         uint32_t ptype;                                                        \
  41         __m128i r;                                                             \
  42                                                                                \
  43         /* Set mbuf pkt_len, data_len, and rss_hash fields. */                 \
  44         r = _mm_shuffle_epi8((rxcmp), (shuf_msk));                             \
  45                                                                                \
  46         /* Set packet type. */                                                 \
  47         ptype = bnxt_ptype_table[_mm_extract_epi32((ptype_idx), (pi))];        \
  48         r = _mm_blend_epi16(r, _mm_set_epi32(0, 0, 0, ptype), 0x3);            \
  49                                                                                \
  50         /* Set vlan_tci. */                                                    \
  51         r = _mm_blend_epi16(r, _mm_slli_si128((rxcmp1), 6), 0x20);             \
  52         (ret) = r;                                                             \
  53 }
  54
  55 static inline void
  56 descs_to_mbufs(__m128i mm_rxcmp[4], __m128i mm_rxcmp1[4],
  57                __m128i mbuf_init, struct rte_mbuf **mbuf,
  58                struct bnxt_rx_ring_info *rxr)
  59 {
  60         const __m128i shuf_msk =
  61                 _mm_set_epi8(15, 14, 13, 12,          /* rss */
  62                              0xFF, 0xFF,              /* vlan_tci (zeroes) */
  63                              3, 2,                    /* data_len */
  64                              0xFF, 0xFF, 3, 2,        /* pkt_len */
  65                              0xFF, 0xFF, 0xFF, 0xFF); /* pkt_type (zeroes) */
  66         const __m128i flags_type_mask =
  67                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
  68         const __m128i flags2_mask1 =
  69                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
  70                                RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC);
  71         const __m128i flags2_mask2 =
  72                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS2_IP_TYPE);
  73         const __m128i rss_mask =
  74                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS_RSS_VALID);
  75         __m128i t0, t1, flags_type, flags2, index, errors, rss_flags;
  76         __m128i ptype_idx, is_tunnel;
  77         uint32_t ol_flags;
  78
  79         /* Compute packet type table indexes for four packets */
  80         t0 = _mm_unpacklo_epi32(mm_rxcmp[0], mm_rxcmp[1]);
  81         t1 = _mm_unpacklo_epi32(mm_rxcmp[2], mm_rxcmp[3]);
  82         flags_type = _mm_unpacklo_epi64(t0, t1);
  83         ptype_idx =
  84                 _mm_srli_epi32(_mm_and_si128(flags_type, flags_type_mask), 9);
  85
  86         t0 = _mm_unpacklo_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
  87         t1 = _mm_unpacklo_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
  88         flags2 = _mm_unpacklo_epi64(t0, t1);
  89
  90         ptype_idx = _mm_or_si128(ptype_idx,
  91                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask1), 2));
  92         ptype_idx = _mm_or_si128(ptype_idx,
  93                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask2), 7));
  94
  95         /* Extract RSS valid flags for four packets. */
  96         rss_flags = _mm_srli_epi32(_mm_and_si128(flags_type, rss_mask), 9);
  97
  98         /* Extract errors_v2 fields for four packets. */
  99         t0 = _mm_unpackhi_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
 100         t1 = _mm_unpackhi_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
 101
 102         /* Compute ol_flags and checksum error indexes for four packets. */
 103         is_tunnel = _mm_and_si128(flags2, _mm_set1_epi32(4));
 104         is_tunnel = _mm_slli_epi32(is_tunnel, 3);
 105         flags2 = _mm_and_si128(flags2, _mm_set1_epi32(0x1F));
 106
 107         errors = _mm_srli_epi32(_mm_unpacklo_epi64(t0, t1), 4);
 108         errors = _mm_and_si128(errors, _mm_set1_epi32(0xF));
 109         errors = _mm_and_si128(errors, flags2);
 110
 111         index = _mm_andnot_si128(errors, flags2);
 112         errors = _mm_or_si128(errors, _mm_srli_epi32(is_tunnel, 1));
 113         index = _mm_or_si128(index, is_tunnel);
 114
 115         /* Update mbuf rearm_data for four packets. */
 116         GET_OL_FLAGS(rss_flags, index, errors, 0, ol_flags);
 117         _mm_store_si128((void *)&mbuf[0]->rearm_data,
 118                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 119
 120         GET_OL_FLAGS(rss_flags, index, errors, 1, ol_flags);
 121         _mm_store_si128((void *)&mbuf[1]->rearm_data,
 122                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 123
 124         GET_OL_FLAGS(rss_flags, index, errors, 2, ol_flags);
 125         _mm_store_si128((void *)&mbuf[2]->rearm_data,
 126                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 127
 128         GET_OL_FLAGS(rss_flags, index, errors, 3, ol_flags);
 129         _mm_store_si128((void *)&mbuf[3]->rearm_data,
 130                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 131
 132         /* Update mbuf rx_descriptor_fields1 for four packes. */
 133         GET_DESC_FIELDS(mm_rxcmp[0], mm_rxcmp1[0], shuf_msk, ptype_idx, 0, t0);
 134         _mm_store_si128((void *)&mbuf[0]->rx_descriptor_fields1, t0);
 135
 136         GET_DESC_FIELDS(mm_rxcmp[1], mm_rxcmp1[1], shuf_msk, ptype_idx, 1, t0);
 137         _mm_store_si128((void *)&mbuf[1]->rx_descriptor_fields1, t0);
 138
 139         GET_DESC_FIELDS(mm_rxcmp[2], mm_rxcmp1[2], shuf_msk, ptype_idx, 2, t0);
 140         _mm_store_si128((void *)&mbuf[2]->rx_descriptor_fields1, t0);
 141
 142         GET_DESC_FIELDS(mm_rxcmp[3], mm_rxcmp1[3], shuf_msk, ptype_idx, 3, t0);
 143         _mm_store_si128((void *)&mbuf[3]->rx_descriptor_fields1, t0);
 144 }
 145
 146 uint16_t
 147 bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
 148                    uint16_t nb_pkts)
 149 {
 150         struct bnxt_rx_queue *rxq = rx_queue;
 151         const __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);
 152         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 153         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 154         uint16_t cp_ring_size = cpr->cp_ring_struct->ring_size;
 155         uint16_t rx_ring_size = rxr->rx_ring_struct->ring_size;
 156         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
 157         uint64_t valid, desc_valid_mask = ~0ULL;
 158         const __m128i info3_v_mask = _mm_set1_epi32(CMPL_BASE_V);
 159         uint32_t raw_cons = cpr->cp_raw_cons;
 160         uint32_t cons, mbcons;
 161         int nb_rx_pkts = 0;
 162         const __m128i valid_target =
 163                 _mm_set1_epi32(!!(raw_cons & cp_ring_size));
 164         int i;
 165
 166         /* If Rx Q was stopped return */
 167         if (unlikely(!rxq->rx_started))
 168                 return 0;
 169
 170         if (rxq->rxrearm_nb >= rxq->rx_free_thresh)
 171                 bnxt_rxq_rearm(rxq, rxr);
 172
 173         /* Return no more than RTE_BNXT_MAX_RX_BURST per call. */
 174         nb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);
 175
 176         cons = raw_cons & (cp_ring_size - 1);
 177         mbcons = (raw_cons / 2) & (rx_ring_size - 1);
 178
 179         /* Prefetch first four descriptor pairs. */
 180         rte_prefetch0(&cp_desc_ring[cons]);
 181         rte_prefetch0(&cp_desc_ring[cons + 4]);
 182
 183         /* Ensure that we do not go past the ends of the rings. */
 184         nb_pkts = RTE_MIN(nb_pkts, RTE_MIN(rx_ring_size - mbcons,
 185                                            (cp_ring_size - cons) / 2));
 186         /*
 187          * If we are at the end of the ring, ensure that descriptors after the
 188          * last valid entry are not treated as valid. Otherwise, force the
 189          * maximum number of packets to receive to be a multiple of the per-
 190          * loop count.
 191          */
 192         if (nb_pkts < RTE_BNXT_DESCS_PER_LOOP)
 193                 desc_valid_mask >>= 16 * (RTE_BNXT_DESCS_PER_LOOP - nb_pkts);
 194         else
 195                 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);
 196
 197         /* Handle RX burst request */
 198         for (i = 0; i < nb_pkts; i += RTE_BNXT_DESCS_PER_LOOP,
 199                                   cons += RTE_BNXT_DESCS_PER_LOOP * 2,
 200                                   mbcons += RTE_BNXT_DESCS_PER_LOOP) {
 201                 __m128i rxcmp1[RTE_BNXT_DESCS_PER_LOOP];
 202                 __m128i rxcmp[RTE_BNXT_DESCS_PER_LOOP];
 203                 __m128i tmp0, tmp1, info3_v;
 204                 uint32_t num_valid;
 205
 206                 /* Copy four mbuf pointers to output array. */
 207                 tmp0 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons]);
 208 #ifdef RTE_ARCH_X86_64
 209                 tmp1 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons + 2]);
 210 #endif
 211                 _mm_storeu_si128((void *)&rx_pkts[i], tmp0);
 212 #ifdef RTE_ARCH_X86_64
 213                 _mm_storeu_si128((void *)&rx_pkts[i + 2], tmp1);
 214 #endif
 215
 216                 /* Prefetch four descriptor pairs for next iteration. */
 217                 if (i + RTE_BNXT_DESCS_PER_LOOP < nb_pkts) {
 218                         rte_prefetch0(&cp_desc_ring[cons + 8]);
 219                         rte_prefetch0(&cp_desc_ring[cons + 12]);
 220                 }
 221
 222                 /*
 223                  * Load the four current descriptors into SSE registers in
 224                  * reverse order to ensure consistent state.
 225                  */
 226                 rxcmp1[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 7]);
 227                 rte_compiler_barrier();
 228                 rxcmp[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 6]);
 229
 230                 rxcmp1[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 5]);
 231                 rte_compiler_barrier();
 232                 rxcmp[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 4]);
 233
 234                 tmp1 = _mm_unpackhi_epi32(rxcmp1[2], rxcmp1[3]);
 235
 236                 rxcmp1[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 3]);
 237                 rte_compiler_barrier();
 238                 rxcmp[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 2]);
 239
 240                 rxcmp1[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 1]);
 241                 rte_compiler_barrier();
 242                 rxcmp[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 0]);
 243
 244                 tmp0 = _mm_unpackhi_epi32(rxcmp1[0], rxcmp1[1]);
 245
 246                 /* Isolate descriptor valid flags. */
 247                 info3_v = _mm_and_si128(_mm_unpacklo_epi64(tmp0, tmp1),
 248                                         info3_v_mask);
 249                 info3_v = _mm_xor_si128(info3_v, valid_target);
 250
 251                 /*
 252                  * Pack the 128-bit array of valid descriptor flags into 64
 253                  * bits and count the number of set bits in order to determine
 254                  * the number of valid descriptors.
 255                  */
 256                 valid = _mm_cvtsi128_si64(_mm_packs_epi32(info3_v, info3_v));
 257                 num_valid = __builtin_popcountll(valid & desc_valid_mask);
 258
 259                 if (num_valid == 0)
 260                         break;
 261
 262                 descs_to_mbufs(rxcmp, rxcmp1, mbuf_init, &rx_pkts[nb_rx_pkts],
 263                                rxr);
 264                 nb_rx_pkts += num_valid;
 265
 266                 if (num_valid < RTE_BNXT_DESCS_PER_LOOP)
 267                         break;
 268         }
 269
 270         if (nb_rx_pkts) {
 271                 rxr->rx_raw_prod = RING_ADV(rxr->rx_raw_prod, nb_rx_pkts);
 272
 273                 rxq->rxrearm_nb += nb_rx_pkts;
 274                 cpr->cp_raw_cons += 2 * nb_rx_pkts;
 275                 cpr->valid =
 276                         !!(cpr->cp_raw_cons & cpr->cp_ring_struct->ring_size);
 277                 bnxt_db_cq(cpr);
 278         }
 279
 280         return nb_rx_pkts;
 281 }
 282
 283 static void
 284 bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)
 285 {
 286         struct bnxt_cp_ring_info *cpr = txq->cp_ring;
 287         uint32_t raw_cons = cpr->cp_raw_cons;
 288         uint32_t cons;
 289         uint32_t nb_tx_pkts = 0;
 290         struct tx_cmpl *txcmp;
 291         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
 292         struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
 293         uint32_t ring_mask = cp_ring_struct->ring_mask;
 294
 295         do {
 296                 cons = RING_CMPL(ring_mask, raw_cons);
 297                 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons];
 298
 299                 if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct))
 300                         break;
 301
 302                 if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))
 303                         nb_tx_pkts += txcmp->opaque;
 304                 else
 305                         RTE_LOG_DP(ERR, PMD,
 306                                    "Unhandled CMP type %02x\n",
 307                                    CMP_TYPE(txcmp));
 308                 raw_cons = NEXT_RAW_CMP(raw_cons);
 309         } while (nb_tx_pkts < ring_mask);
 310
 311         cpr->valid = !!(raw_cons & cp_ring_struct->ring_size);
 312         if (nb_tx_pkts) {
 313                 if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
 314                         bnxt_tx_cmp_vec_fast(txq, nb_tx_pkts);
 315                 else
 316                         bnxt_tx_cmp_vec(txq, nb_tx_pkts);
 317                 cpr->cp_raw_cons = raw_cons;
 318                 bnxt_db_cq(cpr);
 319         }
 320 }
 321
 322 static inline void
 323 bnxt_xmit_one(struct rte_mbuf *mbuf, struct tx_bd_long *txbd,
 324               struct rte_mbuf **tx_buf)
 325 {
 326         __m128i desc;
 327
 328         *tx_buf = mbuf;
 329
 330         desc = _mm_set_epi64x(mbuf->buf_iova + mbuf->data_off,
 331                               bnxt_xmit_flags_len(mbuf->data_len,
 332                                                   TX_BD_FLAGS_NOCMPL));
 333         desc = _mm_blend_epi16(desc, _mm_set_epi16(0, 0, 0, 0, 0, 0,
 334                                                    mbuf->data_len, 0), 0x02);
 335         _mm_store_si128((void *)txbd, desc);
 336 }
 337
 338 static uint16_t
 339 bnxt_xmit_fixed_burst_vec(struct bnxt_tx_queue *txq, struct rte_mbuf **tx_pkts,
 340                           uint16_t nb_pkts)
 341 {
 342         struct bnxt_tx_ring_info *txr = txq->tx_ring;
 343         uint16_t tx_prod, tx_raw_prod = txr->tx_raw_prod;
 344         struct tx_bd_long *txbd;
 345         struct rte_mbuf **tx_buf;
 346         uint16_t to_send;
 347
 348         tx_prod = RING_IDX(txr->tx_ring_struct, tx_raw_prod);
 349         txbd = &txr->tx_desc_ring[tx_prod];
 350         tx_buf = &txr->tx_buf_ring[tx_prod];
 351
 352         /* Prefetch next transmit buffer descriptors. */
 353         rte_prefetch0(txbd);
 354         rte_prefetch0(txbd + 3);
 355
 356         nb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));
 357
 358         if (unlikely(nb_pkts == 0))
 359                 return 0;
 360
 361         /* Handle TX burst request */
 362         to_send = nb_pkts;
 363         while (to_send >= RTE_BNXT_DESCS_PER_LOOP) {
 364                 /* Prefetch next transmit buffer descriptors. */
 365                 rte_prefetch0(txbd + 4);
 366                 rte_prefetch0(txbd + 7);
 367
 368                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
 369                 bnxt_xmit_one(tx_pkts[1], txbd++, tx_buf++);
 370                 bnxt_xmit_one(tx_pkts[2], txbd++, tx_buf++);
 371                 bnxt_xmit_one(tx_pkts[3], txbd++, tx_buf++);
 372
 373                 to_send -= RTE_BNXT_DESCS_PER_LOOP;
 374                 tx_pkts += RTE_BNXT_DESCS_PER_LOOP;
 375         }
 376
 377         while (to_send) {
 378                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
 379                 to_send--;
 380                 tx_pkts++;
 381         }
 382
 383         /* Request a completion for the final packet of burst. */
 384         rte_compiler_barrier();
 385         txbd[-1].opaque = nb_pkts;
 386         txbd[-1].flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
 387
 388         tx_raw_prod += nb_pkts;
 389         bnxt_db_write(&txr->tx_db, tx_raw_prod);
 390
 391         txr->tx_raw_prod = tx_raw_prod;
 392
 393         return nb_pkts;
 394 }
 395
 396 uint16_t
 397 bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
 398                    uint16_t nb_pkts)
 399 {
 400         int nb_sent = 0;
 401         struct bnxt_tx_queue *txq = tx_queue;
 402         struct bnxt_tx_ring_info *txr = txq->tx_ring;
 403         uint16_t ring_size = txr->tx_ring_struct->ring_size;
 404
 405         /* Tx queue was stopped; wait for it to be restarted */
 406         if (unlikely(!txq->tx_started)) {
 407                 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
 408                 return 0;
 409         }
 410
 411         /* Handle TX completions */
 412         if (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)
 413                 bnxt_handle_tx_cp_vec(txq);
 414
 415         while (nb_pkts) {
 416                 uint16_t ret, num;
 417
 418                 /*
 419                  * Ensure that no more than RTE_BNXT_MAX_TX_BURST packets
 420                  * are transmitted before the next completion.
 421                  */
 422                 num = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);
 423
 424                 /*
 425                  * Ensure that a ring wrap does not occur within a call to
 426                  * bnxt_xmit_fixed_burst_vec().
 427                  */
 428                 num = RTE_MIN(num, ring_size -
 429                                    (txr->tx_raw_prod & (ring_size - 1)));
 430                 ret = bnxt_xmit_fixed_burst_vec(txq, &tx_pkts[nb_sent], num);
 431                 nb_sent += ret;
 432                 nb_pkts -= ret;
 433                 if (ret < num)
 434                         break;
 435         }
 436
 437         return nb_sent;
 438 }
 439
 440 int __rte_cold
 441 bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)
 442 {
 443         return bnxt_rxq_vec_setup_common(rxq);
 444 }