drivers/net/bnxt/bnxt_rxtx_vec_sse.c

   1 /* SPDX-License-Identifier: BSD-3-Clause */
   2 /* Copyright(c) 2019-2020 Broadcom All rights reserved. */
   3
   4 #include <inttypes.h>
   5 #include <stdbool.h>
   6
   7 #include <rte_bitmap.h>
   8 #include <rte_byteorder.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memory.h>
  11 #include <rte_vect.h>
  12
  13 #include "bnxt.h"
  14 #include "bnxt_cpr.h"
  15 #include "bnxt_ring.h"
  16
  17 #include "bnxt_txq.h"
  18 #include "bnxt_txr.h"
  19 #include "bnxt_rxtx_vec_common.h"
  20
  21 /*
  22  * RX Ring handling
  23  */
  24
  25 #define GET_OL_FLAGS(rss_flags, ol_index, errors, pi, ol_flags)                \
  26 {                                                                              \
  27         uint32_t tmp, of;                                                      \
  28                                                                                \
  29         of = _mm_extract_epi32((rss_flags), (pi)) |                            \
  30                 bnxt_ol_flags_table[_mm_extract_epi32((ol_index), (pi))];      \
  31                                                                                \
  32         tmp = _mm_extract_epi32((errors), (pi));                               \
  33         if (tmp)                                                               \
  34                 of |= bnxt_ol_flags_err_table[tmp];                            \
  35         (ol_flags) = of;                                                       \
  36 }
  37
  38 #define GET_DESC_FIELDS(rxcmp, rxcmp1, shuf_msk, ptype_idx, pi, ret)           \
  39 {                                                                              \
  40         uint32_t ptype;                                                        \
  41         __m128i r;                                                             \
  42                                                                                \
  43         /* Set mbuf pkt_len, data_len, and rss_hash fields. */                 \
  44         r = _mm_shuffle_epi8((rxcmp), (shuf_msk));                             \
  45                                                                                \
  46         /* Set packet type. */                                                 \
  47         ptype = bnxt_ptype_table[_mm_extract_epi32((ptype_idx), (pi))];        \
  48         r = _mm_blend_epi16(r, _mm_set_epi32(0, 0, 0, ptype), 0x3);            \
  49                                                                                \
  50         /* Set vlan_tci. */                                                    \
  51         r = _mm_blend_epi16(r, _mm_slli_si128((rxcmp1), 6), 0x20);             \
  52         (ret) = r;                                                             \
  53 }
  54
  55 static inline void
  56 descs_to_mbufs(__m128i mm_rxcmp[4], __m128i mm_rxcmp1[4],
  57                __m128i mbuf_init, struct rte_mbuf **mbuf)
  58 {
  59         const __m128i shuf_msk =
  60                 _mm_set_epi8(15, 14, 13, 12,          /* rss */
  61                              0xFF, 0xFF,              /* vlan_tci (zeroes) */
  62                              3, 2,                    /* data_len */
  63                              0xFF, 0xFF, 3, 2,        /* pkt_len */
  64                              0xFF, 0xFF, 0xFF, 0xFF); /* pkt_type (zeroes) */
  65         const __m128i flags_type_mask =
  66                 _mm_set_epi32(RX_PKT_CMPL_FLAGS_ITYPE_MASK,
  67                               RX_PKT_CMPL_FLAGS_ITYPE_MASK,
  68                               RX_PKT_CMPL_FLAGS_ITYPE_MASK,
  69                               RX_PKT_CMPL_FLAGS_ITYPE_MASK);
  70         const __m128i flags2_mask1 =
  71                 _mm_set_epi32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
  72                                 RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC,
  73                               RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
  74                                 RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC,
  75                               RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
  76                                 RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC,
  77                               RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
  78                                 RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC);
  79         const __m128i flags2_mask2 =
  80                 _mm_set_epi32(RX_PKT_CMPL_FLAGS2_IP_TYPE,
  81                               RX_PKT_CMPL_FLAGS2_IP_TYPE,
  82                               RX_PKT_CMPL_FLAGS2_IP_TYPE,
  83                               RX_PKT_CMPL_FLAGS2_IP_TYPE);
  84         const __m128i rss_mask =
  85                 _mm_set_epi32(RX_PKT_CMPL_FLAGS_RSS_VALID,
  86                               RX_PKT_CMPL_FLAGS_RSS_VALID,
  87                               RX_PKT_CMPL_FLAGS_RSS_VALID,
  88                               RX_PKT_CMPL_FLAGS_RSS_VALID);
  89         __m128i t0, t1, flags_type, flags2, index, errors, rss_flags;
  90         __m128i ptype_idx;
  91         uint32_t ol_flags;
  92
  93         /* Compute packet type table indexes for four packets */
  94         t0 = _mm_unpacklo_epi32(mm_rxcmp[0], mm_rxcmp[1]);
  95         t1 = _mm_unpacklo_epi32(mm_rxcmp[2], mm_rxcmp[3]);
  96         flags_type = _mm_unpacklo_epi64(t0, t1);
  97         ptype_idx =
  98                 _mm_srli_epi32(_mm_and_si128(flags_type, flags_type_mask), 9);
  99
 100         t0 = _mm_unpacklo_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
 101         t1 = _mm_unpacklo_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
 102         flags2 = _mm_unpacklo_epi64(t0, t1);
 103
 104         ptype_idx = _mm_or_si128(ptype_idx,
 105                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask1), 2));
 106         ptype_idx = _mm_or_si128(ptype_idx,
 107                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask2), 7));
 108
 109         /* Extract RSS valid flags for four packets. */
 110         rss_flags = _mm_srli_epi32(_mm_and_si128(flags_type, rss_mask), 9);
 111
 112         /* Extract errors_v2 fields for four packets. */
 113         t0 = _mm_unpackhi_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
 114         t1 = _mm_unpackhi_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
 115
 116         /* Compute ol_flags and checksum error indexes for four packets. */
 117         flags2 = _mm_and_si128(flags2, _mm_set_epi32(0x1F, 0x1F, 0x1F, 0x1F));
 118
 119         errors = _mm_srli_epi32(_mm_unpacklo_epi64(t0, t1), 4);
 120         errors = _mm_and_si128(errors, _mm_set_epi32(0xF, 0xF, 0xF, 0xF));
 121         errors = _mm_and_si128(errors, flags2);
 122
 123         index = _mm_andnot_si128(errors, flags2);
 124
 125         /* Update mbuf rearm_data for four packets. */
 126         GET_OL_FLAGS(rss_flags, index, errors, 0, ol_flags);
 127         _mm_store_si128((void *)&mbuf[0]->rearm_data,
 128                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 129
 130         GET_OL_FLAGS(rss_flags, index, errors, 1, ol_flags);
 131         _mm_store_si128((void *)&mbuf[1]->rearm_data,
 132                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 133
 134         GET_OL_FLAGS(rss_flags, index, errors, 2, ol_flags);
 135         _mm_store_si128((void *)&mbuf[2]->rearm_data,
 136                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 137
 138         GET_OL_FLAGS(rss_flags, index, errors, 3, ol_flags);
 139         _mm_store_si128((void *)&mbuf[3]->rearm_data,
 140                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
 141
 142         /* Update mbuf rx_descriptor_fields1 for four packes. */
 143         GET_DESC_FIELDS(mm_rxcmp[0], mm_rxcmp1[0], shuf_msk, ptype_idx, 0, t0);
 144         _mm_store_si128((void *)&mbuf[0]->rx_descriptor_fields1, t0);
 145
 146         GET_DESC_FIELDS(mm_rxcmp[1], mm_rxcmp1[1], shuf_msk, ptype_idx, 1, t0);
 147         _mm_store_si128((void *)&mbuf[1]->rx_descriptor_fields1, t0);
 148
 149         GET_DESC_FIELDS(mm_rxcmp[2], mm_rxcmp1[2], shuf_msk, ptype_idx, 2, t0);
 150         _mm_store_si128((void *)&mbuf[2]->rx_descriptor_fields1, t0);
 151
 152         GET_DESC_FIELDS(mm_rxcmp[3], mm_rxcmp1[3], shuf_msk, ptype_idx, 3, t0);
 153         _mm_store_si128((void *)&mbuf[3]->rx_descriptor_fields1, t0);
 154 }
 155
 156 uint16_t
 157 bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
 158                    uint16_t nb_pkts)
 159 {
 160         struct bnxt_rx_queue *rxq = rx_queue;
 161         const __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);
 162         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 163         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 164         uint16_t cp_ring_size = cpr->cp_ring_struct->ring_size;
 165         uint16_t rx_ring_size = rxr->rx_ring_struct->ring_size;
 166         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
 167         uint64_t valid, desc_valid_mask = ~0ULL;
 168         const __m128i info3_v_mask = _mm_set_epi32(CMPL_BASE_V, CMPL_BASE_V,
 169                                                    CMPL_BASE_V, CMPL_BASE_V);
 170         uint32_t raw_cons = cpr->cp_raw_cons;
 171         uint32_t cons, mbcons;
 172         int nb_rx_pkts = 0;
 173         const __m128i valid_target =
 174                 _mm_set_epi32(!!(raw_cons & cp_ring_size),
 175                               !!(raw_cons & cp_ring_size),
 176                               !!(raw_cons & cp_ring_size),
 177                               !!(raw_cons & cp_ring_size));
 178         int i;
 179
 180         /* If Rx Q was stopped return */
 181         if (unlikely(!rxq->rx_started))
 182                 return 0;
 183
 184         if (rxq->rxrearm_nb >= rxq->rx_free_thresh)
 185                 bnxt_rxq_rearm(rxq, rxr);
 186
 187         /* Return no more than RTE_BNXT_MAX_RX_BURST per call. */
 188         nb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);
 189
 190         cons = raw_cons & (cp_ring_size - 1);
 191         mbcons = (raw_cons / 2) & (rx_ring_size - 1);
 192
 193         /* Prefetch first four descriptor pairs. */
 194         rte_prefetch0(&cp_desc_ring[cons]);
 195         rte_prefetch0(&cp_desc_ring[cons + 4]);
 196
 197         /* Ensure that we do not go past the ends of the rings. */
 198         nb_pkts = RTE_MIN(nb_pkts, RTE_MIN(rx_ring_size - mbcons,
 199                                            (cp_ring_size - cons) / 2));
 200         /*
 201          * If we are at the end of the ring, ensure that descriptors after the
 202          * last valid entry are not treated as valid. Otherwise, force the
 203          * maximum number of packets to receive to be a multiple of the per-
 204          * loop count.
 205          */
 206         if (nb_pkts < RTE_BNXT_DESCS_PER_LOOP)
 207                 desc_valid_mask >>= 16 * (RTE_BNXT_DESCS_PER_LOOP - nb_pkts);
 208         else
 209                 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);
 210
 211         /* Handle RX burst request */
 212         for (i = 0; i < nb_pkts; i += RTE_BNXT_DESCS_PER_LOOP,
 213                                   cons += RTE_BNXT_DESCS_PER_LOOP * 2,
 214                                   mbcons += RTE_BNXT_DESCS_PER_LOOP) {
 215                 __m128i rxcmp1[RTE_BNXT_DESCS_PER_LOOP];
 216                 __m128i rxcmp[RTE_BNXT_DESCS_PER_LOOP];
 217                 __m128i tmp0, tmp1, info3_v;
 218                 uint32_t num_valid;
 219
 220                 /* Copy four mbuf pointers to output array. */
 221                 tmp0 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons]);
 222 #ifdef RTE_ARCH_X86_64
 223                 tmp1 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons + 2]);
 224 #endif
 225                 _mm_storeu_si128((void *)&rx_pkts[i], tmp0);
 226 #ifdef RTE_ARCH_X86_64
 227                 _mm_storeu_si128((void *)&rx_pkts[i + 2], tmp1);
 228 #endif
 229
 230                 /* Prefetch four descriptor pairs for next iteration. */
 231                 if (i + RTE_BNXT_DESCS_PER_LOOP < nb_pkts) {
 232                         rte_prefetch0(&cp_desc_ring[cons + 8]);
 233                         rte_prefetch0(&cp_desc_ring[cons + 12]);
 234                 }
 235
 236                 /*
 237                  * Load the four current descriptors into SSE registers in
 238                  * reverse order to ensure consistent state.
 239                  */
 240                 rxcmp1[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 7]);
 241                 rte_compiler_barrier();
 242                 rxcmp[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 6]);
 243
 244                 rxcmp1[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 5]);
 245                 rte_compiler_barrier();
 246                 rxcmp[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 4]);
 247
 248                 tmp1 = _mm_unpackhi_epi32(rxcmp1[2], rxcmp1[3]);
 249
 250                 rxcmp1[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 3]);
 251                 rte_compiler_barrier();
 252                 rxcmp[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 2]);
 253
 254                 rxcmp1[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 1]);
 255                 rte_compiler_barrier();
 256                 rxcmp[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 0]);
 257
 258                 tmp0 = _mm_unpackhi_epi32(rxcmp1[0], rxcmp1[1]);
 259
 260                 /* Isolate descriptor valid flags. */
 261                 info3_v = _mm_and_si128(_mm_unpacklo_epi64(tmp0, tmp1),
 262                                         info3_v_mask);
 263                 info3_v = _mm_xor_si128(info3_v, valid_target);
 264
 265                 /*
 266                  * Pack the 128-bit array of valid descriptor flags into 64
 267                  * bits and count the number of set bits in order to determine
 268                  * the number of valid descriptors.
 269                  */
 270                 valid = _mm_cvtsi128_si64(_mm_packs_epi32(info3_v, info3_v));
 271                 num_valid = __builtin_popcountll(valid & desc_valid_mask);
 272
 273                 switch (num_valid) {
 274                 case 4:
 275                         rxr->rx_buf_ring[mbcons + 3] = NULL;
 276                         /* FALLTHROUGH */
 277                 case 3:
 278                         rxr->rx_buf_ring[mbcons + 2] = NULL;
 279                         /* FALLTHROUGH */
 280                 case 2:
 281                         rxr->rx_buf_ring[mbcons + 1] = NULL;
 282                         /* FALLTHROUGH */
 283                 case 1:
 284                         rxr->rx_buf_ring[mbcons + 0] = NULL;
 285                         break;
 286                 case 0:
 287                         goto out;
 288                 }
 289
 290                 descs_to_mbufs(rxcmp, rxcmp1, mbuf_init, &rx_pkts[nb_rx_pkts]);
 291                 nb_rx_pkts += num_valid;
 292
 293                 if (num_valid < RTE_BNXT_DESCS_PER_LOOP)
 294                         break;
 295         }
 296
 297 out:
 298         if (nb_rx_pkts) {
 299                 rxr->rx_prod =
 300                         RING_ADV(rxr->rx_ring_struct, rxr->rx_prod, nb_rx_pkts);
 301
 302                 rxq->rxrearm_nb += nb_rx_pkts;
 303                 cpr->cp_raw_cons += 2 * nb_rx_pkts;
 304                 cpr->valid =
 305                         !!(cpr->cp_raw_cons & cpr->cp_ring_struct->ring_size);
 306                 bnxt_db_cq(cpr);
 307         }
 308
 309         return nb_rx_pkts;
 310 }
 311
 312 static void
 313 bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)
 314 {
 315         struct bnxt_cp_ring_info *cpr = txq->cp_ring;
 316         uint32_t raw_cons = cpr->cp_raw_cons;
 317         uint32_t cons;
 318         uint32_t nb_tx_pkts = 0;
 319         struct tx_cmpl *txcmp;
 320         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
 321         struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
 322         uint32_t ring_mask = cp_ring_struct->ring_mask;
 323
 324         do {
 325                 cons = RING_CMPL(ring_mask, raw_cons);
 326                 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons];
 327
 328                 if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct))
 329                         break;
 330
 331                 if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))
 332                         nb_tx_pkts += txcmp->opaque;
 333                 else
 334                         RTE_LOG_DP(ERR, PMD,
 335                                    "Unhandled CMP type %02x\n",
 336                                    CMP_TYPE(txcmp));
 337                 raw_cons = NEXT_RAW_CMP(raw_cons);
 338         } while (nb_tx_pkts < ring_mask);
 339
 340         cpr->valid = !!(raw_cons & cp_ring_struct->ring_size);
 341         if (nb_tx_pkts) {
 342                 if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
 343                         bnxt_tx_cmp_vec_fast(txq, nb_tx_pkts);
 344                 else
 345                         bnxt_tx_cmp_vec(txq, nb_tx_pkts);
 346                 cpr->cp_raw_cons = raw_cons;
 347                 bnxt_db_cq(cpr);
 348         }
 349 }
 350
 351 static inline void
 352 bnxt_xmit_one(struct rte_mbuf *mbuf, struct tx_bd_long *txbd,
 353               struct bnxt_sw_tx_bd *tx_buf)
 354 {
 355         __m128i desc;
 356
 357         tx_buf->mbuf = mbuf;
 358         tx_buf->nr_bds = 1;
 359
 360         desc = _mm_set_epi64x(mbuf->buf_iova + mbuf->data_off,
 361                               bnxt_xmit_flags_len(mbuf->data_len,
 362                                                   TX_BD_FLAGS_NOCMPL));
 363         desc = _mm_blend_epi16(desc, _mm_set_epi16(0, 0, 0, 0, 0, 0,
 364                                                    mbuf->data_len, 0), 0x02);
 365         _mm_store_si128((void *)txbd, desc);
 366 }
 367
 368 static uint16_t
 369 bnxt_xmit_fixed_burst_vec(struct bnxt_tx_queue *txq, struct rte_mbuf **tx_pkts,
 370                           uint16_t nb_pkts)
 371 {
 372         struct bnxt_tx_ring_info *txr = txq->tx_ring;
 373         uint16_t tx_prod = txr->tx_prod;
 374         struct tx_bd_long *txbd;
 375         struct bnxt_sw_tx_bd *tx_buf;
 376         uint16_t to_send;
 377
 378         txbd = &txr->tx_desc_ring[tx_prod];
 379         tx_buf = &txr->tx_buf_ring[tx_prod];
 380
 381         /* Prefetch next transmit buffer descriptors. */
 382         rte_prefetch0(txbd);
 383         rte_prefetch0(txbd + 3);
 384
 385         nb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));
 386
 387         if (unlikely(nb_pkts == 0))
 388                 return 0;
 389
 390         /* Handle TX burst request */
 391         to_send = nb_pkts;
 392         while (to_send >= RTE_BNXT_DESCS_PER_LOOP) {
 393                 /* Prefetch next transmit buffer descriptors. */
 394                 rte_prefetch0(txbd + 4);
 395                 rte_prefetch0(txbd + 7);
 396
 397                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
 398                 bnxt_xmit_one(tx_pkts[1], txbd++, tx_buf++);
 399                 bnxt_xmit_one(tx_pkts[2], txbd++, tx_buf++);
 400                 bnxt_xmit_one(tx_pkts[3], txbd++, tx_buf++);
 401
 402                 to_send -= RTE_BNXT_DESCS_PER_LOOP;
 403                 tx_pkts += RTE_BNXT_DESCS_PER_LOOP;
 404         }
 405
 406         while (to_send) {
 407                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
 408                 to_send--;
 409                 tx_pkts++;
 410         }
 411
 412         /* Request a completion for the final packet of burst. */
 413         rte_compiler_barrier();
 414         txbd[-1].opaque = nb_pkts;
 415         txbd[-1].flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
 416
 417         tx_prod = RING_ADV(txr->tx_ring_struct, tx_prod, nb_pkts);
 418         bnxt_db_write(&txr->tx_db, tx_prod);
 419
 420         txr->tx_prod = tx_prod;
 421
 422         return nb_pkts;
 423 }
 424
 425 uint16_t
 426 bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
 427                    uint16_t nb_pkts)
 428 {
 429         int nb_sent = 0;
 430         struct bnxt_tx_queue *txq = tx_queue;
 431         struct bnxt_tx_ring_info *txr = txq->tx_ring;
 432         uint16_t ring_size = txr->tx_ring_struct->ring_size;
 433
 434         /* Tx queue was stopped; wait for it to be restarted */
 435         if (unlikely(!txq->tx_started)) {
 436                 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
 437                 return 0;
 438         }
 439
 440         /* Handle TX completions */
 441         if (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)
 442                 bnxt_handle_tx_cp_vec(txq);
 443
 444         while (nb_pkts) {
 445                 uint16_t ret, num;
 446
 447                 /*
 448                  * Ensure that no more than RTE_BNXT_MAX_TX_BURST packets
 449                  * are transmitted before the next completion.
 450                  */
 451                 num = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);
 452
 453                 /*
 454                  * Ensure that a ring wrap does not occur within a call to
 455                  * bnxt_xmit_fixed_burst_vec().
 456                  */
 457                 num = RTE_MIN(num,
 458                               ring_size - (txr->tx_prod & (ring_size - 1)));
 459                 ret = bnxt_xmit_fixed_burst_vec(txq, &tx_pkts[nb_sent], num);
 460                 nb_sent += ret;
 461                 nb_pkts -= ret;
 462                 if (ret < num)
 463                         break;
 464         }
 465
 466         return nb_sent;
 467 }
 468
 469 int __rte_cold
 470 bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)
 471 {
 472         return bnxt_rxq_vec_setup_common(rxq);
 473 }