net/bnxt: refactor HW ptype mapping table
[dpdk.git] / drivers / net / bnxt / bnxt_rxtx_vec_sse.c
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2019-2021 Broadcom All rights reserved. */
3
4 #include <inttypes.h>
5 #include <stdbool.h>
6
7 #include <rte_bitmap.h>
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
10 #include <rte_memory.h>
11 #include <rte_vect.h>
12
13 #include "bnxt.h"
14 #include "bnxt_cpr.h"
15 #include "bnxt_ring.h"
16
17 #include "bnxt_txq.h"
18 #include "bnxt_txr.h"
19 #include "bnxt_rxtx_vec_common.h"
20
21 /*
22  * RX Ring handling
23  */
24
25 #define GET_OL_FLAGS(rss_flags, ol_index, errors, pi, ol_flags)                \
26 {                                                                              \
27         uint32_t tmp, of;                                                      \
28                                                                                \
29         of = _mm_extract_epi32((rss_flags), (pi)) |                            \
30                 rxr->ol_flags_table[_mm_extract_epi32((ol_index), (pi))];      \
31                                                                                \
32         tmp = _mm_extract_epi32((errors), (pi));                               \
33         if (tmp)                                                               \
34                 of |= rxr->ol_flags_err_table[tmp];                            \
35         (ol_flags) = of;                                                       \
36 }
37
38 #define GET_DESC_FIELDS(rxcmp, rxcmp1, shuf_msk, ptype_idx, pi, ret)           \
39 {                                                                              \
40         uint32_t ptype;                                                        \
41         __m128i r;                                                             \
42                                                                                \
43         /* Set mbuf pkt_len, data_len, and rss_hash fields. */                 \
44         r = _mm_shuffle_epi8((rxcmp), (shuf_msk));                             \
45                                                                                \
46         /* Set packet type. */                                                 \
47         ptype = bnxt_ptype_table[_mm_extract_epi32((ptype_idx), (pi))];        \
48         r = _mm_blend_epi16(r, _mm_set_epi32(0, 0, 0, ptype), 0x3);            \
49                                                                                \
50         /* Set vlan_tci. */                                                    \
51         r = _mm_blend_epi16(r, _mm_slli_si128((rxcmp1), 6), 0x20);             \
52         (ret) = r;                                                             \
53 }
54
55 static inline void
56 descs_to_mbufs(__m128i mm_rxcmp[4], __m128i mm_rxcmp1[4],
57                __m128i mbuf_init, struct rte_mbuf **mbuf,
58                struct bnxt_rx_ring_info *rxr)
59 {
60         const __m128i shuf_msk =
61                 _mm_set_epi8(15, 14, 13, 12,          /* rss */
62                              0xFF, 0xFF,              /* vlan_tci (zeroes) */
63                              3, 2,                    /* data_len */
64                              0xFF, 0xFF, 3, 2,        /* pkt_len */
65                              0xFF, 0xFF, 0xFF, 0xFF); /* pkt_type (zeroes) */
66         const __m128i flags_type_mask =
67                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
68         const __m128i flags2_mask1 =
69                 _mm_set1_epi32(CMPL_FLAGS2_VLAN_TUN_MSK);
70         const __m128i flags2_mask2 =
71                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS2_IP_TYPE);
72         const __m128i rss_mask =
73                 _mm_set1_epi32(RX_PKT_CMPL_FLAGS_RSS_VALID);
74         __m128i t0, t1, flags_type, flags2, index, errors, rss_flags;
75         __m128i ptype_idx, is_tunnel;
76         uint32_t ol_flags;
77
78         /* Validate ptype table indexing at build time. */
79         bnxt_check_ptype_constants();
80
81         /* Compute packet type table indexes for four packets */
82         t0 = _mm_unpacklo_epi32(mm_rxcmp[0], mm_rxcmp[1]);
83         t1 = _mm_unpacklo_epi32(mm_rxcmp[2], mm_rxcmp[3]);
84         flags_type = _mm_unpacklo_epi64(t0, t1);
85         ptype_idx = _mm_srli_epi32(_mm_and_si128(flags_type, flags_type_mask),
86                         RX_PKT_CMPL_FLAGS_ITYPE_SFT - BNXT_PTYPE_TBL_TYPE_SFT);
87
88         t0 = _mm_unpacklo_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
89         t1 = _mm_unpacklo_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
90         flags2 = _mm_unpacklo_epi64(t0, t1);
91
92         ptype_idx = _mm_or_si128(ptype_idx,
93                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask1),
94                                        RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT -
95                                        BNXT_PTYPE_TBL_VLAN_SFT));
96         ptype_idx = _mm_or_si128(ptype_idx,
97                         _mm_srli_epi32(_mm_and_si128(flags2, flags2_mask2),
98                                        RX_PKT_CMPL_FLAGS2_IP_TYPE_SFT -
99                                        BNXT_PTYPE_TBL_IP_VER_SFT));
100
101         /* Extract RSS valid flags for four packets. */
102         rss_flags = _mm_srli_epi32(_mm_and_si128(flags_type, rss_mask), 9);
103
104         /* Extract errors_v2 fields for four packets. */
105         t0 = _mm_unpackhi_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
106         t1 = _mm_unpackhi_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
107
108         /* Compute ol_flags and checksum error indexes for four packets. */
109         is_tunnel = _mm_and_si128(flags2, _mm_set1_epi32(4));
110         is_tunnel = _mm_slli_epi32(is_tunnel, 3);
111         flags2 = _mm_and_si128(flags2, _mm_set1_epi32(0x1F));
112
113         errors = _mm_srli_epi32(_mm_unpacklo_epi64(t0, t1), 4);
114         errors = _mm_and_si128(errors, _mm_set1_epi32(0xF));
115         errors = _mm_and_si128(errors, flags2);
116
117         index = _mm_andnot_si128(errors, flags2);
118         errors = _mm_or_si128(errors, _mm_srli_epi32(is_tunnel, 1));
119         index = _mm_or_si128(index, is_tunnel);
120
121         /* Update mbuf rearm_data for four packets. */
122         GET_OL_FLAGS(rss_flags, index, errors, 0, ol_flags);
123         _mm_store_si128((void *)&mbuf[0]->rearm_data,
124                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
125
126         GET_OL_FLAGS(rss_flags, index, errors, 1, ol_flags);
127         _mm_store_si128((void *)&mbuf[1]->rearm_data,
128                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
129
130         GET_OL_FLAGS(rss_flags, index, errors, 2, ol_flags);
131         _mm_store_si128((void *)&mbuf[2]->rearm_data,
132                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
133
134         GET_OL_FLAGS(rss_flags, index, errors, 3, ol_flags);
135         _mm_store_si128((void *)&mbuf[3]->rearm_data,
136                         _mm_or_si128(mbuf_init, _mm_set_epi64x(ol_flags, 0)));
137
138         /* Update mbuf rx_descriptor_fields1 for four packes. */
139         GET_DESC_FIELDS(mm_rxcmp[0], mm_rxcmp1[0], shuf_msk, ptype_idx, 0, t0);
140         _mm_store_si128((void *)&mbuf[0]->rx_descriptor_fields1, t0);
141
142         GET_DESC_FIELDS(mm_rxcmp[1], mm_rxcmp1[1], shuf_msk, ptype_idx, 1, t0);
143         _mm_store_si128((void *)&mbuf[1]->rx_descriptor_fields1, t0);
144
145         GET_DESC_FIELDS(mm_rxcmp[2], mm_rxcmp1[2], shuf_msk, ptype_idx, 2, t0);
146         _mm_store_si128((void *)&mbuf[2]->rx_descriptor_fields1, t0);
147
148         GET_DESC_FIELDS(mm_rxcmp[3], mm_rxcmp1[3], shuf_msk, ptype_idx, 3, t0);
149         _mm_store_si128((void *)&mbuf[3]->rx_descriptor_fields1, t0);
150 }
151
152 uint16_t
153 bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
154                    uint16_t nb_pkts)
155 {
156         struct bnxt_rx_queue *rxq = rx_queue;
157         const __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);
158         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
159         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
160         uint16_t cp_ring_size = cpr->cp_ring_struct->ring_size;
161         uint16_t rx_ring_size = rxr->rx_ring_struct->ring_size;
162         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
163         uint64_t valid, desc_valid_mask = ~0ULL;
164         const __m128i info3_v_mask = _mm_set1_epi32(CMPL_BASE_V);
165         uint32_t raw_cons = cpr->cp_raw_cons;
166         uint32_t cons, mbcons;
167         int nb_rx_pkts = 0;
168         const __m128i valid_target =
169                 _mm_set1_epi32(!!(raw_cons & cp_ring_size));
170         int i;
171
172         /* If Rx Q was stopped return */
173         if (unlikely(!rxq->rx_started))
174                 return 0;
175
176         if (rxq->rxrearm_nb >= rxq->rx_free_thresh)
177                 bnxt_rxq_rearm(rxq, rxr);
178
179         /* Return no more than RTE_BNXT_MAX_RX_BURST per call. */
180         nb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);
181
182         cons = raw_cons & (cp_ring_size - 1);
183         mbcons = (raw_cons / 2) & (rx_ring_size - 1);
184
185         /* Prefetch first four descriptor pairs. */
186         rte_prefetch0(&cp_desc_ring[cons]);
187         rte_prefetch0(&cp_desc_ring[cons + 4]);
188
189         /* Ensure that we do not go past the ends of the rings. */
190         nb_pkts = RTE_MIN(nb_pkts, RTE_MIN(rx_ring_size - mbcons,
191                                            (cp_ring_size - cons) / 2));
192         /*
193          * If we are at the end of the ring, ensure that descriptors after the
194          * last valid entry are not treated as valid. Otherwise, force the
195          * maximum number of packets to receive to be a multiple of the per-
196          * loop count.
197          */
198         if (nb_pkts < RTE_BNXT_DESCS_PER_LOOP)
199                 desc_valid_mask >>= 16 * (RTE_BNXT_DESCS_PER_LOOP - nb_pkts);
200         else
201                 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);
202
203         /* Handle RX burst request */
204         for (i = 0; i < nb_pkts; i += RTE_BNXT_DESCS_PER_LOOP,
205                                   cons += RTE_BNXT_DESCS_PER_LOOP * 2,
206                                   mbcons += RTE_BNXT_DESCS_PER_LOOP) {
207                 __m128i rxcmp1[RTE_BNXT_DESCS_PER_LOOP];
208                 __m128i rxcmp[RTE_BNXT_DESCS_PER_LOOP];
209                 __m128i tmp0, tmp1, info3_v;
210                 uint32_t num_valid;
211
212                 /* Copy four mbuf pointers to output array. */
213                 tmp0 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons]);
214 #ifdef RTE_ARCH_X86_64
215                 tmp1 = _mm_loadu_si128((void *)&rxr->rx_buf_ring[mbcons + 2]);
216 #endif
217                 _mm_storeu_si128((void *)&rx_pkts[i], tmp0);
218 #ifdef RTE_ARCH_X86_64
219                 _mm_storeu_si128((void *)&rx_pkts[i + 2], tmp1);
220 #endif
221
222                 /* Prefetch four descriptor pairs for next iteration. */
223                 if (i + RTE_BNXT_DESCS_PER_LOOP < nb_pkts) {
224                         rte_prefetch0(&cp_desc_ring[cons + 8]);
225                         rte_prefetch0(&cp_desc_ring[cons + 12]);
226                 }
227
228                 /*
229                  * Load the four current descriptors into SSE registers in
230                  * reverse order to ensure consistent state.
231                  */
232                 rxcmp1[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 7]);
233                 rte_compiler_barrier();
234                 rxcmp[3] = _mm_load_si128((void *)&cp_desc_ring[cons + 6]);
235
236                 rxcmp1[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 5]);
237                 rte_compiler_barrier();
238                 rxcmp[2] = _mm_load_si128((void *)&cp_desc_ring[cons + 4]);
239
240                 tmp1 = _mm_unpackhi_epi32(rxcmp1[2], rxcmp1[3]);
241
242                 rxcmp1[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 3]);
243                 rte_compiler_barrier();
244                 rxcmp[1] = _mm_load_si128((void *)&cp_desc_ring[cons + 2]);
245
246                 rxcmp1[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 1]);
247                 rte_compiler_barrier();
248                 rxcmp[0] = _mm_load_si128((void *)&cp_desc_ring[cons + 0]);
249
250                 tmp0 = _mm_unpackhi_epi32(rxcmp1[0], rxcmp1[1]);
251
252                 /* Isolate descriptor valid flags. */
253                 info3_v = _mm_and_si128(_mm_unpacklo_epi64(tmp0, tmp1),
254                                         info3_v_mask);
255                 info3_v = _mm_xor_si128(info3_v, valid_target);
256
257                 /*
258                  * Pack the 128-bit array of valid descriptor flags into 64
259                  * bits and count the number of set bits in order to determine
260                  * the number of valid descriptors.
261                  */
262                 valid = _mm_cvtsi128_si64(_mm_packs_epi32(info3_v, info3_v));
263                 num_valid = __builtin_popcountll(valid & desc_valid_mask);
264
265                 if (num_valid == 0)
266                         break;
267
268                 descs_to_mbufs(rxcmp, rxcmp1, mbuf_init, &rx_pkts[nb_rx_pkts],
269                                rxr);
270                 nb_rx_pkts += num_valid;
271
272                 if (num_valid < RTE_BNXT_DESCS_PER_LOOP)
273                         break;
274         }
275
276         if (nb_rx_pkts) {
277                 rxr->rx_raw_prod = RING_ADV(rxr->rx_raw_prod, nb_rx_pkts);
278
279                 rxq->rxrearm_nb += nb_rx_pkts;
280                 cpr->cp_raw_cons += 2 * nb_rx_pkts;
281                 cpr->valid =
282                         !!(cpr->cp_raw_cons & cpr->cp_ring_struct->ring_size);
283                 bnxt_db_cq(cpr);
284         }
285
286         return nb_rx_pkts;
287 }
288
289 static void
290 bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)
291 {
292         struct bnxt_cp_ring_info *cpr = txq->cp_ring;
293         uint32_t raw_cons = cpr->cp_raw_cons;
294         uint32_t cons;
295         uint32_t nb_tx_pkts = 0;
296         struct tx_cmpl *txcmp;
297         struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
298         struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
299         uint32_t ring_mask = cp_ring_struct->ring_mask;
300
301         do {
302                 cons = RING_CMPL(ring_mask, raw_cons);
303                 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons];
304
305                 if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct))
306                         break;
307
308                 if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))
309                         nb_tx_pkts += txcmp->opaque;
310                 else
311                         RTE_LOG_DP(ERR, PMD,
312                                    "Unhandled CMP type %02x\n",
313                                    CMP_TYPE(txcmp));
314                 raw_cons = NEXT_RAW_CMP(raw_cons);
315         } while (nb_tx_pkts < ring_mask);
316
317         cpr->valid = !!(raw_cons & cp_ring_struct->ring_size);
318         if (nb_tx_pkts) {
319                 if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
320                         bnxt_tx_cmp_vec_fast(txq, nb_tx_pkts);
321                 else
322                         bnxt_tx_cmp_vec(txq, nb_tx_pkts);
323                 cpr->cp_raw_cons = raw_cons;
324                 bnxt_db_cq(cpr);
325         }
326 }
327
328 static inline void
329 bnxt_xmit_one(struct rte_mbuf *mbuf, struct tx_bd_long *txbd,
330               struct rte_mbuf **tx_buf)
331 {
332         __m128i desc;
333
334         *tx_buf = mbuf;
335
336         desc = _mm_set_epi64x(mbuf->buf_iova + mbuf->data_off,
337                               bnxt_xmit_flags_len(mbuf->data_len,
338                                                   TX_BD_FLAGS_NOCMPL));
339         desc = _mm_blend_epi16(desc, _mm_set_epi16(0, 0, 0, 0, 0, 0,
340                                                    mbuf->data_len, 0), 0x02);
341         _mm_store_si128((void *)txbd, desc);
342 }
343
344 static uint16_t
345 bnxt_xmit_fixed_burst_vec(struct bnxt_tx_queue *txq, struct rte_mbuf **tx_pkts,
346                           uint16_t nb_pkts)
347 {
348         struct bnxt_tx_ring_info *txr = txq->tx_ring;
349         uint16_t tx_prod, tx_raw_prod = txr->tx_raw_prod;
350         struct tx_bd_long *txbd;
351         struct rte_mbuf **tx_buf;
352         uint16_t to_send;
353
354         tx_prod = RING_IDX(txr->tx_ring_struct, tx_raw_prod);
355         txbd = &txr->tx_desc_ring[tx_prod];
356         tx_buf = &txr->tx_buf_ring[tx_prod];
357
358         /* Prefetch next transmit buffer descriptors. */
359         rte_prefetch0(txbd);
360         rte_prefetch0(txbd + 3);
361
362         nb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));
363
364         if (unlikely(nb_pkts == 0))
365                 return 0;
366
367         /* Handle TX burst request */
368         to_send = nb_pkts;
369         while (to_send >= RTE_BNXT_DESCS_PER_LOOP) {
370                 /* Prefetch next transmit buffer descriptors. */
371                 rte_prefetch0(txbd + 4);
372                 rte_prefetch0(txbd + 7);
373
374                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
375                 bnxt_xmit_one(tx_pkts[1], txbd++, tx_buf++);
376                 bnxt_xmit_one(tx_pkts[2], txbd++, tx_buf++);
377                 bnxt_xmit_one(tx_pkts[3], txbd++, tx_buf++);
378
379                 to_send -= RTE_BNXT_DESCS_PER_LOOP;
380                 tx_pkts += RTE_BNXT_DESCS_PER_LOOP;
381         }
382
383         while (to_send) {
384                 bnxt_xmit_one(tx_pkts[0], txbd++, tx_buf++);
385                 to_send--;
386                 tx_pkts++;
387         }
388
389         /* Request a completion for the final packet of burst. */
390         rte_compiler_barrier();
391         txbd[-1].opaque = nb_pkts;
392         txbd[-1].flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
393
394         tx_raw_prod += nb_pkts;
395         bnxt_db_write(&txr->tx_db, tx_raw_prod);
396
397         txr->tx_raw_prod = tx_raw_prod;
398
399         return nb_pkts;
400 }
401
402 uint16_t
403 bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
404                    uint16_t nb_pkts)
405 {
406         int nb_sent = 0;
407         struct bnxt_tx_queue *txq = tx_queue;
408         struct bnxt_tx_ring_info *txr = txq->tx_ring;
409         uint16_t ring_size = txr->tx_ring_struct->ring_size;
410
411         /* Tx queue was stopped; wait for it to be restarted */
412         if (unlikely(!txq->tx_started)) {
413                 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
414                 return 0;
415         }
416
417         /* Handle TX completions */
418         if (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)
419                 bnxt_handle_tx_cp_vec(txq);
420
421         while (nb_pkts) {
422                 uint16_t ret, num;
423
424                 /*
425                  * Ensure that no more than RTE_BNXT_MAX_TX_BURST packets
426                  * are transmitted before the next completion.
427                  */
428                 num = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);
429
430                 /*
431                  * Ensure that a ring wrap does not occur within a call to
432                  * bnxt_xmit_fixed_burst_vec().
433                  */
434                 num = RTE_MIN(num, ring_size -
435                                    (txr->tx_raw_prod & (ring_size - 1)));
436                 ret = bnxt_xmit_fixed_burst_vec(txq, &tx_pkts[nb_sent], num);
437                 nb_sent += ret;
438                 nb_pkts -= ret;
439                 if (ret < num)
440                         break;
441         }
442
443         return nb_sent;
444 }
445
446 int __rte_cold
447 bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)
448 {
449         return bnxt_rxq_vec_setup_common(rxq);
450 }