1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
12 #include "bnxt_ring.h"
15 #include "hsi_struct_def_dpdk.h"
22 void bnxt_free_tx_rings(struct bnxt *bp)
26 for (i = 0; i < (int)bp->tx_nr_rings; i++) {
27 struct bnxt_tx_queue *txq = bp->tx_queues[i];
32 bnxt_free_ring(txq->tx_ring->tx_ring_struct);
33 rte_free(txq->tx_ring->tx_ring_struct);
34 rte_free(txq->tx_ring);
36 bnxt_free_ring(txq->cp_ring->cp_ring_struct);
37 rte_free(txq->cp_ring->cp_ring_struct);
38 rte_free(txq->cp_ring);
41 bp->tx_queues[i] = NULL;
45 int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq)
47 struct bnxt_tx_ring_info *txr = txq->tx_ring;
48 struct bnxt_ring *ring = txr->tx_ring_struct;
50 txq->tx_wake_thresh = ring->ring_size / 2;
51 ring->fw_ring_id = INVALID_HW_RING_ID;
56 int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id)
58 struct bnxt_cp_ring_info *cpr;
59 struct bnxt_tx_ring_info *txr;
60 struct bnxt_ring *ring;
62 txr = rte_zmalloc_socket("bnxt_tx_ring",
63 sizeof(struct bnxt_tx_ring_info),
64 RTE_CACHE_LINE_SIZE, socket_id);
69 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
70 sizeof(struct bnxt_ring),
71 RTE_CACHE_LINE_SIZE, socket_id);
74 txr->tx_ring_struct = ring;
75 ring->ring_size = rte_align32pow2(txq->nb_tx_desc);
76 ring->ring_mask = ring->ring_size - 1;
77 ring->bd = (void *)txr->tx_desc_ring;
78 ring->bd_dma = txr->tx_desc_mapping;
79 ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_tx_bd);
80 ring->vmem = (void **)&txr->tx_buf_ring;
81 ring->fw_ring_id = INVALID_HW_RING_ID;
83 cpr = rte_zmalloc_socket("bnxt_tx_ring",
84 sizeof(struct bnxt_cp_ring_info),
85 RTE_CACHE_LINE_SIZE, socket_id);
90 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
91 sizeof(struct bnxt_ring),
92 RTE_CACHE_LINE_SIZE, socket_id);
95 cpr->cp_ring_struct = ring;
96 ring->ring_size = txr->tx_ring_struct->ring_size;
97 ring->ring_mask = ring->ring_size - 1;
98 ring->bd = (void *)cpr->cp_desc_ring;
99 ring->bd_dma = cpr->cp_desc_mapping;
102 ring->fw_ring_id = INVALID_HW_RING_ID;
107 static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,
108 struct bnxt_tx_queue *txq,
110 struct tx_bd_long **last_txbd)
112 struct bnxt_tx_ring_info *txr = txq->tx_ring;
113 uint32_t outer_tpid_bd = 0;
114 struct tx_bd_long *txbd;
115 struct tx_bd_long_hi *txbd1 = NULL;
116 uint32_t vlan_tag_flags;
117 bool long_bd = false;
118 unsigned short nr_bds = 0;
119 struct rte_mbuf *m_seg;
120 struct bnxt_sw_tx_bd *tx_buf;
121 static const uint32_t lhint_arr[4] = {
122 TX_BD_LONG_FLAGS_LHINT_LT512,
123 TX_BD_LONG_FLAGS_LHINT_LT1K,
124 TX_BD_LONG_FLAGS_LHINT_LT2K,
125 TX_BD_LONG_FLAGS_LHINT_LT2K
128 if (unlikely(is_bnxt_in_error(txq->bp)))
131 if (tx_pkt->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM |
132 PKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM |
133 PKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM |
134 PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN |
135 PKT_TX_TUNNEL_GENEVE | PKT_TX_IEEE1588_TMST |
137 (BNXT_TRUFLOW_EN(txq->bp) &&
138 (txq->bp->tx_cfa_action || txq->vfr_tx_cfa_action)))
141 nr_bds = long_bd + tx_pkt->nb_segs;
142 if (unlikely(bnxt_tx_avail(txq) < nr_bds))
145 /* Check if number of Tx descriptors is above HW limit */
146 if (unlikely(nr_bds > BNXT_MAX_TSO_SEGS)) {
148 "Num descriptors %d exceeds HW limit\n", nr_bds);
152 /* If packet length is less than minimum packet size, pad it */
153 if (unlikely(rte_pktmbuf_pkt_len(tx_pkt) < BNXT_MIN_PKT_SIZE)) {
154 uint8_t pad = BNXT_MIN_PKT_SIZE - rte_pktmbuf_pkt_len(tx_pkt);
155 char *seg = rte_pktmbuf_append(tx_pkt, pad);
159 "Failed to pad mbuf by %d bytes\n",
164 /* Note: data_len, pkt len are updated in rte_pktmbuf_append */
168 /* Check non zero data_len */
169 RTE_VERIFY(tx_pkt->data_len);
171 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
172 tx_buf->mbuf = tx_pkt;
173 tx_buf->nr_bds = nr_bds;
175 txbd = &txr->tx_desc_ring[txr->tx_prod];
176 txbd->opaque = *coal_pkts;
177 txbd->flags_type = nr_bds << TX_BD_LONG_FLAGS_BD_CNT_SFT;
178 txbd->flags_type |= TX_BD_SHORT_FLAGS_COAL_NOW;
179 txbd->flags_type |= TX_BD_LONG_FLAGS_NO_CMPL;
180 txbd->len = tx_pkt->data_len;
181 if (tx_pkt->pkt_len >= 2014)
182 txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K;
184 txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9];
185 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_buf->mbuf));
189 txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG;
192 /* HW can accelerate only outer vlan in QinQ mode */
193 if (tx_buf->mbuf->ol_flags & PKT_TX_QINQ_PKT) {
194 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
195 tx_buf->mbuf->vlan_tci_outer;
196 outer_tpid_bd = txq->bp->outer_tpid_bd &
197 BNXT_OUTER_TPID_BD_MASK;
198 vlan_tag_flags |= outer_tpid_bd;
199 } else if (tx_buf->mbuf->ol_flags & PKT_TX_VLAN_PKT) {
200 /* shurd: Should this mask at
201 * TX_BD_LONG_CFA_META_VLAN_VID_MASK?
203 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
204 tx_buf->mbuf->vlan_tci;
205 /* Currently supports 8021Q, 8021AD vlan offloads
206 * QINQ1, QINQ2, QINQ3 vlan headers are deprecated
208 /* DPDK only supports 802.11q VLAN packets */
210 TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100;
213 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
215 txbd1 = (struct tx_bd_long_hi *)
216 &txr->tx_desc_ring[txr->tx_prod];
218 txbd1->cfa_meta = vlan_tag_flags;
220 if (txq->vfr_tx_cfa_action)
221 txbd1->cfa_action = txq->vfr_tx_cfa_action;
223 txbd1->cfa_action = txq->bp->tx_cfa_action;
225 if (tx_pkt->ol_flags & PKT_TX_TCP_SEG) {
229 txbd1->lflags |= TX_BD_LONG_LFLAGS_LSO |
230 TX_BD_LONG_LFLAGS_T_IPID;
231 hdr_size = tx_pkt->l2_len + tx_pkt->l3_len +
233 hdr_size += (tx_pkt->ol_flags & PKT_TX_TUNNEL_MASK) ?
234 tx_pkt->outer_l2_len +
235 tx_pkt->outer_l3_len : 0;
236 /* The hdr_size is multiple of 16bit units not 8bit.
239 txbd1->hdr_size = hdr_size >> 1;
240 txbd1->mss = tx_pkt->tso_segsz;
241 RTE_VERIFY(txbd1->mss);
243 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_UDP_CKSUM) ==
244 PKT_TX_OIP_IIP_TCP_UDP_CKSUM) {
245 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
246 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
248 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_CKSUM) ==
249 PKT_TX_OIP_IIP_TCP_CKSUM) {
250 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
251 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
253 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_UDP_CKSUM) ==
254 PKT_TX_OIP_IIP_UDP_CKSUM) {
255 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
256 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
258 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_UDP_CKSUM) ==
259 PKT_TX_IIP_TCP_UDP_CKSUM) {
260 /* (Inner) IP, (Inner) TCP/UDP CSO */
261 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
263 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_UDP_CKSUM) ==
264 PKT_TX_IIP_UDP_CKSUM) {
265 /* (Inner) IP, (Inner) TCP/UDP CSO */
266 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
268 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_CKSUM) ==
269 PKT_TX_IIP_TCP_CKSUM) {
270 /* (Inner) IP, (Inner) TCP/UDP CSO */
271 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
273 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_UDP_CKSUM) ==
274 PKT_TX_OIP_TCP_UDP_CKSUM) {
275 /* Outer IP, (Inner) TCP/UDP CSO */
276 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
278 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_UDP_CKSUM) ==
279 PKT_TX_OIP_UDP_CKSUM) {
280 /* Outer IP, (Inner) TCP/UDP CSO */
281 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
283 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_CKSUM) ==
284 PKT_TX_OIP_TCP_CKSUM) {
285 /* Outer IP, (Inner) TCP/UDP CSO */
286 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
288 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_CKSUM) ==
289 PKT_TX_OIP_IIP_CKSUM) {
290 /* Outer IP, Inner IP CSO */
291 txbd1->lflags |= TX_BD_FLG_TIP_IP_CHKSUM;
293 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_UDP_CKSUM) ==
294 PKT_TX_TCP_UDP_CKSUM) {
296 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
298 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_CKSUM) ==
301 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
303 } else if ((tx_pkt->ol_flags & PKT_TX_UDP_CKSUM) ==
306 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
308 } else if ((tx_pkt->ol_flags & PKT_TX_IP_CKSUM) ==
311 txbd1->lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM;
313 } else if ((tx_pkt->ol_flags & PKT_TX_OUTER_IP_CKSUM) ==
314 PKT_TX_OUTER_IP_CKSUM) {
316 txbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM;
318 } else if ((tx_pkt->ol_flags & PKT_TX_IEEE1588_TMST) ==
319 PKT_TX_IEEE1588_TMST) {
321 txbd1->lflags |= TX_BD_LONG_LFLAGS_STAMP;
325 txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
328 m_seg = tx_pkt->next;
330 /* Check non zero data_len */
331 RTE_VERIFY(m_seg->data_len);
332 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
333 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
334 tx_buf->mbuf = m_seg;
336 txbd = &txr->tx_desc_ring[txr->tx_prod];
337 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg));
338 txbd->flags_type = TX_BD_SHORT_TYPE_TX_BD_SHORT;
339 txbd->len = m_seg->data_len;
344 txbd->flags_type |= TX_BD_LONG_FLAGS_PACKET_END;
346 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
351 static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts)
353 struct bnxt_tx_ring_info *txr = txq->tx_ring;
354 struct rte_mempool *pool = NULL;
355 struct rte_mbuf **free = txq->free;
356 uint16_t cons = txr->tx_cons;
357 unsigned int blk = 0;
360 for (i = 0; i < nr_pkts; i++) {
361 struct rte_mbuf *mbuf;
362 struct bnxt_sw_tx_bd *tx_buf = &txr->tx_buf_ring[cons];
363 unsigned short nr_bds = tx_buf->nr_bds;
365 for (j = 0; j < nr_bds; j++) {
368 cons = RING_NEXT(txr->tx_ring_struct, cons);
369 tx_buf = &txr->tx_buf_ring[cons];
370 if (!mbuf) /* long_bd's tx_buf ? */
373 mbuf = rte_pktmbuf_prefree_seg(mbuf);
377 /* EW - no need to unmap DMA memory? */
379 if (likely(mbuf->pool == pool)) {
380 /* Add mbuf to the bulk free array */
383 /* Found an mbuf from a different pool. Free
384 * mbufs accumulated so far to the previous
387 if (likely(pool != NULL))
388 rte_mempool_put_bulk(pool,
392 /* Start accumulating mbufs in a new pool */
400 rte_mempool_put_bulk(pool, (void *)free, blk);
405 static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq)
407 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
408 uint32_t raw_cons = cpr->cp_raw_cons;
410 uint32_t nb_tx_pkts = 0;
411 struct tx_cmpl *txcmp;
412 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
413 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
414 uint32_t ring_mask = cp_ring_struct->ring_mask;
417 if (bnxt_tx_bds_in_hw(txq) < txq->tx_free_thresh)
421 cons = RING_CMPL(ring_mask, raw_cons);
422 txcmp = (struct tx_cmpl *)&cpr->cp_desc_ring[cons];
423 rte_prefetch_non_temporal(&cp_desc_ring[(cons + 2) &
426 if (!CMPL_VALID(txcmp, cpr->valid))
428 opaque = rte_cpu_to_le_32(txcmp->opaque);
429 NEXT_CMPL(cpr, cons, cpr->valid, 1);
430 rte_prefetch0(&cp_desc_ring[cons]);
432 if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)
433 nb_tx_pkts += opaque;
436 "Unhandled CMP type %02x\n",
439 } while (nb_tx_pkts < ring_mask);
442 bnxt_tx_cmp(txq, nb_tx_pkts);
443 cpr->cp_raw_cons = raw_cons;
450 uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
454 uint16_t nb_tx_pkts = 0;
455 uint16_t coal_pkts = 0;
456 struct bnxt_tx_queue *txq = tx_queue;
457 struct tx_bd_long *last_txbd = NULL;
459 /* Handle TX completions */
460 bnxt_handle_tx_cp(txq);
462 /* Tx queue was stopped; wait for it to be restarted */
463 if (unlikely(!txq->tx_started)) {
464 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
468 /* Handle TX burst request */
469 for (nb_tx_pkts = 0; nb_tx_pkts < nb_pkts; nb_tx_pkts++) {
471 rc = bnxt_start_xmit(tx_pkts[nb_tx_pkts], txq,
472 &coal_pkts, &last_txbd);
478 if (likely(nb_tx_pkts)) {
479 /* Request a completion on the last packet */
480 last_txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
481 bnxt_db_write(&txq->tx_ring->tx_db, txq->tx_ring->tx_prod);
488 * Dummy DPDK callback for TX.
490 * This function is used to temporarily replace the real callback during
491 * unsafe control operations on the queue, or in case of error.
494 bnxt_dummy_xmit_pkts(void *tx_queue __rte_unused,
495 struct rte_mbuf **tx_pkts __rte_unused,
496 uint16_t nb_pkts __rte_unused)
501 int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
503 struct bnxt *bp = dev->data->dev_private;
504 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
507 rc = is_bnxt_in_error(bp);
511 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
512 txq->tx_started = true;
513 PMD_DRV_LOG(DEBUG, "Tx queue started\n");
518 int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
520 struct bnxt *bp = dev->data->dev_private;
521 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
524 rc = is_bnxt_in_error(bp);
528 /* Handle TX completions */
529 bnxt_handle_tx_cp(txq);
531 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
532 txq->tx_started = false;
533 PMD_DRV_LOG(DEBUG, "Tx queue stopped\n");