1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
13 #include "bnxt_ring.h"
16 #include "hsi_struct_def_dpdk.h"
23 void bnxt_free_tx_rings(struct bnxt *bp)
27 for (i = 0; i < (int)bp->tx_nr_rings; i++) {
28 struct bnxt_tx_queue *txq = bp->tx_queues[i];
33 bnxt_free_ring(txq->tx_ring->tx_ring_struct);
34 rte_free(txq->tx_ring->tx_ring_struct);
35 rte_free(txq->tx_ring);
37 bnxt_free_ring(txq->cp_ring->cp_ring_struct);
38 rte_free(txq->cp_ring->cp_ring_struct);
39 rte_free(txq->cp_ring);
42 bp->tx_queues[i] = NULL;
46 int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq)
48 struct bnxt_tx_ring_info *txr = txq->tx_ring;
49 struct bnxt_ring *ring = txr->tx_ring_struct;
51 txq->tx_wake_thresh = ring->ring_size / 2;
52 ring->fw_ring_id = INVALID_HW_RING_ID;
57 int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id)
59 struct bnxt_cp_ring_info *cpr;
60 struct bnxt_tx_ring_info *txr;
61 struct bnxt_ring *ring;
63 txr = rte_zmalloc_socket("bnxt_tx_ring",
64 sizeof(struct bnxt_tx_ring_info),
65 RTE_CACHE_LINE_SIZE, socket_id);
70 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
71 sizeof(struct bnxt_ring),
72 RTE_CACHE_LINE_SIZE, socket_id);
75 txr->tx_ring_struct = ring;
76 ring->ring_size = rte_align32pow2(txq->nb_tx_desc);
77 ring->ring_mask = ring->ring_size - 1;
78 ring->bd = (void *)txr->tx_desc_ring;
79 ring->bd_dma = txr->tx_desc_mapping;
80 ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_tx_bd);
81 ring->vmem = (void **)&txr->tx_buf_ring;
83 cpr = rte_zmalloc_socket("bnxt_tx_ring",
84 sizeof(struct bnxt_cp_ring_info),
85 RTE_CACHE_LINE_SIZE, socket_id);
90 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
91 sizeof(struct bnxt_ring),
92 RTE_CACHE_LINE_SIZE, socket_id);
95 cpr->cp_ring_struct = ring;
96 ring->ring_size = txr->tx_ring_struct->ring_size;
97 ring->ring_mask = ring->ring_size - 1;
98 ring->bd = (void *)cpr->cp_desc_ring;
99 ring->bd_dma = cpr->cp_desc_mapping;
106 static inline uint32_t bnxt_tx_bds_in_hw(struct bnxt_tx_queue *txq)
108 return ((txq->tx_ring->tx_prod - txq->tx_ring->tx_cons) &
109 txq->tx_ring->tx_ring_struct->ring_mask);
112 static inline uint32_t bnxt_tx_avail(struct bnxt_tx_queue *txq)
114 /* Tell compiler to fetch tx indices from memory. */
115 rte_compiler_barrier();
117 return ((txq->tx_ring->tx_ring_struct->ring_size -
118 bnxt_tx_bds_in_hw(txq)) - 1);
121 static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,
122 struct bnxt_tx_queue *txq,
124 struct tx_bd_long **last_txbd)
126 struct bnxt_tx_ring_info *txr = txq->tx_ring;
127 struct tx_bd_long *txbd;
128 struct tx_bd_long_hi *txbd1 = NULL;
129 uint32_t vlan_tag_flags, cfa_action;
130 bool long_bd = false;
131 unsigned short nr_bds = 0;
132 struct rte_mbuf *m_seg;
133 struct bnxt_sw_tx_bd *tx_buf;
134 static const uint32_t lhint_arr[4] = {
135 TX_BD_LONG_FLAGS_LHINT_LT512,
136 TX_BD_LONG_FLAGS_LHINT_LT1K,
137 TX_BD_LONG_FLAGS_LHINT_LT2K,
138 TX_BD_LONG_FLAGS_LHINT_LT2K
141 if (tx_pkt->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM |
142 PKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM |
143 PKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM |
144 PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN |
145 PKT_TX_TUNNEL_GENEVE))
148 nr_bds = long_bd + tx_pkt->nb_segs;
149 if (unlikely(bnxt_tx_avail(txq) < nr_bds))
152 /* Check if number of Tx descriptors is above HW limit */
153 if (unlikely(nr_bds > BNXT_MAX_TSO_SEGS)) {
155 "Num descriptors %d exceeds HW limit\n", nr_bds);
159 /* If packet length is less than minimum packet size, pad it */
160 if (unlikely(rte_pktmbuf_pkt_len(tx_pkt) < BNXT_MIN_PKT_SIZE)) {
161 uint8_t pad = BNXT_MIN_PKT_SIZE - rte_pktmbuf_pkt_len(tx_pkt);
162 char *seg = rte_pktmbuf_append(tx_pkt, pad);
166 "Failed to pad mbuf by %d bytes\n",
171 /* Note: data_len, pkt len are updated in rte_pktmbuf_append */
175 /* Check non zero data_len */
176 RTE_VERIFY(tx_pkt->data_len);
178 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
179 tx_buf->mbuf = tx_pkt;
180 tx_buf->nr_bds = nr_bds;
182 txbd = &txr->tx_desc_ring[txr->tx_prod];
183 txbd->opaque = *coal_pkts;
184 txbd->flags_type = nr_bds << TX_BD_LONG_FLAGS_BD_CNT_SFT;
185 txbd->flags_type |= TX_BD_SHORT_FLAGS_COAL_NOW;
186 txbd->flags_type |= TX_BD_LONG_FLAGS_NO_CMPL;
187 txbd->len = tx_pkt->data_len;
188 if (tx_pkt->pkt_len >= 2014)
189 txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K;
191 txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9];
192 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_buf->mbuf));
196 txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG;
199 if (tx_buf->mbuf->ol_flags & PKT_TX_VLAN_PKT) {
200 /* shurd: Should this mask at
201 * TX_BD_LONG_CFA_META_VLAN_VID_MASK?
203 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
204 tx_buf->mbuf->vlan_tci;
205 /* Currently supports 8021Q, 8021AD vlan offloads
206 * QINQ1, QINQ2, QINQ3 vlan headers are deprecated
208 /* DPDK only supports 802.11q VLAN packets */
210 TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100;
213 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
215 txbd1 = (struct tx_bd_long_hi *)
216 &txr->tx_desc_ring[txr->tx_prod];
218 txbd1->cfa_meta = vlan_tag_flags;
219 txbd1->cfa_action = cfa_action;
221 if (tx_pkt->ol_flags & PKT_TX_TCP_SEG) {
225 txbd1->lflags |= TX_BD_LONG_LFLAGS_LSO |
226 TX_BD_LONG_LFLAGS_T_IPID;
227 hdr_size = tx_pkt->l2_len + tx_pkt->l3_len +
228 tx_pkt->l4_len + tx_pkt->outer_l2_len +
229 tx_pkt->outer_l3_len;
230 /* The hdr_size is multiple of 16bit units not 8bit.
233 txbd1->hdr_size = hdr_size >> 1;
234 txbd1->mss = tx_pkt->tso_segsz;
235 RTE_VERIFY(txbd1->mss);
237 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_UDP_CKSUM) ==
238 PKT_TX_OIP_IIP_TCP_UDP_CKSUM) {
239 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
240 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
242 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_CKSUM) ==
243 PKT_TX_OIP_IIP_TCP_CKSUM) {
244 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
245 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
247 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_UDP_CKSUM) ==
248 PKT_TX_OIP_IIP_UDP_CKSUM) {
249 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
250 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
252 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_UDP_CKSUM) ==
253 PKT_TX_IIP_TCP_UDP_CKSUM) {
254 /* (Inner) IP, (Inner) TCP/UDP CSO */
255 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
257 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_UDP_CKSUM) ==
258 PKT_TX_IIP_UDP_CKSUM) {
259 /* (Inner) IP, (Inner) TCP/UDP CSO */
260 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
262 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_CKSUM) ==
263 PKT_TX_IIP_TCP_CKSUM) {
264 /* (Inner) IP, (Inner) TCP/UDP CSO */
265 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
267 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_UDP_CKSUM) ==
268 PKT_TX_OIP_TCP_UDP_CKSUM) {
269 /* Outer IP, (Inner) TCP/UDP CSO */
270 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
272 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_UDP_CKSUM) ==
273 PKT_TX_OIP_UDP_CKSUM) {
274 /* Outer IP, (Inner) TCP/UDP CSO */
275 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
277 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_CKSUM) ==
278 PKT_TX_OIP_TCP_CKSUM) {
279 /* Outer IP, (Inner) TCP/UDP CSO */
280 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
282 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_CKSUM) ==
283 PKT_TX_OIP_IIP_CKSUM) {
284 /* Outer IP, Inner IP CSO */
285 txbd1->lflags |= TX_BD_FLG_TIP_IP_CHKSUM;
287 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_UDP_CKSUM) ==
288 PKT_TX_TCP_UDP_CKSUM) {
290 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
292 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_CKSUM) ==
295 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
297 } else if ((tx_pkt->ol_flags & PKT_TX_UDP_CKSUM) ==
300 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
302 } else if ((tx_pkt->ol_flags & PKT_TX_IP_CKSUM) ==
305 txbd1->lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM;
307 } else if ((tx_pkt->ol_flags & PKT_TX_OUTER_IP_CKSUM) ==
308 PKT_TX_OUTER_IP_CKSUM) {
310 txbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM;
314 txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
317 m_seg = tx_pkt->next;
319 /* Check non zero data_len */
320 RTE_VERIFY(m_seg->data_len);
321 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
322 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
324 txbd = &txr->tx_desc_ring[txr->tx_prod];
325 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg));
326 txbd->flags_type = TX_BD_SHORT_TYPE_TX_BD_SHORT;
327 txbd->len = m_seg->data_len;
332 txbd->flags_type |= TX_BD_LONG_FLAGS_PACKET_END;
334 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
339 static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts)
341 struct bnxt_tx_ring_info *txr = txq->tx_ring;
342 uint16_t cons = txr->tx_cons;
345 for (i = 0; i < nr_pkts; i++) {
346 struct bnxt_sw_tx_bd *tx_buf;
347 struct rte_mbuf *mbuf;
349 tx_buf = &txr->tx_buf_ring[cons];
350 cons = RING_NEXT(txr->tx_ring_struct, cons);
354 /* EW - no need to unmap DMA memory? */
356 for (j = 1; j < tx_buf->nr_bds; j++)
357 cons = RING_NEXT(txr->tx_ring_struct, cons);
358 rte_pktmbuf_free(mbuf);
364 static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq)
366 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
367 uint32_t raw_cons = cpr->cp_raw_cons;
369 uint32_t nb_tx_pkts = 0;
370 struct tx_cmpl *txcmp;
371 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
372 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
373 uint32_t ring_mask = cp_ring_struct->ring_mask;
376 if (bnxt_tx_bds_in_hw(txq) < txq->tx_free_thresh)
380 cons = RING_CMPL(ring_mask, raw_cons);
381 txcmp = (struct tx_cmpl *)&cpr->cp_desc_ring[cons];
382 rte_prefetch_non_temporal(&cp_desc_ring[(cons + 2) &
385 if (!CMPL_VALID(txcmp, cpr->valid))
387 opaque = rte_cpu_to_le_32(txcmp->opaque);
388 NEXT_CMPL(cpr, cons, cpr->valid, 1);
389 rte_prefetch0(&cp_desc_ring[cons]);
391 if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)
392 nb_tx_pkts += opaque;
395 "Unhandled CMP type %02x\n",
398 } while (nb_tx_pkts < ring_mask);
401 bnxt_tx_cmp(txq, nb_tx_pkts);
402 cpr->cp_raw_cons = raw_cons;
403 B_CP_DB(cpr, cpr->cp_raw_cons, ring_mask);
409 uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
413 uint16_t nb_tx_pkts = 0;
414 uint16_t coal_pkts = 0;
415 struct bnxt_tx_queue *txq = tx_queue;
416 struct tx_bd_long *last_txbd = NULL;
418 /* Handle TX completions */
419 bnxt_handle_tx_cp(txq);
421 /* Tx queue was stopped; wait for it to be restarted */
422 if (txq->tx_deferred_start) {
423 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
427 /* Handle TX burst request */
428 for (nb_tx_pkts = 0; nb_tx_pkts < nb_pkts; nb_tx_pkts++) {
430 rc = bnxt_start_xmit(tx_pkts[nb_tx_pkts], txq,
431 &coal_pkts, &last_txbd);
437 if (likely(nb_tx_pkts)) {
438 /* Request a completion on the last packet */
439 last_txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
440 B_TX_DB(txq->tx_ring->tx_doorbell, txq->tx_ring->tx_prod);
446 int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
448 struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
449 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
451 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
452 txq->tx_deferred_start = false;
453 PMD_DRV_LOG(DEBUG, "Tx queue started\n");
458 int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
460 struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
461 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
463 /* Handle TX completions */
464 bnxt_handle_tx_cp(txq);
466 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
467 txq->tx_deferred_start = true;
468 PMD_DRV_LOG(DEBUG, "Tx queue stopped\n");