net/bnxt: update table get to use new design
[dpdk.git] / drivers / net / bnxt / hcapi / cfa_p40_tbl.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2019-2020 Broadcom
3  * All rights reserved.
4  */
5 /*
6  * Name:  cfa_p40_tbl.h
7  *
8  * Description: header for SWE based on Truflow
9  *
10  * Date:  12/16/19 17:18:12
11  *
12  * Note:  This file was originally generated by tflib_decode.py.
13  *        Remainder is hand coded due to lack of availability of xml for
14  *        additional tables at this time (EEM Record and union fields)
15  *
16  **/
17 #ifndef _CFA_P40_TBL_H_
18 #define _CFA_P40_TBL_H_
19
20 #include "cfa_p40_hw.h"
21
22 #include "hcapi_cfa_defs.h"
23
24 const struct hcapi_cfa_field cfa_p40_prof_l2_ctxt_tcam_layout[] = {
25         {CFA_P40_PROF_L2_CTXT_TCAM_VALID_BITPOS,
26          CFA_P40_PROF_L2_CTXT_TCAM_VALID_NUM_BITS},
27         {CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS,
28          CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS},
29         {CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS,
30          CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS},
31         {CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS,
32          CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS},
33         {CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS,
34          CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS},
35         {CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS,
36          CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS},
37         {CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS,
38          CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS},
39         {CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS,
40          CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS},
41         {CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_BITPOS,
42          CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS},
43         {CFA_P40_PROF_L2_CTXT_TCAM_SVIF_BITPOS,
44          CFA_P40_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS},
45         {CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS,
46          CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS},
47         {CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS,
48          CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS},
49         {CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS,
50          CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS},
51 };
52
53 const struct hcapi_cfa_field cfa_p40_act_veb_tcam_layout[] = {
54         {CFA_P40_ACT_VEB_TCAM_VALID_BITPOS,
55          CFA_P40_ACT_VEB_TCAM_VALID_NUM_BITS},
56         {CFA_P40_ACT_VEB_TCAM_RESERVED_BITPOS,
57          CFA_P40_ACT_VEB_TCAM_RESERVED_NUM_BITS},
58         {CFA_P40_ACT_VEB_TCAM_PARIF_IN_BITPOS,
59          CFA_P40_ACT_VEB_TCAM_PARIF_IN_NUM_BITS},
60         {CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_BITPOS,
61          CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_NUM_BITS},
62         {CFA_P40_ACT_VEB_TCAM_MAC_BITPOS,
63          CFA_P40_ACT_VEB_TCAM_MAC_NUM_BITS},
64         {CFA_P40_ACT_VEB_TCAM_OVID_BITPOS,
65          CFA_P40_ACT_VEB_TCAM_OVID_NUM_BITS},
66         {CFA_P40_ACT_VEB_TCAM_IVID_BITPOS,
67          CFA_P40_ACT_VEB_TCAM_IVID_NUM_BITS},
68 };
69
70 const struct hcapi_cfa_field cfa_p40_lkup_tcam_record_mem_layout[] = {
71         {CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_BITPOS,
72          CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_NUM_BITS},
73         {CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_BITPOS,
74          CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_NUM_BITS},
75         {CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_BITPOS,
76          CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_NUM_BITS},
77 };
78
79 const struct hcapi_cfa_field cfa_p40_prof_ctxt_remap_mem_layout[] = {
80         {CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_BITPOS,
81          CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_NUM_BITS},
82         {CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_BITPOS,
83          CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_NUM_BITS},
84         {CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_BITPOS,
85          CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_NUM_BITS},
86         {CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_BITPOS,
87          CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_NUM_BITS},
88         {CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_BITPOS,
89          CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_NUM_BITS},
90         {CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_BITPOS,
91          CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_NUM_BITS},
92         {CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_BITPOS,
93          CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_NUM_BITS},
94         {CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_BITPOS,
95          CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_NUM_BITS},
96         {CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_BITPOS,
97          CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_NUM_BITS},
98         {CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_BITPOS,
99          CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_NUM_BITS},
100         {CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_BITPOS,
101          CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_NUM_BITS},
102         /* Fields below not generated through automation */
103         {CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_BITPOS,
104          CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_NUM_BITS},
105         {CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_BITPOS,
106          CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_NUM_BITS},
107         {CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_BITPOS,
108          CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_NUM_BITS},
109         {CFA_P40_PROF_CTXT_REMAP_MEM_ARP_BITPOS,
110          CFA_P40_PROF_CTXT_REMAP_MEM_ARP_NUM_BITS},
111 };
112
113 const struct hcapi_cfa_field cfa_p40_prof_profile_tcam_remap_mem_layout[] = {
114         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_BITPOS,
115          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_NUM_BITS},
116         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_BITPOS,
117          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_NUM_BITS},
118         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_BITPOS,
119          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_NUM_BITS},
120         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_BITPOS,
121          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_NUM_BITS},
122         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_BITPOS,
123          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_NUM_BITS},
124         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_BITPOS,
125          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_NUM_BITS},
126         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_BITPOS,
127          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_NUM_BITS},
128         {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_BITPOS,
129          CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_NUM_BITS},
130 };
131
132 const struct hcapi_cfa_field cfa_p40_prof_profile_tcam_layout[] = {
133         {CFA_P40_PROF_PROFILE_TCAM_VALID_BITPOS,
134          CFA_P40_PROF_PROFILE_TCAM_VALID_NUM_BITS},
135         {CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_BITPOS,
136          CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_NUM_BITS},
137         {CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_BITPOS,
138          CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_NUM_BITS},
139         {CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_BITPOS,
140          CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_NUM_BITS},
141         {CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_BITPOS,
142          CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_NUM_BITS},
143         {CFA_P40_PROF_PROFILE_TCAM_RESERVED_BITPOS,
144          CFA_P40_PROF_PROFILE_TCAM_RESERVED_NUM_BITS},
145         {CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_BITPOS,
146          CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_NUM_BITS},
147         {CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_BITPOS,
148          CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_NUM_BITS},
149         {CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_BITPOS,
150          CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_NUM_BITS},
151         {CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_BITPOS,
152          CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_NUM_BITS},
153         {CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_BITPOS,
154          CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_NUM_BITS},
155         {CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_BITPOS,
156          CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_NUM_BITS},
157         {CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_BITPOS,
158          CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_NUM_BITS},
159         {CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_BITPOS,
160          CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_NUM_BITS},
161         {CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_BITPOS,
162          CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_NUM_BITS},
163         {CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_BITPOS,
164          CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_NUM_BITS},
165         {CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_BITPOS,
166          CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_NUM_BITS},
167         {CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_BITPOS,
168          CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_NUM_BITS},
169         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_BITPOS,
170          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_NUM_BITS},
171         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_BITPOS,
172          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_NUM_BITS},
173         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_BITPOS,
174          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_NUM_BITS},
175         {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_BITPOS,
176          CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_NUM_BITS},
177         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_BITPOS,
178          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_NUM_BITS},
179         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_BITPOS,
180          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_NUM_BITS},
181         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_BITPOS,
182          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_NUM_BITS},
183         {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_BITPOS,
184          CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_NUM_BITS},
185         {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_BITPOS,
186          CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_NUM_BITS},
187         {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_BITPOS,
188          CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_NUM_BITS},
189         {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_BITPOS,
190          CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_NUM_BITS},
191         {CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_BITPOS,
192          CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_NUM_BITS},
193         {CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_BITPOS,
194          CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_NUM_BITS},
195         {CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_BITPOS,
196          CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_NUM_BITS},
197         {CFA_P40_PROF_PROFILE_TCAM_L3_VALID_BITPOS,
198          CFA_P40_PROF_PROFILE_TCAM_L3_VALID_NUM_BITS},
199         {CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_BITPOS,
200          CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_NUM_BITS},
201         {CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_BITPOS,
202          CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_NUM_BITS},
203         {CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_BITPOS,
204          CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_NUM_BITS},
205         {CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_BITPOS,
206          CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_NUM_BITS},
207         {CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_BITPOS,
208          CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_NUM_BITS},
209         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_BITPOS,
210          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_NUM_BITS},
211         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_BITPOS,
212          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_NUM_BITS},
213         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_BITPOS,
214          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_NUM_BITS},
215         {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_BITPOS,
216          CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_NUM_BITS},
217 };
218
219 /**************************************************************************/
220 /**
221  * Non-autogenerated fields
222  */
223
224 const struct hcapi_cfa_field cfa_p40_eem_key_tbl_layout[] = {
225         {CFA_P40_EEM_KEY_TBL_VALID_BITPOS,
226          CFA_P40_EEM_KEY_TBL_VALID_NUM_BITS},
227
228         {CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_BITPOS,
229          CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_NUM_BITS},
230
231         {CFA_P40_EEM_KEY_TBL_STRENGTH_BITPOS,
232          CFA_P40_EEM_KEY_TBL_STRENGTH_NUM_BITS},
233
234         {CFA_P40_EEM_KEY_TBL_KEY_SZ_BITPOS,
235          CFA_P40_EEM_KEY_TBL_KEY_SZ_NUM_BITS},
236
237         {CFA_P40_EEM_KEY_TBL_REC_SZ_BITPOS,
238          CFA_P40_EEM_KEY_TBL_REC_SZ_NUM_BITS},
239
240         {CFA_P40_EEM_KEY_TBL_ACT_REC_INT_BITPOS,
241          CFA_P40_EEM_KEY_TBL_ACT_REC_INT_NUM_BITS},
242
243         {CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_BITPOS,
244          CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_NUM_BITS},
245
246         {CFA_P40_EEM_KEY_TBL_AR_PTR_BITPOS,
247          CFA_P40_EEM_KEY_TBL_AR_PTR_NUM_BITS},
248
249 };
250 #endif /* _CFA_P40_TBL_H_ */