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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
89 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
90 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
91 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
92 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
93 #define HWRM_VNIC_FREE (UINT32_C(0x41))
94 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
95 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
96 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
97 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
98 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
99 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
102 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
103 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
105 /* Short TX BD (16 bytes) */
108 * All bits in this field must be valid on the first BD of a packet.
109 * Only the packet_end bit must be valid for the remaining BDs of a
112 /* This value identifies the type of buffer descriptor. */
113 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
114 #define TX_BD_SHORT_TYPE_SFT 0
116 * Indicates that this BD is 16B long and is used for normal L2
117 * packet transmission.
119 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
121 * If set to 1, the packet ends with the data in the buffer pointed to
122 * by this descriptor. This flag must be valid on every BD.
124 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
126 * If set to 1, the device will not generate a completion for this
127 * transmit packet unless there is an error in it's processing. If this
128 * bit is set to 0, then the packet will be completed normally. This bit
129 * must be valid only on the first BD of a packet.
131 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
133 * This value indicates how many 16B BD locations are consumed in the
134 * ring by this packet. A value of 1 indicates that this BD is the only
135 * BD (and that the it is a short BD). A value of 3 indicates either 3
136 * short BDs or 1 long BD and one short BD in the packet. A value of 0
137 * indicates that there are 32 BD locations in the packet (the maximum).
138 * This field is valid only on the first BD of a packet.
140 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
141 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
143 * This value is a hint for the length of the entire packet. It is used
144 * by the chip to optimize internal processing. The packet will be
145 * dropped if the hint is too short. This field is valid only on the
146 * first BD of a packet.
148 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
149 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
150 /* indicates packet length < 512B */
151 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
152 /* indicates 512 <= packet length < 1KB */
153 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
154 /* indicates 1KB <= packet length < 2KB */
155 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
156 /* indicates packet length >= 2KB */
157 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
158 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
160 * If set to 1, the device immediately updates the Send Consumer Index
161 * after the buffer associated with this descriptor has been transferred
162 * via DMA to NIC memory from host memory. An interrupt may or may not
163 * be generated according to the state of the interrupt avoidance
164 * mechanisms. If this bit is set to 0, then the Consumer Index is only
165 * updated as soon as one of the host interrupt coalescing conditions
166 * has been met. This bit must be valid on the first BD of a packet.
168 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
170 * All bits in this field must be valid on the first BD of a packet.
171 * Only the packet_end bit must be valid for the remaining BDs of a
174 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
175 #define TX_BD_SHORT_FLAGS_SFT 6
179 * This is the length of the host physical buffer this BD describes in
180 * bytes. This field must be valid on all BDs of a packet.
184 * The opaque data field is pass through to the completion and can be
185 * used for any data that the driver wants to associate with the
186 * transmit BD. This field must be valid on the first BD of a packet.
191 * This is the host physical address for the portion of the packet
192 * described by this TX BD. This value must be valid on all BDs of a
196 } __attribute__((packed));
198 /* Long TX BD (32 bytes split to 2 16-byte struct) */
201 * All bits in this field must be valid on the first BD of a packet.
202 * Only the packet_end bit must be valid for the remaining BDs of a
205 /* This value identifies the type of buffer descriptor. */
206 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
207 #define TX_BD_LONG_TYPE_SFT 0
209 * Indicates that this BD is 32B long and is used for normal L2
210 * packet transmission.
212 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
214 * If set to 1, the packet ends with the data in the buffer pointed to
215 * by this descriptor. This flag must be valid on every BD.
217 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
219 * If set to 1, the device will not generate a completion for this
220 * transmit packet unless there is an error in it's processing. If this
221 * bit is set to 0, then the packet will be completed normally. This bit
222 * must be valid only on the first BD of a packet.
224 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
226 * This value indicates how many 16B BD locations are consumed in the
227 * ring by this packet. A value of 1 indicates that this BD is the only
228 * BD (and that the it is a short BD). A value of 3 indicates either 3
229 * short BDs or 1 long BD and one short BD in the packet. A value of 0
230 * indicates that there are 32 BD locations in the packet (the maximum).
231 * This field is valid only on the first BD of a packet.
233 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
234 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
236 * This value is a hint for the length of the entire packet. It is used
237 * by the chip to optimize internal processing. The packet will be
238 * dropped if the hint is too short. This field is valid only on the
239 * first BD of a packet.
241 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
242 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
243 /* indicates packet length < 512B */
244 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
245 /* indicates 512 <= packet length < 1KB */
246 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
247 /* indicates 1KB <= packet length < 2KB */
248 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
249 /* indicates packet length >= 2KB */
250 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
251 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
253 * If set to 1, the device immediately updates the Send Consumer Index
254 * after the buffer associated with this descriptor has been transferred
255 * via DMA to NIC memory from host memory. An interrupt may or may not
256 * be generated according to the state of the interrupt avoidance
257 * mechanisms. If this bit is set to 0, then the Consumer Index is only
258 * updated as soon as one of the host interrupt coalescing conditions
259 * has been met. This bit must be valid on the first BD of a packet.
261 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
263 * All bits in this field must be valid on the first BD of a packet.
264 * Only the packet_end bit must be valid for the remaining BDs of a
267 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
268 #define TX_BD_LONG_FLAGS_SFT 6
272 * This is the length of the host physical buffer this BD describes in
273 * bytes. This field must be valid on all BDs of a packet.
278 * The opaque data field is pass through to the completion and can be
279 * used for any data that the driver wants to associate with the
280 * transmit BD. This field must be valid on the first BD of a packet.
285 * This is the host physical address for the portion of the packet
286 * described by this TX BD. This value must be valid on all BDs of a
290 } __attribute__((packed));
292 /* last 16 bytes of Long TX BD */
294 struct tx_bd_long_hi {
296 * All bits in this field must be valid on the first BD of a packet.
297 * Their value on other BDs of the packet will be ignored.
300 * If set to 1, the controller replaces the TCP/UPD checksum fields of
301 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
302 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
303 * checksum for the packet associated with this descriptor. This bit
304 * must be valid on the first BD of a packet.
306 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
308 * If set to 1, the controller replaces the IP checksum of the normal
309 * packets, or the inner IP checksum of the encapsulated packets with
310 * the hardware calculated IP checksum for the packet associated with
311 * this descriptor. This bit must be valid on the first BD of a packet.
313 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
315 * If set to 1, the controller will not append an Ethernet CRC to the
316 * end of the frame. This bit must be valid on the first BD of a packet.
317 * Packet must be 64B or longer when this flag is set. It is not useful
318 * to use this bit with any form of TX offload such as CSO or LSO. The
319 * intent is that the packet from the host already has a valid Ethernet
322 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
324 * If set to 1, the device will record the time at which the packet was
325 * actually transmitted at the TX MAC. This bit must be valid on the
326 * first BD of a packet.
328 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
330 * If set to 1, The controller replaces the tunnel IP checksum field
331 * with hardware calculated IP checksum for the IP header of the packet
332 * associated with this descriptor. In case of VXLAN, the controller
333 * also replaces the outer header UDP checksum with hardware calculated
334 * UDP checksum for the packet associated with this descriptor.
336 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
338 * If set to 1, the device will treat this packet with LSO(Large Send
339 * Offload) processing for both normal or encapsulated packets, which is
340 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
341 * fields must be valid. The driver doesn't need to set t_ip_chksum,
342 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
343 * the appropriate checksum fields for segmented packets. When this bit
344 * is 1, the hdr_size and mss fields must be valid.
346 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
348 * If set to zero when LSO is '1', then the IPID will be treated as a
349 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
350 * set to one when LSO is '1', then the IPID will be treated as a 15b
351 * number and will be wrapped if it exceeds a value 0f 0x7fff.
353 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
355 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
356 * will not be modified during LSO operations. If set to one when LSO is
357 * '1', then the IPID of the tunnel IP header will be incremented for
358 * each subsequent segment of an LSO operation.
360 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
362 * If set to '1', then the RoCE ICRC will be appended to the packet.
363 * Packet must be a valid RoCE format packet.
365 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
367 * If set to '1', then the FCoE CRC will be appended to the packet.
368 * Packet must be a valid FCoE format packet.
370 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
374 * When LSO is '1', this field must contain the offset of the TCP
375 * payload from the beginning of the packet in as 16b words. In case of
376 * encapsulated/tunneling packet, this field contains the offset of the
377 * inner TCP payload from beginning of the packet as 16-bit words. This
378 * value must be valid on the first BD of a packet.
380 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
381 #define TX_BD_LONG_HDR_SIZE_SFT 0
385 * This is the MSS value that will be used to do the LSO processing. The
386 * value is the length in bytes of the TCP payload for each segment
387 * generated by the LSO operation. This value must be valid on the first
390 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
391 #define TX_BD_LONG_MSS_SFT 0
397 * This value selects a CFA action to perform on the packet. Set this
398 * value to zero if no CFA action is desired. This value must be valid
399 * on the first BD of a packet.
404 * This value is action meta-data that defines CFA edit operations that
405 * are done in addition to any action editing.
407 /* When key=1, This is the VLAN tag VID value. */
408 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
409 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
410 /* When key=1, This is the VLAN tag DE value. */
411 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
412 /* When key=1, This is the VLAN tag PRI value. */
413 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
414 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
415 /* When key=1, This is the VLAN tag TPID select value. */
416 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
417 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
419 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
421 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
423 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
425 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
427 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
428 /* Value programmed in CFA VLANTPID register. */
429 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
430 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
431 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
432 /* When key=1, This is the VLAN tag TPID select value. */
433 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
434 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
436 * This field identifies the type of edit to be performed on the packet.
437 * This value must be valid on the first BD of a packet.
439 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
440 #define TX_BD_LONG_CFA_META_KEY_SFT 28
442 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
444 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
445 * - PRI/DE value. - meta[11:0] - VID value.
447 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
448 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
450 } __attribute__((packed));
452 /* RX Producer Packet BD (16 bytes) */
453 struct rx_prod_pkt_bd {
454 /* This value identifies the type of buffer descriptor. */
455 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
456 #define RX_PROD_PKT_BD_TYPE_SFT 0
458 * Indicates that this BD is 16B long and is an RX Producer (ie.
459 * empty) buffer descriptor.
461 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
463 * If set to 1, the packet will be placed at the address plus 2B. The 2
464 * Bytes of padding will be written as zero.
467 * This is intended to be used when the host buffer is cache-line
468 * aligned to produce packets that are easy to parse in host memory
469 * while still allowing writes to be cache line aligned.
471 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
473 * If set to 1, the packet write will be padded out to the nearest
474 * cache-line with zero value padding.
477 * If receive buffers start/end on cache-line boundaries, this feature
478 * will ensure that all data writes on the PCI bus start/end on cache
481 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
483 * This value is the number of additional buffers in the ring that
484 * describe the buffer space to be consumed for the this packet. If the
485 * value is zero, then the packet must fit within the space described by
486 * this BD. If this value is 1 or more, it indicates how many additional
487 * "buffer" BDs are in the ring immediately following this BD to be used
488 * for the same network packet. Even if the packet to be placed does not
489 * need all the additional buffers, they will be consumed anyway.
491 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
492 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
493 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
494 #define RX_PROD_PKT_BD_FLAGS_SFT 6
498 * This is the length in Bytes of the host physical buffer where data
499 * for the packet may be placed in host memory.
502 * While this is a Byte resolution value, it is often advantageous to
503 * ensure that the buffers provided end on a host cache line.
508 * The opaque data field is pass through to the completion and can be
509 * used for any data that the driver wants to associate with this
510 * receive buffer set.
515 * This is the host physical address where data for the packet may by
516 * placed in host memory.
519 * While this is a Byte resolution value, it is often advantageous to
520 * ensure that the buffers provide start on a host cache line.
523 } __attribute__((packed));
525 /* Completion Ring Structures */
526 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
527 /* Base Completion Record (16 bytes) */
531 * This field indicates the exact type of the completion. By convention,
532 * the LSB identifies the length of the record in 16B units. Even values
533 * indicate 16B records. Odd values indicate 32B records.
535 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
536 #define CMPL_BASE_TYPE_SFT 0
537 /* TX L2 completion: Completion of TX packet. Length = 16B */
538 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
540 * RX L2 completion: Completion of and L2 RX packet.
543 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
545 * RX Aggregation Buffer completion : Completion of an L2
546 * aggregation buffer in support of TPA, HDS, or Jumbo packet
547 * completion. Length = 16B
549 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
551 * RX L2 TPA Start Completion: Completion at the beginning of a
552 * TPA operation. Length = 32B
554 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
556 * RX L2 TPA End Completion: Completion at the end of a TPA
557 * operation. Length = 32B
559 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
561 * Statistics Ejection Completion: Completion of statistics data
562 * ejection buffer. Length = 16B
564 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
565 /* HWRM Command Completion: Completion of an HWRM command. */
566 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
567 /* Forwarded HWRM Request */
568 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
569 /* Forwarded HWRM Response */
570 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
571 /* HWRM Asynchronous Event Information */
572 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
573 /* CQ Notification */
574 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
575 /* SRQ Threshold Event */
576 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
577 /* DBQ Threshold Event */
578 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
579 /* QP Async Notification */
580 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
581 /* Function Async Notification */
582 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
589 * This value is written by the NIC such that it will be different for
590 * each pass through the completion queue. The even passes will write 1.
591 * The odd passes will write 0.
593 #define CMPL_BASE_V UINT32_C(0x1)
595 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
596 #define CMPL_BASE_INFO3_SFT 1
600 } __attribute__((packed));
602 /* TX Completion Record (16 bytes) */
605 * This field indicates the exact type of the completion. By convention,
606 * the LSB identifies the length of the record in 16B units. Even values
607 * indicate 16B records. Odd values indicate 32B records.
609 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
610 #define TX_CMPL_TYPE_SFT 0
611 /* TX L2 completion: Completion of TX packet. Length = 16B */
612 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
614 * When this bit is '1', it indicates a packet that has an error of some
615 * type. Type of error is indicated in error_flags.
617 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
619 * When this bit is '1', it indicates that the packet completed was
620 * transmitted using the push acceleration data provided by the driver.
621 * When this bit is '0', it indicates that the packet had not push
622 * acceleration data written or was executed as a normal packet even
623 * though push data was provided.
625 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
626 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
627 #define TX_CMPL_FLAGS_SFT 6
633 * This is a copy of the opaque field from the first TX BD of this
634 * transmitted packet.
639 * This value is written by the NIC such that it will be different for
640 * each pass through the completion queue. The even passes will write 1.
641 * The odd passes will write 0.
643 #define TX_CMPL_V UINT32_C(0x1)
645 * This error indicates that there was some sort of problem with the BDs
648 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
649 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
651 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
652 /* Bad Format: BDs were not formatted correctly. */
653 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
654 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
655 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
657 * When this bit is '1', it indicates that the length of the packet was
658 * zero. No packet was transmitted.
660 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
662 * When this bit is '1', it indicates that the packet was longer than
663 * the programmed limit in TDI. No packet was transmitted.
665 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
667 * When this bit is '1', it indicates that one or more of the BDs
668 * associated with this packet generated a PCI error. This probably
669 * means the address was not valid.
671 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
673 * When this bit is '1', it indicates that the packet was longer than
674 * indicated by the hint. No packet was transmitted.
676 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
678 * When this bit is '1', it indicates that the packet was dropped due to
679 * Poison TLP error on one or more of the TLPs in the PXP completion.
681 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
682 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
683 #define TX_CMPL_ERRORS_SFT 1
688 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
690 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
693 * This field indicates the exact type of the completion. By convention,
694 * the LSB identifies the length of the record in 16B units. Even values
695 * indicate 16B records. Odd values indicate 32B records.
697 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
698 #define RX_PKT_CMPL_TYPE_SFT 0
700 * RX L2 completion: Completion of and L2 RX packet.
703 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
705 * When this bit is '1', it indicates a packet that has an error of some
706 * type. Type of error is indicated in error_flags.
708 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
709 /* This field indicates how the packet was placed in the buffer. */
710 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
711 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
712 /* Normal: Packet was placed using normal algorithm. */
713 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
714 /* Jumbo: Packet was placed using jumbo algorithm. */
715 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
717 * Header/Data Separation: Packet was placed using Header/Data
718 * separation algorithm. The separation location is indicated by
721 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
722 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
723 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
724 /* This bit is '1' if the RSS field in this completion is valid. */
725 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
727 * This value indicates what the inner packet determined for the packet
730 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
731 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
732 /* Not Known: Indicates that the packet type was not known. */
733 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
735 * IP Packet: Indicates that the packet was an IP packet, but
736 * further classification was not possible.
738 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
740 * TCP Packet: Indicates that the packet was IP and TCP. This
741 * indicates that the payload_offset field is valid.
743 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
745 * UDP Packet: Indicates that the packet was IP and UDP. This
746 * indicates that the payload_offset field is valid.
748 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
750 * FCoE Packet: Indicates that the packet was recognized as a
751 * FCoE. This also indicates that the payload_offset field is
754 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
756 * RoCE Packet: Indicates that the packet was recognized as a
757 * RoCE. This also indicates that the payload_offset field is
760 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
762 * ICMP Packet: Indicates that the packet was recognized as
763 * ICMP. This indicates that the payload_offset field is valid.
765 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
767 * PtP packet wo/timestamp: Indicates that the packet was
768 * recognized as a PtP packet.
770 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
771 (UINT32_C(0x8) << 12)
773 * PtP packet w/timestamp: Indicates that the packet was
774 * recognized as a PtP packet and that a timestamp was taken for
777 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
778 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
779 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
780 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
781 #define RX_PKT_CMPL_FLAGS_SFT 6
785 * This is the length of the data for the packet stored in the buffer(s)
786 * identified by the opaque value. This includes the packet BD and any
787 * associated buffer BDs. This does not include the the length of any
788 * data places in aggregation BDs.
793 * This is a copy of the opaque field from the RX BD this completion
799 * This value is written by the NIC such that it will be different for
800 * each pass through the completion queue. The even passes will write 1.
801 * The odd passes will write 0.
803 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
805 * This value is the number of aggregation buffers that follow this
806 * entry in the completion ring that are a part of this packet. If the
807 * value is zero, then the packet is completely contained in the buffer
808 * space provided for the packet in the RX ring.
810 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
811 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
815 * This is the RSS hash type for the packet. The value is packed
816 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
818 uint8_t rss_hash_type;
821 * This value indicates the offset from the beginning of the packet
822 * where the inner payload starts. This value is valid for TCP, UDP,
823 * FCoE, and RoCE packets.
825 uint8_t payload_offset;
830 * This value is the RSS hash value calculated for the packet based on
831 * the mode bits and key value in the VNIC.
834 } __attribute__((packed));
836 /* last 16 bytes of RX Packet Completion Record */
837 struct rx_pkt_cmpl_hi {
839 * This indicates that the ip checksum was calculated for the inner
840 * packet and that the ip_cs_error field indicates if there was an
843 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
845 * This indicates that the TCP, UDP or ICMP checksum was calculated for
846 * the inner packet and that the l4_cs_error field indicates if there
849 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
851 * This indicates that the ip checksum was calculated for the tunnel
852 * header and that the t_ip_cs_error field indicates if there was an
855 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
857 * This indicates that the UDP checksum was calculated for the tunnel
858 * packet and that the t_l4_cs_error field indicates if there was an
861 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
862 /* This value indicates what format the metadata field is. */
863 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
864 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
865 /* No metadata informtaion. Value is zero. */
866 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
868 * The metadata field contains the VLAN tag and TPID value. -
869 * metadata[11:0] contains the vlan VID value. - metadata[12]
870 * contains the vlan DE value. - metadata[15:13] contains the
871 * vlan PRI value. - metadata[31:16] contains the vlan TPID
874 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
875 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
876 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
878 * This field indicates the IP type for the inner-most IP header. A
879 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
880 * value is only valid if itype indicates a packet with an IP header.
882 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
886 * This is data from the CFA block as indicated by the meta_format
889 /* When meta_format=1, this value is the VLAN VID. */
890 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
891 #define RX_PKT_CMPL_METADATA_VID_SFT 0
892 /* When meta_format=1, this value is the VLAN DE. */
893 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
894 /* When meta_format=1, this value is the VLAN PRI. */
895 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
896 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
897 /* When meta_format=1, this value is the VLAN TPID. */
898 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
899 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
903 * This value is written by the NIC such that it will be different for
904 * each pass through the completion queue. The even passes will write 1.
905 * The odd passes will write 0.
907 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
909 * This error indicates that there was some sort of problem with the BDs
910 * for the packet that was found after part of the packet was already
911 * placed. The packet should be treated as invalid.
913 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
914 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
915 /* No buffer error */
916 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
919 * Did Not Fit: Packet did not fit into packet buffer provided.
920 * For regular placement, this means the packet did not fit in
921 * the buffer provided. For HDS and jumbo placement, this means
922 * that the packet could not be placed into 7 physical buffers
925 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
928 * Not On Chip: All BDs needed for the packet were not on-chip
929 * when the packet arrived.
931 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
933 /* Bad Format: BDs were not formatted correctly. */
934 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
936 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
937 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
938 /* This indicates that there was an error in the IP header checksum. */
939 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
941 * This indicates that there was an error in the TCP, UDP or ICMP
944 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
946 * This indicates that there was an error in the tunnel IP header
949 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
950 /* This indicates that there was an error in the tunnel UDP checksum. */
951 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
953 * This indicates that there was a CRC error on either an FCoE or RoCE
954 * packet. The itype indicates the packet type.
956 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
958 * This indicates that there was an error in the tunnel portion of the
959 * packet when this field is non-zero.
961 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
962 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
964 * No additional error occurred on the tunnel portion of the
965 * packet of the packet does not have a tunnel.
967 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
969 * Indicates that IP header version does not match expectation
970 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
972 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
975 * Indicates that header length is out of range in the tunnel
976 * header. Valid for IPv4.
978 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
981 * Indicates that the physical packet is shorter than that
982 * claimed by the PPPoE header length for a tunnel PPPoE packet.
984 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
987 * Indicates that physical packet is shorter than that claimed
988 * by the tunnel l3 header length. Valid for IPv4, or IPv6
989 * tunnel packet packets.
991 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
994 * Indicates that the physical packet is shorter than that
995 * claimed by the tunnel UDP header length for a tunnel UDP
996 * packet that is not fragmented.
998 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1001 * indicates that the IPv4 TTL or IPv6 hop limit check have
1002 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1005 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1006 (UINT32_C(0x6) << 9)
1007 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1008 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1010 * This indicates that there was an error in the inner portion of the
1011 * packet when this field is non-zero.
1013 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1014 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1016 * No additional error occurred on the tunnel portion of the
1017 * packet of the packet does not have a tunnel.
1019 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1021 * Indicates that IP header version does not match expectation
1022 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1023 * VFT was parsed on FCoE packet.
1025 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1026 (UINT32_C(0x1) << 12)
1028 * indicates that header length is out of range. Valid for IPv4
1031 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1032 (UINT32_C(0x2) << 12)
1034 * indicates that the IPv4 TTL or IPv6 hop limit check have
1035 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1037 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1039 * Indicates that physical packet is shorter than that claimed
1040 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1043 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1044 (UINT32_C(0x4) << 12)
1046 * Indicates that the physical packet is shorter than that
1047 * claimed by the UDP header length for a UDP packet that is not
1050 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1051 (UINT32_C(0x5) << 12)
1053 * Indicates that TCP header length > IP payload. Valid for TCP
1056 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1057 (UINT32_C(0x6) << 12)
1058 /* Indicates that TCP header length < 5. Valid for TCP. */
1059 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1060 (UINT32_C(0x7) << 12)
1062 * Indicates that TCP option headers result in a TCP header size
1063 * that does not match data offset in TCP header. Valid for TCP.
1065 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1066 (UINT32_C(0x8) << 12)
1067 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1068 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1069 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1070 #define RX_PKT_CMPL_ERRORS_SFT 1
1074 * This field identifies the CFA action rule that was used for this
1080 * This value holds the reordering sequence number for the packet. If
1081 * the reordering sequence is not valid, then this value is zero. The
1082 * reordering domain for the packet is in the bottom 8 to 10b of the
1083 * rss_hash value. The bottom 20b of this value contain the ordering
1084 * domain value for the packet.
1086 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1087 #define RX_PKT_CMPL_REORDER_SFT 0
1089 } __attribute__((packed));
1091 /* HWRM Forwarded Request (16 bytes) */
1092 struct hwrm_fwd_req_cmpl {
1093 /* Length of forwarded request in bytes. */
1095 * This field indicates the exact type of the completion. By convention,
1096 * the LSB identifies the length of the record in 16B units. Even values
1097 * indicate 16B records. Odd values indicate 32B records.
1099 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1100 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1101 /* Forwarded HWRM Request */
1102 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1103 /* Length of forwarded request in bytes. */
1104 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1105 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1106 uint16_t req_len_type;
1109 * Source ID of this request. Typically used in forwarding requests and
1110 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1111 * Reserved for internal processors 0xFFFF - HWRM
1117 /* Address of forwarded request. */
1119 * This value is written by the NIC such that it will be different for
1120 * each pass through the completion queue. The even passes will write 1.
1121 * The odd passes will write 0.
1123 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1124 /* Address of forwarded request. */
1125 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1126 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1127 uint64_t req_buf_addr_v;
1128 } __attribute__((packed));
1130 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1131 struct hwrm_async_event_cmpl {
1133 * This field indicates the exact type of the completion. By convention,
1134 * the LSB identifies the length of the record in 16B units. Even values
1135 * indicate 16B records. Odd values indicate 32B records.
1137 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1138 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1139 /* HWRM Asynchronous Event Information */
1140 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1141 (UINT32_C(0x2e) << 0)
1144 /* Identifiers of events. */
1145 /* Link status changed */
1146 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1147 (UINT32_C(0x0) << 0)
1148 /* Link MTU changed */
1149 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1150 (UINT32_C(0x1) << 0)
1151 /* Link speed changed */
1152 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1153 (UINT32_C(0x2) << 0)
1154 /* DCB Configuration changed */
1155 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1156 (UINT32_C(0x3) << 0)
1157 /* Port connection not allowed */
1158 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1159 (UINT32_C(0x4) << 0)
1160 /* Link speed configuration was not allowed */
1161 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1162 (UINT32_C(0x5) << 0)
1163 /* Function driver unloaded */
1164 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1165 (UINT32_C(0x10) << 0)
1166 /* Function driver loaded */
1167 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1168 (UINT32_C(0x11) << 0)
1169 /* PF driver unloaded */
1170 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1171 (UINT32_C(0x20) << 0)
1172 /* PF driver loaded */
1173 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1174 (UINT32_C(0x21) << 0)
1175 /* VF Function Level Reset (FLR) */
1176 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1177 /* VF MAC Address Change */
1178 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1179 (UINT32_C(0x31) << 0)
1180 /* PF-VF communication channel status change. */
1181 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1182 (UINT32_C(0x32) << 0)
1184 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1185 (UINT32_C(0xff) << 0)
1188 /* Event specific data */
1189 uint32_t event_data2;
1193 * This value is written by the NIC such that it will be different for
1194 * each pass through the completion queue. The even passes will write 1.
1195 * The odd passes will write 0.
1197 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1199 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1200 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1203 /* 8-lsb timestamp from POR (100-msec resolution) */
1204 uint8_t timestamp_lo;
1206 /* 16-lsb timestamp from POR (100-msec resolution) */
1207 uint16_t timestamp_hi;
1209 /* Event specific data */
1210 uint32_t event_data1;
1211 } __attribute__((packed));
1214 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1215 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1216 * processors inside the chip. This firmware is vital part of the chip's
1217 * hardware. The chip can not be used by driver without it.
1220 /* Input (16 bytes) */
1223 * This value indicates what type of request this is. The format for the
1224 * rest of the command is determined by this field.
1229 * This value indicates the what completion ring the request will be
1230 * optionally completed on. If the value is -1, then no CR completion
1231 * will be generated. Any other value must be a valid CR ring_id value
1232 * for this function.
1236 /* This value indicates the command sequence number. */
1240 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1241 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1246 * This is the host address where the response will be written when the
1247 * request is complete. This area must be 16B aligned and must be
1248 * cleared to zero before the request is made.
1251 } __attribute__((packed));
1253 /* Output (8 bytes) */
1256 * Pass/Fail or error type Note: receiver to verify the in parameters,
1257 * and fail the call with an error when appropriate
1259 uint16_t error_code;
1261 /* This field returns the type of original request. */
1264 /* This field provides original sequence number of the command. */
1268 * This field is the length of the response in bytes. The last byte of
1269 * the response is a valid flag that will read as '1' when the command
1270 * has been completely written to memory.
1273 } __attribute__((packed));
1275 /* hwrm_cfa_l2_filter_alloc */
1277 * A filter is used to identify traffic that contains a matching set of
1278 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1279 * other things which then allows the ASIC to direct the incoming traffic
1280 * to an appropriate VNIC or Rx ring.
1283 /* Input (96 bytes) */
1284 struct hwrm_cfa_l2_filter_alloc_input {
1286 * This value indicates what type of request this is. The format for the
1287 * rest of the command is determined by this field.
1292 * This value indicates the what completion ring the request will be
1293 * optionally completed on. If the value is -1, then no CR completion
1294 * will be generated. Any other value must be a valid CR ring_id value
1295 * for this function.
1299 /* This value indicates the command sequence number. */
1303 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1304 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1309 * This is the host address where the response will be written when the
1310 * request is complete. This area must be 16B aligned and must be
1311 * cleared to zero before the request is made.
1316 * Enumeration denoting the RX, TX type of the resource. This
1317 * enumeration is used for resources that are similar for both TX and RX
1318 * paths of the chip.
1320 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1323 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1324 (UINT32_C(0x0) << 0)
1326 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1327 (UINT32_C(0x1) << 0)
1328 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1329 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1331 * Setting of this flag indicates the applicability to the loopback
1334 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1337 * Setting of this flag indicates drop action. If this flag is not set,
1338 * then it should be considered accept action.
1340 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1343 * If this flag is set, all t_l2_* fields are invalid and they should
1344 * not be specified. If this flag is set, then l2_* fields refer to
1345 * fields of outermost L2 header.
1347 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1351 /* This bit must be '1' for the l2_addr field to be configured. */
1352 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1354 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1355 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1357 /* This bit must be '1' for the l2_ovlan field to be configured. */
1358 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1360 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1361 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1363 /* This bit must be '1' for the l2_ivlan field to be configured. */
1364 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1366 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1367 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1369 /* This bit must be '1' for the t_l2_addr field to be configured. */
1370 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1373 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1375 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1377 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1378 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1381 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1383 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1385 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1386 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1389 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1391 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1393 /* This bit must be '1' for the src_type field to be configured. */
1394 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1396 /* This bit must be '1' for the src_id field to be configured. */
1397 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1399 /* This bit must be '1' for the tunnel_type field to be configured. */
1400 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1402 /* This bit must be '1' for the dst_id field to be configured. */
1403 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1406 * This bit must be '1' for the mirror_vnic_id field to be configured.
1408 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1413 * This value sets the match value for the L2 MAC address. Destination
1414 * MAC address for RX path. Source MAC address for TX path.
1422 * This value sets the mask value for the L2 address. A value of 0 will
1423 * mask the corresponding bit from compare.
1425 uint8_t l2_addr_mask[6];
1427 /* This value sets VLAN ID value for outer VLAN. */
1431 * This value sets the mask value for the ovlan id. A value of 0 will
1432 * mask the corresponding bit from compare.
1434 uint16_t l2_ovlan_mask;
1436 /* This value sets VLAN ID value for inner VLAN. */
1440 * This value sets the mask value for the ivlan id. A value of 0 will
1441 * mask the corresponding bit from compare.
1443 uint16_t l2_ivlan_mask;
1449 * This value sets the match value for the tunnel L2 MAC address.
1450 * Destination MAC address for RX path. Source MAC address for TX path.
1452 uint8_t t_l2_addr[6];
1458 * This value sets the mask value for the tunnel L2 address. A value of
1459 * 0 will mask the corresponding bit from compare.
1461 uint8_t t_l2_addr_mask[6];
1463 /* This value sets VLAN ID value for tunnel outer VLAN. */
1464 uint16_t t_l2_ovlan;
1467 * This value sets the mask value for the tunnel ovlan id. A value of 0
1468 * will mask the corresponding bit from compare.
1470 uint16_t t_l2_ovlan_mask;
1472 /* This value sets VLAN ID value for tunnel inner VLAN. */
1473 uint16_t t_l2_ivlan;
1476 * This value sets the mask value for the tunnel ivlan id. A value of 0
1477 * will mask the corresponding bit from compare.
1479 uint16_t t_l2_ivlan_mask;
1481 /* This value identifies the type of source of the packet. */
1483 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1484 (UINT32_C(0x0) << 0)
1485 /* Physical function */
1486 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1487 (UINT32_C(0x1) << 0)
1488 /* Virtual function */
1489 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1490 (UINT32_C(0x2) << 0)
1491 /* Virtual NIC of a function */
1492 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1493 (UINT32_C(0x3) << 0)
1494 /* Embedded processor for CFA management */
1495 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1496 (UINT32_C(0x4) << 0)
1497 /* Embedded processor for OOB management */
1498 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1499 (UINT32_C(0x5) << 0)
1500 /* Embedded processor for RoCE */
1501 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1502 (UINT32_C(0x6) << 0)
1503 /* Embedded processor for network proxy functions */
1504 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1505 (UINT32_C(0x7) << 0)
1510 * This value is the id of the source. For a network port, it represents
1511 * port_id. For a physical function, it represents fid. For a virtual
1512 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1513 * embedded processors, this id is not valid. Notes: 1. The function ID
1514 * is implied if it src_id is not provided for a src_type that is either
1520 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1521 (UINT32_C(0x0) << 0)
1522 /* Virtual eXtensible Local Area Network (VXLAN) */
1523 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1524 (UINT32_C(0x1) << 0)
1526 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1528 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1529 (UINT32_C(0x2) << 0)
1531 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1533 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1534 (UINT32_C(0x3) << 0)
1536 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1537 (UINT32_C(0x4) << 0)
1538 /* Generic Network Virtualization Encapsulation (Geneve) */
1539 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1540 (UINT32_C(0x5) << 0)
1541 /* Multi-Protocol Lable Switching (MPLS) */
1542 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1543 (UINT32_C(0x6) << 0)
1544 /* Stateless Transport Tunnel (STT) */
1545 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1546 (UINT32_C(0x7) << 0)
1548 * Generic Routing Encapsulation (GRE) inside IP datagram
1551 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1552 (UINT32_C(0x8) << 0)
1553 /* Any tunneled traffic */
1554 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1555 (UINT32_C(0xff) << 0)
1556 uint8_t tunnel_type;
1561 * If set, this value shall represent the Logical VNIC ID of the
1562 * destination VNIC for the RX path and network port id of the
1563 * destination port for the TX path.
1567 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1568 uint16_t mirror_vnic_id;
1571 * This hint is provided to help in placing the filter in the filter
1575 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1576 (UINT32_C(0x0) << 0)
1577 /* Above the given filter */
1578 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1579 (UINT32_C(0x1) << 0)
1580 /* Below the given filter */
1581 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1582 (UINT32_C(0x2) << 0)
1583 /* As high as possible */
1584 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1585 (UINT32_C(0x3) << 0)
1586 /* As low as possible */
1587 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1588 (UINT32_C(0x4) << 0)
1595 * This is the ID of the filter that goes along with the pri_hint. This
1596 * field is valid only for the following values. 1 - Above the given
1597 * filter 2 - Below the given filter
1599 uint64_t l2_filter_id_hint;
1600 } __attribute__((packed));
1602 /* Output (24 bytes) */
1603 struct hwrm_cfa_l2_filter_alloc_output {
1605 * Pass/Fail or error type Note: receiver to verify the in parameters,
1606 * and fail the call with an error when appropriate
1608 uint16_t error_code;
1610 /* This field returns the type of original request. */
1613 /* This field provides original sequence number of the command. */
1617 * This field is the length of the response in bytes. The last byte of
1618 * the response is a valid flag that will read as '1' when the command
1619 * has been completely written to memory.
1624 * This value identifies a set of CFA data structures used for an L2
1627 uint64_t l2_filter_id;
1630 * This is the ID of the flow associated with this filter. This value
1631 * shall be used to match and associate the flow identifier returned in
1632 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1641 * This field is used in Output records to indicate that the output is
1642 * completely written to RAM. This field should be read as '1' to
1643 * indicate that the output has been completely written. When writing a
1644 * command completion or response to an internal processor, the order of
1645 * writes has to be such that this field is written last.
1648 } __attribute__((packed));
1650 /* hwrm_cfa_l2_filter_free */
1652 * Description: Free a L2 filter. The HWRM shall free all associated filter
1653 * resources with the L2 filter.
1656 /* Input (24 bytes) */
1657 struct hwrm_cfa_l2_filter_free_input {
1659 * This value indicates what type of request this is. The format for the
1660 * rest of the command is determined by this field.
1665 * This value indicates the what completion ring the request will be
1666 * optionally completed on. If the value is -1, then no CR completion
1667 * will be generated. Any other value must be a valid CR ring_id value
1668 * for this function.
1672 /* This value indicates the command sequence number. */
1676 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1677 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1682 * This is the host address where the response will be written when the
1683 * request is complete. This area must be 16B aligned and must be
1684 * cleared to zero before the request is made.
1689 * This value identifies a set of CFA data structures used for an L2
1692 uint64_t l2_filter_id;
1693 } __attribute__((packed));
1695 /* Output (16 bytes) */
1696 struct hwrm_cfa_l2_filter_free_output {
1698 * Pass/Fail or error type Note: receiver to verify the in parameters,
1699 * and fail the call with an error when appropriate
1701 uint16_t error_code;
1703 /* This field returns the type of original request. */
1706 /* This field provides original sequence number of the command. */
1710 * This field is the length of the response in bytes. The last byte of
1711 * the response is a valid flag that will read as '1' when the command
1712 * has been completely written to memory.
1722 * This field is used in Output records to indicate that the output is
1723 * completely written to RAM. This field should be read as '1' to
1724 * indicate that the output has been completely written. When writing a
1725 * command completion or response to an internal processor, the order of
1726 * writes has to be such that this field is written last.
1729 } __attribute__((packed));
1731 /* hwrm_exec_fwd_resp */
1733 * Description: This command is used to send an encapsulated request to the
1734 * HWRM. This command instructs the HWRM to execute the request and forward the
1735 * response of the encapsulated request to the location specified in the
1736 * original request that is encapsulated. The target id of this command shall be
1737 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1738 * acknowledge the receipt of the encapsulated request and forwarding of the
1742 /* Input (128 bytes) */
1743 struct hwrm_exec_fwd_resp_input {
1745 * This value indicates what type of request this is. The format for the
1746 * rest of the command is determined by this field.
1751 * This value indicates the what completion ring the request will be
1752 * optionally completed on. If the value is -1, then no CR completion
1753 * will be generated. Any other value must be a valid CR ring_id value
1754 * for this function.
1758 /* This value indicates the command sequence number. */
1762 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1763 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1768 * This is the host address where the response will be written when the
1769 * request is complete. This area must be 16B aligned and must be
1770 * cleared to zero before the request is made.
1775 * This is an encapsulated request. This request should be executed by
1776 * the HWRM and the response should be provided in the response buffer
1777 * inside the encapsulated request.
1779 uint32_t encap_request[26];
1782 * This value indicates the target id of the response to the
1783 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1784 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1786 uint16_t encap_resp_target_id;
1788 uint16_t unused_0[3];
1789 } __attribute__((packed));
1791 /* Output (16 bytes) */
1792 struct hwrm_exec_fwd_resp_output {
1794 * Pass/Fail or error type Note: receiver to verify the in parameters,
1795 * and fail the call with an error when appropriate
1797 uint16_t error_code;
1799 /* This field returns the type of original request. */
1802 /* This field provides original sequence number of the command. */
1806 * This field is the length of the response in bytes. The last byte of
1807 * the response is a valid flag that will read as '1' when the command
1808 * has been completely written to memory.
1818 * This field is used in Output records to indicate that the output is
1819 * completely written to RAM. This field should be read as '1' to
1820 * indicate that the output has been completely written. When writing a
1821 * command completion or response to an internal processor, the order of
1822 * writes has to be such that this field is written last.
1825 } __attribute__((packed));
1827 /* hwrm_func_qcaps */
1829 * Description: This command returns capabilities of a function. The input FID
1830 * value is used to indicate what function is being queried. This allows a
1831 * physical function driver to query virtual functions that are children of the
1832 * physical function. The output FID value is needed to configure Rings and
1833 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1836 /* Input (24 bytes) */
1837 struct hwrm_func_qcaps_input {
1839 * This value indicates what type of request this is. The format for the
1840 * rest of the command is determined by this field.
1845 * This value indicates the what completion ring the request will be
1846 * optionally completed on. If the value is -1, then no CR completion
1847 * will be generated. Any other value must be a valid CR ring_id value
1848 * for this function.
1852 /* This value indicates the command sequence number. */
1856 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1857 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1862 * This is the host address where the response will be written when the
1863 * request is complete. This area must be 16B aligned and must be
1864 * cleared to zero before the request is made.
1869 * Function ID of the function that is being queried. 0xFF... (All Fs)
1870 * if the query is for the requesting function.
1874 uint16_t unused_0[3];
1875 } __attribute__((packed));
1877 /* Output (80 bytes) */
1878 struct hwrm_func_qcaps_output {
1880 * Pass/Fail or error type Note: receiver to verify the in parameters,
1881 * and fail the call with an error when appropriate
1883 uint16_t error_code;
1885 /* This field returns the type of original request. */
1888 /* This field provides original sequence number of the command. */
1892 * This field is the length of the response in bytes. The last byte of
1893 * the response is a valid flag that will read as '1' when the command
1894 * has been completely written to memory.
1899 * FID value. This value is used to identify operations on the PCI bus
1900 * as belonging to a particular PCI function.
1905 * Port ID of port that this function is associated with. Valid only for
1906 * the PF. 0xFF... (All Fs) if this function is not associated with any
1907 * port. 0xFF... (All Fs) if this function is called from a VF.
1911 /* If 1, then Push mode is supported on this function. */
1912 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
1914 * If 1, then the global MSI-X auto-masking is enabled for the device.
1916 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
1919 * If 1, then the Precision Time Protocol (PTP) processing is supported
1920 * on this function. The HWRM should enable PTP on only a single
1921 * Physical Function (PF) per port.
1923 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
1927 * This value is current MAC address configured for this function. A
1928 * value of 00-00-00-00-00-00 indicates no MAC address is currently
1931 uint8_t perm_mac_address[6];
1934 * The maximum number of RSS/COS contexts that can be allocated to the
1937 uint16_t max_rsscos_ctx;
1940 * The maximum number of completion rings that can be allocated to the
1943 uint16_t max_cmpl_rings;
1946 * The maximum number of transmit rings that can be allocated to the
1949 uint16_t max_tx_rings;
1952 * The maximum number of receive rings that can be allocated to the
1955 uint16_t max_rx_rings;
1958 * The maximum number of L2 contexts that can be allocated to the
1961 uint16_t max_l2_ctxs;
1963 /* The maximum number of VNICs that can be allocated to the function. */
1967 * The identifier for the first VF enabled on a PF. This is valid only
1968 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
1969 * called on a PF with SR-IOV disabled or on a VF.
1971 uint16_t first_vf_id;
1974 * The maximum number of VFs that can be allocated to the function. This
1975 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
1976 * command is called on a PF with SR-IOV disabled or on a VF.
1981 * The maximum number of statistic contexts that can be allocated to the
1984 uint16_t max_stat_ctx;
1987 * The maximum number of Encapsulation records that can be offloaded by
1990 uint32_t max_encap_records;
1993 * The maximum number of decapsulation records that can be offloaded by
1996 uint32_t max_decap_records;
1999 * The maximum number of Exact Match (EM) flows that can be offloaded by
2000 * this function on the TX side.
2002 uint32_t max_tx_em_flows;
2005 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2006 * by this function on the TX side.
2008 uint32_t max_tx_wm_flows;
2011 * The maximum number of Exact Match (EM) flows that can be offloaded by
2012 * this function on the RX side.
2014 uint32_t max_rx_em_flows;
2017 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2018 * by this function on the RX side.
2020 uint32_t max_rx_wm_flows;
2023 * The maximum number of multicast filters that can be supported by this
2024 * function on the RX side.
2026 uint32_t max_mcast_filters;
2029 * The maximum value of flow_id that can be supported in completion
2032 uint32_t max_flow_id;
2035 * The maximum number of HW ring groups that can be supported on this
2038 uint32_t max_hw_ring_grps;
2045 * This field is used in Output records to indicate that the output is
2046 * completely written to RAM. This field should be read as '1' to
2047 * indicate that the output has been completely written. When writing a
2048 * command completion or response to an internal processor, the order of
2049 * writes has to be such that this field is written last.
2052 } __attribute__((packed));
2054 /* hwrm_func_reset */
2056 * Description: This command resets a hardware function (PCIe function) and
2057 * frees any resources used by the function. This command shall be initiated by
2058 * the driver after an FLR has occurred to prepare the function for re-use. This
2059 * command may also be initiated by a driver prior to doing it's own
2060 * configuration. This command puts the function into the reset state. In the
2061 * reset state, global and port related features of the chip are not available.
2064 * Note: This command will reset a function that has already been disabled or
2065 * idled. The command returns all the resources owned by the function so a new
2066 * driver may allocate and configure resources normally.
2069 /* Input (24 bytes) */
2070 struct hwrm_func_reset_input {
2072 * This value indicates what type of request this is. The format for the
2073 * rest of the command is determined by this field.
2078 * This value indicates the what completion ring the request will be
2079 * optionally completed on. If the value is -1, then no CR completion
2080 * will be generated. Any other value must be a valid CR ring_id value
2081 * for this function.
2085 /* This value indicates the command sequence number. */
2089 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2090 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2095 * This is the host address where the response will be written when the
2096 * request is complete. This area must be 16B aligned and must be
2097 * cleared to zero before the request is made.
2101 /* This bit must be '1' for the vf_id_valid field to be configured. */
2102 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2107 * The ID of the VF that this PF is trying to reset. Only the parent PF
2108 * shall be allowed to reset a child VF. A parent PF driver shall use
2109 * this field only when a specific child VF is requested to be reset.
2113 /* This value indicates the level of a function reset. */
2115 * Reset the caller function and its children VFs (if any). If
2116 * no children functions exist, then reset the caller function
2119 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2120 (UINT32_C(0x0) << 0)
2121 /* Reset the caller function only */
2122 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2123 (UINT32_C(0x1) << 0)
2125 * Reset all children VFs of the caller function driver if the
2126 * caller is a PF driver. It is an error to specify this level
2127 * by a VF driver. It is an error to specify this level by a PF
2128 * driver with no children VFs.
2130 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2131 (UINT32_C(0x2) << 0)
2133 * Reset a specific VF of the caller function driver if the
2134 * caller is the parent PF driver. It is an error to specify
2135 * this level by a VF driver. It is an error to specify this
2136 * level by a PF driver that is not the parent of the VF that is
2137 * being requested to reset.
2139 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2140 (UINT32_C(0x3) << 0)
2141 uint8_t func_reset_level;
2144 } __attribute__((packed));
2146 /* Output (16 bytes) */
2147 struct hwrm_func_reset_output {
2149 * Pass/Fail or error type Note: receiver to verify the in parameters,
2150 * and fail the call with an error when appropriate
2152 uint16_t error_code;
2154 /* This field returns the type of original request. */
2157 /* This field provides original sequence number of the command. */
2161 * This field is the length of the response in bytes. The last byte of
2162 * the response is a valid flag that will read as '1' when the command
2163 * has been completely written to memory.
2173 * This field is used in Output records to indicate that the output is
2174 * completely written to RAM. This field should be read as '1' to
2175 * indicate that the output has been completely written. When writing a
2176 * command completion or response to an internal processor, the order of
2177 * writes has to be such that this field is written last.
2180 } __attribute__((packed));
2182 /* hwrm_port_phy_cfg */
2184 * Description: This command configures the PHY device for the port. It allows
2185 * setting of the most generic settings for the PHY. The HWRM shall complete
2186 * this command as soon as PHY settings are configured. They may not be applied
2187 * when the command response is provided. A VF driver shall not be allowed to
2188 * configure PHY using this command. In a network partition mode, a PF driver
2189 * shall not be allowed to configure PHY using this command.
2192 /* Input (56 bytes) */
2193 struct hwrm_port_phy_cfg_input {
2195 * This value indicates what type of request this is. The format for the
2196 * rest of the command is determined by this field.
2201 * This value indicates the what completion ring the request will be
2202 * optionally completed on. If the value is -1, then no CR completion
2203 * will be generated. Any other value must be a valid CR ring_id value
2204 * for this function.
2208 /* This value indicates the command sequence number. */
2212 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2213 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2218 * This is the host address where the response will be written when the
2219 * request is complete. This area must be 16B aligned and must be
2220 * cleared to zero before the request is made.
2225 * When this bit is set to '1', the PHY for the port shall be reset. #
2226 * If this bit is set to 1, then the HWRM shall reset the PHY after
2227 * applying PHY configuration changes specified in this command. # In
2228 * order to guarantee that PHY configuration changes specified in this
2229 * command take effect, the HWRM client should set this flag to 1. # If
2230 * this bit is not set to 1, then the HWRM may reset the PHY depending
2231 * on the current PHY configuration and settings specified in this
2234 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2236 * When this bit is set to '1', the link shall be forced to be taken
2237 * down. # When this bit is set to '1", all other command input settings
2238 * related to the link speed shall be ignored. Once the link state is
2239 * forced down, it can be explicitly cleared from that state by setting
2240 * this flag to '0'. # If this flag is set to '0', then the link shall
2241 * be cleared from forced down state if the link is in forced down
2242 * state. There may be conditions (e.g. out-of-band or sideband
2243 * configuration changes for the link) outside the scope of the HWRM
2244 * implementation that may clear forced down link state.
2246 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2248 * When this bit is set to '1', the link shall be forced to the
2249 * force_link_speed value. When this bit is set to '1', the HWRM client
2250 * should not enable any of the auto negotiation related fields
2251 * represented by auto_XXX fields in this command. When this bit is set
2252 * to '1' and the HWRM client has enabled a auto_XXX field in this
2253 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2254 * this bit is set to zero, the link shall be allowed to autoneg.
2256 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2258 * When this bit is set to '1', the auto-negotiation process shall be
2259 * restarted on the link.
2261 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2263 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2264 * requested to be enabled on this link. If EEE is not supported on this
2265 * port, then this flag shall be ignored by the HWRM.
2267 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2269 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2270 * requested to be disabled on this link. If EEE is not supported on
2271 * this port, then this flag shall be ignored by the HWRM.
2273 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2275 * When this bit is set to '1' and EEE is enabled on this link, then TX
2276 * LPI is requested to be enabled on the link. If EEE is not supported
2277 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2278 * disabled on this port, then this flag shall be ignored by the HWRM.
2280 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2283 /* This bit must be '1' for the auto_mode field to be configured. */
2284 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2285 /* This bit must be '1' for the auto_duplex field to be configured. */
2286 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2287 /* This bit must be '1' for the auto_pause field to be configured. */
2288 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2290 * This bit must be '1' for the auto_link_speed field to be configured.
2292 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2294 * This bit must be '1' for the auto_link_speed_mask field to be
2297 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2299 /* This bit must be '1' for the wirespeed field to be configured. */
2300 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2301 /* This bit must be '1' for the lpbk field to be configured. */
2302 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2303 /* This bit must be '1' for the preemphasis field to be configured. */
2304 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2305 /* This bit must be '1' for the force_pause field to be configured. */
2306 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2308 * This bit must be '1' for the eee_link_speed_mask field to be
2311 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2313 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2314 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2317 /* Port ID of port that is to be configured. */
2321 * This is the speed that will be used if the force bit is '1'. If
2322 * unsupported speed is selected, an error will be generated.
2324 /* 100Mb link speed */
2325 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2326 (UINT32_C(0x1) << 0)
2327 /* 1Gb link speed */
2328 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2329 (UINT32_C(0xa) << 0)
2330 /* 2Gb link speed */
2331 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2332 (UINT32_C(0x14) << 0)
2333 /* 2.5Gb link speed */
2334 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2335 (UINT32_C(0x19) << 0)
2336 /* 10Gb link speed */
2337 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2338 (UINT32_C(0x64) << 0)
2339 /* 20Mb link speed */
2340 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2341 (UINT32_C(0xc8) << 0)
2342 /* 25Gb link speed */
2343 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2344 (UINT32_C(0xfa) << 0)
2345 /* 40Gb link speed */
2346 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2347 (UINT32_C(0x190) << 0)
2348 /* 50Gb link speed */
2349 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2350 (UINT32_C(0x1f4) << 0)
2351 /* 100Gb link speed */
2352 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2353 (UINT32_C(0x3e8) << 0)
2354 /* 10Mb link speed */
2355 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2356 (UINT32_C(0xffff) << 0)
2357 uint16_t force_link_speed;
2360 * This value is used to identify what autoneg mode is used when the
2361 * link speed is not being forced.
2364 * Disable autoneg or autoneg disabled. No speeds are selected.
2366 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2367 /* Select all possible speeds for autoneg mode. */
2368 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2369 (UINT32_C(0x1) << 0)
2371 * Select only the auto_link_speed speed for autoneg mode. This
2372 * mode has been DEPRECATED. An HWRM client should not use this
2375 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2376 (UINT32_C(0x2) << 0)
2378 * Select the auto_link_speed or any speed below that speed for
2379 * autoneg. This mode has been DEPRECATED. An HWRM client should
2380 * not use this mode.
2382 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2383 (UINT32_C(0x3) << 0)
2385 * Select the speeds based on the corresponding link speed mask
2386 * value that is provided.
2388 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2389 (UINT32_C(0x4) << 0)
2393 * This is the duplex setting that will be used if the autoneg_mode is
2394 * "one_speed" or "one_or_below".
2396 /* Half Duplex will be requested. */
2397 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2398 (UINT32_C(0x0) << 0)
2399 /* Full duplex will be requested. */
2400 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2401 (UINT32_C(0x1) << 0)
2402 /* Both Half and Full dupex will be requested. */
2403 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2404 (UINT32_C(0x2) << 0)
2405 uint8_t auto_duplex;
2408 * This value is used to configure the pause that will be used for
2409 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2412 * When this bit is '1', Generation of tx pause messages has been
2413 * requested. Disabled otherwise.
2415 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2417 * When this bit is '1', Reception of rx pause messages has been
2418 * requested. Disabled otherwise.
2420 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2422 * When set to 1, the advertisement of pause is enabled. # When the
2423 * auto_mode is not set to none and this flag is set to 1, then the
2424 * auto_pause bits on this port are being advertised and autoneg pause
2425 * results are being interpreted. # When the auto_mode is not set to
2426 * none and this flag is set to 0, the pause is forced as indicated in
2427 * force_pause, and also advertised as auto_pause bits, but the autoneg
2428 * results are not interpreted since the pause configuration is being
2429 * forced. # When the auto_mode is set to none and this flag is set to
2430 * 1, auto_pause bits should be ignored and should be set to 0.
2432 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2438 * This is the speed that will be used if the autoneg_mode is
2439 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2440 * an error will be generated.
2442 /* 100Mb link speed */
2443 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2444 (UINT32_C(0x1) << 0)
2445 /* 1Gb link speed */
2446 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2447 (UINT32_C(0xa) << 0)
2448 /* 2Gb link speed */
2449 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2450 (UINT32_C(0x14) << 0)
2451 /* 2.5Gb link speed */
2452 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2453 (UINT32_C(0x19) << 0)
2454 /* 10Gb link speed */
2455 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2456 (UINT32_C(0x64) << 0)
2457 /* 20Mb link speed */
2458 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2459 (UINT32_C(0xc8) << 0)
2460 /* 25Gb link speed */
2461 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2462 (UINT32_C(0xfa) << 0)
2463 /* 40Gb link speed */
2464 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2465 (UINT32_C(0x190) << 0)
2466 /* 50Gb link speed */
2467 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2468 (UINT32_C(0x1f4) << 0)
2469 /* 100Gb link speed */
2470 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2471 (UINT32_C(0x3e8) << 0)
2472 /* 10Mb link speed */
2473 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2474 (UINT32_C(0xffff) << 0)
2475 uint16_t auto_link_speed;
2478 * This is a mask of link speeds that will be used if autoneg_mode is
2479 * "mask". If unsupported speed is enabled an error will be generated.
2481 /* 100Mb link speed (Half-duplex) */
2482 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2484 /* 100Mb link speed (Full-duplex) */
2485 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2487 /* 1Gb link speed (Half-duplex) */
2488 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2490 /* 1Gb link speed (Full-duplex) */
2491 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2493 /* 2Gb link speed */
2494 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2496 /* 2.5Gb link speed */
2497 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2499 /* 10Gb link speed */
2500 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2502 /* 20Gb link speed */
2503 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2505 /* 25Gb link speed */
2506 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2508 /* 40Gb link speed */
2509 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2511 /* 50Gb link speed */
2512 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2514 /* 100Gb link speed */
2515 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2517 /* 10Mb link speed (Half-duplex) */
2518 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2520 /* 10Mb link speed (Full-duplex) */
2521 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2523 uint16_t auto_link_speed_mask;
2525 /* This value controls the wirespeed feature. */
2526 /* Wirespeed feature is disabled. */
2527 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2528 /* Wirespeed feature is enabled. */
2529 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2532 /* This value controls the loopback setting for the PHY. */
2533 /* No loopback is selected. Normal operation. */
2534 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2536 * The HW will be configured with local loopback such that host
2537 * data is sent back to the host without modification.
2539 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2541 * The HW will be configured with remote loopback such that port
2542 * logic will send packets back out the transmitter that are
2545 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2549 * This value is used to configure the pause that will be used for force
2553 * When this bit is '1', Generation of tx pause messages is supported.
2554 * Disabled otherwise.
2556 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2558 * When this bit is '1', Reception of rx pause messages is supported.
2559 * Disabled otherwise.
2561 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2562 uint8_t force_pause;
2567 * This value controls the pre-emphasis to be used for the link. Driver
2568 * should not set this value (use enable.preemphasis = 0) unless driver
2569 * is sure of setting. Normally HWRM FW will determine proper pre-
2572 uint32_t preemphasis;
2575 * Setting for link speed mask that is used to advertise speeds during
2576 * autonegotiation when EEE is enabled. This field is valid only when
2577 * EEE is enabled. The speeds specified in this field shall be a subset
2578 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2579 * at least one speed shall be provided in this mask.
2582 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2583 /* 100Mb link speed (Full-duplex) */
2584 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2586 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2587 /* 1Gb link speed (Full-duplex) */
2588 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2590 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2593 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2595 /* 10Gb link speed */
2596 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2598 uint16_t eee_link_speed_mask;
2604 * Reuested setting of TX LPI timer in microseconds. This field is valid
2605 * only when EEE is enabled and TX LPI is enabled.
2607 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2609 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2610 uint32_t tx_lpi_timer;
2613 } __attribute__((packed));
2615 /* Output (16 bytes) */
2616 struct hwrm_port_phy_cfg_output {
2618 * Pass/Fail or error type Note: receiver to verify the in parameters,
2619 * and fail the call with an error when appropriate
2621 uint16_t error_code;
2623 /* This field returns the type of original request. */
2626 /* This field provides original sequence number of the command. */
2630 * This field is the length of the response in bytes. The last byte of
2631 * the response is a valid flag that will read as '1' when the command
2632 * has been completely written to memory.
2642 * This field is used in Output records to indicate that the output is
2643 * completely written to RAM. This field should be read as '1' to
2644 * indicate that the output has been completely written. When writing a
2645 * command completion or response to an internal processor, the order of
2646 * writes has to be such that this field is written last.
2649 } __attribute__((packed));
2653 * Description: This function is called by a driver to determine the HWRM
2654 * interface version supported by the HWRM firmware, the version of HWRM
2655 * firmware implementation, the name of HWRM firmware, the versions of other
2656 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2657 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2658 * be considered an invalid version.
2661 /* Input (24 bytes) */
2662 struct hwrm_ver_get_input {
2664 * This value indicates what type of request this is. The format for the
2665 * rest of the command is determined by this field.
2670 * This value indicates the what completion ring the request will be
2671 * optionally completed on. If the value is -1, then no CR completion
2672 * will be generated. Any other value must be a valid CR ring_id value
2673 * for this function.
2677 /* This value indicates the command sequence number. */
2681 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2682 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2687 * This is the host address where the response will be written when the
2688 * request is complete. This area must be 16B aligned and must be
2689 * cleared to zero before the request is made.
2694 * This field represents the major version of HWRM interface
2695 * specification supported by the driver HWRM implementation. The
2696 * interface major version is intended to change only when non backward
2697 * compatible changes are made to the HWRM interface specification.
2699 uint8_t hwrm_intf_maj;
2702 * This field represents the minor version of HWRM interface
2703 * specification supported by the driver HWRM implementation. A change
2704 * in interface minor version is used to reflect significant backward
2705 * compatible modification to HWRM interface specification. This can be
2706 * due to addition or removal of functionality. HWRM interface
2707 * specifications with the same major version but different minor
2708 * versions are compatible.
2710 uint8_t hwrm_intf_min;
2713 * This field represents the update version of HWRM interface
2714 * specification supported by the driver HWRM implementation. The
2715 * interface update version is used to reflect minor changes or bug
2716 * fixes to a released HWRM interface specification.
2718 uint8_t hwrm_intf_upd;
2720 uint8_t unused_0[5];
2721 } __attribute__((packed));
2723 /* Output (128 bytes) */
2724 struct hwrm_ver_get_output {
2726 * Pass/Fail or error type Note: receiver to verify the in parameters,
2727 * and fail the call with an error when appropriate
2729 uint16_t error_code;
2731 /* This field returns the type of original request. */
2734 /* This field provides original sequence number of the command. */
2738 * This field is the length of the response in bytes. The last byte of
2739 * the response is a valid flag that will read as '1' when the command
2740 * has been completely written to memory.
2745 * This field represents the major version of HWRM interface
2746 * specification supported by the HWRM implementation. The interface
2747 * major version is intended to change only when non backward compatible
2748 * changes are made to the HWRM interface specification. A HWRM
2749 * implementation that is compliant with this specification shall
2750 * provide value of 1 in this field.
2752 uint8_t hwrm_intf_maj;
2755 * This field represents the minor version of HWRM interface
2756 * specification supported by the HWRM implementation. A change in
2757 * interface minor version is used to reflect significant backward
2758 * compatible modification to HWRM interface specification. This can be
2759 * due to addition or removal of functionality. HWRM interface
2760 * specifications with the same major version but different minor
2761 * versions are compatible. A HWRM implementation that is compliant with
2762 * this specification shall provide value of 0 in this field.
2764 uint8_t hwrm_intf_min;
2767 * This field represents the update version of HWRM interface
2768 * specification supported by the HWRM implementation. The interface
2769 * update version is used to reflect minor changes or bug fixes to a
2770 * released HWRM interface specification. A HWRM implementation that is
2771 * compliant with this specification shall provide value of 1 in this
2774 uint8_t hwrm_intf_upd;
2776 uint8_t hwrm_intf_rsvd;
2779 * This field represents the major version of HWRM firmware. A change in
2780 * firmware major version represents a major firmware release.
2782 uint8_t hwrm_fw_maj;
2785 * This field represents the minor version of HWRM firmware. A change in
2786 * firmware minor version represents significant firmware functionality
2789 uint8_t hwrm_fw_min;
2792 * This field represents the build version of HWRM firmware. A change in
2793 * firmware build version represents bug fixes to a released firmware.
2795 uint8_t hwrm_fw_bld;
2798 * This field is a reserved field. This field can be used to represent
2799 * firmware branches or customer specific releases tied to a specific
2800 * (major,minor,update) version of the HWRM firmware.
2802 uint8_t hwrm_fw_rsvd;
2805 * This field represents the major version of mgmt firmware. A change in
2806 * major version represents a major release.
2808 uint8_t mgmt_fw_maj;
2811 * This field represents the minor version of mgmt firmware. A change in
2812 * minor version represents significant functionality changes.
2814 uint8_t mgmt_fw_min;
2817 * This field represents the build version of mgmt firmware. A change in
2818 * update version represents bug fixes.
2820 uint8_t mgmt_fw_bld;
2823 * This field is a reserved field. This field can be used to represent
2824 * firmware branches or customer specific releases tied to a specific
2825 * (major,minor,update) version
2827 uint8_t mgmt_fw_rsvd;
2830 * This field represents the major version of network control firmware.
2831 * A change in major version represents a major release.
2833 uint8_t netctrl_fw_maj;
2836 * This field represents the minor version of network control firmware.
2837 * A change in minor version represents significant functionality
2840 uint8_t netctrl_fw_min;
2843 * This field represents the build version of network control firmware.
2844 * A change in update version represents bug fixes.
2846 uint8_t netctrl_fw_bld;
2849 * This field is a reserved field. This field can be used to represent
2850 * firmware branches or customer specific releases tied to a specific
2851 * (major,minor,update) version
2853 uint8_t netctrl_fw_rsvd;
2856 * This field is reserved for future use. The responder should set it to
2857 * 0. The requester should ignore this field.
2862 * This field represents the major version of RoCE firmware. A change in
2863 * major version represents a major release.
2865 uint8_t roce_fw_maj;
2868 * This field represents the minor version of RoCE firmware. A change in
2869 * minor version represents significant functionality changes.
2871 uint8_t roce_fw_min;
2874 * This field represents the build version of RoCE firmware. A change in
2875 * update version represents bug fixes.
2877 uint8_t roce_fw_bld;
2880 * This field is a reserved field. This field can be used to represent
2881 * firmware branches or customer specific releases tied to a specific
2882 * (major,minor,update) version
2884 uint8_t roce_fw_rsvd;
2887 * This field represents the name of HWRM FW (ASCII chars without NULL
2890 char hwrm_fw_name[16];
2893 * This field represents the name of mgmt FW (ASCII chars without NULL
2896 char mgmt_fw_name[16];
2899 * This field represents the name of network control firmware (ASCII
2900 * chars without NULL at the end).
2902 char netctrl_fw_name[16];
2905 * This field is reserved for future use. The responder should set it to
2906 * 0. The requester should ignore this field.
2908 uint32_t reserved2[4];
2911 * This field represents the name of RoCE FW (ASCII chars without NULL
2914 char roce_fw_name[16];
2916 /* This field returns the chip number. */
2919 /* This field returns the revision of chip. */
2922 /* This field returns the chip metal number. */
2925 /* This field returns the bond id of the chip. */
2926 uint8_t chip_bond_id;
2929 * This value indicates the type of platform used for chip
2933 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
2934 (UINT32_C(0x0) << 0)
2935 /* FPGA platform of the chip. */
2936 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
2937 (UINT32_C(0x1) << 0)
2938 /* Palladium platform of the chip. */
2939 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
2940 (UINT32_C(0x2) << 0)
2941 uint8_t chip_platform_type;
2944 * This field returns the maximum value of request window that is
2945 * supported by the HWRM. The request window is mapped into device
2946 * address space using MMIO.
2948 uint16_t max_req_win_len;
2951 * This field returns the maximum value of response buffer in bytes. If
2952 * a request specifies the response buffer length that is greater than
2953 * this value, then the HWRM should fail it. The value of this field
2954 * shall be 4KB or more.
2956 uint16_t max_resp_len;
2959 * This field returns the default request timeout value in milliseconds.
2961 uint16_t def_req_timeout;
2968 * This field is used in Output records to indicate that the output is
2969 * completely written to RAM. This field should be read as '1' to
2970 * indicate that the output has been completely written. When writing a
2971 * command completion or response to an internal processor, the order of
2972 * writes has to be such that this field is written last.
2975 } __attribute__((packed));
2977 /* hwrm_queue_qportcfg */
2979 * Description: This function is called by a driver to query queue configuration
2980 * of a port. # The HWRM shall at least advertise one queue with lossy service
2981 * profile. # The driver shall use this command to query queue ids before
2982 * configuring or using any queues. # If a service profile is not set for a
2983 * queue, then the driver shall not use that queue without configuring a service
2984 * profile for it. # If the driver is not allowed to configure service profiles,
2985 * then the driver shall only use queues for which service profiles are pre-
2989 /* Input (24 bytes) */
2990 struct hwrm_queue_qportcfg_input {
2992 * This value indicates what type of request this is. The format for the
2993 * rest of the command is determined by this field.
2998 * This value indicates the what completion ring the request will be
2999 * optionally completed on. If the value is -1, then no CR completion
3000 * will be generated. Any other value must be a valid CR ring_id value
3001 * for this function.
3005 /* This value indicates the command sequence number. */
3009 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3010 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3015 * This is the host address where the response will be written when the
3016 * request is complete. This area must be 16B aligned and must be
3017 * cleared to zero before the request is made.
3022 * Enumeration denoting the RX, TX type of the resource. This
3023 * enumeration is used for resources that are similar for both TX and RX
3024 * paths of the chip.
3026 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3029 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3030 (UINT32_C(0x0) << 0)
3032 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3033 (UINT32_C(0x1) << 0)
3034 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3035 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3039 * Port ID of port for which the queue configuration is being queried.
3040 * This field is only required when sent by IPC.
3045 } __attribute__((packed));
3047 /* hwrm_stat_ctx_clr_stats */
3048 /* Description: This command clears statistics of a context. */
3050 /* Input (24 bytes) */
3051 struct hwrm_stat_ctx_clr_stats_input {
3053 * This value indicates what type of request this is. The format for the
3054 * rest of the command is determined by this field.
3059 * This value indicates the what completion ring the request will be
3060 * optionally completed on. If the value is -1, then no CR completion
3061 * will be generated. Any other value must be a valid CR ring_id value
3062 * for this function.
3066 /* This value indicates the command sequence number. */
3070 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3071 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3076 * This is the host address where the response will be written when the
3077 * request is complete. This area must be 16B aligned and must be
3078 * cleared to zero before the request is made.
3082 /* ID of the statistics context that is being queried. */
3083 uint32_t stat_ctx_id;
3086 } __attribute__((packed));
3088 /* Output (16 bytes) */
3089 struct hwrm_stat_ctx_clr_stats_output {
3091 * Pass/Fail or error type Note: receiver to verify the in parameters,
3092 * and fail the call with an error when appropriate
3094 uint16_t error_code;
3096 /* This field returns the type of original request. */
3099 /* This field provides original sequence number of the command. */
3103 * This field is the length of the response in bytes. The last byte of
3104 * the response is a valid flag that will read as '1' when the command
3105 * has been completely written to memory.
3115 * This field is used in Output records to indicate that the output is
3116 * completely written to RAM. This field should be read as '1' to
3117 * indicate that the output has been completely written. When writing a
3118 * command completion or response to an internal processor, the order of
3119 * writes has to be such that this field is written last.
3122 } __attribute__((packed));
3124 /* hwrm_vnic_alloc */
3126 * Description: This VNIC is a resource in the RX side of the chip that is used
3127 * to represent a virtual host "interface". # At the time of VNIC allocation or
3128 * configuration, the function can specify whether it wants the requested VNIC
3129 * to be the default VNIC for the function or not. # If a function requests
3130 * allocation of a VNIC for the first time and a VNIC is successfully allocated
3131 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
3132 * for that function. # The default VNIC shall be used for the default action
3133 * for a partition or function. # For each VNIC allocated on a function, a
3134 * mapping on the RX side to map the allocated VNIC to source virtual interface
3135 * shall be performed by the HWRM. This should be hidden to the function driver
3136 * requesting the VNIC allocation. This enables broadcast/multicast replication
3137 * with source knockout. # If multicast replication with source knockout is
3138 * enabled, then the internal VNIC to SVIF mapping data structures shall be
3139 * programmed at the time of VNIC allocation.
3142 /* Input (24 bytes) */
3143 struct hwrm_vnic_alloc_input {
3145 * This value indicates what type of request this is. The format for the
3146 * rest of the command is determined by this field.
3151 * This value indicates the what completion ring the request will be
3152 * optionally completed on. If the value is -1, then no CR completion
3153 * will be generated. Any other value must be a valid CR ring_id value
3154 * for this function.
3158 /* This value indicates the command sequence number. */
3162 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3163 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3168 * This is the host address where the response will be written when the
3169 * request is complete. This area must be 16B aligned and must be
3170 * cleared to zero before the request is made.
3175 * When this bit is '1', this VNIC is requested to be the default VNIC
3176 * for this function.
3178 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3182 } __attribute__((packed));
3184 /* Output (16 bytes) */
3185 struct hwrm_vnic_alloc_output {
3187 * Pass/Fail or error type Note: receiver to verify the in parameters,
3188 * and fail the call with an error when appropriate
3190 uint16_t error_code;
3192 /* This field returns the type of original request. */
3195 /* This field provides original sequence number of the command. */
3199 * This field is the length of the response in bytes. The last byte of
3200 * the response is a valid flag that will read as '1' when the command
3201 * has been completely written to memory.
3205 /* Logical vnic ID */
3213 * This field is used in Output records to indicate that the output is
3214 * completely written to RAM. This field should be read as '1' to
3215 * indicate that the output has been completely written. When writing a
3216 * command completion or response to an internal processor, the order of
3217 * writes has to be such that this field is written last.
3220 } __attribute__((packed));
3222 /* hwrm_vnic_free */
3224 * Description: Free a VNIC resource. Idle any resources associated with the
3225 * VNIC as well as the VNIC. Reset and release all resources associated with the
3229 /* Input (24 bytes) */
3230 struct hwrm_vnic_free_input {
3232 * This value indicates what type of request this is. The format for the
3233 * rest of the command is determined by this field.
3238 * This value indicates the what completion ring the request will be
3239 * optionally completed on. If the value is -1, then no CR completion
3240 * will be generated. Any other value must be a valid CR ring_id value
3241 * for this function.
3245 /* This value indicates the command sequence number. */
3249 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3250 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3255 * This is the host address where the response will be written when the
3256 * request is complete. This area must be 16B aligned and must be
3257 * cleared to zero before the request is made.
3261 /* Logical vnic ID */
3265 } __attribute__((packed));
3267 /* Output (16 bytes) */
3268 struct hwrm_vnic_free_output {
3270 * Pass/Fail or error type Note: receiver to verify the in parameters,
3271 * and fail the call with an error when appropriate
3273 uint16_t error_code;
3275 /* This field returns the type of original request. */
3278 /* This field provides original sequence number of the command. */
3282 * This field is the length of the response in bytes. The last byte of
3283 * the response is a valid flag that will read as '1' when the command
3284 * has been completely written to memory.
3294 * This field is used in Output records to indicate that the output is
3295 * completely written to RAM. This field should be read as '1' to
3296 * indicate that the output has been completely written. When writing a
3297 * command completion or response to an internal processor, the order of
3298 * writes has to be such that this field is written last.
3301 } __attribute__((packed));
3303 /* hwrm_vnic_rss_cfg */
3304 /* Description: This function is used to enable RSS configuration. */
3306 /* Input (48 bytes) */
3307 struct hwrm_vnic_rss_cfg_input {
3309 * This value indicates what type of request this is. The format for the
3310 * rest of the command is determined by this field.
3315 * This value indicates the what completion ring the request will be
3316 * optionally completed on. If the value is -1, then no CR completion
3317 * will be generated. Any other value must be a valid CR ring_id value
3318 * for this function.
3322 /* This value indicates the command sequence number. */
3326 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3327 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3332 * This is the host address where the response will be written when the
3333 * request is complete. This area must be 16B aligned and must be
3334 * cleared to zero before the request is made.
3339 * When this bit is '1', the RSS hash shall be computed over source and
3340 * destination IPv4 addresses of IPv4 packets.
3342 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
3344 * When this bit is '1', the RSS hash shall be computed over
3345 * source/destination IPv4 addresses and source/destination ports of
3348 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
3350 * When this bit is '1', the RSS hash shall be computed over
3351 * source/destination IPv4 addresses and source/destination ports of
3354 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
3356 * When this bit is '1', the RSS hash shall be computed over source and
3357 * destination IPv4 addresses of IPv6 packets.
3359 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
3361 * When this bit is '1', the RSS hash shall be computed over
3362 * source/destination IPv6 addresses and source/destination ports of
3365 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
3367 * When this bit is '1', the RSS hash shall be computed over
3368 * source/destination IPv6 addresses and source/destination ports of
3371 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
3376 /* This is the address for rss ring group table */
3377 uint64_t ring_grp_tbl_addr;
3379 /* This is the address for rss hash key table */
3380 uint64_t hash_key_tbl_addr;
3382 /* Index to the rss indirection table. */
3383 uint16_t rss_ctx_idx;
3385 uint16_t unused_1[3];
3386 } __attribute__((packed));
3388 /* Output (16 bytes) */
3389 struct hwrm_vnic_rss_cfg_output {
3391 * Pass/Fail or error type Note: receiver to verify the in parameters,
3392 * and fail the call with an error when appropriate
3394 uint16_t error_code;
3396 /* This field returns the type of original request. */
3399 /* This field provides original sequence number of the command. */
3403 * This field is the length of the response in bytes. The last byte of
3404 * the response is a valid flag that will read as '1' when the command
3405 * has been completely written to memory.
3415 * This field is used in Output records to indicate that the output is
3416 * completely written to RAM. This field should be read as '1' to
3417 * indicate that the output has been completely written. When writing a
3418 * command completion or response to an internal processor, the order of
3419 * writes has to be such that this field is written last.
3422 } __attribute__((packed));
3424 /* Output (32 bytes) */
3425 struct hwrm_queue_qportcfg_output {
3427 * Pass/Fail or error type Note: receiver to verify the in parameters,
3428 * and fail the call with an error when appropriate
3430 uint16_t error_code;
3432 /* This field returns the type of original request. */
3435 /* This field provides original sequence number of the command. */
3439 * This field is the length of the response in bytes. The last byte of
3440 * the response is a valid flag that will read as '1' when the command
3441 * has been completely written to memory.
3445 /* The maximum number of queues that can be configured. */
3446 uint8_t max_configurable_queues;
3448 /* The maximum number of lossless queues that can be configured. */
3449 uint8_t max_configurable_lossless_queues;
3452 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
3453 * the HWRM shall allow the host SW driver to configure queues using
3456 uint8_t queue_cfg_allowed;
3459 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3460 * the HWRM shall allow the host SW driver to configure queue buffers
3461 * using hwrm_queue_buffers_cfg.
3463 uint8_t queue_buffers_cfg_allowed;
3466 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3467 * the HWRM shall allow the host SW driver to configure PFC using
3468 * hwrm_queue_pfcenable_cfg.
3470 uint8_t queue_pfcenable_cfg_allowed;
3473 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3474 * the HWRM shall allow the host SW driver to configure Priority to CoS
3475 * mapping using hwrm_queue_pri2cos_cfg.
3477 uint8_t queue_pri2cos_cfg_allowed;
3480 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3481 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
3482 * configuration using hwrm_queue_cos2bw_cfg.
3484 uint8_t queue_cos2bw_cfg_allowed;
3486 /* ID of CoS Queue 0. FF - Invalid id */
3489 /* This value is applicable to CoS queues only. */
3490 /* Lossy (best-effort) */
3491 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
3492 (UINT32_C(0x0) << 0)
3494 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
3495 (UINT32_C(0x1) << 0)
3497 * Set to 0xFF... (All Fs) if there is no service profile
3500 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
3501 (UINT32_C(0xff) << 0)
3502 uint8_t queue_id0_service_profile;
3504 /* ID of CoS Queue 1. FF - Invalid id */
3506 /* This value is applicable to CoS queues only. */
3507 /* Lossy (best-effort) */
3508 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
3509 (UINT32_C(0x0) << 0)
3511 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
3512 (UINT32_C(0x1) << 0)
3514 * Set to 0xFF... (All Fs) if there is no service profile
3517 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
3518 (UINT32_C(0xff) << 0)
3519 uint8_t queue_id1_service_profile;
3521 /* ID of CoS Queue 2. FF - Invalid id */
3523 /* This value is applicable to CoS queues only. */
3524 /* Lossy (best-effort) */
3525 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
3526 (UINT32_C(0x0) << 0)
3528 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
3529 (UINT32_C(0x1) << 0)
3531 * Set to 0xFF... (All Fs) if there is no service profile
3534 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
3535 (UINT32_C(0xff) << 0)
3536 uint8_t queue_id2_service_profile;
3538 /* ID of CoS Queue 3. FF - Invalid id */
3541 /* This value is applicable to CoS queues only. */
3542 /* Lossy (best-effort) */
3543 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
3544 (UINT32_C(0x0) << 0)
3546 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
3547 (UINT32_C(0x1) << 0)
3549 * Set to 0xFF... (All Fs) if there is no service profile
3552 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
3553 (UINT32_C(0xff) << 0)
3554 uint8_t queue_id3_service_profile;
3556 /* ID of CoS Queue 4. FF - Invalid id */
3558 /* This value is applicable to CoS queues only. */
3559 /* Lossy (best-effort) */
3560 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
3561 (UINT32_C(0x0) << 0)
3563 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
3564 (UINT32_C(0x1) << 0)
3566 * Set to 0xFF... (All Fs) if there is no service profile
3569 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
3570 (UINT32_C(0xff) << 0)
3571 uint8_t queue_id4_service_profile;
3573 /* ID of CoS Queue 5. FF - Invalid id */
3576 /* This value is applicable to CoS queues only. */
3577 /* Lossy (best-effort) */
3578 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
3579 (UINT32_C(0x0) << 0)
3581 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
3582 (UINT32_C(0x1) << 0)
3584 * Set to 0xFF... (All Fs) if there is no service profile
3587 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
3588 (UINT32_C(0xff) << 0)
3589 uint8_t queue_id5_service_profile;
3591 /* ID of CoS Queue 6. FF - Invalid id */
3592 uint8_t queue_id6_service_profile;
3593 /* This value is applicable to CoS queues only. */
3594 /* Lossy (best-effort) */
3595 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
3596 (UINT32_C(0x0) << 0)
3598 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
3599 (UINT32_C(0x1) << 0)
3601 * Set to 0xFF... (All Fs) if there is no service profile
3604 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
3605 (UINT32_C(0xff) << 0)
3608 /* ID of CoS Queue 7. FF - Invalid id */
3611 /* This value is applicable to CoS queues only. */
3612 /* Lossy (best-effort) */
3613 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
3614 (UINT32_C(0x0) << 0)
3616 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
3617 (UINT32_C(0x1) << 0)
3619 * Set to 0xFF... (All Fs) if there is no service profile
3622 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
3623 (UINT32_C(0xff) << 0)
3624 uint8_t queue_id7_service_profile;
3627 * This field is used in Output records to indicate that the output is
3628 * completely written to RAM. This field should be read as '1' to
3629 * indicate that the output has been completely written. When writing a
3630 * command completion or response to an internal processor, the order of
3631 * writes has to be such that this field is written last.
3634 } __attribute__((packed));
3636 /* hwrm_func_drv_rgtr */
3638 * Description: This command is used by the function driver to register its
3639 * information with the HWRM. A function driver shall implement this command. A
3640 * function driver shall use this command during the driver initialization right
3641 * after the HWRM version discovery and default ring resources allocation.
3644 /* Input (80 bytes) */
3645 struct hwrm_func_drv_rgtr_input {
3647 * This value indicates what type of request this is. The format for the
3648 * rest of the command is determined by this field.
3653 * This value indicates the what completion ring the request will be
3654 * optionally completed on. If the value is -1, then no CR completion
3655 * will be generated. Any other value must be a valid CR ring_id value
3656 * for this function.
3660 /* This value indicates the command sequence number. */
3664 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3665 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3670 * This is the host address where the response will be written when the
3671 * request is complete. This area must be 16B aligned and must be
3672 * cleared to zero before the request is made.
3677 * When this bit is '1', the function driver is requesting all requests
3678 * from its children VF drivers to be forwarded to itself. This flag can
3679 * only be set by the PF driver. If a VF driver sets this flag, it
3680 * should be ignored by the HWRM.
3682 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
3684 * When this bit is '1', the function is requesting none of the requests
3685 * from its children VF drivers to be forwarded to itself. This flag can
3686 * only be set by the PF driver. If a VF driver sets this flag, it
3687 * should be ignored by the HWRM.
3689 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
3692 /* This bit must be '1' for the os_type field to be configured. */
3693 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
3694 /* This bit must be '1' for the ver field to be configured. */
3695 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
3696 /* This bit must be '1' for the timestamp field to be configured. */
3697 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
3698 /* This bit must be '1' for the vf_req_fwd field to be configured. */
3699 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
3701 * This bit must be '1' for the async_event_fwd field to be configured.
3703 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
3707 /* This value indicates the type of OS. */
3709 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
3710 (UINT32_C(0x0) << 0)
3711 /* Other OS not listed below. */
3712 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
3713 (UINT32_C(0x1) << 0)
3715 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
3716 (UINT32_C(0xe) << 0)
3718 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
3719 (UINT32_C(0x12) << 0)
3721 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
3722 (UINT32_C(0x1d) << 0)
3724 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
3725 (UINT32_C(0x24) << 0)
3727 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
3728 (UINT32_C(0x2a) << 0)
3729 /* VMware ESXi OS. */
3730 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
3731 (UINT32_C(0x68) << 0)
3732 /* Microsoft Windows 8 64-bit OS. */
3733 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
3734 (UINT32_C(0x73) << 0)
3735 /* Microsoft Windows Server 2012 R2 OS. */
3736 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
3737 (UINT32_C(0x74) << 0)
3740 /* This is the major version of the driver. */
3743 /* This is the minor version of the driver. */
3746 /* This is the update version of the driver. */
3753 * This is a 32-bit timestamp provided by the driver for keep alive. The
3754 * timestamp is in multiples of 1ms.
3761 * This is a 256-bit bit mask provided by the PF driver for letting the
3762 * HWRM know what commands issued by the VF driver to the HWRM should be
3763 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
3764 * Setting Nth bit to 1 indicates that requests from the VF driver with
3765 * req_type equal to N shall be forwarded to the parent PF driver. This
3766 * field is not valid for the VF driver.
3768 uint32_t vf_req_fwd[8];
3771 * This is a 256-bit bit mask provided by the function driver (PF or VF
3772 * driver) to indicate the list of asynchronous event completions to be
3773 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
3774 * by the function driver shall result in the HWRM forwarding
3775 * asynchronous event completion with event_id equal to N. If all bits
3776 * are set to 0 (value of 0), then the HWRM shall not forward any
3777 * asynchronous event completion to this function driver.
3779 uint32_t async_event_fwd[8];
3780 } __attribute__((packed));
3782 /* Output (16 bytes) */
3784 struct hwrm_func_drv_rgtr_output {
3786 * Pass/Fail or error type Note: receiver to verify the in parameters,
3787 * and fail the call with an error when appropriate
3789 uint16_t error_code;
3791 /* This field returns the type of original request. */
3794 /* This field provides original sequence number of the command. */
3798 * This field is the length of the response in bytes. The last byte of
3799 * the response is a valid flag that will read as '1' when the command
3800 * has been completely written to memory.
3810 * This field is used in Output records to indicate that the output is
3811 * completely written to RAM. This field should be read as '1' to
3812 * indicate that the output has been completely written. When writing a
3813 * command completion or response to an internal processor, the order of
3814 * writes has to be such that this field is written last.
3817 } __attribute__((packed));
3819 /* hwrm_func_drv_unrgtr */
3821 * Description: This command is used by the function driver to un register with
3822 * the HWRM. A function driver shall implement this command. A function driver
3823 * shall use this command during the driver unloading.
3825 /* Input (24 bytes) */
3827 struct hwrm_func_drv_unrgtr_input {
3829 * This value indicates what type of request this is. The format for the
3830 * rest of the command is determined by this field.
3835 * This value indicates the what completion ring the request will be
3836 * optionally completed on. If the value is -1, then no CR completion
3837 * will be generated. Any other value must be a valid CR ring_id value
3838 * for this function.
3842 /* This value indicates the command sequence number. */
3846 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3847 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3852 * This is the host address where the response will be written when the
3853 * request is complete. This area must be 16B aligned and must be
3854 * cleared to zero before the request is made.
3859 * When this bit is '1', the function driver is notifying the HWRM to
3860 * prepare for the shutdown.
3862 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
3867 } __attribute__((packed));
3869 /* Output (16 bytes) */
3870 struct hwrm_func_drv_unrgtr_output {
3872 * Pass/Fail or error type Note: receiver to verify the in parameters,
3873 * and fail the call with an error when appropriate
3875 uint16_t error_code;
3877 /* This field returns the type of original request. */
3880 /* This field provides original sequence number of the command. */
3884 * This field is the length of the response in bytes. The last byte of
3885 * the response is a valid flag that will read as '1' when the command
3886 * has been completely written to memory.
3896 * This field is used in Output records to indicate that the output is
3897 * completely written to RAM. This field should be read as '1' to
3898 * indicate that the output has been completely written. When writing a
3899 * command completion or response to an internal processor, the order of
3900 * writes has to be such that this field is written last.
3903 } __attribute__((packed));