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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
87 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
88 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
89 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
90 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
91 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
92 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
93 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
94 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
95 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
96 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
99 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
100 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
102 /* Short TX BD (16 bytes) */
105 * All bits in this field must be valid on the first BD of a packet.
106 * Only the packet_end bit must be valid for the remaining BDs of a
109 /* This value identifies the type of buffer descriptor. */
110 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
111 #define TX_BD_SHORT_TYPE_SFT 0
113 * Indicates that this BD is 16B long and is used for normal L2
114 * packet transmission.
116 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
118 * If set to 1, the packet ends with the data in the buffer pointed to
119 * by this descriptor. This flag must be valid on every BD.
121 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
123 * If set to 1, the device will not generate a completion for this
124 * transmit packet unless there is an error in it's processing. If this
125 * bit is set to 0, then the packet will be completed normally. This bit
126 * must be valid only on the first BD of a packet.
128 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
130 * This value indicates how many 16B BD locations are consumed in the
131 * ring by this packet. A value of 1 indicates that this BD is the only
132 * BD (and that the it is a short BD). A value of 3 indicates either 3
133 * short BDs or 1 long BD and one short BD in the packet. A value of 0
134 * indicates that there are 32 BD locations in the packet (the maximum).
135 * This field is valid only on the first BD of a packet.
137 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
138 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
140 * This value is a hint for the length of the entire packet. It is used
141 * by the chip to optimize internal processing. The packet will be
142 * dropped if the hint is too short. This field is valid only on the
143 * first BD of a packet.
145 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
146 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
147 /* indicates packet length < 512B */
148 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
149 /* indicates 512 <= packet length < 1KB */
150 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
151 /* indicates 1KB <= packet length < 2KB */
152 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
153 /* indicates packet length >= 2KB */
154 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
155 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
157 * If set to 1, the device immediately updates the Send Consumer Index
158 * after the buffer associated with this descriptor has been transferred
159 * via DMA to NIC memory from host memory. An interrupt may or may not
160 * be generated according to the state of the interrupt avoidance
161 * mechanisms. If this bit is set to 0, then the Consumer Index is only
162 * updated as soon as one of the host interrupt coalescing conditions
163 * has been met. This bit must be valid on the first BD of a packet.
165 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
167 * All bits in this field must be valid on the first BD of a packet.
168 * Only the packet_end bit must be valid for the remaining BDs of a
171 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
172 #define TX_BD_SHORT_FLAGS_SFT 6
176 * This is the length of the host physical buffer this BD describes in
177 * bytes. This field must be valid on all BDs of a packet.
181 * The opaque data field is pass through to the completion and can be
182 * used for any data that the driver wants to associate with the
183 * transmit BD. This field must be valid on the first BD of a packet.
188 * This is the host physical address for the portion of the packet
189 * described by this TX BD. This value must be valid on all BDs of a
193 } __attribute__((packed));
195 /* Long TX BD (32 bytes split to 2 16-byte struct) */
198 * All bits in this field must be valid on the first BD of a packet.
199 * Only the packet_end bit must be valid for the remaining BDs of a
202 /* This value identifies the type of buffer descriptor. */
203 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
204 #define TX_BD_LONG_TYPE_SFT 0
206 * Indicates that this BD is 32B long and is used for normal L2
207 * packet transmission.
209 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
211 * If set to 1, the packet ends with the data in the buffer pointed to
212 * by this descriptor. This flag must be valid on every BD.
214 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
216 * If set to 1, the device will not generate a completion for this
217 * transmit packet unless there is an error in it's processing. If this
218 * bit is set to 0, then the packet will be completed normally. This bit
219 * must be valid only on the first BD of a packet.
221 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
223 * This value indicates how many 16B BD locations are consumed in the
224 * ring by this packet. A value of 1 indicates that this BD is the only
225 * BD (and that the it is a short BD). A value of 3 indicates either 3
226 * short BDs or 1 long BD and one short BD in the packet. A value of 0
227 * indicates that there are 32 BD locations in the packet (the maximum).
228 * This field is valid only on the first BD of a packet.
230 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
231 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
233 * This value is a hint for the length of the entire packet. It is used
234 * by the chip to optimize internal processing. The packet will be
235 * dropped if the hint is too short. This field is valid only on the
236 * first BD of a packet.
238 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
239 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
240 /* indicates packet length < 512B */
241 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
242 /* indicates 512 <= packet length < 1KB */
243 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
244 /* indicates 1KB <= packet length < 2KB */
245 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
246 /* indicates packet length >= 2KB */
247 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
248 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
250 * If set to 1, the device immediately updates the Send Consumer Index
251 * after the buffer associated with this descriptor has been transferred
252 * via DMA to NIC memory from host memory. An interrupt may or may not
253 * be generated according to the state of the interrupt avoidance
254 * mechanisms. If this bit is set to 0, then the Consumer Index is only
255 * updated as soon as one of the host interrupt coalescing conditions
256 * has been met. This bit must be valid on the first BD of a packet.
258 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
260 * All bits in this field must be valid on the first BD of a packet.
261 * Only the packet_end bit must be valid for the remaining BDs of a
264 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
265 #define TX_BD_LONG_FLAGS_SFT 6
269 * This is the length of the host physical buffer this BD describes in
270 * bytes. This field must be valid on all BDs of a packet.
275 * The opaque data field is pass through to the completion and can be
276 * used for any data that the driver wants to associate with the
277 * transmit BD. This field must be valid on the first BD of a packet.
282 * This is the host physical address for the portion of the packet
283 * described by this TX BD. This value must be valid on all BDs of a
287 } __attribute__((packed));
289 /* last 16 bytes of Long TX BD */
291 struct tx_bd_long_hi {
293 * All bits in this field must be valid on the first BD of a packet.
294 * Their value on other BDs of the packet will be ignored.
297 * If set to 1, the controller replaces the TCP/UPD checksum fields of
298 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
299 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
300 * checksum for the packet associated with this descriptor. This bit
301 * must be valid on the first BD of a packet.
303 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
305 * If set to 1, the controller replaces the IP checksum of the normal
306 * packets, or the inner IP checksum of the encapsulated packets with
307 * the hardware calculated IP checksum for the packet associated with
308 * this descriptor. This bit must be valid on the first BD of a packet.
310 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
312 * If set to 1, the controller will not append an Ethernet CRC to the
313 * end of the frame. This bit must be valid on the first BD of a packet.
314 * Packet must be 64B or longer when this flag is set. It is not useful
315 * to use this bit with any form of TX offload such as CSO or LSO. The
316 * intent is that the packet from the host already has a valid Ethernet
319 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
321 * If set to 1, the device will record the time at which the packet was
322 * actually transmitted at the TX MAC. This bit must be valid on the
323 * first BD of a packet.
325 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
327 * If set to 1, The controller replaces the tunnel IP checksum field
328 * with hardware calculated IP checksum for the IP header of the packet
329 * associated with this descriptor. In case of VXLAN, the controller
330 * also replaces the outer header UDP checksum with hardware calculated
331 * UDP checksum for the packet associated with this descriptor.
333 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
335 * If set to 1, the device will treat this packet with LSO(Large Send
336 * Offload) processing for both normal or encapsulated packets, which is
337 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
338 * fields must be valid. The driver doesn't need to set t_ip_chksum,
339 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
340 * the appropriate checksum fields for segmented packets. When this bit
341 * is 1, the hdr_size and mss fields must be valid.
343 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
345 * If set to zero when LSO is '1', then the IPID will be treated as a
346 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
347 * set to one when LSO is '1', then the IPID will be treated as a 15b
348 * number and will be wrapped if it exceeds a value 0f 0x7fff.
350 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
352 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
353 * will not be modified during LSO operations. If set to one when LSO is
354 * '1', then the IPID of the tunnel IP header will be incremented for
355 * each subsequent segment of an LSO operation.
357 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
359 * If set to '1', then the RoCE ICRC will be appended to the packet.
360 * Packet must be a valid RoCE format packet.
362 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
364 * If set to '1', then the FCoE CRC will be appended to the packet.
365 * Packet must be a valid FCoE format packet.
367 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
371 * When LSO is '1', this field must contain the offset of the TCP
372 * payload from the beginning of the packet in as 16b words. In case of
373 * encapsulated/tunneling packet, this field contains the offset of the
374 * inner TCP payload from beginning of the packet as 16-bit words. This
375 * value must be valid on the first BD of a packet.
377 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
378 #define TX_BD_LONG_HDR_SIZE_SFT 0
382 * This is the MSS value that will be used to do the LSO processing. The
383 * value is the length in bytes of the TCP payload for each segment
384 * generated by the LSO operation. This value must be valid on the first
387 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
388 #define TX_BD_LONG_MSS_SFT 0
394 * This value selects a CFA action to perform on the packet. Set this
395 * value to zero if no CFA action is desired. This value must be valid
396 * on the first BD of a packet.
401 * This value is action meta-data that defines CFA edit operations that
402 * are done in addition to any action editing.
404 /* When key=1, This is the VLAN tag VID value. */
405 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
406 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
407 /* When key=1, This is the VLAN tag DE value. */
408 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
409 /* When key=1, This is the VLAN tag PRI value. */
410 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
411 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
412 /* When key=1, This is the VLAN tag TPID select value. */
413 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
414 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
416 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
418 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
420 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
422 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
424 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
425 /* Value programmed in CFA VLANTPID register. */
426 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
427 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
428 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
429 /* When key=1, This is the VLAN tag TPID select value. */
430 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
431 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
433 * This field identifies the type of edit to be performed on the packet.
434 * This value must be valid on the first BD of a packet.
436 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
437 #define TX_BD_LONG_CFA_META_KEY_SFT 28
439 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
441 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
442 * - PRI/DE value. - meta[11:0] - VID value.
444 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
445 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
447 } __attribute__((packed));
449 /* Completion Ring Structures */
450 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
451 /* Base Completion Record (16 bytes) */
455 * This field indicates the exact type of the completion. By convention,
456 * the LSB identifies the length of the record in 16B units. Even values
457 * indicate 16B records. Odd values indicate 32B records.
459 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
460 #define CMPL_BASE_TYPE_SFT 0
461 /* TX L2 completion: Completion of TX packet. Length = 16B */
462 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
464 * RX L2 completion: Completion of and L2 RX packet.
467 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
469 * RX Aggregation Buffer completion : Completion of an L2
470 * aggregation buffer in support of TPA, HDS, or Jumbo packet
471 * completion. Length = 16B
473 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
475 * RX L2 TPA Start Completion: Completion at the beginning of a
476 * TPA operation. Length = 32B
478 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
480 * RX L2 TPA End Completion: Completion at the end of a TPA
481 * operation. Length = 32B
483 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
485 * Statistics Ejection Completion: Completion of statistics data
486 * ejection buffer. Length = 16B
488 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
489 /* HWRM Command Completion: Completion of an HWRM command. */
490 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
491 /* Forwarded HWRM Request */
492 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
493 /* Forwarded HWRM Response */
494 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
495 /* HWRM Asynchronous Event Information */
496 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
497 /* CQ Notification */
498 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
499 /* SRQ Threshold Event */
500 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
501 /* DBQ Threshold Event */
502 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
503 /* QP Async Notification */
504 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
505 /* Function Async Notification */
506 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
513 * This value is written by the NIC such that it will be different for
514 * each pass through the completion queue. The even passes will write 1.
515 * The odd passes will write 0.
517 #define CMPL_BASE_V UINT32_C(0x1)
519 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
520 #define CMPL_BASE_INFO3_SFT 1
524 } __attribute__((packed));
526 /* TX Completion Record (16 bytes) */
529 * This field indicates the exact type of the completion. By convention,
530 * the LSB identifies the length of the record in 16B units. Even values
531 * indicate 16B records. Odd values indicate 32B records.
533 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
534 #define TX_CMPL_TYPE_SFT 0
535 /* TX L2 completion: Completion of TX packet. Length = 16B */
536 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
538 * When this bit is '1', it indicates a packet that has an error of some
539 * type. Type of error is indicated in error_flags.
541 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
543 * When this bit is '1', it indicates that the packet completed was
544 * transmitted using the push acceleration data provided by the driver.
545 * When this bit is '0', it indicates that the packet had not push
546 * acceleration data written or was executed as a normal packet even
547 * though push data was provided.
549 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
550 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
551 #define TX_CMPL_FLAGS_SFT 6
557 * This is a copy of the opaque field from the first TX BD of this
558 * transmitted packet.
563 * This value is written by the NIC such that it will be different for
564 * each pass through the completion queue. The even passes will write 1.
565 * The odd passes will write 0.
567 #define TX_CMPL_V UINT32_C(0x1)
569 * This error indicates that there was some sort of problem with the BDs
572 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
573 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
575 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
576 /* Bad Format: BDs were not formatted correctly. */
577 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
578 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
579 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
581 * When this bit is '1', it indicates that the length of the packet was
582 * zero. No packet was transmitted.
584 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
586 * When this bit is '1', it indicates that the packet was longer than
587 * the programmed limit in TDI. No packet was transmitted.
589 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
591 * When this bit is '1', it indicates that one or more of the BDs
592 * associated with this packet generated a PCI error. This probably
593 * means the address was not valid.
595 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
597 * When this bit is '1', it indicates that the packet was longer than
598 * indicated by the hint. No packet was transmitted.
600 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
602 * When this bit is '1', it indicates that the packet was dropped due to
603 * Poison TLP error on one or more of the TLPs in the PXP completion.
605 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
606 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
607 #define TX_CMPL_ERRORS_SFT 1
612 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
614 /* HWRM Forwarded Request (16 bytes) */
615 struct hwrm_fwd_req_cmpl {
616 /* Length of forwarded request in bytes. */
618 * This field indicates the exact type of the completion. By convention,
619 * the LSB identifies the length of the record in 16B units. Even values
620 * indicate 16B records. Odd values indicate 32B records.
622 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
623 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
624 /* Forwarded HWRM Request */
625 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
626 /* Length of forwarded request in bytes. */
627 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
628 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
629 uint16_t req_len_type;
632 * Source ID of this request. Typically used in forwarding requests and
633 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
634 * Reserved for internal processors 0xFFFF - HWRM
640 /* Address of forwarded request. */
642 * This value is written by the NIC such that it will be different for
643 * each pass through the completion queue. The even passes will write 1.
644 * The odd passes will write 0.
646 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
647 /* Address of forwarded request. */
648 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
649 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
650 uint64_t req_buf_addr_v;
651 } __attribute__((packed));
653 /* HWRM Asynchronous Event Completion Record (16 bytes) */
654 struct hwrm_async_event_cmpl {
656 * This field indicates the exact type of the completion. By convention,
657 * the LSB identifies the length of the record in 16B units. Even values
658 * indicate 16B records. Odd values indicate 32B records.
660 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
661 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
662 /* HWRM Asynchronous Event Information */
663 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
664 (UINT32_C(0x2e) << 0)
667 /* Identifiers of events. */
668 /* Link status changed */
669 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
671 /* Link MTU changed */
672 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
674 /* Link speed changed */
675 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
677 /* DCB Configuration changed */
678 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
680 /* Port connection not allowed */
681 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
683 /* Link speed configuration was not allowed */
684 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
686 /* Function driver unloaded */
687 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
688 (UINT32_C(0x10) << 0)
689 /* Function driver loaded */
690 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
691 (UINT32_C(0x11) << 0)
692 /* PF driver unloaded */
693 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
694 (UINT32_C(0x20) << 0)
695 /* PF driver loaded */
696 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
697 (UINT32_C(0x21) << 0)
698 /* VF Function Level Reset (FLR) */
699 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
700 /* VF MAC Address Change */
701 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
702 (UINT32_C(0x31) << 0)
703 /* PF-VF communication channel status change. */
704 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
705 (UINT32_C(0x32) << 0)
707 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
708 (UINT32_C(0xff) << 0)
711 /* Event specific data */
712 uint32_t event_data2;
716 * This value is written by the NIC such that it will be different for
717 * each pass through the completion queue. The even passes will write 1.
718 * The odd passes will write 0.
720 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
722 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
723 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
726 /* 8-lsb timestamp from POR (100-msec resolution) */
727 uint8_t timestamp_lo;
729 /* 16-lsb timestamp from POR (100-msec resolution) */
730 uint16_t timestamp_hi;
732 /* Event specific data */
733 uint32_t event_data1;
734 } __attribute__((packed));
737 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
738 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
739 * processors inside the chip. This firmware is vital part of the chip's
740 * hardware. The chip can not be used by driver without it.
743 /* Input (16 bytes) */
746 * This value indicates what type of request this is. The format for the
747 * rest of the command is determined by this field.
752 * This value indicates the what completion ring the request will be
753 * optionally completed on. If the value is -1, then no CR completion
754 * will be generated. Any other value must be a valid CR ring_id value
759 /* This value indicates the command sequence number. */
763 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
764 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
769 * This is the host address where the response will be written when the
770 * request is complete. This area must be 16B aligned and must be
771 * cleared to zero before the request is made.
774 } __attribute__((packed));
776 /* Output (8 bytes) */
779 * Pass/Fail or error type Note: receiver to verify the in parameters,
780 * and fail the call with an error when appropriate
784 /* This field returns the type of original request. */
787 /* This field provides original sequence number of the command. */
791 * This field is the length of the response in bytes. The last byte of
792 * the response is a valid flag that will read as '1' when the command
793 * has been completely written to memory.
796 } __attribute__((packed));
798 /* hwrm_cfa_l2_filter_alloc */
800 * A filter is used to identify traffic that contains a matching set of
801 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
802 * other things which then allows the ASIC to direct the incoming traffic
803 * to an appropriate VNIC or Rx ring.
806 /* Input (96 bytes) */
807 struct hwrm_cfa_l2_filter_alloc_input {
809 * This value indicates what type of request this is. The format for the
810 * rest of the command is determined by this field.
815 * This value indicates the what completion ring the request will be
816 * optionally completed on. If the value is -1, then no CR completion
817 * will be generated. Any other value must be a valid CR ring_id value
822 /* This value indicates the command sequence number. */
826 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
827 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
832 * This is the host address where the response will be written when the
833 * request is complete. This area must be 16B aligned and must be
834 * cleared to zero before the request is made.
839 * Enumeration denoting the RX, TX type of the resource. This
840 * enumeration is used for resources that are similar for both TX and RX
843 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
846 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
849 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
851 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
852 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
854 * Setting of this flag indicates the applicability to the loopback
857 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
860 * Setting of this flag indicates drop action. If this flag is not set,
861 * then it should be considered accept action.
863 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
866 * If this flag is set, all t_l2_* fields are invalid and they should
867 * not be specified. If this flag is set, then l2_* fields refer to
868 * fields of outermost L2 header.
870 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
874 /* This bit must be '1' for the l2_addr field to be configured. */
875 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
877 /* This bit must be '1' for the l2_addr_mask field to be configured. */
878 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
880 /* This bit must be '1' for the l2_ovlan field to be configured. */
881 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
883 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
884 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
886 /* This bit must be '1' for the l2_ivlan field to be configured. */
887 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
889 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
890 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
892 /* This bit must be '1' for the t_l2_addr field to be configured. */
893 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
896 * This bit must be '1' for the t_l2_addr_mask field to be configured.
898 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
900 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
901 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
904 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
906 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
908 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
909 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
912 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
914 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
916 /* This bit must be '1' for the src_type field to be configured. */
917 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
919 /* This bit must be '1' for the src_id field to be configured. */
920 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
922 /* This bit must be '1' for the tunnel_type field to be configured. */
923 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
925 /* This bit must be '1' for the dst_id field to be configured. */
926 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
929 * This bit must be '1' for the mirror_vnic_id field to be configured.
931 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
936 * This value sets the match value for the L2 MAC address. Destination
937 * MAC address for RX path. Source MAC address for TX path.
945 * This value sets the mask value for the L2 address. A value of 0 will
946 * mask the corresponding bit from compare.
948 uint8_t l2_addr_mask[6];
950 /* This value sets VLAN ID value for outer VLAN. */
954 * This value sets the mask value for the ovlan id. A value of 0 will
955 * mask the corresponding bit from compare.
957 uint16_t l2_ovlan_mask;
959 /* This value sets VLAN ID value for inner VLAN. */
963 * This value sets the mask value for the ivlan id. A value of 0 will
964 * mask the corresponding bit from compare.
966 uint16_t l2_ivlan_mask;
972 * This value sets the match value for the tunnel L2 MAC address.
973 * Destination MAC address for RX path. Source MAC address for TX path.
975 uint8_t t_l2_addr[6];
981 * This value sets the mask value for the tunnel L2 address. A value of
982 * 0 will mask the corresponding bit from compare.
984 uint8_t t_l2_addr_mask[6];
986 /* This value sets VLAN ID value for tunnel outer VLAN. */
990 * This value sets the mask value for the tunnel ovlan id. A value of 0
991 * will mask the corresponding bit from compare.
993 uint16_t t_l2_ovlan_mask;
995 /* This value sets VLAN ID value for tunnel inner VLAN. */
999 * This value sets the mask value for the tunnel ivlan id. A value of 0
1000 * will mask the corresponding bit from compare.
1002 uint16_t t_l2_ivlan_mask;
1004 /* This value identifies the type of source of the packet. */
1006 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1007 (UINT32_C(0x0) << 0)
1008 /* Physical function */
1009 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1010 (UINT32_C(0x1) << 0)
1011 /* Virtual function */
1012 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1013 (UINT32_C(0x2) << 0)
1014 /* Virtual NIC of a function */
1015 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1016 (UINT32_C(0x3) << 0)
1017 /* Embedded processor for CFA management */
1018 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1019 (UINT32_C(0x4) << 0)
1020 /* Embedded processor for OOB management */
1021 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1022 (UINT32_C(0x5) << 0)
1023 /* Embedded processor for RoCE */
1024 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1025 (UINT32_C(0x6) << 0)
1026 /* Embedded processor for network proxy functions */
1027 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1028 (UINT32_C(0x7) << 0)
1033 * This value is the id of the source. For a network port, it represents
1034 * port_id. For a physical function, it represents fid. For a virtual
1035 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1036 * embedded processors, this id is not valid. Notes: 1. The function ID
1037 * is implied if it src_id is not provided for a src_type that is either
1043 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1044 (UINT32_C(0x0) << 0)
1045 /* Virtual eXtensible Local Area Network (VXLAN) */
1046 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1047 (UINT32_C(0x1) << 0)
1049 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1051 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1052 (UINT32_C(0x2) << 0)
1054 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1056 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1057 (UINT32_C(0x3) << 0)
1059 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1060 (UINT32_C(0x4) << 0)
1061 /* Generic Network Virtualization Encapsulation (Geneve) */
1062 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1063 (UINT32_C(0x5) << 0)
1064 /* Multi-Protocol Lable Switching (MPLS) */
1065 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1066 (UINT32_C(0x6) << 0)
1067 /* Stateless Transport Tunnel (STT) */
1068 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1069 (UINT32_C(0x7) << 0)
1071 * Generic Routing Encapsulation (GRE) inside IP datagram
1074 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1075 (UINT32_C(0x8) << 0)
1076 /* Any tunneled traffic */
1077 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1078 (UINT32_C(0xff) << 0)
1079 uint8_t tunnel_type;
1084 * If set, this value shall represent the Logical VNIC ID of the
1085 * destination VNIC for the RX path and network port id of the
1086 * destination port for the TX path.
1090 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1091 uint16_t mirror_vnic_id;
1094 * This hint is provided to help in placing the filter in the filter
1098 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1099 (UINT32_C(0x0) << 0)
1100 /* Above the given filter */
1101 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1102 (UINT32_C(0x1) << 0)
1103 /* Below the given filter */
1104 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1105 (UINT32_C(0x2) << 0)
1106 /* As high as possible */
1107 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1108 (UINT32_C(0x3) << 0)
1109 /* As low as possible */
1110 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1111 (UINT32_C(0x4) << 0)
1118 * This is the ID of the filter that goes along with the pri_hint. This
1119 * field is valid only for the following values. 1 - Above the given
1120 * filter 2 - Below the given filter
1122 uint64_t l2_filter_id_hint;
1123 } __attribute__((packed));
1125 /* Output (24 bytes) */
1126 struct hwrm_cfa_l2_filter_alloc_output {
1128 * Pass/Fail or error type Note: receiver to verify the in parameters,
1129 * and fail the call with an error when appropriate
1131 uint16_t error_code;
1133 /* This field returns the type of original request. */
1136 /* This field provides original sequence number of the command. */
1140 * This field is the length of the response in bytes. The last byte of
1141 * the response is a valid flag that will read as '1' when the command
1142 * has been completely written to memory.
1147 * This value identifies a set of CFA data structures used for an L2
1150 uint64_t l2_filter_id;
1153 * This is the ID of the flow associated with this filter. This value
1154 * shall be used to match and associate the flow identifier returned in
1155 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1164 * This field is used in Output records to indicate that the output is
1165 * completely written to RAM. This field should be read as '1' to
1166 * indicate that the output has been completely written. When writing a
1167 * command completion or response to an internal processor, the order of
1168 * writes has to be such that this field is written last.
1171 } __attribute__((packed));
1173 /* hwrm_cfa_l2_filter_free */
1175 * Description: Free a L2 filter. The HWRM shall free all associated filter
1176 * resources with the L2 filter.
1179 /* Input (24 bytes) */
1180 struct hwrm_cfa_l2_filter_free_input {
1182 * This value indicates what type of request this is. The format for the
1183 * rest of the command is determined by this field.
1188 * This value indicates the what completion ring the request will be
1189 * optionally completed on. If the value is -1, then no CR completion
1190 * will be generated. Any other value must be a valid CR ring_id value
1191 * for this function.
1195 /* This value indicates the command sequence number. */
1199 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1200 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1205 * This is the host address where the response will be written when the
1206 * request is complete. This area must be 16B aligned and must be
1207 * cleared to zero before the request is made.
1212 * This value identifies a set of CFA data structures used for an L2
1215 uint64_t l2_filter_id;
1216 } __attribute__((packed));
1218 /* Output (16 bytes) */
1219 struct hwrm_cfa_l2_filter_free_output {
1221 * Pass/Fail or error type Note: receiver to verify the in parameters,
1222 * and fail the call with an error when appropriate
1224 uint16_t error_code;
1226 /* This field returns the type of original request. */
1229 /* This field provides original sequence number of the command. */
1233 * This field is the length of the response in bytes. The last byte of
1234 * the response is a valid flag that will read as '1' when the command
1235 * has been completely written to memory.
1245 * This field is used in Output records to indicate that the output is
1246 * completely written to RAM. This field should be read as '1' to
1247 * indicate that the output has been completely written. When writing a
1248 * command completion or response to an internal processor, the order of
1249 * writes has to be such that this field is written last.
1252 } __attribute__((packed));
1254 /* hwrm_exec_fwd_resp */
1256 * Description: This command is used to send an encapsulated request to the
1257 * HWRM. This command instructs the HWRM to execute the request and forward the
1258 * response of the encapsulated request to the location specified in the
1259 * original request that is encapsulated. The target id of this command shall be
1260 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1261 * acknowledge the receipt of the encapsulated request and forwarding of the
1265 /* Input (128 bytes) */
1266 struct hwrm_exec_fwd_resp_input {
1268 * This value indicates what type of request this is. The format for the
1269 * rest of the command is determined by this field.
1274 * This value indicates the what completion ring the request will be
1275 * optionally completed on. If the value is -1, then no CR completion
1276 * will be generated. Any other value must be a valid CR ring_id value
1277 * for this function.
1281 /* This value indicates the command sequence number. */
1285 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1286 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1291 * This is the host address where the response will be written when the
1292 * request is complete. This area must be 16B aligned and must be
1293 * cleared to zero before the request is made.
1298 * This is an encapsulated request. This request should be executed by
1299 * the HWRM and the response should be provided in the response buffer
1300 * inside the encapsulated request.
1302 uint32_t encap_request[26];
1305 * This value indicates the target id of the response to the
1306 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1307 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1309 uint16_t encap_resp_target_id;
1311 uint16_t unused_0[3];
1312 } __attribute__((packed));
1314 /* Output (16 bytes) */
1315 struct hwrm_exec_fwd_resp_output {
1317 * Pass/Fail or error type Note: receiver to verify the in parameters,
1318 * and fail the call with an error when appropriate
1320 uint16_t error_code;
1322 /* This field returns the type of original request. */
1325 /* This field provides original sequence number of the command. */
1329 * This field is the length of the response in bytes. The last byte of
1330 * the response is a valid flag that will read as '1' when the command
1331 * has been completely written to memory.
1341 * This field is used in Output records to indicate that the output is
1342 * completely written to RAM. This field should be read as '1' to
1343 * indicate that the output has been completely written. When writing a
1344 * command completion or response to an internal processor, the order of
1345 * writes has to be such that this field is written last.
1348 } __attribute__((packed));
1350 /* hwrm_func_qcaps */
1352 * Description: This command returns capabilities of a function. The input FID
1353 * value is used to indicate what function is being queried. This allows a
1354 * physical function driver to query virtual functions that are children of the
1355 * physical function. The output FID value is needed to configure Rings and
1356 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1359 /* Input (24 bytes) */
1360 struct hwrm_func_qcaps_input {
1362 * This value indicates what type of request this is. The format for the
1363 * rest of the command is determined by this field.
1368 * This value indicates the what completion ring the request will be
1369 * optionally completed on. If the value is -1, then no CR completion
1370 * will be generated. Any other value must be a valid CR ring_id value
1371 * for this function.
1375 /* This value indicates the command sequence number. */
1379 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1380 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1385 * This is the host address where the response will be written when the
1386 * request is complete. This area must be 16B aligned and must be
1387 * cleared to zero before the request is made.
1392 * Function ID of the function that is being queried. 0xFF... (All Fs)
1393 * if the query is for the requesting function.
1397 uint16_t unused_0[3];
1398 } __attribute__((packed));
1400 /* Output (80 bytes) */
1401 struct hwrm_func_qcaps_output {
1403 * Pass/Fail or error type Note: receiver to verify the in parameters,
1404 * and fail the call with an error when appropriate
1406 uint16_t error_code;
1408 /* This field returns the type of original request. */
1411 /* This field provides original sequence number of the command. */
1415 * This field is the length of the response in bytes. The last byte of
1416 * the response is a valid flag that will read as '1' when the command
1417 * has been completely written to memory.
1422 * FID value. This value is used to identify operations on the PCI bus
1423 * as belonging to a particular PCI function.
1428 * Port ID of port that this function is associated with. Valid only for
1429 * the PF. 0xFF... (All Fs) if this function is not associated with any
1430 * port. 0xFF... (All Fs) if this function is called from a VF.
1434 /* If 1, then Push mode is supported on this function. */
1435 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
1437 * If 1, then the global MSI-X auto-masking is enabled for the device.
1439 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
1442 * If 1, then the Precision Time Protocol (PTP) processing is supported
1443 * on this function. The HWRM should enable PTP on only a single
1444 * Physical Function (PF) per port.
1446 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
1450 * This value is current MAC address configured for this function. A
1451 * value of 00-00-00-00-00-00 indicates no MAC address is currently
1454 uint8_t perm_mac_address[6];
1457 * The maximum number of RSS/COS contexts that can be allocated to the
1460 uint16_t max_rsscos_ctx;
1463 * The maximum number of completion rings that can be allocated to the
1466 uint16_t max_cmpl_rings;
1469 * The maximum number of transmit rings that can be allocated to the
1472 uint16_t max_tx_rings;
1475 * The maximum number of receive rings that can be allocated to the
1478 uint16_t max_rx_rings;
1481 * The maximum number of L2 contexts that can be allocated to the
1484 uint16_t max_l2_ctxs;
1486 /* The maximum number of VNICs that can be allocated to the function. */
1490 * The identifier for the first VF enabled on a PF. This is valid only
1491 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
1492 * called on a PF with SR-IOV disabled or on a VF.
1494 uint16_t first_vf_id;
1497 * The maximum number of VFs that can be allocated to the function. This
1498 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
1499 * command is called on a PF with SR-IOV disabled or on a VF.
1504 * The maximum number of statistic contexts that can be allocated to the
1507 uint16_t max_stat_ctx;
1510 * The maximum number of Encapsulation records that can be offloaded by
1513 uint32_t max_encap_records;
1516 * The maximum number of decapsulation records that can be offloaded by
1519 uint32_t max_decap_records;
1522 * The maximum number of Exact Match (EM) flows that can be offloaded by
1523 * this function on the TX side.
1525 uint32_t max_tx_em_flows;
1528 * The maximum number of Wildcard Match (WM) flows that can be offloaded
1529 * by this function on the TX side.
1531 uint32_t max_tx_wm_flows;
1534 * The maximum number of Exact Match (EM) flows that can be offloaded by
1535 * this function on the RX side.
1537 uint32_t max_rx_em_flows;
1540 * The maximum number of Wildcard Match (WM) flows that can be offloaded
1541 * by this function on the RX side.
1543 uint32_t max_rx_wm_flows;
1546 * The maximum number of multicast filters that can be supported by this
1547 * function on the RX side.
1549 uint32_t max_mcast_filters;
1552 * The maximum value of flow_id that can be supported in completion
1555 uint32_t max_flow_id;
1558 * The maximum number of HW ring groups that can be supported on this
1561 uint32_t max_hw_ring_grps;
1568 * This field is used in Output records to indicate that the output is
1569 * completely written to RAM. This field should be read as '1' to
1570 * indicate that the output has been completely written. When writing a
1571 * command completion or response to an internal processor, the order of
1572 * writes has to be such that this field is written last.
1575 } __attribute__((packed));
1577 /* hwrm_port_phy_cfg */
1579 * Description: This command configures the PHY device for the port. It allows
1580 * setting of the most generic settings for the PHY. The HWRM shall complete
1581 * this command as soon as PHY settings are configured. They may not be applied
1582 * when the command response is provided. A VF driver shall not be allowed to
1583 * configure PHY using this command. In a network partition mode, a PF driver
1584 * shall not be allowed to configure PHY using this command.
1587 /* Input (56 bytes) */
1588 struct hwrm_port_phy_cfg_input {
1590 * This value indicates what type of request this is. The format for the
1591 * rest of the command is determined by this field.
1596 * This value indicates the what completion ring the request will be
1597 * optionally completed on. If the value is -1, then no CR completion
1598 * will be generated. Any other value must be a valid CR ring_id value
1599 * for this function.
1603 /* This value indicates the command sequence number. */
1607 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1608 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1613 * This is the host address where the response will be written when the
1614 * request is complete. This area must be 16B aligned and must be
1615 * cleared to zero before the request is made.
1620 * When this bit is set to '1', the PHY for the port shall be reset. #
1621 * If this bit is set to 1, then the HWRM shall reset the PHY after
1622 * applying PHY configuration changes specified in this command. # In
1623 * order to guarantee that PHY configuration changes specified in this
1624 * command take effect, the HWRM client should set this flag to 1. # If
1625 * this bit is not set to 1, then the HWRM may reset the PHY depending
1626 * on the current PHY configuration and settings specified in this
1629 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
1631 * When this bit is set to '1', the link shall be forced to be taken
1632 * down. # When this bit is set to '1", all other command input settings
1633 * related to the link speed shall be ignored. Once the link state is
1634 * forced down, it can be explicitly cleared from that state by setting
1635 * this flag to '0'. # If this flag is set to '0', then the link shall
1636 * be cleared from forced down state if the link is in forced down
1637 * state. There may be conditions (e.g. out-of-band or sideband
1638 * configuration changes for the link) outside the scope of the HWRM
1639 * implementation that may clear forced down link state.
1641 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
1643 * When this bit is set to '1', the link shall be forced to the
1644 * force_link_speed value. When this bit is set to '1', the HWRM client
1645 * should not enable any of the auto negotiation related fields
1646 * represented by auto_XXX fields in this command. When this bit is set
1647 * to '1' and the HWRM client has enabled a auto_XXX field in this
1648 * command, then the HWRM shall ignore the enabled auto_XXX field. When
1649 * this bit is set to zero, the link shall be allowed to autoneg.
1651 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
1653 * When this bit is set to '1', the auto-negotiation process shall be
1654 * restarted on the link.
1656 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
1658 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
1659 * requested to be enabled on this link. If EEE is not supported on this
1660 * port, then this flag shall be ignored by the HWRM.
1662 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
1664 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
1665 * requested to be disabled on this link. If EEE is not supported on
1666 * this port, then this flag shall be ignored by the HWRM.
1668 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
1670 * When this bit is set to '1' and EEE is enabled on this link, then TX
1671 * LPI is requested to be enabled on the link. If EEE is not supported
1672 * on this port, then this flag shall be ignored by the HWRM. If EEE is
1673 * disabled on this port, then this flag shall be ignored by the HWRM.
1675 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
1678 /* This bit must be '1' for the auto_mode field to be configured. */
1679 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
1680 /* This bit must be '1' for the auto_duplex field to be configured. */
1681 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
1682 /* This bit must be '1' for the auto_pause field to be configured. */
1683 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
1685 * This bit must be '1' for the auto_link_speed field to be configured.
1687 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
1689 * This bit must be '1' for the auto_link_speed_mask field to be
1692 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
1694 /* This bit must be '1' for the wirespeed field to be configured. */
1695 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
1696 /* This bit must be '1' for the lpbk field to be configured. */
1697 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
1698 /* This bit must be '1' for the preemphasis field to be configured. */
1699 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
1700 /* This bit must be '1' for the force_pause field to be configured. */
1701 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
1703 * This bit must be '1' for the eee_link_speed_mask field to be
1706 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
1708 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
1709 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
1712 /* Port ID of port that is to be configured. */
1716 * This is the speed that will be used if the force bit is '1'. If
1717 * unsupported speed is selected, an error will be generated.
1719 /* 100Mb link speed */
1720 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
1721 (UINT32_C(0x1) << 0)
1722 /* 1Gb link speed */
1723 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
1724 (UINT32_C(0xa) << 0)
1725 /* 2Gb link speed */
1726 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
1727 (UINT32_C(0x14) << 0)
1728 /* 2.5Gb link speed */
1729 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
1730 (UINT32_C(0x19) << 0)
1731 /* 10Gb link speed */
1732 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
1733 (UINT32_C(0x64) << 0)
1734 /* 20Mb link speed */
1735 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
1736 (UINT32_C(0xc8) << 0)
1737 /* 25Gb link speed */
1738 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
1739 (UINT32_C(0xfa) << 0)
1740 /* 40Gb link speed */
1741 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
1742 (UINT32_C(0x190) << 0)
1743 /* 50Gb link speed */
1744 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
1745 (UINT32_C(0x1f4) << 0)
1746 /* 100Gb link speed */
1747 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
1748 (UINT32_C(0x3e8) << 0)
1749 /* 10Mb link speed */
1750 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
1751 (UINT32_C(0xffff) << 0)
1752 uint16_t force_link_speed;
1755 * This value is used to identify what autoneg mode is used when the
1756 * link speed is not being forced.
1759 * Disable autoneg or autoneg disabled. No speeds are selected.
1761 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
1762 /* Select all possible speeds for autoneg mode. */
1763 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
1764 (UINT32_C(0x1) << 0)
1766 * Select only the auto_link_speed speed for autoneg mode. This
1767 * mode has been DEPRECATED. An HWRM client should not use this
1770 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
1771 (UINT32_C(0x2) << 0)
1773 * Select the auto_link_speed or any speed below that speed for
1774 * autoneg. This mode has been DEPRECATED. An HWRM client should
1775 * not use this mode.
1777 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
1778 (UINT32_C(0x3) << 0)
1780 * Select the speeds based on the corresponding link speed mask
1781 * value that is provided.
1783 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
1784 (UINT32_C(0x4) << 0)
1788 * This is the duplex setting that will be used if the autoneg_mode is
1789 * "one_speed" or "one_or_below".
1791 /* Half Duplex will be requested. */
1792 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
1793 (UINT32_C(0x0) << 0)
1794 /* Full duplex will be requested. */
1795 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
1796 (UINT32_C(0x1) << 0)
1797 /* Both Half and Full dupex will be requested. */
1798 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
1799 (UINT32_C(0x2) << 0)
1800 uint8_t auto_duplex;
1803 * This value is used to configure the pause that will be used for
1804 * autonegotiation. Add text on the usage of auto_pause and force_pause.
1807 * When this bit is '1', Generation of tx pause messages has been
1808 * requested. Disabled otherwise.
1810 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
1812 * When this bit is '1', Reception of rx pause messages has been
1813 * requested. Disabled otherwise.
1815 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
1817 * When set to 1, the advertisement of pause is enabled. # When the
1818 * auto_mode is not set to none and this flag is set to 1, then the
1819 * auto_pause bits on this port are being advertised and autoneg pause
1820 * results are being interpreted. # When the auto_mode is not set to
1821 * none and this flag is set to 0, the pause is forced as indicated in
1822 * force_pause, and also advertised as auto_pause bits, but the autoneg
1823 * results are not interpreted since the pause configuration is being
1824 * forced. # When the auto_mode is set to none and this flag is set to
1825 * 1, auto_pause bits should be ignored and should be set to 0.
1827 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
1833 * This is the speed that will be used if the autoneg_mode is
1834 * "one_speed" or "one_or_below". If an unsupported speed is selected,
1835 * an error will be generated.
1837 /* 100Mb link speed */
1838 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
1839 (UINT32_C(0x1) << 0)
1840 /* 1Gb link speed */
1841 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
1842 (UINT32_C(0xa) << 0)
1843 /* 2Gb link speed */
1844 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
1845 (UINT32_C(0x14) << 0)
1846 /* 2.5Gb link speed */
1847 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
1848 (UINT32_C(0x19) << 0)
1849 /* 10Gb link speed */
1850 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
1851 (UINT32_C(0x64) << 0)
1852 /* 20Mb link speed */
1853 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
1854 (UINT32_C(0xc8) << 0)
1855 /* 25Gb link speed */
1856 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
1857 (UINT32_C(0xfa) << 0)
1858 /* 40Gb link speed */
1859 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
1860 (UINT32_C(0x190) << 0)
1861 /* 50Gb link speed */
1862 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
1863 (UINT32_C(0x1f4) << 0)
1864 /* 100Gb link speed */
1865 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
1866 (UINT32_C(0x3e8) << 0)
1867 /* 10Mb link speed */
1868 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
1869 (UINT32_C(0xffff) << 0)
1870 uint16_t auto_link_speed;
1873 * This is a mask of link speeds that will be used if autoneg_mode is
1874 * "mask". If unsupported speed is enabled an error will be generated.
1876 /* 100Mb link speed (Half-duplex) */
1877 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
1879 /* 100Mb link speed (Full-duplex) */
1880 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
1882 /* 1Gb link speed (Half-duplex) */
1883 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
1885 /* 1Gb link speed (Full-duplex) */
1886 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
1888 /* 2Gb link speed */
1889 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
1891 /* 2.5Gb link speed */
1892 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
1894 /* 10Gb link speed */
1895 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
1897 /* 20Gb link speed */
1898 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
1900 /* 25Gb link speed */
1901 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
1903 /* 40Gb link speed */
1904 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
1906 /* 50Gb link speed */
1907 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
1909 /* 100Gb link speed */
1910 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
1912 /* 10Mb link speed (Half-duplex) */
1913 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
1915 /* 10Mb link speed (Full-duplex) */
1916 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
1918 uint16_t auto_link_speed_mask;
1920 /* This value controls the wirespeed feature. */
1921 /* Wirespeed feature is disabled. */
1922 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
1923 /* Wirespeed feature is enabled. */
1924 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
1927 /* This value controls the loopback setting for the PHY. */
1928 /* No loopback is selected. Normal operation. */
1929 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
1931 * The HW will be configured with local loopback such that host
1932 * data is sent back to the host without modification.
1934 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
1936 * The HW will be configured with remote loopback such that port
1937 * logic will send packets back out the transmitter that are
1940 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
1944 * This value is used to configure the pause that will be used for force
1948 * When this bit is '1', Generation of tx pause messages is supported.
1949 * Disabled otherwise.
1951 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
1953 * When this bit is '1', Reception of rx pause messages is supported.
1954 * Disabled otherwise.
1956 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
1957 uint8_t force_pause;
1962 * This value controls the pre-emphasis to be used for the link. Driver
1963 * should not set this value (use enable.preemphasis = 0) unless driver
1964 * is sure of setting. Normally HWRM FW will determine proper pre-
1967 uint32_t preemphasis;
1970 * Setting for link speed mask that is used to advertise speeds during
1971 * autonegotiation when EEE is enabled. This field is valid only when
1972 * EEE is enabled. The speeds specified in this field shall be a subset
1973 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
1974 * at least one speed shall be provided in this mask.
1977 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
1978 /* 100Mb link speed (Full-duplex) */
1979 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
1981 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
1982 /* 1Gb link speed (Full-duplex) */
1983 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
1985 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
1988 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
1990 /* 10Gb link speed */
1991 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
1993 uint16_t eee_link_speed_mask;
1999 * Reuested setting of TX LPI timer in microseconds. This field is valid
2000 * only when EEE is enabled and TX LPI is enabled.
2002 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2004 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2005 uint32_t tx_lpi_timer;
2008 } __attribute__((packed));
2010 /* Output (16 bytes) */
2011 struct hwrm_port_phy_cfg_output {
2013 * Pass/Fail or error type Note: receiver to verify the in parameters,
2014 * and fail the call with an error when appropriate
2016 uint16_t error_code;
2018 /* This field returns the type of original request. */
2021 /* This field provides original sequence number of the command. */
2025 * This field is the length of the response in bytes. The last byte of
2026 * the response is a valid flag that will read as '1' when the command
2027 * has been completely written to memory.
2037 * This field is used in Output records to indicate that the output is
2038 * completely written to RAM. This field should be read as '1' to
2039 * indicate that the output has been completely written. When writing a
2040 * command completion or response to an internal processor, the order of
2041 * writes has to be such that this field is written last.
2044 } __attribute__((packed));
2048 * Description: This function is called by a driver to determine the HWRM
2049 * interface version supported by the HWRM firmware, the version of HWRM
2050 * firmware implementation, the name of HWRM firmware, the versions of other
2051 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2052 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2053 * be considered an invalid version.
2056 /* Input (24 bytes) */
2057 struct hwrm_ver_get_input {
2059 * This value indicates what type of request this is. The format for the
2060 * rest of the command is determined by this field.
2065 * This value indicates the what completion ring the request will be
2066 * optionally completed on. If the value is -1, then no CR completion
2067 * will be generated. Any other value must be a valid CR ring_id value
2068 * for this function.
2072 /* This value indicates the command sequence number. */
2076 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2077 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2082 * This is the host address where the response will be written when the
2083 * request is complete. This area must be 16B aligned and must be
2084 * cleared to zero before the request is made.
2089 * This field represents the major version of HWRM interface
2090 * specification supported by the driver HWRM implementation. The
2091 * interface major version is intended to change only when non backward
2092 * compatible changes are made to the HWRM interface specification.
2094 uint8_t hwrm_intf_maj;
2097 * This field represents the minor version of HWRM interface
2098 * specification supported by the driver HWRM implementation. A change
2099 * in interface minor version is used to reflect significant backward
2100 * compatible modification to HWRM interface specification. This can be
2101 * due to addition or removal of functionality. HWRM interface
2102 * specifications with the same major version but different minor
2103 * versions are compatible.
2105 uint8_t hwrm_intf_min;
2108 * This field represents the update version of HWRM interface
2109 * specification supported by the driver HWRM implementation. The
2110 * interface update version is used to reflect minor changes or bug
2111 * fixes to a released HWRM interface specification.
2113 uint8_t hwrm_intf_upd;
2115 uint8_t unused_0[5];
2116 } __attribute__((packed));
2118 /* Output (128 bytes) */
2119 struct hwrm_ver_get_output {
2121 * Pass/Fail or error type Note: receiver to verify the in parameters,
2122 * and fail the call with an error when appropriate
2124 uint16_t error_code;
2126 /* This field returns the type of original request. */
2129 /* This field provides original sequence number of the command. */
2133 * This field is the length of the response in bytes. The last byte of
2134 * the response is a valid flag that will read as '1' when the command
2135 * has been completely written to memory.
2140 * This field represents the major version of HWRM interface
2141 * specification supported by the HWRM implementation. The interface
2142 * major version is intended to change only when non backward compatible
2143 * changes are made to the HWRM interface specification. A HWRM
2144 * implementation that is compliant with this specification shall
2145 * provide value of 1 in this field.
2147 uint8_t hwrm_intf_maj;
2150 * This field represents the minor version of HWRM interface
2151 * specification supported by the HWRM implementation. A change in
2152 * interface minor version is used to reflect significant backward
2153 * compatible modification to HWRM interface specification. This can be
2154 * due to addition or removal of functionality. HWRM interface
2155 * specifications with the same major version but different minor
2156 * versions are compatible. A HWRM implementation that is compliant with
2157 * this specification shall provide value of 0 in this field.
2159 uint8_t hwrm_intf_min;
2162 * This field represents the update version of HWRM interface
2163 * specification supported by the HWRM implementation. The interface
2164 * update version is used to reflect minor changes or bug fixes to a
2165 * released HWRM interface specification. A HWRM implementation that is
2166 * compliant with this specification shall provide value of 1 in this
2169 uint8_t hwrm_intf_upd;
2171 uint8_t hwrm_intf_rsvd;
2174 * This field represents the major version of HWRM firmware. A change in
2175 * firmware major version represents a major firmware release.
2177 uint8_t hwrm_fw_maj;
2180 * This field represents the minor version of HWRM firmware. A change in
2181 * firmware minor version represents significant firmware functionality
2184 uint8_t hwrm_fw_min;
2187 * This field represents the build version of HWRM firmware. A change in
2188 * firmware build version represents bug fixes to a released firmware.
2190 uint8_t hwrm_fw_bld;
2193 * This field is a reserved field. This field can be used to represent
2194 * firmware branches or customer specific releases tied to a specific
2195 * (major,minor,update) version of the HWRM firmware.
2197 uint8_t hwrm_fw_rsvd;
2200 * This field represents the major version of mgmt firmware. A change in
2201 * major version represents a major release.
2203 uint8_t mgmt_fw_maj;
2206 * This field represents the minor version of mgmt firmware. A change in
2207 * minor version represents significant functionality changes.
2209 uint8_t mgmt_fw_min;
2212 * This field represents the build version of mgmt firmware. A change in
2213 * update version represents bug fixes.
2215 uint8_t mgmt_fw_bld;
2218 * This field is a reserved field. This field can be used to represent
2219 * firmware branches or customer specific releases tied to a specific
2220 * (major,minor,update) version
2222 uint8_t mgmt_fw_rsvd;
2225 * This field represents the major version of network control firmware.
2226 * A change in major version represents a major release.
2228 uint8_t netctrl_fw_maj;
2231 * This field represents the minor version of network control firmware.
2232 * A change in minor version represents significant functionality
2235 uint8_t netctrl_fw_min;
2238 * This field represents the build version of network control firmware.
2239 * A change in update version represents bug fixes.
2241 uint8_t netctrl_fw_bld;
2244 * This field is a reserved field. This field can be used to represent
2245 * firmware branches or customer specific releases tied to a specific
2246 * (major,minor,update) version
2248 uint8_t netctrl_fw_rsvd;
2251 * This field is reserved for future use. The responder should set it to
2252 * 0. The requester should ignore this field.
2257 * This field represents the major version of RoCE firmware. A change in
2258 * major version represents a major release.
2260 uint8_t roce_fw_maj;
2263 * This field represents the minor version of RoCE firmware. A change in
2264 * minor version represents significant functionality changes.
2266 uint8_t roce_fw_min;
2269 * This field represents the build version of RoCE firmware. A change in
2270 * update version represents bug fixes.
2272 uint8_t roce_fw_bld;
2275 * This field is a reserved field. This field can be used to represent
2276 * firmware branches or customer specific releases tied to a specific
2277 * (major,minor,update) version
2279 uint8_t roce_fw_rsvd;
2282 * This field represents the name of HWRM FW (ASCII chars without NULL
2285 char hwrm_fw_name[16];
2288 * This field represents the name of mgmt FW (ASCII chars without NULL
2291 char mgmt_fw_name[16];
2294 * This field represents the name of network control firmware (ASCII
2295 * chars without NULL at the end).
2297 char netctrl_fw_name[16];
2300 * This field is reserved for future use. The responder should set it to
2301 * 0. The requester should ignore this field.
2303 uint32_t reserved2[4];
2306 * This field represents the name of RoCE FW (ASCII chars without NULL
2309 char roce_fw_name[16];
2311 /* This field returns the chip number. */
2314 /* This field returns the revision of chip. */
2317 /* This field returns the chip metal number. */
2320 /* This field returns the bond id of the chip. */
2321 uint8_t chip_bond_id;
2324 * This value indicates the type of platform used for chip
2328 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
2329 (UINT32_C(0x0) << 0)
2330 /* FPGA platform of the chip. */
2331 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
2332 (UINT32_C(0x1) << 0)
2333 /* Palladium platform of the chip. */
2334 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
2335 (UINT32_C(0x2) << 0)
2336 uint8_t chip_platform_type;
2339 * This field returns the maximum value of request window that is
2340 * supported by the HWRM. The request window is mapped into device
2341 * address space using MMIO.
2343 uint16_t max_req_win_len;
2346 * This field returns the maximum value of response buffer in bytes. If
2347 * a request specifies the response buffer length that is greater than
2348 * this value, then the HWRM should fail it. The value of this field
2349 * shall be 4KB or more.
2351 uint16_t max_resp_len;
2354 * This field returns the default request timeout value in milliseconds.
2356 uint16_t def_req_timeout;
2363 * This field is used in Output records to indicate that the output is
2364 * completely written to RAM. This field should be read as '1' to
2365 * indicate that the output has been completely written. When writing a
2366 * command completion or response to an internal processor, the order of
2367 * writes has to be such that this field is written last.
2370 } __attribute__((packed));
2372 /* hwrm_queue_qportcfg */
2374 * Description: This function is called by a driver to query queue configuration
2375 * of a port. # The HWRM shall at least advertise one queue with lossy service
2376 * profile. # The driver shall use this command to query queue ids before
2377 * configuring or using any queues. # If a service profile is not set for a
2378 * queue, then the driver shall not use that queue without configuring a service
2379 * profile for it. # If the driver is not allowed to configure service profiles,
2380 * then the driver shall only use queues for which service profiles are pre-
2384 /* Input (24 bytes) */
2385 struct hwrm_queue_qportcfg_input {
2387 * This value indicates what type of request this is. The format for the
2388 * rest of the command is determined by this field.
2393 * This value indicates the what completion ring the request will be
2394 * optionally completed on. If the value is -1, then no CR completion
2395 * will be generated. Any other value must be a valid CR ring_id value
2396 * for this function.
2400 /* This value indicates the command sequence number. */
2404 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2405 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2410 * This is the host address where the response will be written when the
2411 * request is complete. This area must be 16B aligned and must be
2412 * cleared to zero before the request is made.
2417 * Enumeration denoting the RX, TX type of the resource. This
2418 * enumeration is used for resources that are similar for both TX and RX
2419 * paths of the chip.
2421 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
2424 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
2425 (UINT32_C(0x0) << 0)
2427 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
2428 (UINT32_C(0x1) << 0)
2429 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
2430 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
2434 * Port ID of port for which the queue configuration is being queried.
2435 * This field is only required when sent by IPC.
2440 } __attribute__((packed));
2442 /* hwrm_stat_ctx_clr_stats */
2443 /* Description: This command clears statistics of a context. */
2445 /* Input (24 bytes) */
2446 struct hwrm_stat_ctx_clr_stats_input {
2448 * This value indicates what type of request this is. The format for the
2449 * rest of the command is determined by this field.
2454 * This value indicates the what completion ring the request will be
2455 * optionally completed on. If the value is -1, then no CR completion
2456 * will be generated. Any other value must be a valid CR ring_id value
2457 * for this function.
2461 /* This value indicates the command sequence number. */
2465 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2466 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2471 * This is the host address where the response will be written when the
2472 * request is complete. This area must be 16B aligned and must be
2473 * cleared to zero before the request is made.
2477 /* ID of the statistics context that is being queried. */
2478 uint32_t stat_ctx_id;
2481 } __attribute__((packed));
2483 /* Output (16 bytes) */
2484 struct hwrm_stat_ctx_clr_stats_output {
2486 * Pass/Fail or error type Note: receiver to verify the in parameters,
2487 * and fail the call with an error when appropriate
2489 uint16_t error_code;
2491 /* This field returns the type of original request. */
2494 /* This field provides original sequence number of the command. */
2498 * This field is the length of the response in bytes. The last byte of
2499 * the response is a valid flag that will read as '1' when the command
2500 * has been completely written to memory.
2510 * This field is used in Output records to indicate that the output is
2511 * completely written to RAM. This field should be read as '1' to
2512 * indicate that the output has been completely written. When writing a
2513 * command completion or response to an internal processor, the order of
2514 * writes has to be such that this field is written last.
2517 } __attribute__((packed));
2519 /* hwrm_vnic_rss_cfg */
2520 /* Description: This function is used to enable RSS configuration. */
2522 /* Input (48 bytes) */
2523 struct hwrm_vnic_rss_cfg_input {
2525 * This value indicates what type of request this is. The format for the
2526 * rest of the command is determined by this field.
2531 * This value indicates the what completion ring the request will be
2532 * optionally completed on. If the value is -1, then no CR completion
2533 * will be generated. Any other value must be a valid CR ring_id value
2534 * for this function.
2538 /* This value indicates the command sequence number. */
2542 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2543 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2548 * This is the host address where the response will be written when the
2549 * request is complete. This area must be 16B aligned and must be
2550 * cleared to zero before the request is made.
2555 * When this bit is '1', the RSS hash shall be computed over source and
2556 * destination IPv4 addresses of IPv4 packets.
2558 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
2560 * When this bit is '1', the RSS hash shall be computed over
2561 * source/destination IPv4 addresses and source/destination ports of
2564 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
2566 * When this bit is '1', the RSS hash shall be computed over
2567 * source/destination IPv4 addresses and source/destination ports of
2570 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
2572 * When this bit is '1', the RSS hash shall be computed over source and
2573 * destination IPv4 addresses of IPv6 packets.
2575 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
2577 * When this bit is '1', the RSS hash shall be computed over
2578 * source/destination IPv6 addresses and source/destination ports of
2581 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
2583 * When this bit is '1', the RSS hash shall be computed over
2584 * source/destination IPv6 addresses and source/destination ports of
2587 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
2592 /* This is the address for rss ring group table */
2593 uint64_t ring_grp_tbl_addr;
2595 /* This is the address for rss hash key table */
2596 uint64_t hash_key_tbl_addr;
2598 /* Index to the rss indirection table. */
2599 uint16_t rss_ctx_idx;
2601 uint16_t unused_1[3];
2602 } __attribute__((packed));
2604 /* Output (16 bytes) */
2605 struct hwrm_vnic_rss_cfg_output {
2607 * Pass/Fail or error type Note: receiver to verify the in parameters,
2608 * and fail the call with an error when appropriate
2610 uint16_t error_code;
2612 /* This field returns the type of original request. */
2615 /* This field provides original sequence number of the command. */
2619 * This field is the length of the response in bytes. The last byte of
2620 * the response is a valid flag that will read as '1' when the command
2621 * has been completely written to memory.
2631 * This field is used in Output records to indicate that the output is
2632 * completely written to RAM. This field should be read as '1' to
2633 * indicate that the output has been completely written. When writing a
2634 * command completion or response to an internal processor, the order of
2635 * writes has to be such that this field is written last.
2638 } __attribute__((packed));
2640 /* Output (32 bytes) */
2641 struct hwrm_queue_qportcfg_output {
2643 * Pass/Fail or error type Note: receiver to verify the in parameters,
2644 * and fail the call with an error when appropriate
2646 uint16_t error_code;
2648 /* This field returns the type of original request. */
2651 /* This field provides original sequence number of the command. */
2655 * This field is the length of the response in bytes. The last byte of
2656 * the response is a valid flag that will read as '1' when the command
2657 * has been completely written to memory.
2661 /* The maximum number of queues that can be configured. */
2662 uint8_t max_configurable_queues;
2664 /* The maximum number of lossless queues that can be configured. */
2665 uint8_t max_configurable_lossless_queues;
2668 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
2669 * the HWRM shall allow the host SW driver to configure queues using
2672 uint8_t queue_cfg_allowed;
2675 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
2676 * the HWRM shall allow the host SW driver to configure queue buffers
2677 * using hwrm_queue_buffers_cfg.
2679 uint8_t queue_buffers_cfg_allowed;
2682 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
2683 * the HWRM shall allow the host SW driver to configure PFC using
2684 * hwrm_queue_pfcenable_cfg.
2686 uint8_t queue_pfcenable_cfg_allowed;
2689 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
2690 * the HWRM shall allow the host SW driver to configure Priority to CoS
2691 * mapping using hwrm_queue_pri2cos_cfg.
2693 uint8_t queue_pri2cos_cfg_allowed;
2696 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
2697 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
2698 * configuration using hwrm_queue_cos2bw_cfg.
2700 uint8_t queue_cos2bw_cfg_allowed;
2702 /* ID of CoS Queue 0. FF - Invalid id */
2705 /* This value is applicable to CoS queues only. */
2706 /* Lossy (best-effort) */
2707 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
2708 (UINT32_C(0x0) << 0)
2710 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
2711 (UINT32_C(0x1) << 0)
2713 * Set to 0xFF... (All Fs) if there is no service profile
2716 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
2717 (UINT32_C(0xff) << 0)
2718 uint8_t queue_id0_service_profile;
2720 /* ID of CoS Queue 1. FF - Invalid id */
2722 /* This value is applicable to CoS queues only. */
2723 /* Lossy (best-effort) */
2724 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
2725 (UINT32_C(0x0) << 0)
2727 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
2728 (UINT32_C(0x1) << 0)
2730 * Set to 0xFF... (All Fs) if there is no service profile
2733 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
2734 (UINT32_C(0xff) << 0)
2735 uint8_t queue_id1_service_profile;
2737 /* ID of CoS Queue 2. FF - Invalid id */
2739 /* This value is applicable to CoS queues only. */
2740 /* Lossy (best-effort) */
2741 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
2742 (UINT32_C(0x0) << 0)
2744 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
2745 (UINT32_C(0x1) << 0)
2747 * Set to 0xFF... (All Fs) if there is no service profile
2750 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
2751 (UINT32_C(0xff) << 0)
2752 uint8_t queue_id2_service_profile;
2754 /* ID of CoS Queue 3. FF - Invalid id */
2757 /* This value is applicable to CoS queues only. */
2758 /* Lossy (best-effort) */
2759 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
2760 (UINT32_C(0x0) << 0)
2762 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
2763 (UINT32_C(0x1) << 0)
2765 * Set to 0xFF... (All Fs) if there is no service profile
2768 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
2769 (UINT32_C(0xff) << 0)
2770 uint8_t queue_id3_service_profile;
2772 /* ID of CoS Queue 4. FF - Invalid id */
2774 /* This value is applicable to CoS queues only. */
2775 /* Lossy (best-effort) */
2776 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
2777 (UINT32_C(0x0) << 0)
2779 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
2780 (UINT32_C(0x1) << 0)
2782 * Set to 0xFF... (All Fs) if there is no service profile
2785 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
2786 (UINT32_C(0xff) << 0)
2787 uint8_t queue_id4_service_profile;
2789 /* ID of CoS Queue 5. FF - Invalid id */
2792 /* This value is applicable to CoS queues only. */
2793 /* Lossy (best-effort) */
2794 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
2795 (UINT32_C(0x0) << 0)
2797 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
2798 (UINT32_C(0x1) << 0)
2800 * Set to 0xFF... (All Fs) if there is no service profile
2803 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
2804 (UINT32_C(0xff) << 0)
2805 uint8_t queue_id5_service_profile;
2807 /* ID of CoS Queue 6. FF - Invalid id */
2808 uint8_t queue_id6_service_profile;
2809 /* This value is applicable to CoS queues only. */
2810 /* Lossy (best-effort) */
2811 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
2812 (UINT32_C(0x0) << 0)
2814 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
2815 (UINT32_C(0x1) << 0)
2817 * Set to 0xFF... (All Fs) if there is no service profile
2820 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
2821 (UINT32_C(0xff) << 0)
2824 /* ID of CoS Queue 7. FF - Invalid id */
2827 /* This value is applicable to CoS queues only. */
2828 /* Lossy (best-effort) */
2829 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
2830 (UINT32_C(0x0) << 0)
2832 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
2833 (UINT32_C(0x1) << 0)
2835 * Set to 0xFF... (All Fs) if there is no service profile
2838 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
2839 (UINT32_C(0xff) << 0)
2840 uint8_t queue_id7_service_profile;
2843 * This field is used in Output records to indicate that the output is
2844 * completely written to RAM. This field should be read as '1' to
2845 * indicate that the output has been completely written. When writing a
2846 * command completion or response to an internal processor, the order of
2847 * writes has to be such that this field is written last.
2850 } __attribute__((packed));
2852 /* hwrm_func_drv_rgtr */
2854 * Description: This command is used by the function driver to register its
2855 * information with the HWRM. A function driver shall implement this command. A
2856 * function driver shall use this command during the driver initialization right
2857 * after the HWRM version discovery and default ring resources allocation.
2860 /* Input (80 bytes) */
2861 struct hwrm_func_drv_rgtr_input {
2863 * This value indicates what type of request this is. The format for the
2864 * rest of the command is determined by this field.
2869 * This value indicates the what completion ring the request will be
2870 * optionally completed on. If the value is -1, then no CR completion
2871 * will be generated. Any other value must be a valid CR ring_id value
2872 * for this function.
2876 /* This value indicates the command sequence number. */
2880 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2881 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2886 * This is the host address where the response will be written when the
2887 * request is complete. This area must be 16B aligned and must be
2888 * cleared to zero before the request is made.
2893 * When this bit is '1', the function driver is requesting all requests
2894 * from its children VF drivers to be forwarded to itself. This flag can
2895 * only be set by the PF driver. If a VF driver sets this flag, it
2896 * should be ignored by the HWRM.
2898 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
2900 * When this bit is '1', the function is requesting none of the requests
2901 * from its children VF drivers to be forwarded to itself. This flag can
2902 * only be set by the PF driver. If a VF driver sets this flag, it
2903 * should be ignored by the HWRM.
2905 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
2908 /* This bit must be '1' for the os_type field to be configured. */
2909 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
2910 /* This bit must be '1' for the ver field to be configured. */
2911 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
2912 /* This bit must be '1' for the timestamp field to be configured. */
2913 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
2914 /* This bit must be '1' for the vf_req_fwd field to be configured. */
2915 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
2917 * This bit must be '1' for the async_event_fwd field to be configured.
2919 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
2923 /* This value indicates the type of OS. */
2925 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
2926 (UINT32_C(0x0) << 0)
2927 /* Other OS not listed below. */
2928 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
2929 (UINT32_C(0x1) << 0)
2931 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
2932 (UINT32_C(0xe) << 0)
2934 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
2935 (UINT32_C(0x12) << 0)
2937 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
2938 (UINT32_C(0x1d) << 0)
2940 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
2941 (UINT32_C(0x24) << 0)
2943 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
2944 (UINT32_C(0x2a) << 0)
2945 /* VMware ESXi OS. */
2946 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
2947 (UINT32_C(0x68) << 0)
2948 /* Microsoft Windows 8 64-bit OS. */
2949 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
2950 (UINT32_C(0x73) << 0)
2951 /* Microsoft Windows Server 2012 R2 OS. */
2952 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
2953 (UINT32_C(0x74) << 0)
2956 /* This is the major version of the driver. */
2959 /* This is the minor version of the driver. */
2962 /* This is the update version of the driver. */
2969 * This is a 32-bit timestamp provided by the driver for keep alive. The
2970 * timestamp is in multiples of 1ms.
2977 * This is a 256-bit bit mask provided by the PF driver for letting the
2978 * HWRM know what commands issued by the VF driver to the HWRM should be
2979 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
2980 * Setting Nth bit to 1 indicates that requests from the VF driver with
2981 * req_type equal to N shall be forwarded to the parent PF driver. This
2982 * field is not valid for the VF driver.
2984 uint32_t vf_req_fwd[8];
2987 * This is a 256-bit bit mask provided by the function driver (PF or VF
2988 * driver) to indicate the list of asynchronous event completions to be
2989 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
2990 * by the function driver shall result in the HWRM forwarding
2991 * asynchronous event completion with event_id equal to N. If all bits
2992 * are set to 0 (value of 0), then the HWRM shall not forward any
2993 * asynchronous event completion to this function driver.
2995 uint32_t async_event_fwd[8];
2996 } __attribute__((packed));
2998 /* Output (16 bytes) */
3000 struct hwrm_func_drv_rgtr_output {
3002 * Pass/Fail or error type Note: receiver to verify the in parameters,
3003 * and fail the call with an error when appropriate
3005 uint16_t error_code;
3007 /* This field returns the type of original request. */
3010 /* This field provides original sequence number of the command. */
3014 * This field is the length of the response in bytes. The last byte of
3015 * the response is a valid flag that will read as '1' when the command
3016 * has been completely written to memory.
3026 * This field is used in Output records to indicate that the output is
3027 * completely written to RAM. This field should be read as '1' to
3028 * indicate that the output has been completely written. When writing a
3029 * command completion or response to an internal processor, the order of
3030 * writes has to be such that this field is written last.
3033 } __attribute__((packed));
3035 /* hwrm_func_drv_unrgtr */
3037 * Description: This command is used by the function driver to un register with
3038 * the HWRM. A function driver shall implement this command. A function driver
3039 * shall use this command during the driver unloading.
3041 /* Input (24 bytes) */
3043 struct hwrm_func_drv_unrgtr_input {
3045 * This value indicates what type of request this is. The format for the
3046 * rest of the command is determined by this field.
3051 * This value indicates the what completion ring the request will be
3052 * optionally completed on. If the value is -1, then no CR completion
3053 * will be generated. Any other value must be a valid CR ring_id value
3054 * for this function.
3058 /* This value indicates the command sequence number. */
3062 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3063 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3068 * This is the host address where the response will be written when the
3069 * request is complete. This area must be 16B aligned and must be
3070 * cleared to zero before the request is made.
3075 * When this bit is '1', the function driver is notifying the HWRM to
3076 * prepare for the shutdown.
3078 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
3083 } __attribute__((packed));
3085 /* Output (16 bytes) */
3086 struct hwrm_func_drv_unrgtr_output {
3088 * Pass/Fail or error type Note: receiver to verify the in parameters,
3089 * and fail the call with an error when appropriate
3091 uint16_t error_code;
3093 /* This field returns the type of original request. */
3096 /* This field provides original sequence number of the command. */
3100 * This field is the length of the response in bytes. The last byte of
3101 * the response is a valid flag that will read as '1' when the command
3102 * has been completely written to memory.
3112 * This field is used in Output records to indicate that the output is
3113 * completely written to RAM. This field should be read as '1' to
3114 * indicate that the output has been completely written. When writing a
3115 * command completion or response to an internal processor, the order of
3116 * writes has to be such that this field is written last.
3119 } __attribute__((packed));