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34 #ifndef _HSI_STRUCT_DEF_DPDK_
35 #define _HSI_STRUCT_DEF_DPDK_
36 /* HSI and HWRM Specification 1.8.2 */
37 #define HWRM_VERSION_MAJOR 1
38 #define HWRM_VERSION_MINOR 8
39 #define HWRM_VERSION_UPDATE 2
41 #define HWRM_VERSION_RSVD 0 /* non-zero means beta version */
43 #define HWRM_VERSION_STR "1.8.2.0"
45 * Following is the signature for HWRM message field that indicates not
46 * applicable (All F's). Need to cast it the size of the field if needed.
48 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
49 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
50 #define HWRM_MAX_RESP_LEN (280) /* hwrm_selftest_qlist */
51 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
52 #define HW_HASH_KEY_SIZE 40
53 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
54 #define HWRM_ROCE_SP_HSI_VERSION_MAJOR 1
55 #define HWRM_ROCE_SP_HSI_VERSION_MINOR 8
56 #define HWRM_ROCE_SP_HSI_VERSION_UPDATE 2
61 #define HWRM_VER_GET (UINT32_C(0x0))
62 #define HWRM_FUNC_BUF_UNRGTR (UINT32_C(0xe))
63 #define HWRM_FUNC_VF_CFG (UINT32_C(0xf))
64 /* Reserved for future use */
65 #define RESERVED1 (UINT32_C(0x10))
66 #define HWRM_FUNC_RESET (UINT32_C(0x11))
67 #define HWRM_FUNC_GETFID (UINT32_C(0x12))
68 #define HWRM_FUNC_VF_ALLOC (UINT32_C(0x13))
69 #define HWRM_FUNC_VF_FREE (UINT32_C(0x14))
70 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
71 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
72 #define HWRM_FUNC_CFG (UINT32_C(0x17))
73 #define HWRM_FUNC_QSTATS (UINT32_C(0x18))
74 #define HWRM_FUNC_CLR_STATS (UINT32_C(0x19))
75 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
76 #define HWRM_FUNC_VF_RESC_FREE (UINT32_C(0x1b))
77 #define HWRM_FUNC_VF_VNIC_IDS_QUERY (UINT32_C(0x1c))
78 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
79 #define HWRM_FUNC_DRV_QVER (UINT32_C(0x1e))
80 #define HWRM_FUNC_BUF_RGTR (UINT32_C(0x1f))
81 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
82 #define HWRM_PORT_MAC_CFG (UINT32_C(0x21))
83 #define HWRM_PORT_QSTATS (UINT32_C(0x23))
84 #define HWRM_PORT_LPBK_QSTATS (UINT32_C(0x24))
85 #define HWRM_PORT_CLR_STATS (UINT32_C(0x25))
86 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
87 #define HWRM_PORT_MAC_QCFG (UINT32_C(0x28))
88 #define HWRM_PORT_MAC_PTP_QCFG (UINT32_C(0x29))
89 #define HWRM_PORT_PHY_QCAPS (UINT32_C(0x2a))
90 #define HWRM_PORT_LED_CFG (UINT32_C(0x2d))
91 #define HWRM_PORT_LED_QCFG (UINT32_C(0x2e))
92 #define HWRM_PORT_LED_QCAPS (UINT32_C(0x2f))
93 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
94 #define HWRM_QUEUE_QCFG (UINT32_C(0x31))
95 #define HWRM_QUEUE_CFG (UINT32_C(0x32))
96 #define HWRM_FUNC_VLAN_CFG (UINT32_C(0x33))
97 #define HWRM_FUNC_VLAN_QCFG (UINT32_C(0x34))
98 #define HWRM_QUEUE_PFCENABLE_QCFG (UINT32_C(0x35))
99 #define HWRM_QUEUE_PFCENABLE_CFG (UINT32_C(0x36))
100 #define HWRM_QUEUE_PRI2COS_QCFG (UINT32_C(0x37))
101 #define HWRM_QUEUE_PRI2COS_CFG (UINT32_C(0x38))
102 #define HWRM_QUEUE_COS2BW_QCFG (UINT32_C(0x39))
103 #define HWRM_QUEUE_COS2BW_CFG (UINT32_C(0x3a))
104 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
105 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
106 #define HWRM_VNIC_FREE (UINT32_C(0x41))
107 #define HWRM_VNIC_CFG (UINT32_C(0x42))
108 #define HWRM_VNIC_QCFG (UINT32_C(0x43))
109 #define HWRM_VNIC_TPA_CFG (UINT32_C(0x44))
110 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
111 #define HWRM_VNIC_RSS_QCFG (UINT32_C(0x47))
112 #define HWRM_VNIC_PLCMODES_CFG (UINT32_C(0x48))
113 #define HWRM_VNIC_PLCMODES_QCFG (UINT32_C(0x49))
114 #define HWRM_VNIC_QCAPS (UINT32_C(0x4a))
115 #define HWRM_RING_ALLOC (UINT32_C(0x50))
116 #define HWRM_RING_FREE (UINT32_C(0x51))
117 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS (UINT32_C(0x52))
118 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS (UINT32_C(0x53))
119 #define HWRM_RING_RESET (UINT32_C(0x5e))
120 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
121 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
122 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
123 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
124 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
125 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
126 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
127 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
128 /* Reserved for future use */
129 #define HWRM_CFA_VLAN_ANTISPOOF_CFG (UINT32_C(0x94))
130 #define HWRM_CFA_TUNNEL_FILTER_ALLOC (UINT32_C(0x95))
131 #define HWRM_CFA_TUNNEL_FILTER_FREE (UINT32_C(0x96))
132 #define HWRM_CFA_NTUPLE_FILTER_ALLOC (UINT32_C(0x99))
133 #define HWRM_CFA_NTUPLE_FILTER_FREE (UINT32_C(0x9a))
134 #define HWRM_CFA_NTUPLE_FILTER_CFG (UINT32_C(0x9b))
135 #define HWRM_CFA_EM_FLOW_ALLOC (UINT32_C(0x9c))
136 #define HWRM_CFA_EM_FLOW_FREE (UINT32_C(0x9d))
137 #define HWRM_CFA_EM_FLOW_CFG (UINT32_C(0x9e))
138 #define HWRM_TUNNEL_DST_PORT_QUERY (UINT32_C(0xa0))
139 #define HWRM_TUNNEL_DST_PORT_ALLOC (UINT32_C(0xa1))
140 #define HWRM_TUNNEL_DST_PORT_FREE (UINT32_C(0xa2))
141 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
142 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
143 #define HWRM_STAT_CTX_QUERY (UINT32_C(0xb2))
144 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
145 #define HWRM_FW_RESET (UINT32_C(0xc0))
146 #define HWRM_FW_QSTATUS (UINT32_C(0xc1))
147 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
148 #define HWRM_REJECT_FWD_RESP (UINT32_C(0xd1))
149 #define HWRM_FWD_RESP (UINT32_C(0xd2))
150 #define HWRM_FWD_ASYNC_EVENT_CMPL (UINT32_C(0xd3))
151 #define HWRM_TEMP_MONITOR_QUERY (UINT32_C(0xe0))
152 #define HWRM_WOL_FILTER_ALLOC (UINT32_C(0xf0))
153 #define HWRM_WOL_FILTER_FREE (UINT32_C(0xf1))
154 #define HWRM_WOL_FILTER_QCFG (UINT32_C(0xf2))
155 #define HWRM_WOL_REASON_QCFG (UINT32_C(0xf3))
156 #define HWRM_DBG_DUMP (UINT32_C(0xff14))
157 #define HWRM_NVM_VALIDATE_OPTION (UINT32_C(0xffef))
158 #define HWRM_NVM_FLUSH (UINT32_C(0xfff0))
159 #define HWRM_NVM_GET_VARIABLE (UINT32_C(0xfff1))
160 #define HWRM_NVM_SET_VARIABLE (UINT32_C(0xfff2))
161 #define HWRM_NVM_INSTALL_UPDATE (UINT32_C(0xfff3))
162 #define HWRM_NVM_MODIFY (UINT32_C(0xfff4))
163 #define HWRM_NVM_VERIFY_UPDATE (UINT32_C(0xfff5))
164 #define HWRM_NVM_GET_DEV_INFO (UINT32_C(0xfff6))
165 #define HWRM_NVM_ERASE_DIR_ENTRY (UINT32_C(0xfff7))
166 #define HWRM_NVM_MOD_DIR_ENTRY (UINT32_C(0xfff8))
167 #define HWRM_NVM_FIND_DIR_ENTRY (UINT32_C(0xfff9))
168 #define HWRM_NVM_GET_DIR_ENTRIES (UINT32_C(0xfffa))
169 #define HWRM_NVM_GET_DIR_INFO (UINT32_C(0xfffb))
170 #define HWRM_NVM_RAW_DUMP (UINT32_C(0xfffc))
171 #define HWRM_NVM_READ (UINT32_C(0xfffd))
172 #define HWRM_NVM_WRITE (UINT32_C(0xfffe))
173 #define HWRM_NVM_RAW_WRITE_BLK (UINT32_C(0xffff))
176 * Note: The Host Software Interface (HSI) and Hardware Resource Manager (HWRM)
177 * specification describes the data structures used in Ethernet packet or RDMA
178 * message data transfers as well as an abstract interface for managing Ethernet
179 * NIC hardware resources.
181 /* Ethernet Data path Host Structures */
183 * Description: The following three sections document the host structures used
184 * between device and software drivers for communicating Ethernet packets.
186 /* BD Ring Structures */
188 * Description: This structure is used to inform the NIC of a location for and
189 * an aggregation buffer that will be used for packet data that is received. An
190 * aggregation buffer creates a different kind of completion operation for a
191 * packet where a variable number of BDs may be used to place the packet in the
192 * host. RX Rings that have aggregation buffers are known as aggregation rings
193 * and must contain only aggregation buffers.
195 /* Short TX BD (16 bytes) */
199 * All bits in this field must be valid on the first BD of a
200 * packet. Only the packet_end bit must be valid for the
201 * remaining BDs of a packet.
203 /* This value identifies the type of buffer descriptor. */
204 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
205 #define TX_BD_SHORT_TYPE_SFT 0
207 * Indicates that this BD is 16B long and is
208 * used for normal L2 packet transmission.
210 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
212 * If set to 1, the packet ends with the data in the buffer
213 * pointed to by this descriptor. This flag must be valid on
216 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
218 * If set to 1, the device will not generate a completion for
219 * this transmit packet unless there is an error in it's
220 * processing. If this bit is set to 0, then the packet will be
221 * completed normally. This bit must be valid only on the first
224 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
226 * This value indicates how many 16B BD locations are consumed
227 * in the ring by this packet. A value of 1 indicates that this
228 * BD is the only BD (and that the it is a short BD). A value of
229 * 3 indicates either 3 short BDs or 1 long BD and one short BD
230 * in the packet. A value of 0 indicates that there are 32 BD
231 * locations in the packet (the maximum). This field is valid
232 * only on the first BD of a packet.
234 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
235 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
237 * This value is a hint for the length of the entire packet. It
238 * is used by the chip to optimize internal processing. The
239 * packet will be dropped if the hint is too short. This field
240 * is valid only on the first BD of a packet.
242 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
243 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
244 /* indicates packet length < 512B */
245 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
246 /* indicates 512 <= packet length < 1KB */
247 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
248 /* indicates 1KB <= packet length < 2KB */
249 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
250 /* indicates packet length >= 2KB */
251 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
252 #define TX_BD_SHORT_FLAGS_LHINT_LAST \
253 TX_BD_SHORT_FLAGS_LHINT_GTE2K
255 * If set to 1, the device immediately updates the Send Consumer
256 * Index after the buffer associated with this descriptor has
257 * been transferred via DMA to NIC memory from host memory. An
258 * interrupt may or may not be generated according to the state
259 * of the interrupt avoidance mechanisms. If this bit is set to
260 * 0, then the Consumer Index is only updated as soon as one of
261 * the host interrupt coalescing conditions has been met. This
262 * bit must be valid on the first BD of a packet.
264 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
266 * All bits in this field must be valid on the first BD of a
267 * packet. Only the packet_end bit must be valid for the
268 * remaining BDs of a packet.
270 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
271 #define TX_BD_SHORT_FLAGS_SFT 6
274 * This is the length of the host physical buffer this BD
275 * describes in bytes. This field must be valid on all BDs of a
280 * The opaque data field is pass through to the completion and
281 * can be used for any data that the driver wants to associate
282 * with the transmit BD. This field must be valid on the first
287 * This is the host physical address for the portion of the
288 * packet described by this TX BD. This value must be valid on
289 * all BDs of a packet.
291 } __attribute__((packed));
293 /* Long TX BD (32 bytes split to 2 16-byte struct) */
297 * All bits in this field must be valid on the first BD of a
298 * packet. Only the packet_end bit must be valid for the
299 * remaining BDs of a packet.
301 /* This value identifies the type of buffer descriptor. */
302 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
303 #define TX_BD_LONG_TYPE_SFT 0
305 * Indicates that this BD is 32B long and is
306 * used for normal L2 packet transmission.
308 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
310 * If set to 1, the packet ends with the data in the buffer
311 * pointed to by this descriptor. This flag must be valid on
314 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
316 * If set to 1, the device will not generate a completion for
317 * this transmit packet unless there is an error in it's
318 * processing. If this bit is set to 0, then the packet will be
319 * completed normally. This bit must be valid only on the first
322 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
324 * This value indicates how many 16B BD locations are consumed
325 * in the ring by this packet. A value of 1 indicates that this
326 * BD is the only BD (and that the it is a short BD). A value of
327 * 3 indicates either 3 short BDs or 1 long BD and one short BD
328 * in the packet. A value of 0 indicates that there are 32 BD
329 * locations in the packet (the maximum). This field is valid
330 * only on the first BD of a packet.
332 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
333 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
335 * This value is a hint for the length of the entire packet. It
336 * is used by the chip to optimize internal processing. The
337 * packet will be dropped if the hint is too short. This field
338 * is valid only on the first BD of a packet.
340 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
341 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
342 /* indicates packet length < 512B */
343 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
344 /* indicates 512 <= packet length < 1KB */
345 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
346 /* indicates 1KB <= packet length < 2KB */
347 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
348 /* indicates packet length >= 2KB */
349 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
350 #define TX_BD_LONG_FLAGS_LHINT_LAST \
351 TX_BD_LONG_FLAGS_LHINT_GTE2K
353 * If set to 1, the device immediately updates the Send Consumer
354 * Index after the buffer associated with this descriptor has
355 * been transferred via DMA to NIC memory from host memory. An
356 * interrupt may or may not be generated according to the state
357 * of the interrupt avoidance mechanisms. If this bit is set to
358 * 0, then the Consumer Index is only updated as soon as one of
359 * the host interrupt coalescing conditions has been met. This
360 * bit must be valid on the first BD of a packet.
362 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
364 * All bits in this field must be valid on the first BD of a
365 * packet. Only the packet_end bit must be valid for the
366 * remaining BDs of a packet.
368 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
369 #define TX_BD_LONG_FLAGS_SFT 6
372 * This is the length of the host physical buffer this BD
373 * describes in bytes. This field must be valid on all BDs of a
378 * The opaque data field is pass through to the completion and
379 * can be used for any data that the driver wants to associate
380 * with the transmit BD. This field must be valid on the first
385 * This is the host physical address for the portion of the
386 * packet described by this TX BD. This value must be valid on
387 * all BDs of a packet.
389 } __attribute__((packed));
391 /* last 16 bytes of Long TX BD */
392 struct tx_bd_long_hi {
395 * All bits in this field must be valid on the first BD of a
396 * packet. Their value on other BDs of the packet will be
400 * If set to 1, the controller replaces the TCP/UPD checksum
401 * fields of normal TCP/UPD checksum, or the inner TCP/UDP
402 * checksum field of the encapsulated TCP/UDP packets with the
403 * hardware calculated TCP/UDP checksum for the packet
404 * associated with this descriptor. The flag is ignored if the
405 * LSO flag is set. This bit must be valid on the first BD of a
408 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
410 * If set to 1, the controller replaces the IP checksum of the
411 * normal packets, or the inner IP checksum of the encapsulated
412 * packets with the hardware calculated IP checksum for the
413 * packet associated with this descriptor. This bit must be
414 * valid on the first BD of a packet.
416 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
418 * If set to 1, the controller will not append an Ethernet CRC
419 * to the end of the frame. This bit must be valid on the first
420 * BD of a packet. Packet must be 64B or longer when this flag
421 * is set. It is not useful to use this bit with any form of TX
422 * offload such as CSO or LSO. The intent is that the packet
423 * from the host already has a valid Ethernet CRC on the packet.
425 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
427 * If set to 1, the device will record the time at which the
428 * packet was actually transmitted at the TX MAC. This bit must
429 * be valid on the first BD of a packet.
431 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
433 * If set to 1, The controller replaces the tunnel IP checksum
434 * field with hardware calculated IP checksum for the IP header
435 * of the packet associated with this descriptor. For outer UDP
436 * checksum, global outer UDP checksum TE_NIC register needs to
437 * be enabled. If the global outer UDP checksum TE_NIC register
438 * bit is set, outer UDP checksum will be calculated for the
439 * following cases: 1. Packets with tcp_udp_chksum flag set to
440 * offload checksum for inner packet AND the inner packet is
441 * TCP/UDP. If the inner packet is ICMP for example (non-
442 * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
443 * checksum will not be calculated. 2. Packets with lso flag set
444 * which implies inner TCP checksum calculation as part of LSO
447 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
449 * If set to 1, the device will treat this packet with LSO(Large
450 * Send Offload) processing for both normal or encapsulated
451 * packets, which is a form of TCP segmentation. When this bit
452 * is 1, the hdr_size and mss fields must be valid. The driver
453 * doesn't need to set t_ip_chksum, ip_chksum, and
454 * tcp_udp_chksum flags since the controller will replace the
455 * appropriate checksum fields for segmented packets. When this
456 * bit is 1, the hdr_size and mss fields must be valid.
458 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
460 * If set to zero when LSO is '1', then the IPID will be treated
461 * as a 16b number and will be wrapped if it exceeds a value of
462 * 0xffff. If set to one when LSO is '1', then the IPID will be
463 * treated as a 15b number and will be wrapped if it exceeds a
466 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
468 * If set to zero when LSO is '1', then the IPID of the tunnel
469 * IP header will not be modified during LSO operations. If set
470 * to one when LSO is '1', then the IPID of the tunnel IP header
471 * will be incremented for each subsequent segment of an LSO
472 * operation. The flag is ignored if the LSO packet is a normal
473 * (non-tunneled) TCP packet.
475 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
477 * If set to '1', then the RoCE ICRC will be appended to the
478 * packet. Packet must be a valid RoCE format packet.
480 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
482 * If set to '1', then the FCoE CRC will be appended to the
483 * packet. Packet must be a valid FCoE format packet.
485 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
488 * When LSO is '1', this field must contain the offset of the
489 * TCP payload from the beginning of the packet in as 16b words.
490 * In case of encapsulated/tunneling packet, this field contains
491 * the offset of the inner TCP payload from beginning of the
492 * packet as 16-bit words. This value must be valid on the first
495 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
496 #define TX_BD_LONG_HDR_SIZE_SFT 0
499 * This is the MSS value that will be used to do the LSO
500 * processing. The value is the length in bytes of the TCP
501 * payload for each segment generated by the LSO operation. This
502 * value must be valid on the first BD of a packet.
504 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
505 #define TX_BD_LONG_MSS_SFT 0
509 * This value selects a CFA action to perform on the packet. Set
510 * this value to zero if no CFA action is desired. This value
511 * must be valid on the first BD of a packet.
515 * This value is action meta-data that defines CFA edit
516 * operations that are done in addition to any action editing.
518 /* When key=1, This is the VLAN tag VID value. */
519 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
520 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
521 /* When key=1, This is the VLAN tag DE value. */
522 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
523 /* When key=1, This is the VLAN tag PRI value. */
524 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
525 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
526 /* When key=1, This is the VLAN tag TPID select value. */
527 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
528 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
530 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
532 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
534 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
536 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
538 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
539 /* Value programmed in CFA VLANTPID register. */
540 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
541 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
542 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
543 /* When key=1, This is the VLAN tag TPID select value. */
544 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
545 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
547 * This field identifies the type of edit to be performed on the
548 * packet. This value must be valid on the first BD of a packet.
550 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
551 #define TX_BD_LONG_CFA_META_KEY_SFT 28
553 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
555 * - meta[17:16] - TPID select value (0 =
556 * 0x8100). - meta[15:12] - PRI/DE value. -
557 * meta[11:0] - VID value.
559 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
560 #define TX_BD_LONG_CFA_META_KEY_LAST \
561 TX_BD_LONG_CFA_META_KEY_VLAN_TAG
562 } __attribute__((packed));
564 /* RX Producer Packet BD (16 bytes) */
565 struct rx_prod_pkt_bd {
567 /* This value identifies the type of buffer descriptor. */
568 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
569 #define RX_PROD_PKT_BD_TYPE_SFT 0
571 * Indicates that this BD is 16B long and is an
572 * RX Producer (ie. empty) buffer descriptor.
574 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
576 * If set to 1, the packet will be placed at the address plus
577 * 2B. The 2 Bytes of padding will be written as zero.
580 * This is intended to be used when the host buffer is cache-
581 * line aligned to produce packets that are easy to parse in
582 * host memory while still allowing writes to be cache line
585 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
587 * If set to 1, the packet write will be padded out to the
588 * nearest cache-line with zero value padding.
591 * If receive buffers start/end on cache-line boundaries, this
592 * feature will ensure that all data writes on the PCI bus
593 * start/end on cache line boundaries.
595 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
597 * This value is the number of additional buffers in the ring
598 * that describe the buffer space to be consumed for the this
599 * packet. If the value is zero, then the packet must fit within
600 * the space described by this BD. If this value is 1 or more,
601 * it indicates how many additional "buffer" BDs are in the ring
602 * immediately following this BD to be used for the same network
603 * packet. Even if the packet to be placed does not need all the
604 * additional buffers, they will be consumed anyway.
606 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
607 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
608 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
609 #define RX_PROD_PKT_BD_FLAGS_SFT 6
612 * This is the length in Bytes of the host physical buffer where
613 * data for the packet may be placed in host memory.
616 * While this is a Byte resolution value, it is often
617 * advantageous to ensure that the buffers provided end on a
622 * The opaque data field is pass through to the completion and
623 * can be used for any data that the driver wants to associate
624 * with this receive buffer set.
628 * This is the host physical address where data for the packet
629 * may by placed in host memory.
632 * While this is a Byte resolution value, it is often
633 * advantageous to ensure that the buffers provide start on a
636 } __attribute__((packed));
638 /* Completion Ring Structures */
639 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
640 /* Base Completion Record (16 bytes) */
645 * This field indicates the exact type of the completion. By
646 * convention, the LSB identifies the length of the record in
647 * 16B units. Even values indicate 16B records. Odd values
648 * indicate 32B records.
650 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
651 #define CMPL_BASE_TYPE_SFT 0
652 /* TX L2 completion: Completion of TX packet. Length = 16B */
653 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
655 * RX L2 completion: Completion of and L2 RX
656 * packet. Length = 32B
658 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
660 * RX Aggregation Buffer completion : Completion
661 * of an L2 aggregation buffer in support of
662 * TPA, HDS, or Jumbo packet completion. Length
665 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
667 * RX L2 TPA Start Completion: Completion at the
668 * beginning of a TPA operation. Length = 32B
670 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
672 * RX L2 TPA End Completion: Completion at the
673 * end of a TPA operation. Length = 32B
675 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
677 * Statistics Ejection Completion: Completion of
678 * statistics data ejection buffer. Length = 16B
680 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
681 /* HWRM Command Completion: Completion of an HWRM command. */
682 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
683 /* Forwarded HWRM Request */
684 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
685 /* Forwarded HWRM Response */
686 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
687 /* HWRM Asynchronous Event Information */
688 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
689 /* CQ Notification */
690 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
691 /* SRQ Threshold Event */
692 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
693 /* DBQ Threshold Event */
694 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
695 /* QP Async Notification */
696 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
697 /* Function Async Notification */
698 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
707 * This value is written by the NIC such that it will be
708 * different for each pass through the completion queue. The
709 * even passes will write 1. The odd passes will write 0.
711 #define CMPL_BASE_V UINT32_C(0x1)
713 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
714 #define CMPL_BASE_INFO3_SFT 1
717 } __attribute__((packed));
719 /* TX Completion Record (16 bytes) */
723 * This field indicates the exact type of the completion. By
724 * convention, the LSB identifies the length of the record in
725 * 16B units. Even values indicate 16B records. Odd values
726 * indicate 32B records.
728 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
729 #define TX_CMPL_TYPE_SFT 0
730 /* TX L2 completion: Completion of TX packet. Length = 16B */
731 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
733 * When this bit is '1', it indicates a packet that has an error
734 * of some type. Type of error is indicated in error_flags.
736 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
738 * When this bit is '1', it indicates that the packet completed
739 * was transmitted using the push acceleration data provided by
740 * the driver. When this bit is '0', it indicates that the
741 * packet had not push acceleration data written or was executed
742 * as a normal packet even though push data was provided.
744 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
745 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
746 #define TX_CMPL_FLAGS_SFT 6
748 /* unused1 is 16 b */
751 * This is a copy of the opaque field from the first TX BD of
752 * this transmitted packet.
756 * This value is written by the NIC such that it will be
757 * different for each pass through the completion queue. The
758 * even passes will write 1. The odd passes will write 0.
760 #define TX_CMPL_V UINT32_C(0x1)
762 * This error indicates that there was some sort of problem with
763 * the BDs for the packet.
765 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
766 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
768 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
769 /* Bad Format: BDs were not formatted correctly. */
770 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
771 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
772 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
774 * When this bit is '1', it indicates that the length of the
775 * packet was zero. No packet was transmitted.
777 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
779 * When this bit is '1', it indicates that the packet was longer
780 * than the programmed limit in TDI. No packet was transmitted.
782 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
784 * When this bit is '1', it indicates that one or more of the
785 * BDs associated with this packet generated a PCI error. This
786 * probably means the address was not valid.
788 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
790 * When this bit is '1', it indicates that the packet was longer
791 * than indicated by the hint. No packet was transmitted.
793 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
795 * When this bit is '1', it indicates that the packet was
796 * dropped due to Poison TLP error on one or more of the TLPs in
797 * the PXP completion.
799 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
800 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
801 #define TX_CMPL_ERRORS_SFT 1
803 /* unused2 is 16 b */
805 /* unused3 is 32 b */
806 } __attribute__((packed));
808 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
812 * This field indicates the exact type of the completion. By
813 * convention, the LSB identifies the length of the record in
814 * 16B units. Even values indicate 16B records. Odd values
815 * indicate 32B records.
817 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
818 #define RX_PKT_CMPL_TYPE_SFT 0
820 * RX L2 completion: Completion of and L2 RX
821 * packet. Length = 32B
823 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
825 * When this bit is '1', it indicates a packet that has an error
826 * of some type. Type of error is indicated in error_flags.
828 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
829 /* This field indicates how the packet was placed in the buffer. */
830 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
831 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
832 /* Normal: Packet was placed using normal algorithm. */
833 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
834 /* Jumbo: Packet was placed using jumbo algorithm. */
835 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
837 * Header/Data Separation: Packet was placed
838 * using Header/Data separation algorithm. The
839 * separation location is indicated by the itype
842 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
843 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
844 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
845 /* This bit is '1' if the RSS field in this completion is valid. */
846 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
848 #define RX_PKT_CMPL_FLAGS_UNUSED UINT32_C(0x800)
850 * This value indicates what the inner packet determined for the
853 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
854 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
855 /* Not Known: Indicates that the packet type was not known. */
856 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
858 * IP Packet: Indicates that the packet was an
859 * IP packet, but further classification was not
862 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
864 * TCP Packet: Indicates that the packet was IP
865 * and TCP. This indicates that the
866 * payload_offset field is valid.
868 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
870 * UDP Packet: Indicates that the packet was IP
871 * and UDP. This indicates that the
872 * payload_offset field is valid.
874 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
876 * FCoE Packet: Indicates that the packet was
877 * recognized as a FCoE. This also indicates
878 * that the payload_offset field is valid.
880 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
882 * RoCE Packet: Indicates that the packet was
883 * recognized as a RoCE. This also indicates
884 * that the payload_offset field is valid.
886 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
888 * ICMP Packet: Indicates that the packet was
889 * recognized as ICMP. This indicates that the
890 * payload_offset field is valid.
892 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
894 * PtP packet wo/timestamp: Indicates that the
895 * packet was recognized as a PtP packet.
897 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
899 * PtP packet w/timestamp: Indicates that the
900 * packet was recognized as a PtP packet and
901 * that a timestamp was taken for the packet.
903 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
904 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
905 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
906 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
907 #define RX_PKT_CMPL_FLAGS_SFT 6
910 * This is the length of the data for the packet stored in the
911 * buffer(s) identified by the opaque value. This includes the
912 * packet BD and any associated buffer BDs. This does not
913 * include the length of any data places in aggregation BDs.
917 * This is a copy of the opaque field from the RX BD this
918 * completion corresponds to.
923 * This value is written by the NIC such that it will be
924 * different for each pass through the completion queue. The
925 * even passes will write 1. The odd passes will write 0.
927 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
929 * This value is the number of aggregation buffers that follow
930 * this entry in the completion ring that are a part of this
931 * packet. If the value is zero, then the packet is completely
932 * contained in the buffer space provided for the packet in the
935 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
936 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
938 uint8_t rss_hash_type;
940 * This is the RSS hash type for the packet. The value is packed
941 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
942 * . The value of tuple_extrac_op provides the information about
943 * what fields the hash was computed on. * 0: The RSS hash was
944 * computed over source IP address, destination IP address,
945 * source port, and destination port of inner IP and TCP or UDP
946 * headers. Note: For non-tunneled packets, the packet headers
947 * are considered inner packet headers for the RSS hash
948 * computation purpose. * 1: The RSS hash was computed over
949 * source IP address and destination IP address of inner IP
950 * header. Note: For non-tunneled packets, the packet headers
951 * are considered inner packet headers for the RSS hash
952 * computation purpose. * 2: The RSS hash was computed over
953 * source IP address, destination IP address, source port, and
954 * destination port of IP and TCP or UDP headers of outer tunnel
955 * headers. Note: For non-tunneled packets, this value is not
956 * applicable. * 3: The RSS hash was computed over source IP
957 * address and destination IP address of IP header of outer
958 * tunnel headers. Note: For non-tunneled packets, this value is
959 * not applicable. Note that 4-tuples values listed above are
960 * applicable for layer 4 protocols supported and enabled for
961 * RSS in the hardware, HWRM firmware, and drivers. For example,
962 * if RSS hash is supported and enabled for TCP traffic only,
963 * then the values of tuple_extract_op corresponding to 4-tuples
964 * are only valid for TCP traffic.
966 uint8_t payload_offset;
968 * This value indicates the offset in bytes from the beginning
969 * of the packet where the inner payload starts. This value is
970 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
971 * indicates that header is 256B into the packet.
977 * This value is the RSS hash value calculated for the packet
978 * based on the mode bits and key value in the VNIC.
980 } __attribute__((packed));
982 /* last 16 bytes of RX Packet Completion Record */
983 struct rx_pkt_cmpl_hi {
986 * This indicates that the ip checksum was calculated for the
987 * inner packet and that the ip_cs_error field indicates if
988 * there was an error.
990 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
992 * This indicates that the TCP, UDP or ICMP checksum was
993 * calculated for the inner packet and that the l4_cs_error
994 * field indicates if there was an error.
996 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
998 * This indicates that the ip checksum was calculated for the
999 * tunnel header and that the t_ip_cs_error field indicates if
1000 * there was an error.
1002 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1004 * This indicates that the UDP checksum was calculated for the
1005 * tunnel packet and that the t_l4_cs_error field indicates if
1006 * there was an error.
1008 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1009 /* This value indicates what format the metadata field is. */
1010 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1011 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
1012 /* No metadata informtaion. Value is zero. */
1013 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1015 * The metadata field contains the VLAN tag and
1016 * TPID value. - metadata[11:0] contains the
1017 * vlan VID value. - metadata[12] contains the
1018 * vlan DE value. - metadata[15:13] contains the
1019 * vlan PRI value. - metadata[31:16] contains
1020 * the vlan TPID value.
1022 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1023 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
1024 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
1026 * This field indicates the IP type for the inner-most IP
1027 * header. A value of '0' indicates IPv4. A value of '1'
1028 * indicates IPv6. This value is only valid if itype indicates a
1029 * packet with an IP header.
1031 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1034 * This is data from the CFA block as indicated by the
1035 * meta_format field.
1037 /* When meta_format=1, this value is the VLAN VID. */
1038 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1039 #define RX_PKT_CMPL_METADATA_VID_SFT 0
1040 /* When meta_format=1, this value is the VLAN DE. */
1041 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
1042 /* When meta_format=1, this value is the VLAN PRI. */
1043 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1044 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
1045 /* When meta_format=1, this value is the VLAN TPID. */
1046 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1047 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
1050 * This value is written by the NIC such that it will be
1051 * different for each pass through the completion queue. The
1052 * even passes will write 1. The odd passes will write 0.
1054 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
1056 * This error indicates that there was some sort of problem with
1057 * the BDs for the packet that was found after part of the
1058 * packet was already placed. The packet should be treated as
1061 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1062 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1063 /* No buffer error */
1064 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
1066 * Did Not Fit: Packet did not fit into packet
1067 * buffer provided. For regular placement, this
1068 * means the packet did not fit in the buffer
1069 * provided. For HDS and jumbo placement, this
1070 * means that the packet could not be placed
1071 * into 7 physical buffers or less.
1073 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
1074 (UINT32_C(0x1) << 1)
1076 * Not On Chip: All BDs needed for the packet
1077 * were not on-chip when the packet arrived.
1079 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1080 (UINT32_C(0x2) << 1)
1081 /* Bad Format: BDs were not formatted correctly. */
1082 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
1083 (UINT32_C(0x3) << 1)
1084 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
1085 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1086 /* This indicates that there was an error in the IP header checksum. */
1087 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1089 * This indicates that there was an error in the TCP, UDP or
1092 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1094 * This indicates that there was an error in the tunnel IP
1097 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1099 * This indicates that there was an error in the tunnel UDP
1102 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1104 * This indicates that there was a CRC error on either an FCoE
1105 * or RoCE packet. The itype indicates the packet type.
1107 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1109 * This indicates that there was an error in the tunnel portion
1110 * of the packet when this field is non-zero.
1112 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1113 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1115 * No additional error occurred on the tunnel
1116 * portion of the packet of the packet does not
1119 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1121 * Indicates that IP header version does not
1122 * match expectation from L2 Ethertype for IPv4
1123 * and IPv6 in the tunnel header.
1125 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
1126 (UINT32_C(0x1) << 9)
1128 * Indicates that header length is out of range
1129 * in the tunnel header. Valid for IPv4.
1131 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
1132 (UINT32_C(0x2) << 9)
1134 * Indicates that the physical packet is shorter
1135 * than that claimed by the PPPoE header length
1136 * for a tunnel PPPoE packet.
1138 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
1139 (UINT32_C(0x3) << 9)
1141 * Indicates that physical packet is shorter
1142 * than that claimed by the tunnel l3 header
1143 * length. Valid for IPv4, or IPv6 tunnel packet
1146 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1147 (UINT32_C(0x4) << 9)
1149 * Indicates that the physical packet is shorter
1150 * than that claimed by the tunnel UDP header
1151 * length for a tunnel UDP packet that is not
1154 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1155 (UINT32_C(0x5) << 9)
1157 * indicates that the IPv4 TTL or IPv6 hop limit
1158 * check have failed (e.g. TTL = 0) in the
1159 * tunnel header. Valid for IPv4, and IPv6.
1161 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1162 (UINT32_C(0x6) << 9)
1163 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1164 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1166 * This indicates that there was an error in the inner portion
1167 * of the packet when this field is non-zero.
1169 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1170 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1172 * No additional error occurred on the tunnel
1173 * portion of the packet of the packet does not
1176 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1178 * Indicates that IP header version does not
1179 * match expectation from L2 Ethertype for IPv4
1180 * and IPv6 or that option other than VFT was
1181 * parsed on FCoE packet.
1183 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1184 (UINT32_C(0x1) << 12)
1186 * indicates that header length is out of range.
1187 * Valid for IPv4 and RoCE
1189 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1190 (UINT32_C(0x2) << 12)
1192 * indicates that the IPv4 TTL or IPv6 hop limit
1193 * check have failed (e.g. TTL = 0). Valid for
1196 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1198 * Indicates that physical packet is shorter
1199 * than that claimed by the l3 header length.
1200 * Valid for IPv4, IPv6 packet or RoCE packets.
1202 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1203 (UINT32_C(0x4) << 12)
1205 * Indicates that the physical packet is shorter
1206 * than that claimed by the UDP header length
1207 * for a UDP packet that is not fragmented.
1209 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1210 (UINT32_C(0x5) << 12)
1212 * Indicates that TCP header length > IP
1213 * payload. Valid for TCP packets only.
1215 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1216 (UINT32_C(0x6) << 12)
1217 /* Indicates that TCP header length < 5. Valid for TCP. */
1218 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1219 (UINT32_C(0x7) << 12)
1221 * Indicates that TCP option headers result in a
1222 * TCP header size that does not match data
1223 * offset in TCP header. Valid for TCP.
1225 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1226 (UINT32_C(0x8) << 12)
1227 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1228 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1229 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1230 #define RX_PKT_CMPL_ERRORS_SFT 1
1233 * This field identifies the CFA action rule that was used for
1238 * This value holds the reordering sequence number for the
1239 * packet. If the reordering sequence is not valid, then this
1240 * value is zero. The reordering domain for the packet is in the
1241 * bottom 8 to 10b of the rss_hash value. The bottom 20b of this
1242 * value contain the ordering domain value for the packet.
1244 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1245 #define RX_PKT_CMPL_REORDER_SFT 0
1246 } __attribute__((packed));
1248 /* RX L2 TPA Start Completion Record (32 bytes split to 2 16-byte struct) */
1249 struct rx_tpa_start_cmpl {
1250 uint16_t flags_type;
1252 * This field indicates the exact type of the completion. By
1253 * convention, the LSB identifies the length of the record in
1254 * 16B units. Even values indicate 16B records. Odd values
1255 * indicate 32B records.
1257 #define RX_TPA_START_CMPL_TYPE_MASK UINT32_C(0x3f)
1258 #define RX_TPA_START_CMPL_TYPE_SFT 0
1260 * RX L2 TPA Start Completion: Completion at the
1261 * beginning of a TPA operation. Length = 32B
1263 #define RX_TPA_START_CMPL_TYPE_RX_TPA_START UINT32_C(0x13)
1264 /* This bit will always be '0' for TPA start completions. */
1265 #define RX_TPA_START_CMPL_FLAGS_ERROR UINT32_C(0x40)
1266 /* This field indicates how the packet was placed in the buffer. */
1267 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1268 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_SFT 7
1270 * Jumbo: TPA Packet was placed using jumbo
1271 * algorithm. This means that the first buffer
1272 * will be filled with data before moving to
1273 * aggregation buffers. Each aggregation buffer
1274 * will be filled before moving to the next
1275 * aggregation buffer.
1277 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1279 * Header/Data Separation: Packet was placed
1280 * using Header/Data separation algorithm. The
1281 * separation location is indicated by the itype
1284 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1286 * GRO/Jumbo: Packet will be placed using
1287 * GRO/Jumbo where the first packet is filled
1288 * with data. Subsequent packets will be placed
1289 * such that any one packet does not span two
1290 * aggregation buffers unless it starts at the
1291 * beginning of an aggregation buffer.
1293 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_JUMBO \
1294 (UINT32_C(0x5) << 7)
1296 * GRO/Header-Data Separation: Packet will be
1297 * placed using GRO/HDS where the header is in
1298 * the first packet. Payload of each packet will
1299 * be placed such that any one packet does not
1300 * span two aggregation buffers unless it starts
1301 * at the beginning of an aggregation buffer.
1303 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1304 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_LAST \
1305 RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS
1306 /* This bit is '1' if the RSS field in this completion is valid. */
1307 #define RX_TPA_START_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
1309 #define RX_TPA_START_CMPL_FLAGS_UNUSED UINT32_C(0x800)
1311 * This value indicates what the inner packet determined for the
1314 #define RX_TPA_START_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1315 #define RX_TPA_START_CMPL_FLAGS_ITYPE_SFT 12
1316 /* TCP Packet: Indicates that the packet was IP and TCP. */
1317 #define RX_TPA_START_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
1318 #define RX_TPA_START_CMPL_FLAGS_ITYPE_LAST \
1319 RX_TPA_START_CMPL_FLAGS_ITYPE_TCP
1320 #define RX_TPA_START_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1321 #define RX_TPA_START_CMPL_FLAGS_SFT 6
1324 * This value indicates the amount of packet data written to the
1325 * buffer the opaque field in this completion corresponds to.
1329 * This is a copy of the opaque field from the RX BD this
1330 * completion corresponds to.
1333 /* unused1 is 7 b */
1335 * This value is written by the NIC such that it will be
1336 * different for each pass through the completion queue. The
1337 * even passes will write 1. The odd passes will write 0.
1339 #define RX_TPA_START_CMPL_V1 UINT32_C(0x1)
1340 /* unused1 is 7 b */
1341 uint8_t rss_hash_type;
1343 * This is the RSS hash type for the packet. The value is packed
1344 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
1345 * . The value of tuple_extrac_op provides the information about
1346 * what fields the hash was computed on. * 0: The RSS hash was
1347 * computed over source IP address, destination IP address,
1348 * source port, and destination port of inner IP and TCP or UDP
1349 * headers. Note: For non-tunneled packets, the packet headers
1350 * are considered inner packet headers for the RSS hash
1351 * computation purpose. * 1: The RSS hash was computed over
1352 * source IP address and destination IP address of inner IP
1353 * header. Note: For non-tunneled packets, the packet headers
1354 * are considered inner packet headers for the RSS hash
1355 * computation purpose. * 2: The RSS hash was computed over
1356 * source IP address, destination IP address, source port, and
1357 * destination port of IP and TCP or UDP headers of outer tunnel
1358 * headers. Note: For non-tunneled packets, this value is not
1359 * applicable. * 3: The RSS hash was computed over source IP
1360 * address and destination IP address of IP header of outer
1361 * tunnel headers. Note: For non-tunneled packets, this value is
1362 * not applicable. Note that 4-tuples values listed above are
1363 * applicable for layer 4 protocols supported and enabled for
1364 * RSS in the hardware, HWRM firmware, and drivers. For example,
1365 * if RSS hash is supported and enabled for TCP traffic only,
1366 * then the values of tuple_extract_op corresponding to 4-tuples
1367 * are only valid for TCP traffic.
1371 * This is the aggregation ID that the completion is associated
1372 * with. Use this number to correlate the TPA start completion
1373 * with the TPA end completion.
1375 /* unused2 is 9 b */
1377 * This is the aggregation ID that the completion is associated
1378 * with. Use this number to correlate the TPA start completion
1379 * with the TPA end completion.
1381 #define RX_TPA_START_CMPL_AGG_ID_MASK UINT32_C(0xfe00)
1382 #define RX_TPA_START_CMPL_AGG_ID_SFT 9
1385 * This value is the RSS hash value calculated for the packet
1386 * based on the mode bits and key value in the VNIC.
1388 } __attribute__((packed));
1390 /* last 16 bytes of RX L2 TPA Start Completion Record */
1391 struct rx_tpa_start_cmpl_hi {
1394 * This indicates that the ip checksum was calculated for the
1395 * inner packet and that the sum passed for all segments
1396 * included in the aggregation.
1398 #define RX_TPA_START_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
1400 * This indicates that the TCP, UDP or ICMP checksum was
1401 * calculated for the inner packet and that the sum passed for
1402 * all segments included in the aggregation.
1404 #define RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
1406 * This indicates that the ip checksum was calculated for the
1407 * tunnel header and that the sum passed for all segments
1408 * included in the aggregation.
1410 #define RX_TPA_START_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1412 * This indicates that the UDP checksum was calculated for the
1413 * tunnel packet and that the sum passed for all segments
1414 * included in the aggregation.
1416 #define RX_TPA_START_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1417 /* This value indicates what format the metadata field is. */
1418 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1419 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
1420 /* No metadata informtaion. Value is zero. */
1421 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1423 * The metadata field contains the VLAN tag and
1424 * TPID value. - metadata[11:0] contains the
1425 * vlan VID value. - metadata[12] contains the
1426 * vlan DE value. - metadata[15:13] contains the
1427 * vlan PRI value. - metadata[31:16] contains
1428 * the vlan TPID value.
1430 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1431 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_LAST \
1432 RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN
1434 * This field indicates the IP type for the inner-most IP
1435 * header. A value of '0' indicates IPv4. A value of '1'
1438 #define RX_TPA_START_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1441 * This is data from the CFA block as indicated by the
1442 * meta_format field.
1444 /* When meta_format=1, this value is the VLAN VID. */
1445 #define RX_TPA_START_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1446 #define RX_TPA_START_CMPL_METADATA_VID_SFT 0
1447 /* When meta_format=1, this value is the VLAN DE. */
1448 #define RX_TPA_START_CMPL_METADATA_DE UINT32_C(0x1000)
1449 /* When meta_format=1, this value is the VLAN PRI. */
1450 #define RX_TPA_START_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1451 #define RX_TPA_START_CMPL_METADATA_PRI_SFT 13
1452 /* When meta_format=1, this value is the VLAN TPID. */
1453 #define RX_TPA_START_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1454 #define RX_TPA_START_CMPL_METADATA_TPID_SFT 16
1456 /* unused4 is 15 b */
1458 * This value is written by the NIC such that it will be
1459 * different for each pass through the completion queue. The
1460 * even passes will write 1. The odd passes will write 0.
1462 #define RX_TPA_START_CMPL_V2 UINT32_C(0x1)
1463 /* unused4 is 15 b */
1466 * This field identifies the CFA action rule that was used for
1469 uint32_t inner_l4_size_inner_l3_offset_inner_l2_offset_outer_l3_offset;
1471 * This is the size in bytes of the inner most L4 header. This
1472 * can be subtracted from the payload_offset to determine the
1473 * start of the inner most L4 header.
1476 * This is the offset from the beginning of the packet in bytes
1477 * for the outer L3 header. If there is no outer L3 header, then
1478 * this value is zero.
1480 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_MASK UINT32_C(0x1ff)
1481 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_SFT 0
1483 * This is the offset from the beginning of the packet in bytes
1484 * for the inner most L2 header.
1486 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_MASK UINT32_C(0x3fe00)
1487 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_SFT 9
1489 * This is the offset from the beginning of the packet in bytes
1490 * for the inner most L3 header.
1492 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_MASK UINT32_C(0x7fc0000)
1493 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_SFT 18
1495 * This is the size in bytes of the inner most L4 header. This
1496 * can be subtracted from the payload_offset to determine the
1497 * start of the inner most L4 header.
1499 #define RX_TPA_START_CMPL_INNER_L4_SIZE_MASK UINT32_C(0xf8000000)
1500 #define RX_TPA_START_CMPL_INNER_L4_SIZE_SFT 27
1501 } __attribute__((packed));
1503 /* RX TPA End Completion Record (32 bytes split to 2 16-byte struct) */
1504 struct rx_tpa_end_cmpl {
1505 uint16_t flags_type;
1507 * This field indicates the exact type of the completion. By
1508 * convention, the LSB identifies the length of the record in
1509 * 16B units. Even values indicate 16B records. Odd values
1510 * indicate 32B records.
1512 #define RX_TPA_END_CMPL_TYPE_MASK UINT32_C(0x3f)
1513 #define RX_TPA_END_CMPL_TYPE_SFT 0
1515 * RX L2 TPA End Completion: Completion at the
1516 * end of a TPA operation. Length = 32B
1518 #define RX_TPA_END_CMPL_TYPE_RX_TPA_END UINT32_C(0x15)
1520 * When this bit is '1', it indicates a packet that has an error
1521 * of some type. Type of error is indicated in error_flags.
1523 #define RX_TPA_END_CMPL_FLAGS_ERROR UINT32_C(0x40)
1524 /* This field indicates how the packet was placed in the buffer. */
1525 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1526 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_SFT 7
1528 * Jumbo: TPA Packet was placed using jumbo
1529 * algorithm. This means that the first buffer
1530 * will be filled with data before moving to
1531 * aggregation buffers. Each aggregation buffer
1532 * will be filled before moving to the next
1533 * aggregation buffer.
1535 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1537 * Header/Data Separation: Packet was placed
1538 * using Header/Data separation algorithm. The
1539 * separation location is indicated by the itype
1542 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1544 * GRO/Jumbo: Packet will be placed using
1545 * GRO/Jumbo where the first packet is filled
1546 * with data. Subsequent packets will be placed
1547 * such that any one packet does not span two
1548 * aggregation buffers unless it starts at the
1549 * beginning of an aggregation buffer.
1551 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_JUMBO (UINT32_C(0x5) << 7)
1553 * GRO/Header-Data Separation: Packet will be
1554 * placed using GRO/HDS where the header is in
1555 * the first packet. Payload of each packet will
1556 * be placed such that any one packet does not
1557 * span two aggregation buffers unless it starts
1558 * at the beginning of an aggregation buffer.
1560 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1561 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_LAST \
1562 RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS
1564 #define RX_TPA_END_CMPL_FLAGS_UNUSED_MASK UINT32_C(0xc00)
1565 #define RX_TPA_END_CMPL_FLAGS_UNUSED_SFT 10
1567 * This value indicates what the inner packet determined for the
1568 * packet was. - 2 TCP Packet Indicates that the packet was IP
1569 * and TCP. This indicates that the ip_cs field is valid and
1570 * that the tcp_udp_cs field is valid and contains the TCP
1571 * checksum. This also indicates that the payload_offset field
1574 #define RX_TPA_END_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1575 #define RX_TPA_END_CMPL_FLAGS_ITYPE_SFT 12
1576 #define RX_TPA_END_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1577 #define RX_TPA_END_CMPL_FLAGS_SFT 6
1580 * This value is zero for TPA End completions. There is no data
1581 * in the buffer that corresponds to the opaque value in this
1586 * This is a copy of the opaque field from the RX BD this
1587 * completion corresponds to.
1589 uint8_t agg_bufs_v1;
1590 /* unused1 is 1 b */
1592 * This value is written by the NIC such that it will be
1593 * different for each pass through the completion queue. The
1594 * even passes will write 1. The odd passes will write 0.
1596 #define RX_TPA_END_CMPL_V1 UINT32_C(0x1)
1598 * This value is the number of aggregation buffers that follow
1599 * this entry in the completion ring that are a part of this
1600 * aggregation packet. If the value is zero, then the packet is
1601 * completely contained in the buffer space provided in the
1602 * aggregation start completion.
1604 #define RX_TPA_END_CMPL_AGG_BUFS_MASK UINT32_C(0x7e)
1605 #define RX_TPA_END_CMPL_AGG_BUFS_SFT 1
1606 /* unused1 is 1 b */
1608 /* This value is the number of segments in the TPA operation. */
1609 uint8_t payload_offset;
1611 * This value indicates the offset in bytes from the beginning
1612 * of the packet where the inner payload starts. This value is
1613 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
1614 * indicates an offset of 256 bytes.
1618 * This is the aggregation ID that the completion is associated
1619 * with. Use this number to correlate the TPA start completion
1620 * with the TPA end completion.
1622 /* unused2 is 1 b */
1624 * This is the aggregation ID that the completion is associated
1625 * with. Use this number to correlate the TPA start completion
1626 * with the TPA end completion.
1628 #define RX_TPA_END_CMPL_AGG_ID_MASK UINT32_C(0xfe)
1629 #define RX_TPA_END_CMPL_AGG_ID_SFT 1
1632 * For non-GRO packets, this value is the timestamp delta
1633 * between earliest and latest timestamp values for TPA packet.
1634 * If packets were not time stamped, then delta will be zero.
1635 * For GRO packets, this field is zero except for the following
1636 * sub-fields. - tsdelta[31] Timestamp present indication. When
1637 * '0', no Timestamp option is in the packet. When '1', then a
1638 * Timestamp option is present in the packet.
1640 } __attribute__((packed));
1642 /* last 16 bytes of RX TPA End Completion Record */
1643 struct rx_tpa_end_cmpl_hi {
1644 uint32_t tpa_dup_acks;
1645 /* unused3 is 28 b */
1647 * This value is the number of duplicate ACKs that have been
1648 * received as part of the TPA operation.
1650 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_MASK UINT32_C(0xf)
1651 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_SFT 0
1652 /* unused3 is 28 b */
1653 uint16_t tpa_seg_len;
1655 * This value is the valid when TPA completion is active. It
1656 * indicates the length of the longest segment of the TPA
1657 * operation for LRO mode and the length of the first segment in
1658 * GRO mode. This value may be used by GRO software to re-
1659 * construct the original packet stream from the TPA packet.
1660 * This is the length of all but the last segment for GRO. In
1661 * LRO mode this value may be used to indicate MSS size to the
1665 /* unused4 is 16 b */
1668 * This value is written by the NIC such that it will be
1669 * different for each pass through the completion queue. The
1670 * even passes will write 1. The odd passes will write 0.
1672 #define RX_TPA_END_CMPL_V2 UINT32_C(0x1)
1674 * This error indicates that there was some sort of problem with
1675 * the BDs for the packet that was found after part of the
1676 * packet was already placed. The packet should be treated as
1679 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1680 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1682 * This error occurs when there is a fatal HW
1683 * problem in the chip only. It indicates that
1684 * there were not BDs on chip but that there was
1685 * adequate reservation. provided by the TPA
1688 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1689 (UINT32_C(0x2) << 1)
1691 * This error occurs when TPA block was not
1692 * configured to reserve adequate BDs for TPA
1693 * operations on this RX ring. All data for the
1694 * TPA operation was not placed. This error can
1695 * also be generated when the number of segments
1696 * is not programmed correctly in TPA and the 33
1697 * total aggregation buffers allowed for the TPA
1698 * operation has been exceeded.
1700 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR \
1701 (UINT32_C(0x4) << 1)
1702 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_LAST \
1703 RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR
1704 #define RX_TPA_END_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1705 #define RX_TPA_END_CMPL_ERRORS_SFT 1
1707 /* unused5 is 16 b */
1708 uint32_t start_opaque;
1710 * This is the opaque value that was completed for the TPA start
1711 * completion that corresponds to this TPA end completion.
1713 } __attribute__((packed));
1715 /* HWRM Forwarded Request (16 bytes) */
1716 struct hwrm_fwd_req_cmpl {
1717 uint16_t req_len_type;
1718 /* Length of forwarded request in bytes. */
1720 * This field indicates the exact type of the completion. By
1721 * convention, the LSB identifies the length of the record in
1722 * 16B units. Even values indicate 16B records. Odd values
1723 * indicate 32B records.
1725 #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f)
1726 #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0
1727 /* Forwarded HWRM Request */
1728 #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22)
1729 /* Length of forwarded request in bytes. */
1730 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1731 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1734 * Source ID of this request. Typically used in forwarding
1735 * requests and responses. 0x0 - 0xFFF8 - Used for function ids
1736 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
1740 /* unused1 is 32 b */
1741 uint32_t req_buf_addr_v[2];
1742 /* Address of forwarded request. */
1744 * This value is written by the NIC such that it will be
1745 * different for each pass through the completion queue. The
1746 * even passes will write 1. The odd passes will write 0.
1748 #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1)
1749 /* Address of forwarded request. */
1750 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1751 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1752 } __attribute__((packed));
1754 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1755 struct hwrm_async_event_cmpl {
1757 /* unused1 is 10 b */
1759 * This field indicates the exact type of the completion. By
1760 * convention, the LSB identifies the length of the record in
1761 * 16B units. Even values indicate 16B records. Odd values
1762 * indicate 32B records.
1764 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1765 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1766 /* HWRM Asynchronous Event Information */
1767 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1768 /* unused1 is 10 b */
1770 /* Identifiers of events. */
1771 /* Link status changed */
1772 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1773 /* Link MTU changed */
1774 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1775 /* Link speed changed */
1776 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1777 /* DCB Configuration changed */
1778 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1779 /* Port connection not allowed */
1780 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1781 /* Link speed configuration was not allowed */
1782 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1784 /* Link speed configuration change */
1785 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1786 /* Port PHY configuration change */
1787 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1788 /* Function driver unloaded */
1789 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1790 /* Function driver loaded */
1791 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1792 /* Function FLR related processing has completed */
1793 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1794 /* PF driver unloaded */
1795 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1796 /* PF driver loaded */
1797 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1798 /* VF Function Level Reset (FLR) */
1799 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1800 /* VF MAC Address Change */
1801 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1802 /* PF-VF communication channel status change. */
1803 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1805 /* VF Configuration Change */
1806 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1807 /* LLFC/PFC Configuration Change */
1808 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LLFC_PFC_CHANGE UINT32_C(0x34)
1810 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1811 uint32_t event_data2;
1812 /* Event specific data */
1816 * This value is written by the NIC such that it will be
1817 * different for each pass through the completion queue. The
1818 * even passes will write 1. The odd passes will write 0.
1820 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1822 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1823 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1824 uint8_t timestamp_lo;
1825 /* 8-lsb timestamp from POR (100-msec resolution) */
1826 uint16_t timestamp_hi;
1827 /* 16-lsb timestamp from POR (100-msec resolution) */
1828 uint32_t event_data1;
1829 /* Event specific data */
1830 } __attribute__((packed));
1834 * Description: This function is called by a driver to determine the HWRM
1835 * interface version supported by the HWRM firmware, the version of HWRM
1836 * firmware implementation, the name of HWRM firmware, the versions of other
1837 * embedded firmwares, and the names of other embedded firmwares, etc. Any
1838 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
1839 * be considered an invalid version.
1841 /* Input (24 bytes) */
1842 struct hwrm_ver_get_input {
1845 * This value indicates what type of request this is. The format
1846 * for the rest of the command is determined by this field.
1850 * This value indicates the what completion ring the request
1851 * will be optionally completed on. If the value is -1, then no
1852 * CR completion will be generated. Any other value must be a
1853 * valid CR ring_id value for this function.
1856 /* This value indicates the command sequence number. */
1859 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1860 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1865 * This is the host address where the response will be written
1866 * when the request is complete. This area must be 16B aligned
1867 * and must be cleared to zero before the request is made.
1869 uint8_t hwrm_intf_maj;
1871 * This field represents the major version of HWRM interface
1872 * specification supported by the driver HWRM implementation.
1873 * The interface major version is intended to change only when
1874 * non backward compatible changes are made to the HWRM
1875 * interface specification.
1877 uint8_t hwrm_intf_min;
1879 * This field represents the minor version of HWRM interface
1880 * specification supported by the driver HWRM implementation. A
1881 * change in interface minor version is used to reflect
1882 * significant backward compatible modification to HWRM
1883 * interface specification. This can be due to addition or
1884 * removal of functionality. HWRM interface specifications with
1885 * the same major version but different minor versions are
1888 uint8_t hwrm_intf_upd;
1890 * This field represents the update version of HWRM interface
1891 * specification supported by the driver HWRM implementation.
1892 * The interface update version is used to reflect minor changes
1893 * or bug fixes to a released HWRM interface specification.
1895 uint8_t unused_0[5];
1896 } __attribute__((packed));
1898 /* Output (128 bytes) */
1899 struct hwrm_ver_get_output {
1900 uint16_t error_code;
1902 * Pass/Fail or error type Note: receiver to verify the in
1903 * parameters, and fail the call with an error when appropriate
1906 /* This field returns the type of original request. */
1908 /* This field provides original sequence number of the command. */
1911 * This field is the length of the response in bytes. The last
1912 * byte of the response is a valid flag that will read as '1'
1913 * when the command has been completely written to memory.
1915 uint8_t hwrm_intf_maj;
1917 * This field represents the major version of HWRM interface
1918 * specification supported by the HWRM implementation. The
1919 * interface major version is intended to change only when non
1920 * backward compatible changes are made to the HWRM interface
1921 * specification. A HWRM implementation that is compliant with
1922 * this specification shall provide value of 1 in this field.
1924 uint8_t hwrm_intf_min;
1926 * This field represents the minor version of HWRM interface
1927 * specification supported by the HWRM implementation. A change
1928 * in interface minor version is used to reflect significant
1929 * backward compatible modification to HWRM interface
1930 * specification. This can be due to addition or removal of
1931 * functionality. HWRM interface specifications with the same
1932 * major version but different minor versions are compatible. A
1933 * HWRM implementation that is compliant with this specification
1934 * shall provide value of 2 in this field.
1936 uint8_t hwrm_intf_upd;
1938 * This field represents the update version of HWRM interface
1939 * specification supported by the HWRM implementation. The
1940 * interface update version is used to reflect minor changes or
1941 * bug fixes to a released HWRM interface specification. A HWRM
1942 * implementation that is compliant with this specification
1943 * shall provide value of 2 in this field.
1945 uint8_t hwrm_intf_rsvd;
1946 uint8_t hwrm_fw_maj;
1948 * This field represents the major version of HWRM firmware. A
1949 * change in firmware major version represents a major firmware
1952 uint8_t hwrm_fw_min;
1954 * This field represents the minor version of HWRM firmware. A
1955 * change in firmware minor version represents significant
1956 * firmware functionality changes.
1958 uint8_t hwrm_fw_bld;
1960 * This field represents the build version of HWRM firmware. A
1961 * change in firmware build version represents bug fixes to a
1962 * released firmware.
1964 uint8_t hwrm_fw_rsvd;
1966 * This field is a reserved field. This field can be used to
1967 * represent firmware branches or customer specific releases
1968 * tied to a specific (major,minor,update) version of the HWRM
1971 uint8_t mgmt_fw_maj;
1973 * This field represents the major version of mgmt firmware. A
1974 * change in major version represents a major release.
1976 uint8_t mgmt_fw_min;
1978 * This field represents the minor version of mgmt firmware. A
1979 * change in minor version represents significant functionality
1982 uint8_t mgmt_fw_bld;
1984 * This field represents the build version of mgmt firmware. A
1985 * change in update version represents bug fixes.
1987 uint8_t mgmt_fw_rsvd;
1989 * This field is a reserved field. This field can be used to
1990 * represent firmware branches or customer specific releases
1991 * tied to a specific (major,minor,update) version
1993 uint8_t netctrl_fw_maj;
1995 * This field represents the major version of network control
1996 * firmware. A change in major version represents a major
1999 uint8_t netctrl_fw_min;
2001 * This field represents the minor version of network control
2002 * firmware. A change in minor version represents significant
2003 * functionality changes.
2005 uint8_t netctrl_fw_bld;
2007 * This field represents the build version of network control
2008 * firmware. A change in update version represents bug fixes.
2010 uint8_t netctrl_fw_rsvd;
2012 * This field is a reserved field. This field can be used to
2013 * represent firmware branches or customer specific releases
2014 * tied to a specific (major,minor,update) version
2016 uint32_t dev_caps_cfg;
2018 * This field is used to indicate device's capabilities and
2022 * If set to 1, then secure firmware update behavior is
2023 * supported. If set to 0, then secure firmware update behavior
2026 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED \
2029 * If set to 1, then firmware based DCBX agent is supported. If
2030 * set to 0, then firmware based DCBX agent capability is not
2031 * supported on this device.
2033 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED \
2036 * If set to 1, then HWRM short command format is supported. If
2037 * set to 0, then HWRM short command format is not supported.
2039 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED \
2042 * If set to 1, then HWRM short command format is required. If
2043 * set to 0, then HWRM short command format is not required.
2045 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_INPUTUIRED \
2047 uint8_t roce_fw_maj;
2049 * This field represents the major version of RoCE firmware. A
2050 * change in major version represents a major release.
2052 uint8_t roce_fw_min;
2054 * This field represents the minor version of RoCE firmware. A
2055 * change in minor version represents significant functionality
2058 uint8_t roce_fw_bld;
2060 * This field represents the build version of RoCE firmware. A
2061 * change in update version represents bug fixes.
2063 uint8_t roce_fw_rsvd;
2065 * This field is a reserved field. This field can be used to
2066 * represent firmware branches or customer specific releases
2067 * tied to a specific (major,minor,update) version
2069 char hwrm_fw_name[16];
2071 * This field represents the name of HWRM FW (ASCII chars with
2074 char mgmt_fw_name[16];
2076 * This field represents the name of mgmt FW (ASCII chars with
2079 char netctrl_fw_name[16];
2081 * This field represents the name of network control firmware
2082 * (ASCII chars with NULL at the end).
2084 uint32_t reserved2[4];
2086 * This field is reserved for future use. The responder should
2087 * set it to 0. The requester should ignore this field.
2089 char roce_fw_name[16];
2091 * This field represents the name of RoCE FW (ASCII chars with
2095 /* This field returns the chip number. */
2097 /* This field returns the revision of chip. */
2099 /* This field returns the chip metal number. */
2100 uint8_t chip_bond_id;
2101 /* This field returns the bond id of the chip. */
2102 uint8_t chip_platform_type;
2104 * This value indicates the type of platform used for chip
2108 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
2109 /* FPGA platform of the chip. */
2110 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
2111 /* Palladium platform of the chip. */
2112 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
2113 uint16_t max_req_win_len;
2115 * This field returns the maximum value of request window that
2116 * is supported by the HWRM. The request window is mapped into
2117 * device address space using MMIO.
2119 uint16_t max_resp_len;
2120 /* This field returns the maximum value of response buffer in bytes. */
2121 uint16_t def_req_timeout;
2123 * This field returns the default request timeout value in
2126 uint8_t init_pending;
2128 * This field will indicate if any subsystems is not fully
2132 * If set to 1, device is not ready. If set to 0, device is
2133 * ready to accept all HWRM commands.
2135 #define HWRM_VER_GET_OUTPUT_INIT_PENDING_DEV_NOT_RDY UINT32_C(0x1)
2140 * This field is used in Output records to indicate that the
2141 * output is completely written to RAM. This field should be
2142 * read as '1' to indicate that the output has been completely
2143 * written. When writing a command completion or response to an
2144 * internal processor, the order of writes has to be such that
2145 * this field is written last.
2147 } __attribute__((packed));
2149 /* hwrm_func_reset */
2151 * Description: This command resets a hardware function (PCIe function) and
2152 * frees any resources used by the function. This command shall be initiated by
2153 * the driver after an FLR has occurred to prepare the function for re-use. This
2154 * command may also be initiated by a driver prior to doing it's own
2155 * configuration. This command puts the function into the reset state. In the
2156 * reset state, global and port related features of the chip are not available.
2159 * Note: This command will reset a function that has already been disabled or
2160 * idled. The command returns all the resources owned by the function so a new
2161 * driver may allocate and configure resources normally.
2163 /* Input (24 bytes) */
2164 struct hwrm_func_reset_input {
2167 * This value indicates what type of request this is. The format
2168 * for the rest of the command is determined by this field.
2172 * This value indicates the what completion ring the request
2173 * will be optionally completed on. If the value is -1, then no
2174 * CR completion will be generated. Any other value must be a
2175 * valid CR ring_id value for this function.
2178 /* This value indicates the command sequence number. */
2181 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2182 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2187 * This is the host address where the response will be written
2188 * when the request is complete. This area must be 16B aligned
2189 * and must be cleared to zero before the request is made.
2192 /* This bit must be '1' for the vf_id_valid field to be configured. */
2193 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
2196 * The ID of the VF that this PF is trying to reset. Only the
2197 * parent PF shall be allowed to reset a child VF. A parent PF
2198 * driver shall use this field only when a specific child VF is
2199 * requested to be reset.
2201 uint8_t func_reset_level;
2202 /* This value indicates the level of a function reset. */
2204 * Reset the caller function and its children
2205 * VFs (if any). If no children functions exist,
2206 * then reset the caller function only.
2208 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
2209 /* Reset the caller function only */
2210 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1)
2212 * Reset all children VFs of the caller function
2213 * driver if the caller is a PF driver. It is an
2214 * error to specify this level by a VF driver.
2215 * It is an error to specify this level by a PF
2216 * driver with no children VFs.
2218 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2221 * Reset a specific VF of the caller function
2222 * driver if the caller is the parent PF driver.
2223 * It is an error to specify this level by a VF
2224 * driver. It is an error to specify this level
2225 * by a PF driver that is not the parent of the
2226 * VF that is being requested to reset.
2228 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3)
2230 } __attribute__((packed));
2232 /* Output (16 bytes) */
2233 struct hwrm_func_reset_output {
2234 uint16_t error_code;
2236 * Pass/Fail or error type Note: receiver to verify the in
2237 * parameters, and fail the call with an error when appropriate
2240 /* This field returns the type of original request. */
2242 /* This field provides original sequence number of the command. */
2245 * This field is the length of the response in bytes. The last
2246 * byte of the response is a valid flag that will read as '1'
2247 * when the command has been completely written to memory.
2255 * This field is used in Output records to indicate that the
2256 * output is completely written to RAM. This field should be
2257 * read as '1' to indicate that the output has been completely
2258 * written. When writing a command completion or response to an
2259 * internal processor, the order of writes has to be such that
2260 * this field is written last.
2262 } __attribute__((packed));
2264 /* hwrm_func_vf_cfg */
2266 * Description: This command allows configuration of a VF by its driver. If this
2267 * function is called by a PF driver, then the HWRM shall fail this command. If
2268 * guest VLAN and/or MAC address are provided in this command, then the HWRM
2269 * shall set up appropriate MAC/VLAN filters for the VF that is being
2270 * configured. A VF driver should set VF MTU/MRU using this command prior to
2271 * allocating RX VNICs or TX rings for the corresponding VF.
2273 /* Input (32 bytes) */
2274 struct hwrm_func_vf_cfg_input {
2277 * This value indicates what type of request this is. The format for the
2278 * rest of the command is determined by this field.
2282 * This value indicates the what completion ring the request will be
2283 * optionally completed on. If the value is -1, then no CR completion
2284 * will be generated. Any other value must be a valid CR ring_id value
2285 * for this function.
2288 /* This value indicates the command sequence number. */
2291 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2292 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2296 * This is the host address where the response will be written when the
2297 * request is complete. This area must be 16B aligned and must be
2298 * cleared to zero before the request is made.
2301 /* This bit must be '1' for the mtu field to be configured. */
2302 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
2303 /* This bit must be '1' for the guest_vlan field to be configured. */
2304 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_GUEST_VLAN UINT32_C(0x2)
2306 * This bit must be '1' for the async_event_cr field to be configured.
2308 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4)
2309 /* This bit must be '1' for the dflt_mac_addr field to be configured. */
2310 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x8)
2313 * The maximum transmission unit requested on the function. The HWRM
2314 * should make sure that the mtu of the function does not exceed the mtu
2315 * of the physical port that this function is associated with. In
2316 * addition to requesting mtu per function, it is possible to configure
2317 * mtu per transmit ring. By default, the mtu of each transmit ring
2318 * associated with a function is equal to the mtu of the function. The
2319 * HWRM should make sure that the mtu of each transmit ring that is
2320 * assigned to a function has a valid mtu.
2322 uint16_t guest_vlan;
2324 * The guest VLAN for the function being configured. This field's format
2325 * is same as 802.1Q Tag's Tag Control Information (TCI) format that
2326 * includes both Priority Code Point (PCP) and VLAN Identifier (VID).
2328 uint16_t async_event_cr;
2330 * ID of the target completion ring for receiving asynchronous event
2331 * completions. If this field is not valid, then the HWRM shall use the
2332 * default completion ring of the function that is being configured as
2333 * the target completion ring for providing any asynchronous event
2334 * completions for that function. If this field is valid, then the HWRM
2335 * shall use the completion ring identified by this ID as the target
2336 * completion ring for providing any asynchronous event completions for
2337 * the function that is being configured.
2339 uint8_t dflt_mac_addr[6];
2341 * This value is the current MAC address requested by the VF driver to
2342 * be configured on this VF. A value of 00-00-00-00-00-00 indicates no
2343 * MAC address configuration is requested by the VF driver. The parent
2344 * PF driver may reject or overwrite this MAC address.
2346 } __attribute__((packed));
2348 /* Output (16 bytes) */
2350 struct hwrm_func_vf_cfg_output {
2351 uint16_t error_code;
2353 * Pass/Fail or error type Note: receiver to verify the in parameters,
2354 * and fail the call with an error when appropriate
2357 /* This field returns the type of original request. */
2359 /* This field provides original sequence number of the command. */
2362 * This field is the length of the response in bytes. The last
2363 * byte of the response is a valid flag that will read as '1'
2364 * when the command has been completely written to memory.
2372 * This field is used in Output records to indicate that the output is
2373 * completely written to RAM. This field should be read as '1' to
2374 * indicate that the output has been completely written. When writing a
2375 * command completion or response to an internal processor, the order of
2376 * writes has to be such that this field is written last.
2378 } __attribute__((packed));
2380 /* hwrm_func_qcaps */
2382 * Description: This command returns capabilities of a function. The input FID
2383 * value is used to indicate what function is being queried. This allows a
2384 * physical function driver to query virtual functions that are children of the
2385 * physical function. The output FID value is needed to configure Rings and
2386 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
2388 /* Input (24 bytes) */
2389 struct hwrm_func_qcaps_input {
2392 * This value indicates what type of request this is. The format
2393 * for the rest of the command is determined by this field.
2397 * This value indicates the what completion ring the request
2398 * will be optionally completed on. If the value is -1, then no
2399 * CR completion will be generated. Any other value must be a
2400 * valid CR ring_id value for this function.
2403 /* This value indicates the command sequence number. */
2406 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2407 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2412 * This is the host address where the response will be written
2413 * when the request is complete. This area must be 16B aligned
2414 * and must be cleared to zero before the request is made.
2418 * Function ID of the function that is being queried. 0xFF...
2419 * (All Fs) if the query is for the requesting function.
2421 uint16_t unused_0[3];
2422 } __attribute__((packed));
2424 /* Output (80 bytes) */
2425 struct hwrm_func_qcaps_output {
2426 uint16_t error_code;
2428 * Pass/Fail or error type Note: receiver to verify the in
2429 * parameters, and fail the call with an error when appropriate
2432 /* This field returns the type of original request. */
2434 /* This field provides original sequence number of the command. */
2437 * This field is the length of the response in bytes. The last
2438 * byte of the response is a valid flag that will read as '1'
2439 * when the command has been completely written to memory.
2443 * FID value. This value is used to identify operations on the
2444 * PCI bus as belonging to a particular PCI function.
2448 * Port ID of port that this function is associated with. Valid
2449 * only for the PF. 0xFF... (All Fs) if this function is not
2450 * associated with any port. 0xFF... (All Fs) if this function
2451 * is called from a VF.
2454 /* If 1, then Push mode is supported on this function. */
2455 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2457 * If 1, then the global MSI-X auto-masking is enabled for the
2460 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2463 * If 1, then the Precision Time Protocol (PTP) processing is
2464 * supported on this function. The HWRM should enable PTP on
2465 * only a single Physical Function (PF) per port.
2467 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2469 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
2470 * supported on this function.
2472 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
2474 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
2475 * supported on this function.
2477 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
2479 * If 1, then control and configuration of WoL magic packet are
2480 * supported on this function.
2482 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED \
2485 * If 1, then control and configuration of bitmap pattern packet
2486 * are supported on this function.
2488 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
2490 * If set to 1, then the control and configuration of rate limit
2491 * of an allocated TX ring on the queried function is supported.
2493 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
2495 * If 1, then control and configuration of minimum and maximum
2496 * bandwidths are supported on the queried function.
2498 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
2500 * If the query is for a VF, then this flag shall be ignored. If
2501 * this query is for a PF and this flag is set to 1, then the PF
2502 * has the capability to set the rate limits on the TX rings of
2503 * its children VFs. If this query is for a PF and this flag is
2504 * set to 0, then the PF does not have the capability to set the
2505 * rate limits on the TX rings of its children VFs.
2507 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED \
2510 * If the query is for a VF, then this flag shall be ignored. If
2511 * this query is for a PF and this flag is set to 1, then the PF
2512 * has the capability to set the minimum and/or maximum
2513 * bandwidths for its children VFs. If this query is for a PF
2514 * and this flag is set to 0, then the PF does not have the
2515 * capability to set the minimum or maximum bandwidths for its
2518 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
2520 * Standard TX Ring mode is used for the allocation of TX ring
2521 * and underlying scheduling resources that allow bandwidth
2522 * reservation and limit settings on the queried function. If
2523 * set to 1, then standard TX ring mode is supported on the
2524 * queried function. If set to 0, then standard TX ring mode is
2525 * not available on the queried function.
2527 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_STD_TX_RING_MODE_SUPPORTED \
2529 uint8_t mac_address[6];
2531 * This value is current MAC address configured for this
2532 * function. A value of 00-00-00-00-00-00 indicates no MAC
2533 * address is currently configured.
2535 uint16_t max_rsscos_ctx;
2537 * The maximum number of RSS/COS contexts that can be allocated
2540 uint16_t max_cmpl_rings;
2542 * The maximum number of completion rings that can be allocated
2545 uint16_t max_tx_rings;
2547 * The maximum number of transmit rings that can be allocated to
2550 uint16_t max_rx_rings;
2552 * The maximum number of receive rings that can be allocated to
2555 uint16_t max_l2_ctxs;
2557 * The maximum number of L2 contexts that can be allocated to
2562 * The maximum number of VNICs that can be allocated to the
2565 uint16_t first_vf_id;
2567 * The identifier for the first VF enabled on a PF. This is
2568 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2569 * this command is called on a PF with SR-IOV disabled or on a
2574 * The maximum number of VFs that can be allocated to the
2575 * function. This is valid only on the PF with SR-IOV enabled.
2576 * 0xFF... (All Fs) if this command is called on a PF with SR-
2577 * IOV disabled or on a VF.
2579 uint16_t max_stat_ctx;
2581 * The maximum number of statistic contexts that can be
2582 * allocated to the function.
2584 uint32_t max_encap_records;
2586 * The maximum number of Encapsulation records that can be
2587 * offloaded by this function.
2589 uint32_t max_decap_records;
2591 * The maximum number of decapsulation records that can be
2592 * offloaded by this function.
2594 uint32_t max_tx_em_flows;
2596 * The maximum number of Exact Match (EM) flows that can be
2597 * offloaded by this function on the TX side.
2599 uint32_t max_tx_wm_flows;
2601 * The maximum number of Wildcard Match (WM) flows that can be
2602 * offloaded by this function on the TX side.
2604 uint32_t max_rx_em_flows;
2606 * The maximum number of Exact Match (EM) flows that can be
2607 * offloaded by this function on the RX side.
2609 uint32_t max_rx_wm_flows;
2611 * The maximum number of Wildcard Match (WM) flows that can be
2612 * offloaded by this function on the RX side.
2614 uint32_t max_mcast_filters;
2616 * The maximum number of multicast filters that can be supported
2617 * by this function on the RX side.
2619 uint32_t max_flow_id;
2621 * The maximum value of flow_id that can be supported in
2622 * completion records.
2624 uint32_t max_hw_ring_grps;
2626 * The maximum number of HW ring groups that can be supported on
2629 uint16_t max_sp_tx_rings;
2631 * The maximum number of strict priority transmit rings that can
2632 * be allocated to the function. This number indicates the
2633 * maximum number of TX rings that can be assigned strict
2634 * priorities out of the maximum number of TX rings that can be
2635 * allocated (max_tx_rings) to the function.
2640 * This field is used in Output records to indicate that the
2641 * output is completely written to RAM. This field should be
2642 * read as '1' to indicate that the output has been completely
2643 * written. When writing a command completion or response to an
2644 * internal processor, the order of writes has to be such that
2645 * this field is written last.
2647 } __attribute__((packed));
2649 /* hwrm_func_qcfg */
2651 * Description: This command returns the current configuration of a function.
2652 * The input FID value is used to indicate what function is being queried. This
2653 * allows a physical function driver to query virtual functions that are
2654 * children of the physical function. The output FID value is needed to
2655 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
2656 * the PCI bus. This command should be called by every driver after
2657 * 'hwrm_func_cfg' to get the actual number of resources allocated by the HWRM.
2658 * The values returned by hwrm_func_qcfg are the values the driver shall use.
2659 * These values may be different than what was originally requested in the
2660 * 'hwrm_func_cfg' command.
2662 /* Input (24 bytes) */
2663 struct hwrm_func_qcfg_input {
2666 * This value indicates what type of request this is. The format
2667 * for the rest of the command is determined by this field.
2671 * This value indicates the what completion ring the request
2672 * will be optionally completed on. If the value is -1, then no
2673 * CR completion will be generated. Any other value must be a
2674 * valid CR ring_id value for this function.
2677 /* This value indicates the command sequence number. */
2680 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2681 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2686 * This is the host address where the response will be written
2687 * when the request is complete. This area must be 16B aligned
2688 * and must be cleared to zero before the request is made.
2692 * Function ID of the function that is being queried. 0xFF...
2693 * (All Fs) if the query is for the requesting function.
2695 uint16_t unused_0[3];
2696 } __attribute__((packed));
2698 /* Output (72 bytes) */
2699 struct hwrm_func_qcfg_output {
2700 uint16_t error_code;
2702 * Pass/Fail or error type Note: receiver to verify the in
2703 * parameters, and fail the call with an error when appropriate
2706 /* This field returns the type of original request. */
2708 /* This field provides original sequence number of the command. */
2711 * This field is the length of the response in bytes. The last
2712 * byte of the response is a valid flag that will read as '1'
2713 * when the command has been completely written to memory.
2717 * FID value. This value is used to identify operations on the
2718 * PCI bus as belonging to a particular PCI function.
2722 * Port ID of port that this function is associated with.
2723 * 0xFF... (All Fs) if this function is not associated with any
2728 * This value is the current VLAN setting for this function. The
2729 * value of 0 for this field indicates no priority tagging or
2730 * VLAN is used. This field's format is same as 802.1Q Tag's Tag
2731 * Control Information (TCI) format that includes both Priority
2732 * Code Point (PCP) and VLAN Identifier (VID).
2736 * If 1, then magic packet based Out-Of-Box WoL is enabled on
2737 * the port associated with this function.
2739 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
2742 * If 1, then bitmap pattern based Out-Of-Box WoL packet is
2743 * enabled on the port associated with this function.
2745 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2)
2747 * If set to 1, then FW based DCBX agent is enabled and running
2748 * on the port associated with this function. If set to 0, then
2749 * DCBX agent is not running in the firmware.
2751 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
2754 * Standard TX Ring mode is used for the allocation of TX ring
2755 * and underlying scheduling resources that allow bandwidth
2756 * reservation and limit settings on the queried function. If
2757 * set to 1, then standard TX ring mode is enabled on the
2758 * queried function. If set to 0, then the standard TX ring mode
2759 * is disabled on the queried function. In this extended TX ring
2760 * resource mode, the minimum and maximum bandwidth settings are
2761 * not supported to allow the allocation of TX rings to span
2762 * multiple scheduler nodes.
2764 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_STD_TX_RING_MODE_ENABLED \
2767 * If set to 1 then FW based LLDP agent is enabled and running
2768 * on the port associated with this function. If set to 0 then
2769 * the LLDP agent is not running in the firmware.
2771 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_LLDP_AGENT_ENABLED UINT32_C(0x10)
2773 * If set to 1, then multi-host mode is active for this
2774 * function. If set to 0, then multi-host mode is inactive for
2775 * this function or not applicable for this device.
2777 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_MULTI_HOST UINT32_C(0x20)
2778 uint8_t mac_address[6];
2780 * This value is current MAC address configured for this
2781 * function. A value of 00-00-00-00-00-00 indicates no MAC
2782 * address is currently configured.
2786 * This value is current PCI ID of this function. If ARI is
2787 * enabled, then it is Bus Number (8b):Function Number(8b).
2788 * Otherwise, it is Bus Number (8b):Device Number (4b):Function
2791 uint16_t alloc_rsscos_ctx;
2793 * The number of RSS/COS contexts currently allocated to the
2796 uint16_t alloc_cmpl_rings;
2798 * The number of completion rings currently allocated to the
2799 * function. This does not include the rings allocated to any
2800 * children functions if any.
2802 uint16_t alloc_tx_rings;
2804 * The number of transmit rings currently allocated to the
2805 * function. This does not include the rings allocated to any
2806 * children functions if any.
2808 uint16_t alloc_rx_rings;
2810 * The number of receive rings currently allocated to the
2811 * function. This does not include the rings allocated to any
2812 * children functions if any.
2814 uint16_t alloc_l2_ctx;
2815 /* The allocated number of L2 contexts to the function. */
2816 uint16_t alloc_vnics;
2817 /* The allocated number of vnics to the function. */
2820 * The maximum transmission unit of the function. For rings
2821 * allocated on this function, this default value is used if
2822 * ring MTU is not specified.
2826 * The maximum receive unit of the function. For vnics allocated
2827 * on this function, this default value is used if vnic MRU is
2830 uint16_t stat_ctx_id;
2831 /* The statistics context assigned to a function. */
2832 uint8_t port_partition_type;
2834 * The HWRM shall return Unknown value for this field when this
2835 * command is used to query VF's configuration.
2837 /* Single physical function */
2838 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0)
2839 /* Multiple physical functions */
2840 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
2841 /* Network Partitioning 1.0 */
2842 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 UINT32_C(0x2)
2843 /* Network Partitioning 1.5 */
2844 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 UINT32_C(0x3)
2845 /* Network Partitioning 2.0 */
2846 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 UINT32_C(0x4)
2848 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN UINT32_C(0xff)
2849 uint8_t port_pf_cnt;
2851 * This field will indicate number of physical functions on this
2852 * port_partition. HWRM shall return unavail (i.e. value of 0)
2853 * for this field when this command is used to query VF's
2854 * configuration or from older firmware that doesn't support
2857 /* number of PFs is not available */
2858 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PF_CNT_UNAVAIL UINT32_C(0x0)
2859 uint16_t dflt_vnic_id;
2860 /* The default VNIC ID assigned to a function that is being queried. */
2861 uint16_t max_mtu_configured;
2863 * This value specifies the MAX MTU that can be configured by
2864 * host drivers. This 'max_mtu_configure' can be HW max MTU or
2865 * OEM applications specified value. Host drivers can't
2866 * configure the MTU greater than this value. Host drivers
2867 * should read this value prior to configuring the MTU. FW will
2868 * fail the host request with MTU greater than
2869 * 'max_mtu_configured'.
2873 * Minimum BW allocated for this function. The HWRM will
2874 * translate this value into byte counter and time interval used
2875 * for the scheduler inside the device. A value of 0 indicates
2876 * the minimum bandwidth is not configured.
2878 /* The bandwidth value. */
2879 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2880 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0
2881 /* The granularity of the value (bits or bytes). */
2882 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE UINT32_C(0x10000000)
2883 /* Value is in bits. */
2884 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2885 /* Value is in bytes. */
2886 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES \
2887 (UINT32_C(0x1) << 28)
2888 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_LAST \
2889 FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES
2890 /* bw_value_unit is 3 b */
2891 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \
2892 UINT32_C(0xe0000000)
2893 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
2894 /* Value is in Mb or MB (base 10). */
2895 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
2896 (UINT32_C(0x0) << 29)
2897 /* Value is in Kb or KB (base 10). */
2898 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_KILO \
2899 (UINT32_C(0x2) << 29)
2900 /* Value is in bits or bytes. */
2901 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_BASE \
2902 (UINT32_C(0x4) << 29)
2903 /* Value is in Gb or GB (base 10). */
2904 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
2905 (UINT32_C(0x6) << 29)
2906 /* Value is in 1/100th of a percentage of total bandwidth. */
2907 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
2908 (UINT32_C(0x1) << 29)
2910 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
2911 (UINT32_C(0x7) << 29)
2912 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
2913 FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID
2916 * Maximum BW allocated for this function. The HWRM will
2917 * translate this value into byte counter and time interval used
2918 * for the scheduler inside the device. A value of 0 indicates
2919 * that the maximum bandwidth is not configured.
2921 /* The bandwidth value. */
2922 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2923 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0
2924 /* The granularity of the value (bits or bytes). */
2925 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE UINT32_C(0x10000000)
2926 /* Value is in bits. */
2927 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2928 /* Value is in bytes. */
2929 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES \
2930 (UINT32_C(0x1) << 28)
2931 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_LAST \
2932 FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES
2933 /* bw_value_unit is 3 b */
2934 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \
2935 UINT32_C(0xe0000000)
2936 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
2937 /* Value is in Mb or MB (base 10). */
2938 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
2939 (UINT32_C(0x0) << 29)
2940 /* Value is in Kb or KB (base 10). */
2941 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_KILO \
2942 (UINT32_C(0x2) << 29)
2943 /* Value is in bits or bytes. */
2944 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_BASE \
2945 (UINT32_C(0x4) << 29)
2946 /* Value is in Gb or GB (base 10). */
2947 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
2948 (UINT32_C(0x6) << 29)
2949 /* Value is in 1/100th of a percentage of total bandwidth. */
2950 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
2951 (UINT32_C(0x1) << 29)
2953 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
2954 (UINT32_C(0x7) << 29)
2955 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
2956 FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID
2959 * This value indicates the Edge virtual bridge mode for the
2960 * domain that this function belongs to.
2962 /* No Edge Virtual Bridging (EVB) */
2963 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
2964 /* Virtual Ethernet Bridge (VEB) */
2965 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
2966 /* Virtual Ethernet Port Aggregator (VEPA) */
2967 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
2971 * The number of VFs that are allocated to the function. This is
2972 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2973 * this command is called on a PF with SR-IOV disabled or on a
2976 uint32_t alloc_mcast_filters;
2978 * The number of allocated multicast filters for this function
2981 uint32_t alloc_hw_ring_grps;
2982 /* The number of allocated HW ring groups for this function. */
2983 uint16_t alloc_sp_tx_rings;
2985 * The number of strict priority transmit rings out of currently
2986 * allocated TX rings to the function (alloc_tx_rings).
2991 * This field is used in Output records to indicate that the
2992 * output is completely written to RAM. This field should be
2993 * read as '1' to indicate that the output has been completely
2994 * written. When writing a command completion or response to an
2995 * internal processor, the order of writes has to be such that
2996 * this field is written last.
2998 } __attribute__((packed));
3000 /* hwrm_func_vlan_qcfg */
3002 * Description: This command should be called by PF driver to get the current
3003 * C-TAG, S-TAG and correcponsing PCP and TPID values configured for the
3006 /* Input (24 bytes) */
3007 struct hwrm_func_vlan_qcfg_input {
3010 * This value indicates what type of request this is. The format
3011 * for the rest of the command is determined by this field.
3015 * This value indicates the what completion ring the request
3016 * will be optionally completed on. If the value is -1, then no
3017 * CR completion will be generated. Any other value must be a
3018 * valid CR ring_id value for this function.
3021 /* This value indicates the command sequence number. */
3024 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3025 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3030 * This is the host address where the response will be written
3031 * when the request is complete. This area must be 16B aligned
3032 * and must be cleared to zero before the request is made.
3036 * Function ID of the function that is being configured. If set
3037 * to 0xFF... (All Fs), then the configuration is for the
3038 * requesting function.
3040 uint16_t unused_0[3];
3043 /* Output (40 bytes) */
3044 struct hwrm_func_vlan_qcfg_output {
3045 uint16_t error_code;
3047 * Pass/Fail or error type Note: receiver to verify the in
3048 * parameters, and fail the call with an error when appropriate
3051 /* This field returns the type of original request. */
3053 /* This field provides original sequence number of the command. */
3056 * This field is the length of the response in bytes. The last
3057 * byte of the response is a valid flag that will read as '1'
3058 * when the command has been completely written to memory.
3066 * This field is used in Output records to indicate that the
3067 * output is completely written to RAM. This field should be
3068 * read as '1' to indicate that the output has been completely
3069 * written. When writing a command completion or response to an
3070 * internal processor, the order of writes has to be such that
3071 * this field is written last.
3074 /* S-TAG VLAN identifier configured for the function. */
3076 /* S-TAG PCP value configured for the function. */
3080 * S-TAG TPID value configured for the function. This field is
3081 * specified in network byte order.
3084 /* C-TAG VLAN identifier configured for the function. */
3086 /* C-TAG PCP value configured for the function. */
3090 * C-TAG TPID value configured for the function. This field is
3091 * specified in network byte order.
3100 /* hwrm_func_vlan_cfg */
3102 * Description: This command allows PF driver to configure C-TAG, S-TAG and
3103 * corresponding PCP and TPID values for a function.
3105 /* Input (48 bytes) */
3106 struct hwrm_func_vlan_cfg_input {
3109 * This value indicates what type of request this is. The format
3110 * for the rest of the command is determined by this field.
3114 * This value indicates the what completion ring the request
3115 * will be optionally completed on. If the value is -1, then no
3116 * CR completion will be generated. Any other value must be a
3117 * valid CR ring_id value for this function.
3120 /* This value indicates the command sequence number. */
3123 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3124 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3129 * This is the host address where the response will be written
3130 * when the request is complete. This area must be 16B aligned
3131 * and must be cleared to zero before the request is made.
3135 * Function ID of the function that is being configured. If set
3136 * to 0xFF... (All Fs), then the configuration is for the
3137 * requesting function.
3142 /* This bit must be '1' for the stag_vid field to be configured. */
3143 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_VID UINT32_C(0x1)
3144 /* This bit must be '1' for the ctag_vid field to be configured. */
3145 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_VID UINT32_C(0x2)
3146 /* This bit must be '1' for the stag_pcp field to be configured. */
3147 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_PCP UINT32_C(0x4)
3148 /* This bit must be '1' for the ctag_pcp field to be configured. */
3149 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_PCP UINT32_C(0x8)
3150 /* This bit must be '1' for the stag_tpid field to be configured. */
3151 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_TPID UINT32_C(0x10)
3152 /* This bit must be '1' for the ctag_tpid field to be configured. */
3153 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_TPID UINT32_C(0x20)
3155 /* S-TAG VLAN identifier configured for the function. */
3157 /* S-TAG PCP value configured for the function. */
3161 * S-TAG TPID value configured for the function. This field is
3162 * specified in network byte order.
3165 /* C-TAG VLAN identifier configured for the function. */
3167 /* C-TAG PCP value configured for the function. */
3171 * C-TAG TPID value configured for the function. This field is
3172 * specified in network byte order.
3181 /* Output (16 bytes) */
3182 struct hwrm_func_vlan_cfg_output {
3183 uint16_t error_code;
3185 * Pass/Fail or error type Note: receiver to verify the in
3186 * parameters, and fail the call with an error when appropriate
3189 /* This field returns the type of original request. */
3191 /* This field provides original sequence number of the command. */
3194 * This field is the length of the response in bytes. The last
3195 * byte of the response is a valid flag that will read as '1'
3196 * when the command has been completely written to memory.
3204 * This field is used in Output records to indicate that the
3205 * output is completely written to RAM. This field should be
3206 * read as '1' to indicate that the output has been completely
3207 * written. When writing a command completion or response to an
3208 * internal processor, the order of writes has to be such that
3209 * this field is written last.
3215 * Description: This command allows configuration of a PF by the corresponding
3216 * PF driver. This command also allows configuration of a child VF by its parent
3217 * PF driver. The input FID value is used to indicate what function is being
3218 * configured. This allows a PF driver to configure the PF owned by itself or a
3219 * virtual function that is a child of the PF. This command allows to reserve
3220 * resources for a VF by its parent PF. To reverse the process, the command
3221 * should be called with all enables flags cleared for resources. This will free
3222 * allocated resources for the VF and return them to the resource pool. If this
3223 * command is requested by a VF driver to configure or reserve resources, then
3224 * the HWRM shall fail this command. If default MAC address and/or VLAN are
3225 * provided in this command, then the HWRM shall set up appropriate MAC/VLAN
3226 * filters for the function that is being configured. If source properties
3227 * checks are enabled and default MAC address and/or IP address are provided in
3228 * this command, then the HWRM shall set appropriate source property checks
3229 * based on provided MAC and/or IP addresses. The parent PF driver should not
3230 * set MTU/MRU for a VF using this command. This is to allow MTU/MRU setting by
3231 * the VF driver. If the MTU or MRU for a VF is set by the PF driver, then the
3232 * HWRM should ignore it. A function's MTU/MRU should be set prior to allocating
3233 * RX VNICs or TX rings. A PF driver calls hwrm_func_cfg to allocate resources
3234 * for itself or its children VFs. All function drivers shall call hwrm_func_cfg
3235 * to reserve resources. A request to hwrm_func_cfg may not be fully granted;
3236 * that is, a request for resources may be larger than what can be supported by
3237 * the device and the HWRM will allocate the best set of resources available,
3238 * but that may be less than requested. If all the amounts requested could not
3239 * be fulfilled, the HWRM shall allocate what it could and return a status code
3240 * of success. A function driver should call hwrm_func_qcfg immediately after
3241 * hwrm_func_cfg to determine what resources were assigned to the configured
3242 * function. A call by a PF driver to hwrm_func_cfg to allocate resources for
3243 * itself shall only allocate resources for the PF driver to use, not for its
3244 * children VFs. Likewise, a call to hwrm_func_qcfg shall return the resources
3245 * available for the PF driver to use, not what is available to its children
3248 /* Input (88 bytes) */
3249 struct hwrm_func_cfg_input {
3252 * This value indicates what type of request this is. The format
3253 * for the rest of the command is determined by this field.
3257 * This value indicates the what completion ring the request
3258 * will be optionally completed on. If the value is -1, then no
3259 * CR completion will be generated. Any other value must be a
3260 * valid CR ring_id value for this function.
3263 /* This value indicates the command sequence number. */
3266 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3267 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3272 * This is the host address where the response will be written
3273 * when the request is complete. This area must be 16B aligned
3274 * and must be cleared to zero before the request is made.
3278 * Function ID of the function that is being configured. If set
3279 * to 0xFF... (All Fs), then the configuration is for the
3280 * requesting function.
3286 * When this bit is '1', the function is disabled with source
3287 * MAC address check. This is an anti-spoofing check. If this
3288 * flag is set, then the function shall be configured to
3289 * disallow transmission of frames with the source MAC address
3290 * that is configured for this function.
3292 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE \
3295 * When this bit is '1', the function is enabled with source MAC
3296 * address check. This is an anti-spoofing check. If this flag
3297 * is set, then the function shall be configured to allow
3298 * transmission of frames with the source MAC address that is
3299 * configured for this function.
3301 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE \
3304 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_MASK UINT32_C(0x1fc)
3305 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_SFT 2
3307 * Standard TX Ring mode is used for the allocation of TX ring
3308 * and underlying scheduling resources that allow bandwidth
3309 * reservation and limit settings on the queried function. If
3310 * set to 1, then standard TX ring mode is requested to be
3311 * enabled on the function being configured.
3313 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_ENABLE \
3316 * Standard TX Ring mode is used for the allocation of TX ring
3317 * and underlying scheduling resources that allow bandwidth
3318 * reservation and limit settings on the queried function. If
3319 * set to 1, then the standard TX ring mode is requested to be
3320 * disabled on the function being configured. In this extended
3321 * TX ring resource mode, the minimum and maximum bandwidth
3322 * settings are not supported to allow the allocation of TX
3323 * rings to span multiple scheduler nodes.
3325 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_DISABLE \
3328 * If this bit is set, virtual mac address configured in this
3329 * command will be persistent over warm boot.
3331 #define HWRM_FUNC_CFG_INPUT_FLAGS_VIRT_MAC_PERSIST UINT32_C(0x800)
3333 * This bit only applies to the VF. If this bit is set, the
3334 * statistic context counters will not be cleared when the
3335 * statistic context is freed or a function reset is called on
3336 * VF. This bit will be cleared when the PF is unloaded or a
3337 * function reset is called on the PF.
3339 #define HWRM_FUNC_CFG_INPUT_FLAGS_NO_AUTOCLEAR_STATISTIC \
3342 * This bit requests that the firmware test to see if all the
3343 * assets requested in this command (i.e. number of TX rings)
3344 * are available. The firmware will return an error if the
3345 * requested assets are not available. The firwmare will NOT
3346 * reserve the assets if they are available.
3348 #define HWRM_FUNC_CFG_INPUT_FLAGS_TX_ASSETS_TEST UINT32_C(0x2000)
3350 /* This bit must be '1' for the mtu field to be configured. */
3351 #define HWRM_FUNC_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
3352 /* This bit must be '1' for the mru field to be configured. */
3353 #define HWRM_FUNC_CFG_INPUT_ENABLES_MRU UINT32_C(0x2)
3355 * This bit must be '1' for the num_rsscos_ctxs field to be
3358 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RSSCOS_CTXS UINT32_C(0x4)
3360 * This bit must be '1' for the num_cmpl_rings field to be
3363 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_CMPL_RINGS UINT32_C(0x8)
3364 /* This bit must be '1' for the num_tx_rings field to be configured. */
3365 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_TX_RINGS UINT32_C(0x10)
3366 /* This bit must be '1' for the num_rx_rings field to be configured. */
3367 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RX_RINGS UINT32_C(0x20)
3368 /* This bit must be '1' for the num_l2_ctxs field to be configured. */
3369 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_L2_CTXS UINT32_C(0x40)
3370 /* This bit must be '1' for the num_vnics field to be configured. */
3371 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_VNICS UINT32_C(0x80)
3373 * This bit must be '1' for the num_stat_ctxs field to be
3376 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_STAT_CTXS UINT32_C(0x100)
3378 * This bit must be '1' for the dflt_mac_addr field to be
3381 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x200)
3382 /* This bit must be '1' for the dflt_vlan field to be configured. */
3383 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN UINT32_C(0x400)
3384 /* This bit must be '1' for the dflt_ip_addr field to be configured. */
3385 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_IP_ADDR UINT32_C(0x800)
3386 /* This bit must be '1' for the min_bw field to be configured. */
3387 #define HWRM_FUNC_CFG_INPUT_ENABLES_MIN_BW UINT32_C(0x1000)
3388 /* This bit must be '1' for the max_bw field to be configured. */
3389 #define HWRM_FUNC_CFG_INPUT_ENABLES_MAX_BW UINT32_C(0x2000)
3391 * This bit must be '1' for the async_event_cr field to be
3394 #define HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4000)
3396 * This bit must be '1' for the vlan_antispoof_mode field to be
3399 #define HWRM_FUNC_CFG_INPUT_ENABLES_VLAN_ANTISPOOF_MODE UINT32_C(0x8000)
3401 * This bit must be '1' for the allowed_vlan_pris field to be
3404 #define HWRM_FUNC_CFG_INPUT_ENABLES_ALLOWED_VLAN_PRIS UINT32_C(0x10000)
3405 /* This bit must be '1' for the evb_mode field to be configured. */
3406 #define HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE UINT32_C(0x20000)
3408 * This bit must be '1' for the num_mcast_filters field to be
3411 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_MCAST_FILTERS UINT32_C(0x40000)
3413 * This bit must be '1' for the num_hw_ring_grps field to be
3416 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS UINT32_C(0x80000)
3419 * The maximum transmission unit of the function. The HWRM
3420 * should make sure that the mtu of the function does not exceed
3421 * the mtu of the physical port that this function is associated
3422 * with. In addition to configuring mtu per function, it is
3423 * possible to configure mtu per transmit ring. By default, the
3424 * mtu of each transmit ring associated with a function is equal
3425 * to the mtu of the function. The HWRM should make sure that
3426 * the mtu of each transmit ring that is assigned to a function
3431 * The maximum receive unit of the function. The HWRM should
3432 * make sure that the mru of the function does not exceed the
3433 * mru of the physical port that this function is associated
3434 * with. In addition to configuring mru per function, it is
3435 * possible to configure mru per vnic. By default, the mru of
3436 * each vnic associated with a function is equal to the mru of
3437 * the function. The HWRM should make sure that the mru of each
3438 * vnic that is assigned to a function has a valid mru.
3440 uint16_t num_rsscos_ctxs;
3441 /* The number of RSS/COS contexts requested for the function. */
3442 uint16_t num_cmpl_rings;
3444 * The number of completion rings requested for the function.
3445 * This does not include the rings allocated to any children
3448 uint16_t num_tx_rings;
3450 * The number of transmit rings requested for the function. This
3451 * does not include the rings allocated to any children
3454 uint16_t num_rx_rings;
3456 * The number of receive rings requested for the function. This
3457 * does not include the rings allocated to any children
3460 uint16_t num_l2_ctxs;
3461 /* The requested number of L2 contexts for the function. */
3463 /* The requested number of vnics for the function. */
3464 uint16_t num_stat_ctxs;
3465 /* The requested number of statistic contexts for the function. */
3466 uint16_t num_hw_ring_grps;
3468 * The number of HW ring groups that should be reserved for this
3471 uint8_t dflt_mac_addr[6];
3472 /* The default MAC address for the function being configured. */
3475 * The default VLAN for the function being configured. This
3476 * field's format is same as 802.1Q Tag's Tag Control
3477 * Information (TCI) format that includes both Priority Code
3478 * Point (PCP) and VLAN Identifier (VID).
3480 uint32_t dflt_ip_addr[4];
3482 * The default IP address for the function being configured.
3483 * This address is only used in enabling source property check.
3487 * Minimum BW allocated for this function. The HWRM will
3488 * translate this value into byte counter and time interval used
3489 * for the scheduler inside the device.
3491 /* The bandwidth value. */
3492 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
3493 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_SFT 0
3494 /* The granularity of the value (bits or bytes). */
3495 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE UINT32_C(0x10000000)
3496 /* Value is in bits. */
3497 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3498 /* Value is in bytes. */
3499 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3500 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_LAST \
3501 FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES
3502 /* bw_value_unit is 3 b */
3503 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MASK \
3504 UINT32_C(0xe0000000)
3505 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
3506 /* Value is in Mb or MB (base 10). */
3507 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
3508 (UINT32_C(0x0) << 29)
3509 /* Value is in Kb or KB (base 10). */
3510 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO \
3511 (UINT32_C(0x2) << 29)
3512 /* Value is in bits or bytes. */
3513 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE \
3514 (UINT32_C(0x4) << 29)
3515 /* Value is in Gb or GB (base 10). */
3516 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
3517 (UINT32_C(0x6) << 29)
3518 /* Value is in 1/100th of a percentage of total bandwidth. */
3519 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
3520 (UINT32_C(0x1) << 29)
3522 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
3523 (UINT32_C(0x7) << 29)
3524 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_LAST \
3525 FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID
3528 * Maximum BW allocated for this function. The HWRM will
3529 * translate this value into byte counter and time interval used
3530 * for the scheduler inside the device.
3532 /* The bandwidth value. */
3533 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK \
3535 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_SFT 0
3536 /* The granularity of the value (bits or bytes). */
3537 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
3538 /* Value is in bits. */
3539 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3540 /* Value is in bytes. */
3541 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3542 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_LAST \
3543 FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES
3544 /* bw_value_unit is 3 b */
3545 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
3546 UINT32_C(0xe0000000)
3547 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
3548 /* Value is in Mb or MB (base 10). */
3549 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
3550 (UINT32_C(0x0) << 29)
3551 /* Value is in Kb or KB (base 10). */
3552 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
3553 (UINT32_C(0x2) << 29)
3554 /* Value is in bits or bytes. */
3555 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
3556 (UINT32_C(0x4) << 29)
3557 /* Value is in Gb or GB (base 10). */
3558 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
3559 (UINT32_C(0x6) << 29)
3560 /* Value is in 1/100th of a percentage of total bandwidth. */
3561 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
3562 (UINT32_C(0x1) << 29)
3564 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
3565 (UINT32_C(0x7) << 29)
3566 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
3567 FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
3568 uint16_t async_event_cr;
3570 * ID of the target completion ring for receiving asynchronous
3571 * event completions. If this field is not valid, then the HWRM
3572 * shall use the default completion ring of the function that is
3573 * being configured as the target completion ring for providing
3574 * any asynchronous event completions for that function. If this
3575 * field is valid, then the HWRM shall use the completion ring
3576 * identified by this ID as the target completion ring for
3577 * providing any asynchronous event completions for the function
3578 * that is being configured.
3580 uint8_t vlan_antispoof_mode;
3581 /* VLAN Anti-spoofing mode. */
3582 /* No VLAN anti-spoofing checks are enabled */
3583 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK UINT32_C(0x0)
3584 /* Validate VLAN against the configured VLAN(s) */
3585 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN \
3587 /* Insert VLAN if it does not exist, otherwise discard */
3588 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE \
3591 * Insert VLAN if it does not exist, override
3595 HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN \
3597 uint8_t allowed_vlan_pris;
3599 * This bit field defines VLAN PRIs that are allowed on this
3600 * function. If nth bit is set, then VLAN PRI n is allowed on
3605 * The HWRM shall allow a PF driver to change EVB mode for the
3606 * partition it belongs to. The HWRM shall not allow a VF driver
3607 * to change the EVB mode. The HWRM shall take into account the
3608 * switching of EVB mode from one to another and reconfigure
3609 * hardware resources as appropriately. The switching from VEB
3610 * to VEPA mode requires the disabling of the loopback traffic.
3611 * Additionally, source knock outs are handled differently in
3612 * VEB and VEPA modes.
3614 /* No Edge Virtual Bridging (EVB) */
3615 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
3616 /* Virtual Ethernet Bridge (VEB) */
3617 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEB UINT32_C(0x1)
3618 /* Virtual Ethernet Port Aggregator (VEPA) */
3619 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEPA UINT32_C(0x2)
3621 uint16_t num_mcast_filters;
3623 * The number of multicast filters that should be reserved for
3624 * this function on the RX side.
3626 } __attribute__((packed));
3628 /* Output (16 bytes) */
3629 struct hwrm_func_cfg_output {
3630 uint16_t error_code;
3632 * Pass/Fail or error type Note: receiver to verify the in
3633 * parameters, and fail the call with an error when appropriate
3636 /* This field returns the type of original request. */
3638 /* This field provides original sequence number of the command. */
3641 * This field is the length of the response in bytes. The last
3642 * byte of the response is a valid flag that will read as '1'
3643 * when the command has been completely written to memory.
3651 * This field is used in Output records to indicate that the
3652 * output is completely written to RAM. This field should be
3653 * read as '1' to indicate that the output has been completely
3654 * written. When writing a command completion or response to an
3655 * internal processor, the order of writes has to be such that
3656 * this field is written last.
3658 } __attribute__((packed));
3660 /* hwrm_func_qstats */
3662 * Description: This command returns statistics of a function. The input FID
3663 * value is used to indicate what function is being queried. This allows a
3664 * physical function driver to query virtual functions that are children of the
3665 * physical function. The HWRM shall return any unsupported counter with a value
3666 * of 0xFFFFFFFF for 32-bit counters and 0xFFFFFFFFFFFFFFFF for 64-bit counters.
3668 /* Input (24 bytes) */
3669 struct hwrm_func_qstats_input {
3672 * This value indicates what type of request this is. The format
3673 * for the rest of the command is determined by this field.
3677 * This value indicates the what completion ring the request
3678 * will be optionally completed on. If the value is -1, then no
3679 * CR completion will be generated. Any other value must be a
3680 * valid CR ring_id value for this function.
3683 /* This value indicates the command sequence number. */
3686 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3687 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3692 * This is the host address where the response will be written
3693 * when the request is complete. This area must be 16B aligned
3694 * and must be cleared to zero before the request is made.
3698 * Function ID of the function that is being queried. 0xFF...
3699 * (All Fs) if the query is for the requesting function.
3701 uint16_t unused_0[3];
3702 } __attribute__((packed));
3704 /* Output (176 bytes) */
3705 struct hwrm_func_qstats_output {
3706 uint16_t error_code;
3708 * Pass/Fail or error type Note: receiver to verify the in
3709 * parameters, and fail the call with an error when appropriate
3712 /* This field returns the type of original request. */
3714 /* This field provides original sequence number of the command. */
3717 * This field is the length of the response in bytes. The last
3718 * byte of the response is a valid flag that will read as '1'
3719 * when the command has been completely written to memory.
3721 uint64_t tx_ucast_pkts;
3722 /* Number of transmitted unicast packets on the function. */
3723 uint64_t tx_mcast_pkts;
3724 /* Number of transmitted multicast packets on the function. */
3725 uint64_t tx_bcast_pkts;
3726 /* Number of transmitted broadcast packets on the function. */
3727 uint64_t tx_err_pkts;
3729 * Number of transmitted packets that were discarded due to
3730 * internal NIC resource problems. For transmit, this can only
3731 * happen if TMP is configured to allow dropping in HOL blocking
3732 * conditions, which is not a normal configuration.
3734 uint64_t tx_drop_pkts;
3736 * Number of dropped packets on transmit path on the function.
3737 * These are packets that have been marked for drop by the TE
3738 * CFA block or are packets that exceeded the transmit MTU limit
3741 uint64_t tx_ucast_bytes;
3742 /* Number of transmitted bytes for unicast traffic on the function. */
3743 uint64_t tx_mcast_bytes;
3745 * Number of transmitted bytes for multicast traffic on the
3748 uint64_t tx_bcast_bytes;
3750 * Number of transmitted bytes for broadcast traffic on the
3753 uint64_t rx_ucast_pkts;
3754 /* Number of received unicast packets on the function. */
3755 uint64_t rx_mcast_pkts;
3756 /* Number of received multicast packets on the function. */
3757 uint64_t rx_bcast_pkts;
3758 /* Number of received broadcast packets on the function. */
3759 uint64_t rx_err_pkts;
3761 * Number of received packets that were discarded on the
3762 * function due to resource limitations. This can happen for 3
3763 * reasons. # The BD used for the packet has a bad format. #
3764 * There were no BDs available in the ring for the packet. #
3765 * There were no BDs available on-chip for the packet.
3767 uint64_t rx_drop_pkts;
3769 * Number of dropped packets on received path on the function.
3770 * These are packets that have been marked for drop by the RE
3773 uint64_t rx_ucast_bytes;
3774 /* Number of received bytes for unicast traffic on the function. */
3775 uint64_t rx_mcast_bytes;
3776 /* Number of received bytes for multicast traffic on the function. */
3777 uint64_t rx_bcast_bytes;
3778 /* Number of received bytes for broadcast traffic on the function. */
3779 uint64_t rx_agg_pkts;
3780 /* Number of aggregated unicast packets on the function. */
3781 uint64_t rx_agg_bytes;
3782 /* Number of aggregated unicast bytes on the function. */
3783 uint64_t rx_agg_events;
3784 /* Number of aggregation events on the function. */
3785 uint64_t rx_agg_aborts;
3786 /* Number of aborted aggregations on the function. */
3793 * This field is used in Output records to indicate that the
3794 * output is completely written to RAM. This field should be
3795 * read as '1' to indicate that the output has been completely
3796 * written. When writing a command completion or response to an
3797 * internal processor, the order of writes has to be such that
3798 * this field is written last.
3800 } __attribute__((packed));
3802 /* hwrm_func_clr_stats */
3804 * Description: This command clears statistics of a function. The input FID
3805 * value is used to indicate what function's statistics is being cleared. This
3806 * allows a physical function driver to clear statistics of virtual functions
3807 * that are children of the physical function.
3809 /* Input (24 bytes) */
3810 struct hwrm_func_clr_stats_input {
3813 * This value indicates what type of request this is. The format
3814 * for the rest of the command is determined by this field.
3818 * This value indicates the what completion ring the request
3819 * will be optionally completed on. If the value is -1, then no
3820 * CR completion will be generated. Any other value must be a
3821 * valid CR ring_id value for this function.
3824 /* This value indicates the command sequence number. */
3827 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3828 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3833 * This is the host address where the response will be written
3834 * when the request is complete. This area must be 16B aligned
3835 * and must be cleared to zero before the request is made.
3839 * Function ID of the function. 0xFF... (All Fs) if the query is
3840 * for the requesting function.
3842 uint16_t unused_0[3];
3843 } __attribute__((packed));
3845 /* Output (16 bytes) */
3846 struct hwrm_func_clr_stats_output {
3847 uint16_t error_code;
3849 * Pass/Fail or error type Note: receiver to verify the in
3850 * parameters, and fail the call with an error when appropriate
3853 /* This field returns the type of original request. */
3855 /* This field provides original sequence number of the command. */
3858 * This field is the length of the response in bytes. The last
3859 * byte of the response is a valid flag that will read as '1'
3860 * when the command has been completely written to memory.
3868 * This field is used in Output records to indicate that the
3869 * output is completely written to RAM. This field should be
3870 * read as '1' to indicate that the output has been completely
3871 * written. When writing a command completion or response to an
3872 * internal processor, the order of writes has to be such that
3873 * this field is written last.
3875 } __attribute__((packed));
3877 /* hwrm_func_vf_vnic_ids_query */
3878 /* Description: This command is used to query vf vnic ids. */
3879 /* Input (32 bytes) */
3880 struct hwrm_func_vf_vnic_ids_query_input {
3883 * This value indicates what type of request this is. The format
3884 * for the rest of the command is determined by this field.
3888 * This value indicates the what completion ring the request
3889 * will be optionally completed on. If the value is -1, then no
3890 * CR completion will be generated. Any other value must be a
3891 * valid CR ring_id value for this function.
3894 /* This value indicates the command sequence number. */
3897 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3898 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3903 * This is the host address where the response will be written
3904 * when the request is complete. This area must be 16B aligned
3905 * and must be cleared to zero before the request is made.
3909 * This value is used to identify a Virtual Function (VF). The
3910 * scope of VF ID is local within a PF.
3914 uint32_t max_vnic_id_cnt;
3915 /* Max number of vnic ids in vnic id table */
3916 uint64_t vnic_id_tbl_addr;
3917 /* This is the address for VF VNIC ID table */
3918 } __attribute__((packed));
3920 /* Output (16 bytes) */
3921 struct hwrm_func_vf_vnic_ids_query_output {
3922 uint16_t error_code;
3924 * Pass/Fail or error type Note: receiver to verify the in
3925 * parameters, and fail the call with an error when appropriate
3928 /* This field returns the type of original request. */
3930 /* This field provides original sequence number of the command. */
3933 * This field is the length of the response in bytes. The last
3934 * byte of the response is a valid flag that will read as '1'
3935 * when the command has been completely written to memory.
3937 uint32_t vnic_id_cnt;
3939 * Actual number of vnic ids Each VNIC ID is written as a 32-bit
3947 * This field is used in Output records to indicate that the
3948 * output is completely written to RAM. This field should be
3949 * read as '1' to indicate that the output has been completely
3950 * written. When writing a command completion or response to an
3951 * internal processor, the order of writes has to be such that
3952 * this field is written last.
3954 } __attribute__((packed));
3956 /* hwrm_func_drv_rgtr */
3958 * Description: This command is used by the function driver to register its
3959 * information with the HWRM. A function driver shall implement this command. A
3960 * function driver shall use this command during the driver initialization right
3961 * after the HWRM version discovery and default ring resources allocation.
3963 /* Input (80 bytes) */
3964 struct hwrm_func_drv_rgtr_input {
3967 * This value indicates what type of request this is. The format
3968 * for the rest of the command is determined by this field.
3972 * This value indicates the what completion ring the request
3973 * will be optionally completed on. If the value is -1, then no
3974 * CR completion will be generated. Any other value must be a
3975 * valid CR ring_id value for this function.
3978 /* This value indicates the command sequence number. */
3981 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3982 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3987 * This is the host address where the response will be written
3988 * when the request is complete. This area must be 16B aligned
3989 * and must be cleared to zero before the request is made.
3993 * When this bit is '1', the function driver is requesting all
3994 * requests from its children VF drivers to be forwarded to
3995 * itself. This flag can only be set by the PF driver. If a VF
3996 * driver sets this flag, it should be ignored by the HWRM.
3998 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
4000 * When this bit is '1', the function is requesting none of the
4001 * requests from its children VF drivers to be forwarded to
4002 * itself. This flag can only be set by the PF driver. If a VF
4003 * driver sets this flag, it should be ignored by the HWRM.
4005 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4007 /* This bit must be '1' for the os_type field to be configured. */
4008 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4009 /* This bit must be '1' for the ver field to be configured. */
4010 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4011 /* This bit must be '1' for the timestamp field to be configured. */
4012 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4013 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4014 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_INPUT_FWD UINT32_C(0x8)
4016 * This bit must be '1' for the async_event_fwd field to be
4019 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
4022 * This value indicates the type of OS. The values are based on
4023 * CIM_OperatingSystem.mof file as published by the DMTF.
4026 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
4027 /* Other OS not listed below. */
4028 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1)
4030 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe)
4032 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
4034 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
4036 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24)
4038 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
4039 /* VMware ESXi OS. */
4040 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68)
4041 /* Microsoft Windows 8 64-bit OS. */
4042 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73)
4043 /* Microsoft Windows Server 2012 R2 OS. */
4044 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
4046 /* This is the major version of the driver. */
4048 /* This is the minor version of the driver. */
4050 /* This is the update version of the driver. */
4055 * This is a 32-bit timestamp provided by the driver for keep
4056 * alive. The timestamp is in multiples of 1ms.
4059 uint32_t vf_req_fwd[8];
4061 * This is a 256-bit bit mask provided by the PF driver for
4062 * letting the HWRM know what commands issued by the VF driver
4063 * to the HWRM should be forwarded to the PF driver. Nth bit
4064 * refers to the Nth req_type. Setting Nth bit to 1 indicates
4065 * that requests from the VF driver with req_type equal to N
4066 * shall be forwarded to the parent PF driver. This field is not
4067 * valid for the VF driver.
4069 uint32_t async_event_fwd[8];
4071 * This is a 256-bit bit mask provided by the function driver
4072 * (PF or VF driver) to indicate the list of asynchronous event
4073 * completions to be forwarded. Nth bit refers to the Nth
4074 * event_id. Setting Nth bit to 1 by the function driver shall
4075 * result in the HWRM forwarding asynchronous event completion
4076 * with event_id equal to N. If all bits are set to 0 (value of
4077 * 0), then the HWRM shall not forward any asynchronous event
4078 * completion to this function driver.
4080 } __attribute__((packed));
4082 /* Output (16 bytes) */
4083 struct hwrm_func_drv_rgtr_output {
4084 uint16_t error_code;
4086 * Pass/Fail or error type Note: receiver to verify the in
4087 * parameters, and fail the call with an error when appropriate
4090 /* This field returns the type of original request. */
4092 /* This field provides original sequence number of the command. */
4095 * This field is the length of the response in bytes. The last
4096 * byte of the response is a valid flag that will read as '1'
4097 * when the command has been completely written to memory.
4105 * This field is used in Output records to indicate that the
4106 * output is completely written to RAM. This field should be
4107 * read as '1' to indicate that the output has been completely
4108 * written. When writing a command completion or response to an
4109 * internal processor, the order of writes has to be such that
4110 * this field is written last.
4112 } __attribute__((packed));
4114 /* hwrm_func_drv_unrgtr */
4116 * Description: This command is used by the function driver to un register with
4117 * the HWRM. A function driver shall implement this command. A function driver
4118 * shall use this command during the driver unloading.
4120 /* Input (24 bytes) */
4121 struct hwrm_func_drv_unrgtr_input {
4124 * This value indicates what type of request this is. The format
4125 * for the rest of the command is determined by this field.
4129 * This value indicates the what completion ring the request
4130 * will be optionally completed on. If the value is -1, then no
4131 * CR completion will be generated. Any other value must be a
4132 * valid CR ring_id value for this function.
4135 /* This value indicates the command sequence number. */
4138 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4139 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4144 * This is the host address where the response will be written
4145 * when the request is complete. This area must be 16B aligned
4146 * and must be cleared to zero before the request is made.
4150 * When this bit is '1', the function driver is notifying the
4151 * HWRM to prepare for the shutdown.
4153 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4156 } __attribute__((packed));
4158 /* Output (16 bytes) */
4159 struct hwrm_func_drv_unrgtr_output {
4160 uint16_t error_code;
4162 * Pass/Fail or error type Note: receiver to verify the in
4163 * parameters, and fail the call with an error when appropriate
4166 /* This field returns the type of original request. */
4168 /* This field provides original sequence number of the command. */
4171 * This field is the length of the response in bytes. The last
4172 * byte of the response is a valid flag that will read as '1'
4173 * when the command has been completely written to memory.
4181 * This field is used in Output records to indicate that the
4182 * output is completely written to RAM. This field should be
4183 * read as '1' to indicate that the output has been completely
4184 * written. When writing a command completion or response to an
4185 * internal processor, the order of writes has to be such that
4186 * this field is written last.
4188 } __attribute__((packed));
4190 /* hwrm_func_buf_rgtr */
4192 * Description: This command is used by the PF driver to register buffers used
4193 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4194 * register buffers for each PF-VF channel. A parent PF may issue this command
4195 * per child VF. If VF ID is not valid, then this command is used to register
4196 * buffers for all children VFs of the PF.
4198 /* Input (128 bytes) */
4199 struct hwrm_func_buf_rgtr_input {
4202 * This value indicates what type of request this is. The format
4203 * for the rest of the command is determined by this field.
4207 * This value indicates the what completion ring the request
4208 * will be optionally completed on. If the value is -1, then no
4209 * CR completion will be generated. Any other value must be a
4210 * valid CR ring_id value for this function.
4213 /* This value indicates the command sequence number. */
4216 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4217 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4222 * This is the host address where the response will be written
4223 * when the request is complete. This area must be 16B aligned
4224 * and must be cleared to zero before the request is made.
4227 /* This bit must be '1' for the vf_id field to be configured. */
4228 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4229 /* This bit must be '1' for the err_buf_addr field to be configured. */
4230 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_ERR_BUF_ADDR UINT32_C(0x2)
4233 * This value is used to identify a Virtual Function (VF). The
4234 * scope of VF ID is local within a PF.
4236 uint16_t req_buf_num_pages;
4238 * This field represents the number of pages used for request
4241 uint16_t req_buf_page_size;
4242 /* This field represents the page size used for request buffer(s). */
4244 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_16B UINT32_C(0x4)
4246 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4K UINT32_C(0xc)
4248 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_8K UINT32_C(0xd)
4250 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_64K UINT32_C(0x10)
4252 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_2M UINT32_C(0x15)
4254 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4M UINT32_C(0x16)
4256 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_1G UINT32_C(0x1e)
4257 uint16_t req_buf_len;
4258 /* The length of the request buffer per VF in bytes. */
4259 uint16_t resp_buf_len;
4260 /* The length of the response buffer in bytes. */
4263 uint64_t req_buf_page_addr[10];
4264 /* This field represents the page address of req buffer. */
4265 uint64_t error_buf_addr;
4267 * This field is used to receive the error reporting from the
4268 * chipset. Only applicable for PFs.
4270 uint64_t resp_buf_addr;
4271 /* This field is used to receive the response forwarded by the HWRM. */
4272 } __attribute__((packed));
4274 /* Output (16 bytes) */
4275 struct hwrm_func_buf_rgtr_output {
4276 uint16_t error_code;
4278 * Pass/Fail or error type Note: receiver to verify the in
4279 * parameters, and fail the call with an error when appropriate
4282 /* This field returns the type of original request. */
4284 /* This field provides original sequence number of the command. */
4287 * This field is the length of the response in bytes. The last
4288 * byte of the response is a valid flag that will read as '1'
4289 * when the command has been completely written to memory.
4297 * This field is used in Output records to indicate that the
4298 * output is completely written to RAM. This field should be
4299 * read as '1' to indicate that the output has been completely
4300 * written. When writing a command completion or response to an
4301 * internal processor, the order of writes has to be such that
4302 * this field is written last.
4304 } __attribute__((packed));
4306 /* hwrm_func_buf_unrgtr */
4308 * Description: This command is used by the PF driver to unregister buffers used
4309 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4310 * unregister buffers for PF-VF communication. A parent PF may issue this
4311 * command to unregister buffers for communication between the PF and a specific
4312 * VF. If the VF ID is not valid, then this command is used to unregister
4313 * buffers used for communications with all children VFs of the PF.
4315 /* Input (24 bytes) */
4316 struct hwrm_func_buf_unrgtr_input {
4319 * This value indicates what type of request this is. The format
4320 * for the rest of the command is determined by this field.
4324 * This value indicates the what completion ring the request
4325 * will be optionally completed on. If the value is -1, then no
4326 * CR completion will be generated. Any other value must be a
4327 * valid CR ring_id value for this function.
4330 /* This value indicates the command sequence number. */
4333 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4334 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4339 * This is the host address where the response will be written
4340 * when the request is complete. This area must be 16B aligned
4341 * and must be cleared to zero before the request is made.
4344 /* This bit must be '1' for the vf_id field to be configured. */
4345 #define HWRM_FUNC_BUF_UNRGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4348 * This value is used to identify a Virtual Function (VF). The
4349 * scope of VF ID is local within a PF.
4352 } __attribute__((packed));
4354 /* Output (16 bytes) */
4355 struct hwrm_func_buf_unrgtr_output {
4356 uint16_t error_code;
4358 * Pass/Fail or error type Note: receiver to verify the in
4359 * parameters, and fail the call with an error when appropriate
4362 /* This field returns the type of original request. */
4364 /* This field provides original sequence number of the command. */
4367 * This field is the length of the response in bytes. The last
4368 * byte of the response is a valid flag that will read as '1'
4369 * when the command has been completely written to memory.
4377 * This field is used in Output records to indicate that the
4378 * output is completely written to RAM. This field should be
4379 * read as '1' to indicate that the output has been completely
4380 * written. When writing a command completion or response to an
4381 * internal processor, the order of writes has to be such that
4382 * this field is written last.
4384 } __attribute__((packed));
4386 /* hwrm_port_phy_cfg */
4388 * Description: This command configures the PHY device for the port. It allows
4389 * setting of the most generic settings for the PHY. The HWRM shall complete
4390 * this command as soon as PHY settings are configured. They may not be applied
4391 * when the command response is provided. A VF driver shall not be allowed to
4392 * configure PHY using this command. In a network partition mode, a PF driver
4393 * shall not be allowed to configure PHY using this command.
4395 /* Input (56 bytes) */
4396 struct hwrm_port_phy_cfg_input {
4399 * This value indicates what type of request this is. The format
4400 * for the rest of the command is determined by this field.
4404 * This value indicates the what completion ring the request
4405 * will be optionally completed on. If the value is -1, then no
4406 * CR completion will be generated. Any other value must be a
4407 * valid CR ring_id value for this function.
4410 /* This value indicates the command sequence number. */
4413 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4414 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4419 * This is the host address where the response will be written
4420 * when the request is complete. This area must be 16B aligned
4421 * and must be cleared to zero before the request is made.
4425 * When this bit is set to '1', the PHY for the port shall be
4426 * reset. # If this bit is set to 1, then the HWRM shall reset
4427 * the PHY after applying PHY configuration changes specified in
4428 * this command. # In order to guarantee that PHY configuration
4429 * changes specified in this command take effect, the HWRM
4430 * client should set this flag to 1. # If this bit is not set to
4431 * 1, then the HWRM may reset the PHY depending on the current
4432 * PHY configuration and settings specified in this command.
4434 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
4435 /* deprecated bit. Do not use!!! */
4436 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_DEPRECATED UINT32_C(0x2)
4438 * When this bit is set to '1', the link shall be forced to the
4439 * force_link_speed value. When this bit is set to '1', the HWRM
4440 * client should not enable any of the auto negotiation related
4441 * fields represented by auto_XXX fields in this command. When
4442 * this bit is set to '1' and the HWRM client has enabled a
4443 * auto_XXX field in this command, then the HWRM shall ignore
4444 * the enabled auto_XXX field. When this bit is set to zero, the
4445 * link shall be allowed to autoneg.
4447 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
4449 * When this bit is set to '1', the auto-negotiation process
4450 * shall be restarted on the link.
4452 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
4454 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4455 * is requested to be enabled on this link. If EEE is not
4456 * supported on this port, then this flag shall be ignored by
4459 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
4461 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4462 * is requested to be disabled on this link. If EEE is not
4463 * supported on this port, then this flag shall be ignored by
4466 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
4468 * When this bit is set to '1' and EEE is enabled on this link,
4469 * then TX LPI is requested to be enabled on the link. If EEE is
4470 * not supported on this port, then this flag shall be ignored
4471 * by the HWRM. If EEE is disabled on this port, then this flag
4472 * shall be ignored by the HWRM.
4474 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40)
4476 * When this bit is set to '1' and EEE is enabled on this link,
4477 * then TX LPI is requested to be disabled on the link. If EEE
4478 * is not supported on this port, then this flag shall be
4479 * ignored by the HWRM. If EEE is disabled on this port, then
4480 * this flag shall be ignored by the HWRM.
4482 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
4484 * When set to 1, then the HWRM shall enable FEC
4485 * autonegotitation on this port if supported. When set to 0,
4486 * then this flag shall be ignored. If FEC autonegotiation is
4487 * not supported, then the HWRM shall ignore this flag.
4489 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100)
4491 * When set to 1, then the HWRM shall disable FEC
4492 * autonegotiation on this port if supported. When set to 0,
4493 * then this flag shall be ignored. If FEC autonegotiation is
4494 * not supported, then the HWRM shall ignore this flag.
4496 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE \
4499 * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
4500 * Code) on this port if supported. When set to 0, then this
4501 * flag shall be ignored. If FEC CLAUSE 74 is not supported,
4502 * then the HWRM shall ignore this flag.
4504 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE \
4507 * When set to 1, then the HWRM shall disable FEC CLAUSE 74
4508 * (Fire Code) on this port if supported. When set to 0, then
4509 * this flag shall be ignored. If FEC CLAUSE 74 is not
4510 * supported, then the HWRM shall ignore this flag.
4512 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE \
4515 * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
4516 * Solomon) on this port if supported. When set to 0, then this
4517 * flag shall be ignored. If FEC CLAUSE 91 is not supported,
4518 * then the HWRM shall ignore this flag.
4520 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE \
4523 * When set to 1, then the HWRM shall disable FEC CLAUSE 91
4524 * (Reed Solomon) on this port if supported. When set to 0, then
4525 * this flag shall be ignored. If FEC CLAUSE 91 is not
4526 * supported, then the HWRM shall ignore this flag.
4528 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE \
4531 * When this bit is set to '1', the link shall be forced to be
4532 * taken down. # When this bit is set to '1", all other command
4533 * input settings related to the link speed shall be ignored.
4534 * Once the link state is forced down, it can be explicitly
4535 * cleared from that state by setting this flag to '0'. # If
4536 * this flag is set to '0', then the link shall be cleared from
4537 * forced down state if the link is in forced down state. There
4538 * may be conditions (e.g. out-of-band or sideband configuration
4539 * changes for the link) outside the scope of the HWRM
4540 * implementation that may clear forced down link state.
4542 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DWN UINT32_C(0x4000)
4544 /* This bit must be '1' for the auto_mode field to be configured. */
4545 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
4546 /* This bit must be '1' for the auto_duplex field to be configured. */
4547 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
4548 /* This bit must be '1' for the auto_pause field to be configured. */
4549 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
4551 * This bit must be '1' for the auto_link_speed field to be
4554 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
4556 * This bit must be '1' for the auto_link_speed_mask field to be
4559 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
4561 /* This bit must be '1' for the wirespeed field to be configured. */
4562 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20)
4563 /* This bit must be '1' for the lpbk field to be configured. */
4564 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
4565 /* This bit must be '1' for the preemphasis field to be configured. */
4566 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
4567 /* This bit must be '1' for the force_pause field to be configured. */
4568 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
4570 * This bit must be '1' for the eee_link_speed_mask field to be
4573 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
4575 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
4576 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
4578 /* Port ID of port that is to be configured. */
4579 uint16_t force_link_speed;
4581 * This is the speed that will be used if the force bit is '1'.
4582 * If unsupported speed is selected, an error will be generated.
4584 /* 100Mb link speed */
4585 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4586 /* 1Gb link speed */
4587 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4588 /* 2Gb link speed */
4589 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4590 /* 2.5Gb link speed */
4591 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4592 /* 10Gb link speed */
4593 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4594 /* 20Mb link speed */
4595 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4596 /* 25Gb link speed */
4597 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4598 /* 40Gb link speed */
4599 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
4600 /* 50Gb link speed */
4601 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
4602 /* 100Gb link speed */
4603 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
4604 /* 10Mb link speed */
4605 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
4608 * This value is used to identify what autoneg mode is used when
4609 * the link speed is not being forced.
4612 * Disable autoneg or autoneg disabled. No
4613 * speeds are selected.
4615 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0)
4616 /* Select all possible speeds for autoneg mode. */
4617 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
4619 * Select only the auto_link_speed speed for
4620 * autoneg mode. This mode has been DEPRECATED.
4621 * An HWRM client should not use this mode.
4623 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
4625 * Select the auto_link_speed or any speed below
4626 * that speed for autoneg. This mode has been
4627 * DEPRECATED. An HWRM client should not use
4630 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
4632 * Select the speeds based on the corresponding
4633 * link speed mask value that is provided.
4635 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
4636 uint8_t auto_duplex;
4638 * This is the duplex setting that will be used if the
4639 * autoneg_mode is "one_speed" or "one_or_below".
4641 /* Half Duplex will be requested. */
4642 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0)
4643 /* Full duplex will be requested. */
4644 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1)
4645 /* Both Half and Full dupex will be requested. */
4646 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2)
4649 * This value is used to configure the pause that will be used
4650 * for autonegotiation. Add text on the usage of auto_pause and
4654 * When this bit is '1', Generation of tx pause messages has
4655 * been requested. Disabled otherwise.
4657 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
4659 * When this bit is '1', Reception of rx pause messages has been
4660 * requested. Disabled otherwise.
4662 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
4664 * When set to 1, the advertisement of pause is enabled. # When
4665 * the auto_mode is not set to none and this flag is set to 1,
4666 * then the auto_pause bits on this port are being advertised
4667 * and autoneg pause results are being interpreted. # When the
4668 * auto_mode is not set to none and this flag is set to 0, the
4669 * pause is forced as indicated in force_pause, and also
4670 * advertised as auto_pause bits, but the autoneg results are
4671 * not interpreted since the pause configuration is being
4672 * forced. # When the auto_mode is set to none and this flag is
4673 * set to 1, auto_pause bits should be ignored and should be set
4676 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
4678 uint16_t auto_link_speed;
4680 * This is the speed that will be used if the autoneg_mode is
4681 * "one_speed" or "one_or_below". If an unsupported speed is
4682 * selected, an error will be generated.
4684 /* 100Mb link speed */
4685 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
4686 /* 1Gb link speed */
4687 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
4688 /* 2Gb link speed */
4689 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
4690 /* 2.5Gb link speed */
4691 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
4692 /* 10Gb link speed */
4693 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
4694 /* 20Mb link speed */
4695 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
4696 /* 25Gb link speed */
4697 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
4698 /* 40Gb link speed */
4699 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
4700 /* 50Gb link speed */
4701 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
4702 /* 100Gb link speed */
4703 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
4704 /* 10Mb link speed */
4705 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
4706 uint16_t auto_link_speed_mask;
4708 * This is a mask of link speeds that will be used if
4709 * autoneg_mode is "mask". If unsupported speed is enabled an
4710 * error will be generated.
4712 /* 100Mb link speed (Half-duplex) */
4713 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
4715 /* 100Mb link speed (Full-duplex) */
4716 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
4718 /* 1Gb link speed (Half-duplex) */
4719 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
4721 /* 1Gb link speed (Full-duplex) */
4722 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
4724 /* 2Gb link speed */
4725 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
4727 /* 2.5Gb link speed */
4728 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
4730 /* 10Gb link speed */
4731 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4732 /* 20Gb link speed */
4733 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
4734 /* 25Gb link speed */
4735 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
4737 /* 40Gb link speed */
4738 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
4740 /* 50Gb link speed */
4741 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
4743 /* 100Gb link speed */
4744 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
4746 /* 10Mb link speed (Half-duplex) */
4747 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
4749 /* 10Mb link speed (Full-duplex) */
4750 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
4753 /* This value controls the wirespeed feature. */
4754 /* Wirespeed feature is disabled. */
4755 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
4756 /* Wirespeed feature is enabled. */
4757 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_ON UINT32_C(0x1)
4759 /* This value controls the loopback setting for the PHY. */
4760 /* No loopback is selected. Normal operation. */
4761 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
4763 * The HW will be configured with local loopback
4764 * such that host data is sent back to the host
4765 * without modification.
4767 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
4769 * The HW will be configured with remote
4770 * loopback such that port logic will send
4771 * packets back out the transmitter that are
4774 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
4775 uint8_t force_pause;
4777 * This value is used to configure the pause that will be used
4781 * When this bit is '1', Generation of tx pause messages is
4782 * supported. Disabled otherwise.
4784 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
4786 * When this bit is '1', Reception of rx pause messages is
4787 * supported. Disabled otherwise.
4789 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
4791 uint32_t preemphasis;
4793 * This value controls the pre-emphasis to be used for the link.
4794 * Driver should not set this value (use enable.preemphasis = 0)
4795 * unless driver is sure of setting. Normally HWRM FW will
4796 * determine proper pre-emphasis.
4798 uint16_t eee_link_speed_mask;
4800 * Setting for link speed mask that is used to advertise speeds
4801 * during autonegotiation when EEE is enabled. This field is
4802 * valid only when EEE is enabled. The speeds specified in this
4803 * field shall be a subset of speeds specified in
4804 * auto_link_speed_mask. If EEE is enabled,then at least one
4805 * speed shall be provided in this mask.
4808 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
4809 /* 100Mb link speed (Full-duplex) */
4810 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
4812 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
4813 /* 1Gb link speed (Full-duplex) */
4814 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
4816 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
4818 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
4819 /* 10Gb link speed */
4820 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4823 uint32_t tx_lpi_timer;
4826 * Reuested setting of TX LPI timer in microseconds. This field
4827 * is valid only when EEE is enabled and TX LPI is enabled.
4829 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
4830 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
4831 } __attribute__((packed));
4833 /* Output (16 bytes) */
4834 struct hwrm_port_phy_cfg_output {
4835 uint16_t error_code;
4837 * Pass/Fail or error type Note: receiver to verify the in
4838 * parameters, and fail the call with an error when appropriate
4841 /* This field returns the type of original request. */
4843 /* This field provides original sequence number of the command. */
4846 * This field is the length of the response in bytes. The last
4847 * byte of the response is a valid flag that will read as '1'
4848 * when the command has been completely written to memory.
4856 * This field is used in Output records to indicate that the
4857 * output is completely written to RAM. This field should be
4858 * read as '1' to indicate that the output has been completely
4859 * written. When writing a command completion or response to an
4860 * internal processor, the order of writes has to be such that
4861 * this field is written last.
4863 } __attribute__((packed));
4865 /* hwrm_port_phy_qcfg */
4866 /* Description: This command queries the PHY configuration for the port. */
4867 /* Input (24 bytes) */
4868 struct hwrm_port_phy_qcfg_input {
4871 * This value indicates what type of request this is. The format
4872 * for the rest of the command is determined by this field.
4876 * This value indicates the what completion ring the request
4877 * will be optionally completed on. If the value is -1, then no
4878 * CR completion will be generated. Any other value must be a
4879 * valid CR ring_id value for this function.
4882 /* This value indicates the command sequence number. */
4885 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4886 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4891 * This is the host address where the response will be written
4892 * when the request is complete. This area must be 16B aligned
4893 * and must be cleared to zero before the request is made.
4896 /* Port ID of port that is to be queried. */
4897 uint16_t unused_0[3];
4898 } __attribute__((packed));
4900 /* Output (96 bytes) */
4901 struct hwrm_port_phy_qcfg_output {
4902 uint16_t error_code;
4904 * Pass/Fail or error type Note: receiver to verify the in
4905 * parameters, and fail the call with an error when appropriate
4908 /* This field returns the type of original request. */
4910 /* This field provides original sequence number of the command. */
4913 * This field is the length of the response in bytes. The last
4914 * byte of the response is a valid flag that will read as '1'
4915 * when the command has been completely written to memory.
4918 /* This value indicates the current link status. */
4919 /* There is no link or cable detected. */
4920 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0)
4921 /* There is no link, but a cable has been detected. */
4922 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1)
4923 /* There is a link. */
4924 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2)
4926 uint16_t link_speed;
4927 /* This value indicates the current link speed of the connection. */
4928 /* 100Mb link speed */
4929 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1)
4930 /* 1Gb link speed */
4931 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa)
4932 /* 2Gb link speed */
4933 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14)
4934 /* 2.5Gb link speed */
4935 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19)
4936 /* 10Gb link speed */
4937 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64)
4938 /* 20Mb link speed */
4939 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8)
4940 /* 25Gb link speed */
4941 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa)
4942 /* 40Gb link speed */
4943 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190)
4944 /* 50Gb link speed */
4945 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4)
4946 /* 100Gb link speed */
4947 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8)
4948 /* 10Mb link speed */
4949 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff)
4951 /* This value is indicates the duplex of the current connection. */
4952 /* Half Duplex connection. */
4953 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_HALF UINT32_C(0x0)
4954 /* Full duplex connection. */
4955 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_FULL UINT32_C(0x1)
4958 * This value is used to indicate the current pause
4959 * configuration. When autoneg is enabled, this value represents
4960 * the autoneg results of pause configuration.
4963 * When this bit is '1', Generation of tx pause messages is
4964 * supported. Disabled otherwise.
4966 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
4968 * When this bit is '1', Reception of rx pause messages is
4969 * supported. Disabled otherwise.
4971 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
4972 uint16_t support_speeds;
4974 * The supported speeds for the port. This is a bit mask. For
4975 * each speed that is supported, the corrresponding bit will be
4978 /* 100Mb link speed (Half-duplex) */
4979 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
4980 /* 100Mb link speed (Full-duplex) */
4981 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
4982 /* 1Gb link speed (Half-duplex) */
4983 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
4984 /* 1Gb link speed (Full-duplex) */
4985 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
4986 /* 2Gb link speed */
4987 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
4988 /* 2.5Gb link speed */
4989 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
4990 /* 10Gb link speed */
4991 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
4992 /* 20Gb link speed */
4993 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
4994 /* 25Gb link speed */
4995 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
4996 /* 40Gb link speed */
4997 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
4998 /* 50Gb link speed */
4999 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
5000 /* 100Gb link speed */
5001 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
5002 /* 10Mb link speed (Half-duplex) */
5003 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
5004 /* 10Mb link speed (Full-duplex) */
5005 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
5006 uint16_t force_link_speed;
5008 * Current setting of forced link speed. When the link speed is
5009 * not being forced, this value shall be set to 0.
5011 /* 100Mb link speed */
5012 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
5013 /* 1Gb link speed */
5014 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
5015 /* 2Gb link speed */
5016 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
5017 /* 2.5Gb link speed */
5018 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
5019 /* 10Gb link speed */
5020 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
5021 /* 20Mb link speed */
5022 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
5023 /* 25Gb link speed */
5024 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
5025 /* 40Gb link speed */
5026 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
5027 /* 50Gb link speed */
5028 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
5029 /* 100Gb link speed */
5030 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
5031 /* 10Mb link speed */
5032 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
5034 /* Current setting of auto negotiation mode. */
5036 * Disable autoneg or autoneg disabled. No
5037 * speeds are selected.
5039 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0)
5040 /* Select all possible speeds for autoneg mode. */
5041 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
5043 * Select only the auto_link_speed speed for
5044 * autoneg mode. This mode has been DEPRECATED.
5045 * An HWRM client should not use this mode.
5047 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
5049 * Select the auto_link_speed or any speed below
5050 * that speed for autoneg. This mode has been
5051 * DEPRECATED. An HWRM client should not use
5054 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
5056 * Select the speeds based on the corresponding
5057 * link speed mask value that is provided.
5059 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
5062 * Current setting of pause autonegotiation. Move autoneg_pause
5066 * When this bit is '1', Generation of tx pause messages has
5067 * been requested. Disabled otherwise.
5069 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
5071 * When this bit is '1', Reception of rx pause messages has been
5072 * requested. Disabled otherwise.
5074 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
5076 * When set to 1, the advertisement of pause is enabled. # When
5077 * the auto_mode is not set to none and this flag is set to 1,
5078 * then the auto_pause bits on this port are being advertised
5079 * and autoneg pause results are being interpreted. # When the
5080 * auto_mode is not set to none and this flag is set to 0, the
5081 * pause is forced as indicated in force_pause, and also
5082 * advertised as auto_pause bits, but the autoneg results are
5083 * not interpreted since the pause configuration is being
5084 * forced. # When the auto_mode is set to none and this flag is
5085 * set to 1, auto_pause bits should be ignored and should be set
5088 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
5089 uint16_t auto_link_speed;
5091 * Current setting for auto_link_speed. This field is only valid
5092 * when auto_mode is set to "one_speed" or "one_or_below".
5094 /* 100Mb link speed */
5095 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
5096 /* 1Gb link speed */
5097 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
5098 /* 2Gb link speed */
5099 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
5100 /* 2.5Gb link speed */
5101 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
5102 /* 10Gb link speed */
5103 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
5104 /* 20Mb link speed */
5105 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
5106 /* 25Gb link speed */
5107 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
5108 /* 40Gb link speed */
5109 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
5110 /* 50Gb link speed */
5111 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
5112 /* 100Gb link speed */
5113 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
5114 /* 10Mb link speed */
5115 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
5116 uint16_t auto_link_speed_mask;
5118 * Current setting for auto_link_speed_mask that is used to
5119 * advertise speeds during autonegotiation. This field is only
5120 * valid when auto_mode is set to "mask". The speeds specified
5121 * in this field shall be a subset of supported speeds on this
5124 /* 100Mb link speed (Half-duplex) */
5125 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
5127 /* 100Mb link speed (Full-duplex) */
5128 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
5130 /* 1Gb link speed (Half-duplex) */
5131 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
5133 /* 1Gb link speed (Full-duplex) */
5134 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
5135 /* 2Gb link speed */
5136 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
5138 /* 2.5Gb link speed */
5139 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
5141 /* 10Gb link speed */
5142 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
5144 /* 20Gb link speed */
5145 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
5147 /* 25Gb link speed */
5148 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
5150 /* 40Gb link speed */
5151 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
5153 /* 50Gb link speed */
5154 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
5156 /* 100Gb link speed */
5157 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
5159 /* 10Mb link speed (Half-duplex) */
5160 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
5162 /* 10Mb link speed (Full-duplex) */
5163 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
5166 /* Current setting for wirespeed. */
5167 /* Wirespeed feature is disabled. */
5168 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
5169 /* Wirespeed feature is enabled. */
5170 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_ON UINT32_C(0x1)
5172 /* Current setting for loopback. */
5173 /* No loopback is selected. Normal operation. */
5174 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
5176 * The HW will be configured with local loopback
5177 * such that host data is sent back to the host
5178 * without modification.
5180 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
5182 * The HW will be configured with remote
5183 * loopback such that port logic will send
5184 * packets back out the transmitter that are
5187 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
5188 uint8_t force_pause;
5190 * Current setting of forced pause. When the pause configuration
5191 * is not being forced, then this value shall be set to 0.
5194 * When this bit is '1', Generation of tx pause messages is
5195 * supported. Disabled otherwise.
5197 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1)
5199 * When this bit is '1', Reception of rx pause messages is
5200 * supported. Disabled otherwise.
5202 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2)
5203 uint8_t module_status;
5205 * This value indicates the current status of the optics module
5208 /* Module is inserted and accepted */
5209 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
5210 /* Module is rejected and transmit side Laser is disabled. */
5211 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX UINT32_C(0x1)
5212 /* Module mismatch warning. */
5213 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG UINT32_C(0x2)
5214 /* Module is rejected and powered down. */
5215 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
5216 /* Module is not inserted. */
5217 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
5219 /* Module status is not applicable. */
5220 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
5222 uint32_t preemphasis;
5223 /* Current setting for preemphasis. */
5225 /* This field represents the major version of the PHY. */
5227 /* This field represents the minor version of the PHY. */
5229 /* This field represents the build version of the PHY. */
5231 /* This value represents a PHY type. */
5233 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
5235 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
5236 /* BASE-KR4 (Deprecated) */
5237 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
5239 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
5241 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
5242 /* BASE-KR2 (Deprecated) */
5243 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
5245 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
5247 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7)
5249 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8)
5250 /* EEE capable BASE-T */
5251 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
5252 /* SGMII connected external PHY */
5253 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
5254 /* 25G_BASECR_CA_L */
5255 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_L UINT32_C(0xb)
5256 /* 25G_BASECR_CA_S */
5257 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_S UINT32_C(0xc)
5258 /* 25G_BASECR_CA_N */
5259 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_N UINT32_C(0xd)
5261 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASESR UINT32_C(0xe)
5263 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASECR4 UINT32_C(0xf)
5265 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR4 UINT32_C(0x10)
5267 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASELR4 UINT32_C(0x11)
5269 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASEER4 UINT32_C(0x12)
5271 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR10 UINT32_C(0x13)
5273 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASECR4 UINT32_C(0x14)
5275 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASESR4 UINT32_C(0x15)
5277 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASELR4 UINT32_C(0x16)
5279 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASEER4 UINT32_C(0x17)
5280 /* 40G_ACTIVE_CABLE */
5281 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_ACTIVE_CABLE \
5283 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASET UINT32_C(0x19)
5285 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASESX UINT32_C(0x1a)
5287 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASECX UINT32_C(0x1b)
5289 /* This value represents a media type. */
5291 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0)
5293 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1)
5294 /* Direct Attached Copper */
5295 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2)
5297 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3)
5298 uint8_t xcvr_pkg_type;
5299 /* This value represents a transceiver type. */
5300 /* PHY and MAC are in the same package */
5301 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
5303 /* PHY and MAC are in different packages */
5304 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
5306 uint8_t eee_config_phy_addr;
5308 * This field represents flags related to EEE configuration.
5309 * These EEE configuration flags are valid only when the
5310 * auto_mode is not set to none (in other words autonegotiation
5313 /* This field represents PHY address. */
5314 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
5315 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
5317 * When set to 1, Energy Efficient Ethernet (EEE) mode is
5318 * enabled. Speeds for autoneg with EEE mode enabled are based
5319 * on eee_link_speed_mask.
5321 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED UINT32_C(0x20)
5323 * This flag is valid only when eee_enabled is set to 1. # If
5324 * eee_enabled is set to 0, then EEE mode is disabled and this
5325 * flag shall be ignored. # If eee_enabled is set to 1 and this
5326 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5327 * is enabled and in use. # If eee_enabled is set to 1 and this
5328 * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
5329 * is enabled but is currently not in use.
5331 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
5333 * This flag is valid only when eee_enabled is set to 1. # If
5334 * eee_enabled is set to 0, then EEE mode is disabled and this
5335 * flag shall be ignored. # If eee_enabled is set to 1 and this
5336 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5337 * is enabled and TX LPI is enabled. # If eee_enabled is set to
5338 * 1 and this flag is set to 0, then Energy Efficient Ethernet
5339 * (EEE) mode is enabled but TX LPI is disabled.
5341 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
5343 * This field represents flags related to EEE configuration.
5344 * These EEE configuration flags are valid only when the
5345 * auto_mode is not set to none (in other words autonegotiation
5348 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
5349 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
5350 uint8_t parallel_detect;
5351 /* Reserved field, set to 0 */
5353 * When set to 1, the parallel detection is used to determine
5354 * the speed of the link partner. Parallel detection is used
5355 * when a autonegotiation capable device is connected to a link
5356 * parter that is not capable of autonegotiation.
5358 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1)
5359 /* Reserved field, set to 0 */
5360 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
5361 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
5362 uint16_t link_partner_adv_speeds;
5364 * The advertised speeds for the port by the link partner. Each
5365 * advertised speed will be set to '1'.
5367 /* 100Mb link speed (Half-duplex) */
5368 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
5370 /* 100Mb link speed (Full-duplex) */
5371 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
5373 /* 1Gb link speed (Half-duplex) */
5374 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
5376 /* 1Gb link speed (Full-duplex) */
5377 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
5379 /* 2Gb link speed */
5380 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
5382 /* 2.5Gb link speed */
5383 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
5385 /* 10Gb link speed */
5386 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
5388 /* 20Gb link speed */
5389 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
5391 /* 25Gb link speed */
5392 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
5394 /* 40Gb link speed */
5395 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
5397 /* 50Gb link speed */
5398 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
5400 /* 100Gb link speed */
5401 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
5403 /* 10Mb link speed (Half-duplex) */
5404 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
5406 /* 10Mb link speed (Full-duplex) */
5407 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
5409 uint8_t link_partner_adv_auto_mode;
5411 * The advertised autoneg for the port by the link partner. This
5412 * field is deprecated and should be set to 0.
5415 * Disable autoneg or autoneg disabled. No
5416 * speeds are selected.
5418 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
5420 /* Select all possible speeds for autoneg mode. */
5422 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \
5425 * Select only the auto_link_speed speed for
5426 * autoneg mode. This mode has been DEPRECATED.
5427 * An HWRM client should not use this mode.
5430 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
5433 * Select the auto_link_speed or any speed below
5434 * that speed for autoneg. This mode has been
5435 * DEPRECATED. An HWRM client should not use
5439 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
5442 * Select the speeds based on the corresponding
5443 * link speed mask value that is provided.
5446 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \
5448 uint8_t link_partner_adv_pause;
5449 /* The advertised pause settings on the port by the link partner. */
5451 * When this bit is '1', Generation of tx pause messages is
5452 * supported. Disabled otherwise.
5454 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
5457 * When this bit is '1', Reception of rx pause messages is
5458 * supported. Disabled otherwise.
5460 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
5462 uint16_t adv_eee_link_speed_mask;
5464 * Current setting for link speed mask that is used to advertise
5465 * speeds during autonegotiation when EEE is enabled. This field
5466 * is valid only when eee_enabled flags is set to 1. The speeds
5467 * specified in this field shall be a subset of speeds specified
5468 * in auto_link_speed_mask.
5471 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5473 /* 100Mb link speed (Full-duplex) */
5474 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
5477 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5479 /* 1Gb link speed (Full-duplex) */
5480 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
5483 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5486 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5488 /* 10Gb link speed */
5489 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
5491 uint16_t link_partner_adv_eee_link_speed_mask;
5493 * Current setting for link speed mask that is advertised by the
5494 * link partner when EEE is enabled. This field is valid only
5495 * when eee_enabled flags is set to 1.
5499 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5501 /* 100Mb link speed (Full-duplex) */
5503 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
5507 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5509 /* 1Gb link speed (Full-duplex) */
5511 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
5515 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5519 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5521 /* 10Gb link speed */
5523 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
5525 uint32_t xcvr_identifier_type_tx_lpi_timer;
5526 /* This value represents transceiver identifier type. */
5528 * Current setting of TX LPI timer in microseconds. This field
5529 * is valid only when_eee_enabled flag is set to 1 and
5530 * tx_lpi_enabled is set to 1.
5532 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
5533 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
5534 /* This value represents transceiver identifier type. */
5535 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
5536 UINT32_C(0xff000000)
5537 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
5539 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
5540 (UINT32_C(0x0) << 24)
5541 /* SFP/SFP+/SFP28 */
5542 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
5543 (UINT32_C(0x3) << 24)
5545 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
5546 (UINT32_C(0xc) << 24)
5548 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
5549 (UINT32_C(0xd) << 24)
5551 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
5552 (UINT32_C(0x11) << 24)
5555 * This value represents the current configuration of Forward
5556 * Error Correction (FEC) on the port.
5559 * When set to 1, then FEC is not supported on this port. If
5560 * this flag is set to 1, then all other FEC configuration flags
5561 * shall be ignored. When set to 0, then FEC is supported as
5562 * indicated by other configuration flags. If no cable is
5563 * attached and the HWRM does not yet know the FEC capability,
5564 * then the HWRM shall set this flag to 1 when reporting FEC
5567 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
5570 * When set to 1, then FEC autonegotiation is supported on this
5571 * port. When set to 0, then FEC autonegotiation is not
5572 * supported on this port.
5574 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED \
5577 * When set to 1, then FEC autonegotiation is enabled on this
5578 * port. When set to 0, then FEC autonegotiation is disabled if
5579 * supported. This flag should be ignored if FEC autonegotiation
5580 * is not supported on this port.
5582 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \
5585 * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
5586 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5587 * not supported on this port.
5589 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \
5592 * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
5593 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5594 * disabled if supported. This flag should be ignored if FEC
5595 * CLAUSE 74 is not supported on this port.
5597 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \
5600 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
5601 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5602 * Solomon) is not supported on this port.
5604 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \
5607 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
5608 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5609 * Solomon) is disabled if supported. This flag should be
5610 * ignored if FEC CLAUSE 91 is not supported on this port.
5612 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED \
5614 uint8_t duplex_state;
5616 * This value is indicates the duplex of the current connection
5619 /* Half Duplex connection. */
5620 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_STATE_HALF UINT32_C(0x0)
5621 /* Full duplex connection. */
5622 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_STATE_FULL UINT32_C(0x1)
5624 char phy_vendor_name[16];
5626 * Up to 16 bytes of null padded ASCII string representing PHY
5627 * vendor. If the string is set to null, then the vendor name is
5630 char phy_vendor_partnumber[16];
5632 * Up to 16 bytes of null padded ASCII string that identifies
5633 * vendor specific part number of the PHY. If the string is set
5634 * to null, then the vendor specific part number is not
5643 * This field is used in Output records to indicate that the
5644 * output is completely written to RAM. This field should be
5645 * read as '1' to indicate that the output has been completely
5646 * written. When writing a command completion or response to an
5647 * internal processor, the order of writes has to be such that
5648 * this field is written last.
5650 } __attribute__((packed));
5652 /* hwrm_port_qstats */
5653 /* Description: This function returns per port Ethernet statistics. */
5654 /* Input (40 bytes) */
5655 struct hwrm_port_qstats_input {
5658 * This value indicates what type of request this is. The format
5659 * for the rest of the command is determined by this field.
5663 * This value indicates the what completion ring the request
5664 * will be optionally completed on. If the value is -1, then no
5665 * CR completion will be generated. Any other value must be a
5666 * valid CR ring_id value for this function.
5669 /* This value indicates the command sequence number. */
5672 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5673 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5678 * This is the host address where the response will be written
5679 * when the request is complete. This area must be 16B aligned
5680 * and must be cleared to zero before the request is made.
5683 /* Port ID of port that is being queried. */
5686 uint8_t unused_2[3];
5688 uint64_t tx_stat_host_addr;
5689 /* This is the host address where Tx port statistics will be stored */
5690 uint64_t rx_stat_host_addr;
5691 /* This is the host address where Rx port statistics will be stored */
5692 } __attribute__((packed));
5694 /* Output (16 bytes) */
5695 struct hwrm_port_qstats_output {
5696 uint16_t error_code;
5698 * Pass/Fail or error type Note: receiver to verify the in
5699 * parameters, and fail the call with an error when appropriate
5702 /* This field returns the type of original request. */
5704 /* This field provides original sequence number of the command. */
5707 * This field is the length of the response in bytes. The last
5708 * byte of the response is a valid flag that will read as '1'
5709 * when the command has been completely written to memory.
5711 uint16_t tx_stat_size;
5712 /* The size of TX port statistics block in bytes. */
5713 uint16_t rx_stat_size;
5714 /* The size of RX port statistics block in bytes. */
5720 * This field is used in Output records to indicate that the
5721 * output is completely written to RAM. This field should be
5722 * read as '1' to indicate that the output has been completely
5723 * written. When writing a command completion or response to an
5724 * internal processor, the order of writes has to be such that
5725 * this field is written last.
5727 } __attribute__((packed));
5729 /* hwrm_port_clr_stats */
5731 * Description: This function clears per port statistics. The HWRM shall not
5732 * allow a VF driver to clear port statistics. The HWRM shall not allow a PF
5733 * driver to clear port statistics in a partitioning mode. The HWRM may allow a
5734 * PF driver to clear port statistics in the non-partitioning mode.
5736 /* Input (24 bytes) */
5737 struct hwrm_port_clr_stats_input {
5740 * This value indicates what type of request this is. The format
5741 * for the rest of the command is determined by this field.
5745 * This value indicates the what completion ring the request
5746 * will be optionally completed on. If the value is -1, then no
5747 * CR completion will be generated. Any other value must be a
5748 * valid CR ring_id value for this function.
5751 /* This value indicates the command sequence number. */
5754 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5755 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5760 * This is the host address where the response will be written
5761 * when the request is complete. This area must be 16B aligned
5762 * and must be cleared to zero before the request is made.
5765 /* Port ID of port that is being queried. */
5766 uint16_t unused_0[3];
5767 } __attribute__((packed));
5769 /* Output (16 bytes) */
5770 struct hwrm_port_clr_stats_output {
5771 uint16_t error_code;
5773 * Pass/Fail or error type Note: receiver to verify the in
5774 * parameters, and fail the call with an error when appropriate
5777 /* This field returns the type of original request. */
5779 /* This field provides original sequence number of the command. */
5782 * This field is the length of the response in bytes. The last
5783 * byte of the response is a valid flag that will read as '1'
5784 * when the command has been completely written to memory.
5792 * This field is used in Output records to indicate that the
5793 * output is completely written to RAM. This field should be
5794 * read as '1' to indicate that the output has been completely
5795 * written. When writing a command completion or response to an
5796 * internal processor, the order of writes has to be such that
5797 * this field is written last.
5799 } __attribute__((packed));
5801 /* hwrm_port_led_cfg */
5803 * Description: This function is used to configure LEDs on a given port. Each
5804 * port has individual set of LEDs associated with it. These LEDs are used for
5805 * speed/link configuration as well as activity indicator configuration. Up to
5806 * three LEDs can be configured, one for activity and two for speeds.
5808 /* Input (64 bytes) */
5809 struct hwrm_port_led_cfg_input {
5812 * This value indicates what type of request this is. The format
5813 * for the rest of the command is determined by this field.
5817 * This value indicates the what completion ring the request
5818 * will be optionally completed on. If the value is -1, then no
5819 * CR completion will be generated. Any other value must be a
5820 * valid CR ring_id value for this function.
5823 /* This value indicates the command sequence number. */
5826 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5827 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5832 * This is the host address where the response will be written
5833 * when the request is complete. This area must be 16B aligned
5834 * and must be cleared to zero before the request is made.
5837 /* This bit must be '1' for the led0_id field to be configured. */
5838 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID UINT32_C(0x1)
5839 /* This bit must be '1' for the led0_state field to be configured. */
5840 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE UINT32_C(0x2)
5841 /* This bit must be '1' for the led0_color field to be configured. */
5842 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_COLOR UINT32_C(0x4)
5844 * This bit must be '1' for the led0_blink_on field to be
5847 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON UINT32_C(0x8)
5849 * This bit must be '1' for the led0_blink_off field to be
5852 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF UINT32_C(0x10)
5854 * This bit must be '1' for the led0_group_id field to be
5857 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID UINT32_C(0x20)
5858 /* This bit must be '1' for the led1_id field to be configured. */
5859 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_ID UINT32_C(0x40)
5860 /* This bit must be '1' for the led1_state field to be configured. */
5861 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_STATE UINT32_C(0x80)
5862 /* This bit must be '1' for the led1_color field to be configured. */
5863 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_COLOR UINT32_C(0x100)
5865 * This bit must be '1' for the led1_blink_on field to be
5868 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_ON UINT32_C(0x200)
5870 * This bit must be '1' for the led1_blink_off field to be
5873 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_OFF UINT32_C(0x400)
5875 * This bit must be '1' for the led1_group_id field to be
5878 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_GROUP_ID UINT32_C(0x800)
5879 /* This bit must be '1' for the led2_id field to be configured. */
5880 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_ID UINT32_C(0x1000)
5881 /* This bit must be '1' for the led2_state field to be configured. */
5882 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_STATE UINT32_C(0x2000)
5883 /* This bit must be '1' for the led2_color field to be configured. */
5884 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_COLOR UINT32_C(0x4000)
5886 * This bit must be '1' for the led2_blink_on field to be
5889 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_ON UINT32_C(0x8000)
5891 * This bit must be '1' for the led2_blink_off field to be
5894 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_OFF UINT32_C(0x10000)
5896 * This bit must be '1' for the led2_group_id field to be
5899 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_GROUP_ID UINT32_C(0x20000)
5900 /* This bit must be '1' for the led3_id field to be configured. */
5901 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_ID UINT32_C(0x40000)
5902 /* This bit must be '1' for the led3_state field to be configured. */
5903 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_STATE UINT32_C(0x80000)
5904 /* This bit must be '1' for the led3_color field to be configured. */
5905 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_COLOR UINT32_C(0x100000)
5907 * This bit must be '1' for the led3_blink_on field to be
5910 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_ON UINT32_C(0x200000)
5912 * This bit must be '1' for the led3_blink_off field to be
5915 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_OFF \
5918 * This bit must be '1' for the led3_group_id field to be
5921 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_GROUP_ID UINT32_C(0x800000)
5923 /* Port ID of port whose LEDs are configured. */
5926 * The number of LEDs that are being configured. Up to 4 LEDs
5927 * can be configured with this command.
5930 /* Reserved field. */
5932 /* An identifier for the LED #0. */
5934 /* The requested state of the LED #0. */
5935 /* Default state of the LED */
5936 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
5938 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_OFF UINT32_C(0x1)
5940 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_ON UINT32_C(0x2)
5942 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINK UINT32_C(0x3)
5943 /* Blink Alternately */
5944 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
5946 /* The requested color of LED #0. */
5948 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
5950 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_AMBER UINT32_C(0x1)
5952 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREEN UINT32_C(0x2)
5953 /* Green or Amber */
5954 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
5956 uint16_t led0_blink_on;
5958 * If the LED #0 state is "blink" or "blinkalt", then this field
5959 * represents the requested time in milliseconds to keep LED on
5962 uint16_t led0_blink_off;
5964 * If the LED #0 state is "blink" or "blinkalt", then this field
5965 * represents the requested time in milliseconds to keep LED off
5968 uint8_t led0_group_id;
5970 * An identifier for the group of LEDs that LED #0 belongs to.
5971 * If set to 0, then the LED #0 shall not be grouped and shall
5972 * be treated as an individual resource. For all other non-zero
5973 * values of this field, LED #0 shall be grouped together with
5974 * the LEDs with the same group ID value.
5977 /* Reserved field. */
5979 /* An identifier for the LED #1. */
5981 /* The requested state of the LED #1. */
5982 /* Default state of the LED */
5983 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
5985 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_OFF UINT32_C(0x1)
5987 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_ON UINT32_C(0x2)
5989 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINK UINT32_C(0x3)
5990 /* Blink Alternately */
5991 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
5993 /* The requested color of LED #1. */
5995 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
5997 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_AMBER UINT32_C(0x1)
5999 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREEN UINT32_C(0x2)
6000 /* Green or Amber */
6001 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
6003 uint16_t led1_blink_on;
6005 * If the LED #1 state is "blink" or "blinkalt", then this field
6006 * represents the requested time in milliseconds to keep LED on
6009 uint16_t led1_blink_off;
6011 * If the LED #1 state is "blink" or "blinkalt", then this field
6012 * represents the requested time in milliseconds to keep LED off
6015 uint8_t led1_group_id;
6017 * An identifier for the group of LEDs that LED #1 belongs to.
6018 * If set to 0, then the LED #1 shall not be grouped and shall
6019 * be treated as an individual resource. For all other non-zero
6020 * values of this field, LED #1 shall be grouped together with
6021 * the LEDs with the same group ID value.
6024 /* Reserved field. */
6026 /* An identifier for the LED #2. */
6028 /* The requested state of the LED #2. */
6029 /* Default state of the LED */
6030 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6032 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_OFF UINT32_C(0x1)
6034 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_ON UINT32_C(0x2)
6036 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINK UINT32_C(0x3)
6037 /* Blink Alternately */
6038 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6040 /* The requested color of LED #2. */
6042 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6044 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6046 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6047 /* Green or Amber */
6048 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6050 uint16_t led2_blink_on;
6052 * If the LED #2 state is "blink" or "blinkalt", then this field
6053 * represents the requested time in milliseconds to keep LED on
6056 uint16_t led2_blink_off;
6058 * If the LED #2 state is "blink" or "blinkalt", then this field
6059 * represents the requested time in milliseconds to keep LED off
6062 uint8_t led2_group_id;
6064 * An identifier for the group of LEDs that LED #2 belongs to.
6065 * If set to 0, then the LED #2 shall not be grouped and shall
6066 * be treated as an individual resource. For all other non-zero
6067 * values of this field, LED #2 shall be grouped together with
6068 * the LEDs with the same group ID value.
6071 /* Reserved field. */
6073 /* An identifier for the LED #3. */
6075 /* The requested state of the LED #3. */
6076 /* Default state of the LED */
6077 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6079 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_OFF UINT32_C(0x1)
6081 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_ON UINT32_C(0x2)
6083 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINK UINT32_C(0x3)
6084 /* Blink Alternately */
6085 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6087 /* The requested color of LED #3. */
6089 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6091 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6093 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6094 /* Green or Amber */
6095 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6097 uint16_t led3_blink_on;
6099 * If the LED #3 state is "blink" or "blinkalt", then this field
6100 * represents the requested time in milliseconds to keep LED on
6103 uint16_t led3_blink_off;
6105 * If the LED #3 state is "blink" or "blinkalt", then this field
6106 * represents the requested time in milliseconds to keep LED off
6109 uint8_t led3_group_id;
6111 * An identifier for the group of LEDs that LED #3 belongs to.
6112 * If set to 0, then the LED #3 shall not be grouped and shall
6113 * be treated as an individual resource. For all other non-zero
6114 * values of this field, LED #3 shall be grouped together with
6115 * the LEDs with the same group ID value.
6118 /* Reserved field. */
6119 } __attribute__((packed));
6121 /* Output (16 bytes) */
6122 struct hwrm_port_led_cfg_output {
6123 uint16_t error_code;
6125 * Pass/Fail or error type Note: receiver to verify the in
6126 * parameters, and fail the call with an error when appropriate
6129 /* This field returns the type of original request. */
6131 /* This field provides original sequence number of the command. */
6134 * This field is the length of the response in bytes. The last
6135 * byte of the response is a valid flag that will read as '1'
6136 * when the command has been completely written to memory.
6144 * This field is used in Output records to indicate that the
6145 * output is completely written to RAM. This field should be
6146 * read as '1' to indicate that the output has been completely
6147 * written. When writing a command completion or response to an
6148 * internal processor, the order of writes has to be such that
6149 * this field is written last.
6151 } __attribute__((packed));
6153 /* hwrm_port_led_qcfg */
6155 * Description: This function is used to query configuration of LEDs on a given
6156 * port. Each port has individual set of LEDs associated with it. These LEDs are
6157 * used for speed/link configuration as well as activity indicator
6158 * configuration. Up to three LEDs can be configured, one for activity and two
6161 /* Input (24 bytes) */
6162 struct hwrm_port_led_qcfg_input {
6165 * This value indicates what type of request this is. The format
6166 * for the rest of the command is determined by this field.
6170 * This value indicates the what completion ring the request
6171 * will be optionally completed on. If the value is -1, then no
6172 * CR completion will be generated. Any other value must be a
6173 * valid CR ring_id value for this function.
6176 /* This value indicates the command sequence number. */
6179 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6180 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6185 * This is the host address where the response will be written
6186 * when the request is complete. This area must be 16B aligned
6187 * and must be cleared to zero before the request is made.
6190 /* Port ID of port whose LED configuration is being queried. */
6191 uint16_t unused_0[3];
6192 } __attribute__((packed));
6194 /* Output (56 bytes) */
6195 struct hwrm_port_led_qcfg_output {
6196 uint16_t error_code;
6198 * Pass/Fail or error type Note: receiver to verify the in
6199 * parameters, and fail the call with an error when appropriate
6202 /* This field returns the type of original request. */
6204 /* This field provides original sequence number of the command. */
6207 * This field is the length of the response in bytes. The last
6208 * byte of the response is a valid flag that will read as '1'
6209 * when the command has been completely written to memory.
6213 * The number of LEDs that are configured on this port. Up to 4
6214 * LEDs can be returned in the response.
6217 /* An identifier for the LED #0. */
6219 /* The type of LED #0. */
6221 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6223 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6225 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6227 /* The current state of the LED #0. */
6228 /* Default state of the LED */
6229 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
6231 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_OFF UINT32_C(0x1)
6233 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_ON UINT32_C(0x2)
6235 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINK UINT32_C(0x3)
6236 /* Blink Alternately */
6237 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
6239 /* The color of LED #0. */
6241 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
6243 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_AMBER UINT32_C(0x1)
6245 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREEN UINT32_C(0x2)
6246 /* Green or Amber */
6247 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
6249 uint16_t led0_blink_on;
6251 * If the LED #0 state is "blink" or "blinkalt", then this field
6252 * represents the requested time in milliseconds to keep LED on
6255 uint16_t led0_blink_off;
6257 * If the LED #0 state is "blink" or "blinkalt", then this field
6258 * represents the requested time in milliseconds to keep LED off
6261 uint8_t led0_group_id;
6263 * An identifier for the group of LEDs that LED #0 belongs to.
6264 * If set to 0, then the LED #0 is not grouped. For all other
6265 * non-zero values of this field, LED #0 is grouped together
6266 * with the LEDs with the same group ID value.
6269 /* An identifier for the LED #1. */
6271 /* The type of LED #1. */
6273 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6275 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6277 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6279 /* The current state of the LED #1. */
6280 /* Default state of the LED */
6281 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
6283 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_OFF UINT32_C(0x1)
6285 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_ON UINT32_C(0x2)
6287 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINK UINT32_C(0x3)
6288 /* Blink Alternately */
6289 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
6291 /* The color of LED #1. */
6293 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
6295 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_AMBER UINT32_C(0x1)
6297 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREEN UINT32_C(0x2)
6298 /* Green or Amber */
6299 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
6301 uint16_t led1_blink_on;
6303 * If the LED #1 state is "blink" or "blinkalt", then this field
6304 * represents the requested time in milliseconds to keep LED on
6307 uint16_t led1_blink_off;
6309 * If the LED #1 state is "blink" or "blinkalt", then this field
6310 * represents the requested time in milliseconds to keep LED off
6313 uint8_t led1_group_id;
6315 * An identifier for the group of LEDs that LED #1 belongs to.
6316 * If set to 0, then the LED #1 is not grouped. For all other
6317 * non-zero values of this field, LED #1 is grouped together
6318 * with the LEDs with the same group ID value.
6321 /* An identifier for the LED #2. */
6323 /* The type of LED #2. */
6325 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6327 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6329 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6331 /* The current state of the LED #2. */
6332 /* Default state of the LED */
6333 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6335 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_OFF UINT32_C(0x1)
6337 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_ON UINT32_C(0x2)
6339 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINK UINT32_C(0x3)
6340 /* Blink Alternately */
6341 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6343 /* The color of LED #2. */
6345 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6347 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6349 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6350 /* Green or Amber */
6351 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6353 uint16_t led2_blink_on;
6355 * If the LED #2 state is "blink" or "blinkalt", then this field
6356 * represents the requested time in milliseconds to keep LED on
6359 uint16_t led2_blink_off;
6361 * If the LED #2 state is "blink" or "blinkalt", then this field
6362 * represents the requested time in milliseconds to keep LED off
6365 uint8_t led2_group_id;
6367 * An identifier for the group of LEDs that LED #2 belongs to.
6368 * If set to 0, then the LED #2 is not grouped. For all other
6369 * non-zero values of this field, LED #2 is grouped together
6370 * with the LEDs with the same group ID value.
6373 /* An identifier for the LED #3. */
6375 /* The type of LED #3. */
6377 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6379 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6381 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6383 /* The current state of the LED #3. */
6384 /* Default state of the LED */
6385 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6387 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_OFF UINT32_C(0x1)
6389 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_ON UINT32_C(0x2)
6391 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINK UINT32_C(0x3)
6392 /* Blink Alternately */
6393 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6395 /* The color of LED #3. */
6397 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6399 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6401 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6402 /* Green or Amber */
6403 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6405 uint16_t led3_blink_on;
6407 * If the LED #3 state is "blink" or "blinkalt", then this field
6408 * represents the requested time in milliseconds to keep LED on
6411 uint16_t led3_blink_off;
6413 * If the LED #3 state is "blink" or "blinkalt", then this field
6414 * represents the requested time in milliseconds to keep LED off
6417 uint8_t led3_group_id;
6419 * An identifier for the group of LEDs that LED #3 belongs to.
6420 * If set to 0, then the LED #3 is not grouped. For all other
6421 * non-zero values of this field, LED #3 is grouped together
6422 * with the LEDs with the same group ID value.
6431 * This field is used in Output records to indicate that the
6432 * output is completely written to RAM. This field should be
6433 * read as '1' to indicate that the output has been completely
6434 * written. When writing a command completion or response to an
6435 * internal processor, the order of writes has to be such that
6436 * this field is written last.
6438 } __attribute__((packed));
6440 /* hwrm_port_led_qcaps */
6442 * Description: This function is used to query capabilities of LEDs on a given
6443 * port. Each port has individual set of LEDs associated with it. These LEDs are
6444 * used for speed/link configuration as well as activity indicator
6447 /* Input (24 bytes) */
6448 struct hwrm_port_led_qcaps_input {
6451 * This value indicates what type of request this is. The format
6452 * for the rest of the command is determined by this field.
6456 * This value indicates the what completion ring the request
6457 * will be optionally completed on. If the value is -1, then no
6458 * CR completion will be generated. Any other value must be a
6459 * valid CR ring_id value for this function.
6462 /* This value indicates the command sequence number. */
6465 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6466 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6471 * This is the host address where the response will be written
6472 * when the request is complete. This area must be 16B aligned
6473 * and must be cleared to zero before the request is made.
6476 /* Port ID of port whose LED configuration is being queried. */
6477 uint16_t unused_0[3];
6478 } __attribute__((packed));
6480 /* Output (48 bytes) */
6481 struct hwrm_port_led_qcaps_output {
6482 uint16_t error_code;
6484 * Pass/Fail or error type Note: receiver to verify the in
6485 * parameters, and fail the call with an error when appropriate
6488 /* This field returns the type of original request. */
6490 /* This field provides original sequence number of the command. */
6493 * This field is the length of the response in bytes. The last
6494 * byte of the response is a valid flag that will read as '1'
6495 * when the command has been completely written to memory.
6499 * The number of LEDs that are configured on this port. Up to 4
6500 * LEDs can be returned in the response.
6502 uint8_t unused_0[3];
6503 /* Reserved for future use. */
6505 /* An identifier for the LED #0. */
6507 /* The type of LED #0. */
6509 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6511 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6513 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6514 uint8_t led0_group_id;
6516 * An identifier for the group of LEDs that LED #0 belongs to.
6517 * If set to 0, then the LED #0 cannot be grouped. For all other
6518 * non-zero values of this field, LED #0 is grouped together
6519 * with the LEDs with the same group ID value.
6522 uint16_t led0_state_caps;
6523 /* The states supported by LED #0. */
6525 * If set to 1, this LED is enabled. If set to 0, this LED is
6528 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ENABLED UINT32_C(0x1)
6530 * If set to 1, off state is supported on this LED. If set to 0,
6531 * off state is not supported on this LED.
6533 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_OFF_SUPPORTED \
6536 * If set to 1, on state is supported on this LED. If set to 0,
6537 * on state is not supported on this LED.
6539 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ON_SUPPORTED \
6542 * If set to 1, blink state is supported on this LED. If set to
6543 * 0, blink state is not supported on this LED.
6545 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_SUPPORTED \
6548 * If set to 1, blink_alt state is supported on this LED. If set
6549 * to 0, blink_alt state is not supported on this LED.
6551 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED \
6553 uint16_t led0_color_caps;
6554 /* The colors supported by LED #0. */
6556 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_RSVD UINT32_C(0x1)
6558 * If set to 1, Amber color is supported on this LED. If set to
6559 * 0, Amber color is not supported on this LED.
6561 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_AMBER_SUPPORTED \
6564 * If set to 1, Green color is supported on this LED. If set to
6565 * 0, Green color is not supported on this LED.
6567 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_GREEN_SUPPORTED \
6570 /* An identifier for the LED #1. */
6572 /* The type of LED #1. */
6574 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6576 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6578 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6579 uint8_t led1_group_id;
6581 * An identifier for the group of LEDs that LED #1 belongs to.
6582 * If set to 0, then the LED #0 cannot be grouped. For all other
6583 * non-zero values of this field, LED #0 is grouped together
6584 * with the LEDs with the same group ID value.
6587 uint16_t led1_state_caps;
6588 /* The states supported by LED #1. */
6590 * If set to 1, this LED is enabled. If set to 0, this LED is
6593 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ENABLED UINT32_C(0x1)
6595 * If set to 1, off state is supported on this LED. If set to 0,
6596 * off state is not supported on this LED.
6598 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_OFF_SUPPORTED \
6601 * If set to 1, on state is supported on this LED. If set to 0,
6602 * on state is not supported on this LED.
6604 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ON_SUPPORTED \
6607 * If set to 1, blink state is supported on this LED. If set to
6608 * 0, blink state is not supported on this LED.
6610 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_SUPPORTED \
6613 * If set to 1, blink_alt state is supported on this LED. If set
6614 * to 0, blink_alt state is not supported on this LED.
6616 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_ALT_SUPPORTED \
6618 uint16_t led1_color_caps;
6619 /* The colors supported by LED #1. */
6621 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_RSVD UINT32_C(0x1)
6623 * If set to 1, Amber color is supported on this LED. If set to
6624 * 0, Amber color is not supported on this LED.
6626 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_AMBER_SUPPORTED \
6629 * If set to 1, Green color is supported on this LED. If set to
6630 * 0, Green color is not supported on this LED.
6632 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_GREEN_SUPPORTED \
6635 /* An identifier for the LED #2. */
6637 /* The type of LED #2. */
6639 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6641 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6643 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6644 uint8_t led2_group_id;
6646 * An identifier for the group of LEDs that LED #0 belongs to.
6647 * If set to 0, then the LED #0 cannot be grouped. For all other
6648 * non-zero values of this field, LED #0 is grouped together
6649 * with the LEDs with the same group ID value.
6652 uint16_t led2_state_caps;
6653 /* The states supported by LED #2. */
6655 * If set to 1, this LED is enabled. If set to 0, this LED is
6658 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ENABLED UINT32_C(0x1)
6660 * If set to 1, off state is supported on this LED. If set to 0,
6661 * off state is not supported on this LED.
6663 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_OFF_SUPPORTED \
6666 * If set to 1, on state is supported on this LED. If set to 0,
6667 * on state is not supported on this LED.
6669 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ON_SUPPORTED \
6672 * If set to 1, blink state is supported on this LED. If set to
6673 * 0, blink state is not supported on this LED.
6675 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_SUPPORTED \
6678 * If set to 1, blink_alt state is supported on this LED. If set
6679 * to 0, blink_alt state is not supported on this LED.
6681 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_ALT_SUPPORTED \
6683 uint16_t led2_color_caps;
6684 /* The colors supported by LED #2. */
6686 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_RSVD UINT32_C(0x1)
6688 * If set to 1, Amber color is supported on this LED. If set to
6689 * 0, Amber color is not supported on this LED.
6691 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_AMBER_SUPPORTED \
6694 * If set to 1, Green color is supported on this LED. If set to
6695 * 0, Green color is not supported on this LED.
6697 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_GREEN_SUPPORTED \
6700 /* An identifier for the LED #3. */
6702 /* The type of LED #3. */
6704 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6706 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6708 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6709 uint8_t led3_group_id;
6711 * An identifier for the group of LEDs that LED #3 belongs to.
6712 * If set to 0, then the LED #0 cannot be grouped. For all other
6713 * non-zero values of this field, LED #0 is grouped together
6714 * with the LEDs with the same group ID value.
6717 uint16_t led3_state_caps;
6718 /* The states supported by LED #3. */
6720 * If set to 1, this LED is enabled. If set to 0, this LED is
6723 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ENABLED UINT32_C(0x1)
6725 * If set to 1, off state is supported on this LED. If set to 0,
6726 * off state is not supported on this LED.
6728 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_OFF_SUPPORTED \
6731 * If set to 1, on state is supported on this LED. If set to 0,
6732 * on state is not supported on this LED.
6734 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ON_SUPPORTED \
6737 * If set to 1, blink state is supported on this LED. If set to
6738 * 0, blink state is not supported on this LED.
6740 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_SUPPORTED \
6743 * If set to 1, blink_alt state is supported on this LED. If set
6744 * to 0, blink_alt state is not supported on this LED.
6746 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_ALT_SUPPORTED \
6748 uint16_t led3_color_caps;
6749 /* The colors supported by LED #3. */
6751 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_RSVD UINT32_C(0x1)
6753 * If set to 1, Amber color is supported on this LED. If set to
6754 * 0, Amber color is not supported on this LED.
6756 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_AMBER_SUPPORTED \
6759 * If set to 1, Green color is supported on this LED. If set to
6760 * 0, Green color is not supported on this LED.
6762 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_GREEN_SUPPORTED \
6769 * This field is used in Output records to indicate that the
6770 * output is completely written to RAM. This field should be
6771 * read as '1' to indicate that the output has been completely
6772 * written. When writing a command completion or response to an
6773 * internal processor, the order of writes has to be such that
6774 * this field is written last.
6776 } __attribute__((packed));
6778 /* hwrm_queue_qportcfg */
6780 * Description: This function is called by a driver to query queue configuration
6781 * of a port. # The HWRM shall at least advertise one queue with lossy service
6782 * profile. # The driver shall use this command to query queue ids before
6783 * configuring or using any queues. # If a service profile is not set for a
6784 * queue, then the driver shall not use that queue without configuring a service
6785 * profile for it. # If the driver is not allowed to configure service profiles,
6786 * then the driver shall only use queues for which service profiles are pre-
6789 /* Input (24 bytes) */
6790 struct hwrm_queue_qportcfg_input {
6793 * This value indicates what type of request this is. The format
6794 * for the rest of the command is determined by this field.
6798 * This value indicates the what completion ring the request
6799 * will be optionally completed on. If the value is -1, then no
6800 * CR completion will be generated. Any other value must be a
6801 * valid CR ring_id value for this function.
6804 /* This value indicates the command sequence number. */
6807 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6808 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6813 * This is the host address where the response will be written
6814 * when the request is complete. This area must be 16B aligned
6815 * and must be cleared to zero before the request is made.
6819 * Enumeration denoting the RX, TX type of the resource. This
6820 * enumeration is used for resources that are similar for both
6821 * TX and RX paths of the chip.
6823 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
6825 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
6827 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
6828 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
6829 QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
6832 * Port ID of port for which the queue configuration is being
6833 * queried. This field is only required when sent by IPC.
6836 } __attribute__((packed));
6838 /* Output (32 bytes) */
6839 struct hwrm_queue_qportcfg_output {
6840 uint16_t error_code;
6842 * Pass/Fail or error type Note: receiver to verify the in
6843 * parameters, and fail the call with an error when appropriate
6846 /* This field returns the type of original request. */
6848 /* This field provides original sequence number of the command. */
6851 * This field is the length of the response in bytes. The last
6852 * byte of the response is a valid flag that will read as '1'
6853 * when the command has been completely written to memory.
6855 uint8_t max_configurable_queues;
6857 * The maximum number of queues that can be configured on this
6858 * port. Valid values range from 1 through 8.
6860 uint8_t max_configurable_lossless_queues;
6862 * The maximum number of lossless queues that can be configured
6863 * on this port. Valid values range from 0 through 8.
6865 uint8_t queue_cfg_allowed;
6867 * Bitmask indicating which queues can be configured by the
6868 * hwrm_queue_cfg command. Each bit represents a specific queue
6869 * where bit 0 represents queue 0 and bit 7 represents queue 7.
6870 * # A value of 0 indicates that the queue is not configurable
6871 * by the hwrm_queue_cfg command. # A value of 1 indicates that
6872 * the queue is configurable. # A hwrm_queue_cfg command shall
6873 * return error when trying to configure a queue not
6876 uint8_t queue_cfg_info;
6877 /* Information about queue configuration. */
6879 * If this flag is set to '1', then the queues are configured
6880 * asymmetrically on TX and RX sides. If this flag is set to
6881 * '0', then the queues are configured symmetrically on TX and
6882 * RX sides. For symmetric configuration, the queue
6883 * configuration including queue ids and service profiles on the
6884 * TX side is the same as the corresponding queue configuration
6887 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG UINT32_C(0x1)
6888 uint8_t queue_pfcenable_cfg_allowed;
6890 * Bitmask indicating which queues can be configured by the
6891 * hwrm_queue_pfcenable_cfg command. Each bit represents a
6892 * specific priority where bit 0 represents priority 0 and bit 7
6893 * represents priority 7. # A value of 0 indicates that the
6894 * priority is not configurable by the hwrm_queue_pfcenable_cfg
6895 * command. # A value of 1 indicates that the priority is
6896 * configurable. # A hwrm_queue_pfcenable_cfg command shall
6897 * return error when trying to configure a priority that is not
6900 uint8_t queue_pri2cos_cfg_allowed;
6902 * Bitmask indicating which queues can be configured by the
6903 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6904 * specific queue where bit 0 represents queue 0 and bit 7
6905 * represents queue 7. # A value of 0 indicates that the queue
6906 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6907 * A value of 1 indicates that the queue is configurable. # A
6908 * hwrm_queue_pri2cos_cfg command shall return error when trying
6909 * to configure a queue that is not configurable.
6911 uint8_t queue_cos2bw_cfg_allowed;
6913 * Bitmask indicating which queues can be configured by the
6914 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6915 * specific queue where bit 0 represents queue 0 and bit 7
6916 * represents queue 7. # A value of 0 indicates that the queue
6917 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6918 * A value of 1 indicates that the queue is configurable. # A
6919 * hwrm_queue_pri2cos_cfg command shall return error when trying
6920 * to configure a queue not configurable.
6924 * ID of CoS Queue 0. FF - Invalid id # This ID can be used on
6925 * any subsequent call to an hwrm command that takes a queue id.
6926 * # IDs must always be queried by this command before any use
6927 * by the driver or software. # Any driver or software should
6928 * not make any assumptions about queue IDs. # A value of 0xff
6929 * indicates that the queue is not available. # Available queues
6930 * may not be in sequential order.
6932 uint8_t queue_id0_service_profile;
6933 /* This value is applicable to CoS queues only. */
6934 /* Lossy (best-effort) */
6935 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
6938 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
6941 * Set to 0xFF... (All Fs) if there is no
6942 * service profile specified
6944 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
6948 * ID of CoS Queue 1. FF - Invalid id # This ID can be used on
6949 * any subsequent call to an hwrm command that takes a queue id.
6950 * # IDs must always be queried by this command before any use
6951 * by the driver or software. # Any driver or software should
6952 * not make any assumptions about queue IDs. # A value of 0xff
6953 * indicates that the queue is not available. # Available queues
6954 * may not be in sequential order.
6956 uint8_t queue_id1_service_profile;
6957 /* This value is applicable to CoS queues only. */
6958 /* Lossy (best-effort) */
6959 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
6962 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
6965 * Set to 0xFF... (All Fs) if there is no
6966 * service profile specified
6968 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
6972 * ID of CoS Queue 2. FF - Invalid id # This ID can be used on
6973 * any subsequent call to an hwrm command that takes a queue id.
6974 * # IDs must always be queried by this command before any use
6975 * by the driver or software. # Any driver or software should
6976 * not make any assumptions about queue IDs. # A value of 0xff
6977 * indicates that the queue is not available. # Available queues
6978 * may not be in sequential order.
6980 uint8_t queue_id2_service_profile;
6981 /* This value is applicable to CoS queues only. */
6982 /* Lossy (best-effort) */
6983 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
6986 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
6989 * Set to 0xFF... (All Fs) if there is no
6990 * service profile specified
6992 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
6996 * ID of CoS Queue 3. FF - Invalid id # This ID can be used on
6997 * any subsequent call to an hwrm command that takes a queue id.
6998 * # IDs must always be queried by this command before any use
6999 * by the driver or software. # Any driver or software should
7000 * not make any assumptions about queue IDs. # A value of 0xff
7001 * indicates that the queue is not available. # Available queues
7002 * may not be in sequential order.
7004 uint8_t queue_id3_service_profile;
7005 /* This value is applicable to CoS queues only. */
7006 /* Lossy (best-effort) */
7007 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
7010 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
7013 * Set to 0xFF... (All Fs) if there is no
7014 * service profile specified
7016 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
7020 * ID of CoS Queue 4. FF - Invalid id # This ID can be used on
7021 * any subsequent call to an hwrm command that takes a queue id.
7022 * # IDs must always be queried by this command before any use
7023 * by the driver or software. # Any driver or software should
7024 * not make any assumptions about queue IDs. # A value of 0xff
7025 * indicates that the queue is not available. # Available queues
7026 * may not be in sequential order.
7028 uint8_t queue_id4_service_profile;
7029 /* This value is applicable to CoS queues only. */
7030 /* Lossy (best-effort) */
7031 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
7034 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
7037 * Set to 0xFF... (All Fs) if there is no
7038 * service profile specified
7040 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
7044 * ID of CoS Queue 5. FF - Invalid id # This ID can be used on
7045 * any subsequent call to an hwrm command that takes a queue id.
7046 * # IDs must always be queried by this command before any use
7047 * by the driver or software. # Any driver or software should
7048 * not make any assumptions about queue IDs. # A value of 0xff
7049 * indicates that the queue is not available. # Available queues
7050 * may not be in sequential order.
7052 uint8_t queue_id5_service_profile;
7053 /* This value is applicable to CoS queues only. */
7054 /* Lossy (best-effort) */
7055 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
7058 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
7061 * Set to 0xFF... (All Fs) if there is no
7062 * service profile specified
7064 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
7068 * ID of CoS Queue 6. FF - Invalid id # This ID can be used on
7069 * any subsequent call to an hwrm command that takes a queue id.
7070 * # IDs must always be queried by this command before any use
7071 * by the driver or software. # Any driver or software should
7072 * not make any assumptions about queue IDs. # A value of 0xff
7073 * indicates that the queue is not available. # Available queues
7074 * may not be in sequential order.
7076 uint8_t queue_id6_service_profile;
7077 /* This value is applicable to CoS queues only. */
7078 /* Lossy (best-effort) */
7079 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
7082 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
7085 * Set to 0xFF... (All Fs) if there is no
7086 * service profile specified
7088 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
7092 * ID of CoS Queue 7. FF - Invalid id # This ID can be used on
7093 * any subsequent call to an hwrm command that takes a queue id.
7094 * # IDs must always be queried by this command before any use
7095 * by the driver or software. # Any driver or software should
7096 * not make any assumptions about queue IDs. # A value of 0xff
7097 * indicates that the queue is not available. # Available queues
7098 * may not be in sequential order.
7100 uint8_t queue_id7_service_profile;
7101 /* This value is applicable to CoS queues only. */
7102 /* Lossy (best-effort) */
7103 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
7106 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
7109 * Set to 0xFF... (All Fs) if there is no
7110 * service profile specified
7112 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
7116 * This field is used in Output records to indicate that the
7117 * output is completely written to RAM. This field should be
7118 * read as '1' to indicate that the output has been completely
7119 * written. When writing a command completion or response to an
7120 * internal processor, the order of writes has to be such that
7121 * this field is written last.
7123 } __attribute__((packed));
7125 /*********************
7126 * hwrm_port_mac_cfg *
7127 *********************/
7130 /* hwrm_port_mac_cfg_input (size:320b/40B) */
7131 struct hwrm_port_mac_cfg_input {
7138 #define PORT_MAC_CFG_REQ_FLAGS_MATCH_LINK 0x1UL
7139 #define PORT_MAC_CFG_REQ_FLAGS_VLAN_PRI2COS_ENABLE 0x2UL
7140 #define PORT_MAC_CFG_REQ_FLAGS_TUNNEL_PRI2COS_ENABLE 0x4UL
7141 #define PORT_MAC_CFG_REQ_FLAGS_IP_DSCP2COS_ENABLE 0x8UL
7142 #define PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_ENABLE 0x10UL
7143 #define PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_DISABLE 0x20UL
7144 #define PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_ENABLE 0x40UL
7145 #define PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_DISABLE 0x80UL
7146 #define PORT_MAC_CFG_REQ_FLAGS_OOB_WOL_ENABLE 0x100UL
7147 #define PORT_MAC_CFG_REQ_FLAGS_OOB_WOL_DISABLE 0x200UL
7148 #define PORT_MAC_CFG_REQ_FLAGS_VLAN_PRI2COS_DISABLE 0x400UL
7149 #define PORT_MAC_CFG_REQ_FLAGS_TUNNEL_PRI2COS_DISABLE 0x800UL
7150 #define PORT_MAC_CFG_REQ_FLAGS_IP_DSCP2COS_DISABLE 0x1000UL
7152 #define PORT_MAC_CFG_REQ_ENABLES_IPG 0x1UL
7153 #define PORT_MAC_CFG_REQ_ENABLES_LPBK 0x2UL
7154 #define PORT_MAC_CFG_REQ_ENABLES_VLAN_PRI2COS_MAP_PRI 0x4UL
7155 #define PORT_MAC_CFG_REQ_ENABLES_TUNNEL_PRI2COS_MAP_PRI 0x10UL
7156 #define PORT_MAC_CFG_REQ_ENABLES_DSCP2COS_MAP_PRI 0x20UL
7157 #define PORT_MAC_CFG_REQ_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE 0x40UL
7158 #define PORT_MAC_CFG_REQ_ENABLES_TX_TS_CAPTURE_PTP_MSG_TYPE 0x80UL
7159 #define PORT_MAC_CFG_REQ_ENABLES_COS_FIELD_CFG 0x100UL
7163 #define PORT_MAC_CFG_REQ_LPBK_NONE 0x0UL
7164 #define PORT_MAC_CFG_REQ_LPBK_LOCAL 0x1UL
7165 #define PORT_MAC_CFG_REQ_LPBK_REMOTE 0x2UL
7166 #define PORT_MAC_CFG_REQ_LPBK_LAST PORT_MAC_CFG_REQ_LPBK_REMOTE
7167 uint8_t vlan_pri2cos_map_pri;
7169 uint8_t tunnel_pri2cos_map_pri;
7170 uint8_t dscp2pri_map_pri;
7171 uint16_t rx_ts_capture_ptp_msg_type;
7172 uint16_t tx_ts_capture_ptp_msg_type;
7173 uint8_t cos_field_cfg;
7174 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_RSVD1 0x1UL
7175 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_MASK 0x6UL
7176 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_SFT 1
7177 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_INNERMOST \
7179 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_OUTER \
7181 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_OUTERMOST \
7183 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED \
7185 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_LAST \
7186 PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED
7187 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_MASK 0x18UL
7188 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_SFT 3
7189 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_INNERMOST \
7191 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTER \
7193 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTERMOST \
7195 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED \
7197 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_LAST \
7198 PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED
7199 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_DEFAULT_COS_MASK 0xe0UL
7200 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_DEFAULT_COS_SFT 5
7201 uint8_t unused_0[3];
7205 /* hwrm_port_mac_cfg_output (size:128b/16B) */
7206 struct hwrm_port_mac_cfg_output {
7207 uint16_t error_code;
7215 #define PORT_MAC_CFG_RESP_LPBK_NONE 0x0UL
7216 #define PORT_MAC_CFG_RESP_LPBK_LOCAL 0x1UL
7217 #define PORT_MAC_CFG_RESP_LPBK_REMOTE 0x2UL
7218 #define PORT_MAC_CFG_RESP_LPBK_LAST PORT_MAC_CFG_RESP_LPBK_REMOTE
7224 /**********************
7225 * hwrm_port_mac_qcfg *
7226 **********************/
7229 /* hwrm_port_mac_qcfg_input (size:192b/24B) */
7230 struct hwrm_port_mac_qcfg_input {
7237 uint8_t unused_0[6];
7241 /* hwrm_port_mac_qcfg_output (size:192b/24B) */
7242 struct hwrm_port_mac_qcfg_output {
7243 uint16_t error_code;
7251 #define PORT_MAC_QCFG_RESP_LPBK_NONE 0x0UL
7252 #define PORT_MAC_QCFG_RESP_LPBK_LOCAL 0x1UL
7253 #define PORT_MAC_QCFG_RESP_LPBK_REMOTE 0x2UL
7254 #define PORT_MAC_QCFG_RESP_LPBK_LAST PORT_MAC_QCFG_RESP_LPBK_REMOTE
7255 uint8_t vlan_pri2cos_map_pri;
7257 #define PORT_MAC_QCFG_RESP_FLAGS_VLAN_PRI2COS_ENABLE 0x1UL
7258 #define PORT_MAC_QCFG_RESP_FLAGS_TUNNEL_PRI2COS_ENABLE 0x2UL
7259 #define PORT_MAC_QCFG_RESP_FLAGS_IP_DSCP2COS_ENABLE 0x4UL
7260 #define PORT_MAC_QCFG_RESP_FLAGS_OOB_WOL_ENABLE 0x8UL
7261 #define PORT_MAC_QCFG_RESP_FLAGS_PTP_RX_TS_CAPTURE_ENABLE 0x10UL
7262 #define PORT_MAC_QCFG_RESP_FLAGS_PTP_TX_TS_CAPTURE_ENABLE 0x20UL
7263 uint8_t tunnel_pri2cos_map_pri;
7264 uint8_t dscp2pri_map_pri;
7265 uint16_t rx_ts_capture_ptp_msg_type;
7266 uint16_t tx_ts_capture_ptp_msg_type;
7267 uint8_t cos_field_cfg;
7268 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_RSVD 0x1UL
7269 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_MASK 0x6UL
7270 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_SFT 1
7271 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_INNERMOST \
7273 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_OUTER \
7275 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_OUTERMOST \
7277 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED \
7279 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_LAST \
7280 PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED
7281 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_MASK 0x18UL
7282 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_SFT 3
7283 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_INNERMOST \
7285 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTER \
7287 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTERMOST \
7289 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED \
7291 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_LAST \
7292 PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED
7293 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_DEFAULT_COS_MASK 0xe0UL
7294 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_DEFAULT_COS_SFT 5
7299 /**************************
7300 * hwrm_port_mac_ptp_qcfg *
7301 **************************/
7304 /* hwrm_port_mac_ptp_qcfg_input (size:192b/24B) */
7305 struct hwrm_port_mac_ptp_qcfg_input {
7312 uint8_t unused_0[6];
7316 /* hwrm_port_mac_ptp_qcfg_output (size:640b/80B) */
7317 struct hwrm_port_mac_ptp_qcfg_output {
7318 uint16_t error_code;
7323 #define PORT_MAC_PTP_QCFG_RESP_FLAGS_DIRECT_ACCESS 0x1UL
7324 #define PORT_MAC_PTP_QCFG_RESP_FLAGS_HWRM_ACCESS 0x2UL
7325 uint8_t unused_0[3];
7326 uint32_t rx_ts_reg_off_lower;
7327 uint32_t rx_ts_reg_off_upper;
7328 uint32_t rx_ts_reg_off_seq_id;
7329 uint32_t rx_ts_reg_off_src_id_0;
7330 uint32_t rx_ts_reg_off_src_id_1;
7331 uint32_t rx_ts_reg_off_src_id_2;
7332 uint32_t rx_ts_reg_off_domain_id;
7333 uint32_t rx_ts_reg_off_fifo;
7334 uint32_t rx_ts_reg_off_fifo_adv;
7335 uint32_t rx_ts_reg_off_granularity;
7336 uint32_t tx_ts_reg_off_lower;
7337 uint32_t tx_ts_reg_off_upper;
7338 uint32_t tx_ts_reg_off_seq_id;
7339 uint32_t tx_ts_reg_off_fifo;
7340 uint32_t tx_ts_reg_off_granularity;
7341 uint8_t unused_1[7];
7346 /* hwrm_vnic_alloc */
7348 * Description: This VNIC is a resource in the RX side of the chip that is used
7349 * to represent a virtual host "interface". # At the time of VNIC allocation or
7350 * configuration, the function can specify whether it wants the requested VNIC
7351 * to be the default VNIC for the function or not. # If a function requests
7352 * allocation of a VNIC for the first time and a VNIC is successfully allocated
7353 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
7354 * for that function. # The default VNIC shall be used for the default action
7355 * for a partition or function. # For each VNIC allocated on a function, a
7356 * mapping on the RX side to map the allocated VNIC to source virtual interface
7357 * shall be performed by the HWRM. This should be hidden to the function driver
7358 * requesting the VNIC allocation. This enables broadcast/multicast replication
7359 * with source knockout. # If multicast replication with source knockout is
7360 * enabled, then the internal VNIC to SVIF mapping data structures shall be
7361 * programmed at the time of VNIC allocation.
7363 /* Input (24 bytes) */
7364 struct hwrm_vnic_alloc_input {
7367 * This value indicates what type of request this is. The format
7368 * for the rest of the command is determined by this field.
7372 * This value indicates the what completion ring the request
7373 * will be optionally completed on. If the value is -1, then no
7374 * CR completion will be generated. Any other value must be a
7375 * valid CR ring_id value for this function.
7378 /* This value indicates the command sequence number. */
7381 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7382 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7387 * This is the host address where the response will be written
7388 * when the request is complete. This area must be 16B aligned
7389 * and must be cleared to zero before the request is made.
7393 * When this bit is '1', this VNIC is requested to be the
7394 * default VNIC for this function.
7396 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7398 } __attribute__((packed));
7400 /* Output (16 bytes) */
7401 struct hwrm_vnic_alloc_output {
7402 uint16_t error_code;
7404 * Pass/Fail or error type Note: receiver to verify the in
7405 * parameters, and fail the call with an error when appropriate
7408 /* This field returns the type of original request. */
7410 /* This field provides original sequence number of the command. */
7413 * This field is the length of the response in bytes. The last
7414 * byte of the response is a valid flag that will read as '1'
7415 * when the command has been completely written to memory.
7418 /* Logical vnic ID */
7424 * This field is used in Output records to indicate that the
7425 * output is completely written to RAM. This field should be
7426 * read as '1' to indicate that the output has been completely
7427 * written. When writing a command completion or response to an
7428 * internal processor, the order of writes has to be such that
7429 * this field is written last.
7431 } __attribute__((packed));
7433 /* hwrm_vnic_free */
7435 * Description: Free a VNIC resource. Idle any resources associated with the
7436 * VNIC as well as the VNIC. Reset and release all resources associated with the
7439 /* Input (24 bytes) */
7440 struct hwrm_vnic_free_input {
7443 * This value indicates what type of request this is. The format
7444 * for the rest of the command is determined by this field.
7448 * This value indicates the what completion ring the request
7449 * will be optionally completed on. If the value is -1, then no
7450 * CR completion will be generated. Any other value must be a
7451 * valid CR ring_id value for this function.
7454 /* This value indicates the command sequence number. */
7457 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7458 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7463 * This is the host address where the response will be written
7464 * when the request is complete. This area must be 16B aligned
7465 * and must be cleared to zero before the request is made.
7468 /* Logical vnic ID */
7470 } __attribute__((packed));
7472 /* Output (16 bytes) */
7473 struct hwrm_vnic_free_output {
7474 uint16_t error_code;
7476 * Pass/Fail or error type Note: receiver to verify the in
7477 * parameters, and fail the call with an error when appropriate
7480 /* This field returns the type of original request. */
7482 /* This field provides original sequence number of the command. */
7485 * This field is the length of the response in bytes. The last
7486 * byte of the response is a valid flag that will read as '1'
7487 * when the command has been completely written to memory.
7495 * This field is used in Output records to indicate that the
7496 * output is completely written to RAM. This field should be
7497 * read as '1' to indicate that the output has been completely
7498 * written. When writing a command completion or response to an
7499 * internal processor, the order of writes has to be such that
7500 * this field is written last.
7502 } __attribute__((packed));
7505 /* Description: Configure the RX VNIC structure. */
7506 /* Input (40 bytes) */
7507 struct hwrm_vnic_cfg_input {
7510 * This value indicates what type of request this is. The format
7511 * for the rest of the command is determined by this field.
7515 * This value indicates the what completion ring the request
7516 * will be optionally completed on. If the value is -1, then no
7517 * CR completion will be generated. Any other value must be a
7518 * valid CR ring_id value for this function.
7521 /* This value indicates the command sequence number. */
7524 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7525 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7530 * This is the host address where the response will be written
7531 * when the request is complete. This area must be 16B aligned
7532 * and must be cleared to zero before the request is made.
7536 * When this bit is '1', the VNIC is requested to be the default
7537 * VNIC for the function.
7539 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7541 * When this bit is '1', the VNIC is being configured to strip
7542 * VLAN in the RX path. If set to '0', then VLAN stripping is
7543 * disabled on this VNIC.
7545 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7547 * When this bit is '1', the VNIC is being configured to buffer
7548 * receive packets in the hardware until the host posts new
7549 * receive buffers. If set to '0', then bd_stall is being
7550 * configured to be disabled on this VNIC.
7552 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7554 * When this bit is '1', the VNIC is being configured to receive
7555 * both RoCE and non-RoCE traffic. If set to '0', then this VNIC
7556 * is not configured to be operating in dual VNIC mode.
7558 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7560 * When this flag is set to '1', the VNIC is requested to be
7561 * configured to receive only RoCE traffic. If this flag is set
7562 * to '0', then this flag shall be ignored by the HWRM. If
7563 * roce_dual_vnic_mode flag is set to '1', then the HWRM client
7564 * shall not set this flag to '1'.
7566 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7568 * When a VNIC uses one destination ring group for certain
7569 * application (e.g. Receive Flow Steering) where exact match is
7570 * used to direct packets to a VNIC with one destination ring
7571 * group only, there is no need to configure RSS indirection
7572 * table for that VNIC as only one destination ring group is
7573 * used. This flag is used to enable a mode where RSS is enabled
7574 * in the VNIC using a RSS context for computing RSS hash but
7575 * the RSS indirection table is not configured using
7576 * hwrm_vnic_rss_cfg. If this mode is enabled, then the driver
7577 * should not program RSS indirection table for the RSS context
7578 * that is used for computing RSS hash only.
7580 #define HWRM_VNIC_CFG_INPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7582 * When this bit is '1', the VNIC is being configured to receive
7583 * both RoCE and non-RoCE traffic, but forward only the RoCE
7584 * traffic further. Also, RoCE traffic can be mirrored to L2
7587 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_MODE \
7591 * This bit must be '1' for the dflt_ring_grp field to be
7594 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
7595 /* This bit must be '1' for the rss_rule field to be configured. */
7596 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
7597 /* This bit must be '1' for the cos_rule field to be configured. */
7598 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
7599 /* This bit must be '1' for the lb_rule field to be configured. */
7600 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
7601 /* This bit must be '1' for the mru field to be configured. */
7602 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
7604 /* Logical vnic ID */
7605 uint16_t dflt_ring_grp;
7607 * Default Completion ring for the VNIC. This ring will be
7608 * chosen if packet does not match any RSS rules and if there is
7613 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7614 * there is no RSS rule.
7618 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7619 * there is no COS rule.
7623 * RSS ID for load balancing rule/table structure. 0xFF... (All
7624 * Fs) if there is no LB rule.
7628 * The maximum receive unit of the vnic. Each vnic is associated
7629 * with a function. The vnic mru value overwrites the mru
7630 * setting of the associated function. The HWRM shall make sure
7631 * that vnic mru does not exceed the mru of the port the
7632 * function is associated with.
7635 } __attribute__((packed));
7637 /* Output (16 bytes) */
7638 struct hwrm_vnic_cfg_output {
7639 uint16_t error_code;
7641 * Pass/Fail or error type Note: receiver to verify the in
7642 * parameters, and fail the call with an error when appropriate
7645 /* This field returns the type of original request. */
7647 /* This field provides original sequence number of the command. */
7650 * This field is the length of the response in bytes. The last
7651 * byte of the response is a valid flag that will read as '1'
7652 * when the command has been completely written to memory.
7660 * This field is used in Output records to indicate that the
7661 * output is completely written to RAM. This field should be
7662 * read as '1' to indicate that the output has been completely
7663 * written. When writing a command completion or response to an
7664 * internal processor, the order of writes has to be such that
7665 * this field is written last.
7667 } __attribute__((packed));
7669 /* hwrm_vnic_qcfg */
7671 * Description: Query the RX VNIC structure. This function can be used by a PF
7672 * driver to query its own VNIC resource or VNIC resource of its child VF. This
7673 * function can also be used by a VF driver to query its own VNIC resource.
7675 /* Input (32 bytes) */
7676 struct hwrm_vnic_qcfg_input {
7679 * This value indicates what type of request this is. The format
7680 * for the rest of the command is determined by this field.
7684 * This value indicates the what completion ring the request
7685 * will be optionally completed on. If the value is -1, then no
7686 * CR completion will be generated. Any other value must be a
7687 * valid CR ring_id value for this function.
7690 /* This value indicates the command sequence number. */
7693 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7694 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7699 * This is the host address where the response will be written
7700 * when the request is complete. This area must be 16B aligned
7701 * and must be cleared to zero before the request is made.
7704 /* This bit must be '1' for the vf_id_valid field to be configured. */
7705 #define HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
7707 /* Logical vnic ID */
7709 /* ID of Virtual Function whose VNIC resource is being queried. */
7710 uint16_t unused_0[3];
7711 } __attribute__((packed));
7713 /* Output (32 bytes) */
7714 struct hwrm_vnic_qcfg_output {
7715 uint16_t error_code;
7717 * Pass/Fail or error type Note: receiver to verify the in
7718 * parameters, and fail the call with an error when appropriate
7721 /* This field returns the type of original request. */
7723 /* This field provides original sequence number of the command. */
7726 * This field is the length of the response in bytes. The last
7727 * byte of the response is a valid flag that will read as '1'
7728 * when the command has been completely written to memory.
7730 uint16_t dflt_ring_grp;
7731 /* Default Completion ring for the VNIC. */
7734 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7735 * there is no RSS rule.
7739 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7740 * there is no COS rule.
7744 * RSS ID for load balancing rule/table structure. 0xFF... (All
7745 * Fs) if there is no LB rule.
7748 /* The maximum receive unit of the vnic. */
7753 * When this bit is '1', the VNIC is the default VNIC for the
7756 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_DEFAULT UINT32_C(0x1)
7758 * When this bit is '1', the VNIC is configured to strip VLAN in
7759 * the RX path. If set to '0', then VLAN stripping is disabled
7762 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7764 * When this bit is '1', the VNIC is configured to buffer
7765 * receive packets in the hardware until the host posts new
7766 * receive buffers. If set to '0', then bd_stall is disabled on
7769 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7771 * When this bit is '1', the VNIC is configured to receive both
7772 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is
7773 * not configured to operate in dual VNIC mode.
7775 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7777 * When this flag is set to '1', the VNIC is configured to
7778 * receive only RoCE traffic. When this flag is set to '0', the
7779 * VNIC is not configured to receive only RoCE traffic. If
7780 * roce_dual_vnic_mode flag and this flag both are set to '1',
7781 * then it is an invalid configuration of the VNIC. The HWRM
7782 * should not allow that type of mis-configuration by HWRM
7785 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7787 * When a VNIC uses one destination ring group for certain
7788 * application (e.g. Receive Flow Steering) where exact match is
7789 * used to direct packets to a VNIC with one destination ring
7790 * group only, there is no need to configure RSS indirection
7791 * table for that VNIC as only one destination ring group is
7792 * used. When this bit is set to '1', then the VNIC is enabled
7793 * in a mode where RSS is enabled in the VNIC using a RSS
7794 * context for computing RSS hash but the RSS indirection table
7795 * is not configured.
7797 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7799 * When this bit is '1', the VNIC is configured to receive both
7800 * RoCE and non-RoCE traffic, but forward only RoCE traffic
7801 * further. Also RoCE traffic can be mirrored to L2 driver.
7803 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_MODE \
7811 * This field is used in Output records to indicate that the
7812 * output is completely written to RAM. This field should be
7813 * read as '1' to indicate that the output has been completely
7814 * written. When writing a command completion or response to an
7815 * internal processor, the order of writes has to be such that
7816 * this field is written last.
7818 } __attribute__((packed));
7821 /* hwrm_vnic_tpa_cfg */
7822 /* Description: This function is used to enable/configure TPA on the VNIC. */
7823 /* Input (40 bytes) */
7824 struct hwrm_vnic_tpa_cfg_input {
7827 * This value indicates what type of request this is. The format
7828 * for the rest of the command is determined by this field.
7832 * This value indicates the what completion ring the request
7833 * will be optionally completed on. If the value is -1, then no
7834 * CR completion will be generated. Any other value must be a
7835 * valid CR ring_id value for this function.
7838 /* This value indicates the command sequence number. */
7841 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7842 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7847 * This is the host address where the response will be written
7848 * when the request is complete. This area must be 16B aligned
7849 * and must be cleared to zero before the request is made.
7853 * When this bit is '1', the VNIC shall be configured to perform
7854 * transparent packet aggregation (TPA) of non-tunneled TCP
7857 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA UINT32_C(0x1)
7859 * When this bit is '1', the VNIC shall be configured to perform
7860 * transparent packet aggregation (TPA) of tunneled TCP packets.
7862 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_ENCAP_TPA UINT32_C(0x2)
7864 * When this bit is '1', the VNIC shall be configured to perform
7865 * transparent packet aggregation (TPA) according to Windows
7866 * Receive Segment Coalescing (RSC) rules.
7868 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_RSC_WND_UPDATE UINT32_C(0x4)
7870 * When this bit is '1', the VNIC shall be configured to perform
7871 * transparent packet aggregation (TPA) according to Linux
7872 * Generic Receive Offload (GRO) rules.
7874 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO UINT32_C(0x8)
7876 * When this bit is '1', the VNIC shall be configured to perform
7877 * transparent packet aggregation (TPA) for TCP packets with IP
7878 * ECN set to non-zero.
7880 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN UINT32_C(0x10)
7882 * When this bit is '1', the VNIC shall be configured to perform
7883 * transparent packet aggregation (TPA) for GRE tunneled TCP
7884 * packets only if all packets have the same GRE sequence.
7886 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ \
7889 * When this bit is '1' and the GRO mode is enabled, the VNIC
7890 * shall be configured to perform transparent packet aggregation
7891 * (TPA) for TCP/IPv4 packets with consecutively increasing
7892 * IPIDs. In other words, the last packet that is being
7893 * aggregated to an already existing aggregation context shall
7894 * have IPID 1 more than the IPID of the last packet that was
7895 * aggregated in that aggregation context.
7897 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_IPID_CHECK UINT32_C(0x40)
7899 * When this bit is '1' and the GRO mode is enabled, the VNIC
7900 * shall be configured to perform transparent packet aggregation
7901 * (TPA) for TCP packets with the same TTL (IPv4) or Hop limit
7904 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK UINT32_C(0x80)
7906 /* This bit must be '1' for the max_agg_segs field to be configured. */
7907 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS UINT32_C(0x1)
7908 /* This bit must be '1' for the max_aggs field to be configured. */
7909 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS UINT32_C(0x2)
7911 * This bit must be '1' for the max_agg_timer field to be
7914 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER UINT32_C(0x4)
7915 /* This bit must be '1' for the min_agg_len field to be configured. */
7916 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN UINT32_C(0x8)
7918 /* Logical vnic ID */
7919 uint16_t max_agg_segs;
7921 * This is the maximum number of TCP segments that can be
7922 * aggregated (unit is Log2). Max value is 31.
7925 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_1 UINT32_C(0x0)
7927 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_2 UINT32_C(0x1)
7929 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_4 UINT32_C(0x2)
7931 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_8 UINT32_C(0x3)
7932 /* Any segment size larger than this is not valid */
7933 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX UINT32_C(0x1f)
7936 * This is the maximum number of aggregations this VNIC is
7937 * allowed (unit is Log2). Max value is 7
7940 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_1 UINT32_C(0x0)
7941 /* 2 aggregations */
7942 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_2 UINT32_C(0x1)
7943 /* 4 aggregations */
7944 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_4 UINT32_C(0x2)
7945 /* 8 aggregations */
7946 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_8 UINT32_C(0x3)
7947 /* 16 aggregations */
7948 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_16 UINT32_C(0x4)
7949 /* Any aggregation size larger than this is not valid */
7950 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX UINT32_C(0x7)
7953 uint32_t max_agg_timer;
7955 * This is the maximum amount of time allowed for an aggregation
7956 * context to complete after it was initiated.
7958 uint32_t min_agg_len;
7960 * This is the minimum amount of payload length required to
7961 * start an aggregation context.
7963 } __attribute__((packed));
7965 /* Output (16 bytes) */
7966 struct hwrm_vnic_tpa_cfg_output {
7967 uint16_t error_code;
7969 * Pass/Fail or error type Note: receiver to verify the in
7970 * parameters, and fail the call with an error when appropriate
7973 /* This field returns the type of original request. */
7975 /* This field provides original sequence number of the command. */
7978 * This field is the length of the response in bytes. The last
7979 * byte of the response is a valid flag that will read as '1'
7980 * when the command has been completely written to memory.
7988 * This field is used in Output records to indicate that the
7989 * output is completely written to RAM. This field should be
7990 * read as '1' to indicate that the output has been completely
7991 * written. When writing a command completion or response to an
7992 * internal processor, the order of writes has to be such that
7993 * this field is written last.
7995 } __attribute__((packed));
7997 /* hwrm_vnic_rss_cfg */
7998 /* Description: This function is used to enable RSS configuration. */
7999 /* Input (48 bytes) */
8000 struct hwrm_vnic_rss_cfg_input {
8003 * This value indicates what type of request this is. The format
8004 * for the rest of the command is determined by this field.
8008 * This value indicates the what completion ring the request
8009 * will be optionally completed on. If the value is -1, then no
8010 * CR completion will be generated. Any other value must be a
8011 * valid CR ring_id value for this function.
8014 /* This value indicates the command sequence number. */
8017 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8018 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8023 * This is the host address where the response will be written
8024 * when the request is complete. This area must be 16B aligned
8025 * and must be cleared to zero before the request is made.
8029 * When this bit is '1', the RSS hash shall be computed over
8030 * source and destination IPv4 addresses of IPv4 packets.
8032 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
8034 * When this bit is '1', the RSS hash shall be computed over
8035 * source/destination IPv4 addresses and source/destination
8036 * ports of TCP/IPv4 packets.
8038 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
8040 * When this bit is '1', the RSS hash shall be computed over
8041 * source/destination IPv4 addresses and source/destination
8042 * ports of UDP/IPv4 packets.
8044 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
8046 * When this bit is '1', the RSS hash shall be computed over
8047 * source and destination IPv4 addresses of IPv6 packets.
8049 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
8051 * When this bit is '1', the RSS hash shall be computed over
8052 * source/destination IPv6 addresses and source/destination
8053 * ports of TCP/IPv6 packets.
8055 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
8057 * When this bit is '1', the RSS hash shall be computed over
8058 * source/destination IPv6 addresses and source/destination
8059 * ports of UDP/IPv6 packets.
8061 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
8063 uint64_t ring_grp_tbl_addr;
8064 /* This is the address for rss ring group table */
8065 uint64_t hash_key_tbl_addr;
8066 /* This is the address for rss hash key table */
8067 uint16_t rss_ctx_idx;
8068 /* Index to the rss indirection table. */
8069 uint16_t unused_1[3];
8070 } __attribute__((packed));
8072 /* Output (16 bytes) */
8073 struct hwrm_vnic_rss_cfg_output {
8074 uint16_t error_code;
8076 * Pass/Fail or error type Note: receiver to verify the in
8077 * parameters, and fail the call with an error when appropriate
8080 /* This field returns the type of original request. */
8082 /* This field provides original sequence number of the command. */
8085 * This field is the length of the response in bytes. The last
8086 * byte of the response is a valid flag that will read as '1'
8087 * when the command has been completely written to memory.
8095 * This field is used in Output records to indicate that the
8096 * output is completely written to RAM. This field should be
8097 * read as '1' to indicate that the output has been completely
8098 * written. When writing a command completion or response to an
8099 * internal processor, the order of writes has to be such that
8100 * this field is written last.
8102 } __attribute__((packed));
8104 /* hwrm_vnic_plcmodes_cfg */
8106 * Description: This function can be used to set placement mode configuration of
8109 /* Input (40 bytes) */
8110 struct hwrm_vnic_plcmodes_cfg_input {
8113 * This value indicates what type of request this is. The format for the
8114 * rest of the command is determined by this field.
8118 * This value indicates the what completion ring the request will be
8119 * optionally completed on. If the value is -1, then no CR completion
8120 * will be generated. Any other value must be a valid CR ring_id value
8121 * for this function.
8124 /* This value indicates the command sequence number. */
8127 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8128 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8132 * This is the host address where the response will be written when the
8133 * request is complete. This area must be 16B aligned and must be
8134 * cleared to zero before the request is made.
8138 * When this bit is '1', the VNIC shall be configured to use regular
8139 * placement algorithm. By default, the regular placement algorithm
8140 * shall be enabled on the VNIC.
8142 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT \
8145 * When this bit is '1', the VNIC shall be configured use the jumbo
8146 * placement algorithm.
8148 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT \
8151 * When this bit is '1', the VNIC shall be configured to enable Header-
8152 * Data split for IPv4 packets according to the following rules: # If
8153 * the packet is identified as TCP/IPv4, then the packet is split at the
8154 * beginning of the TCP payload. # If the packet is identified as
8155 * UDP/IPv4, then the packet is split at the beginning of UDP payload. #
8156 * If the packet is identified as non-TCP and non-UDP IPv4 packet, then
8157 * the packet is split at the beginning of the upper layer protocol
8158 * header carried in the IPv4 packet.
8160 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
8162 * When this bit is '1', the VNIC shall be configured to enable Header-
8163 * Data split for IPv6 packets according to the following rules: # If
8164 * the packet is identified as TCP/IPv6, then the packet is split at the
8165 * beginning of the TCP payload. # If the packet is identified as
8166 * UDP/IPv6, then the packet is split at the beginning of UDP payload. #
8167 * If the packet is identified as non-TCP and non-UDP IPv6 packet, then
8168 * the packet is split at the beginning of the upper layer protocol
8169 * header carried in the IPv6 packet.
8171 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
8173 * When this bit is '1', the VNIC shall be configured to enable Header-
8174 * Data split for FCoE packets at the beginning of FC payload.
8176 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
8178 * When this bit is '1', the VNIC shall be configured to enable Header-
8179 * Data split for RoCE packets at the beginning of RoCE payload (after
8182 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
8185 * This bit must be '1' for the jumbo_thresh_valid field to be
8188 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID \
8191 * This bit must be '1' for the hds_offset_valid field to be configured.
8193 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_OFFSET_VALID \
8196 * This bit must be '1' for the hds_threshold_valid field to be
8199 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID \
8202 /* Logical vnic ID */
8203 uint16_t jumbo_thresh;
8205 * When jumbo placement algorithm is enabled, this value is used to
8206 * determine the threshold for jumbo placement. Packets with length
8207 * larger than this value will be placed according to the jumbo
8208 * placement algorithm.
8210 uint16_t hds_offset;
8212 * This value is used to determine the offset into packet buffer where
8213 * the split data (payload) will be placed according to one of of HDS
8214 * placement algorithm. The lengths of packet buffers provided for split
8215 * data shall be larger than this value.
8217 uint16_t hds_threshold;
8219 * When one of the HDS placement algorithm is enabled, this value is
8220 * used to determine the threshold for HDS placement. Packets with
8221 * length larger than this value will be placed according to the HDS
8222 * placement algorithm. This value shall be in multiple of 4 bytes.
8224 uint16_t unused_0[3];
8225 } __attribute__((packed));
8227 /* Output (16 bytes) */
8228 struct hwrm_vnic_plcmodes_cfg_output {
8229 uint16_t error_code;
8231 * Pass/Fail or error type Note: receiver to verify the in parameters,
8232 * and fail the call with an error when appropriate
8235 /* This field returns the type of original request. */
8237 /* This field provides original sequence number of the command. */
8240 * This field is the length of the response in bytes. The last byte of
8241 * the response is a valid flag that will read as '1' when the command
8242 * has been completely written to memory.
8250 * This field is used in Output records to indicate that the output is
8251 * completely written to RAM. This field should be read as '1' to
8252 * indicate that the output has been completely written. When writing a
8253 * command completion or response to an internal processor, the order of
8254 * writes has to be such that this field is written last.
8256 } __attribute__((packed));
8258 /* hwrm_vnic_plcmodes_qcfg */
8260 * Description: This function can be used to query placement mode configuration
8263 /* Input (24 bytes) */
8264 struct hwrm_vnic_plcmodes_qcfg_input {
8267 * This value indicates what type of request this is. The format for the
8268 * rest of the command is determined by this field.
8272 * This value indicates the what completion ring the request will be
8273 * optionally completed on. If the value is -1, then no CR completion
8274 * will be generated. Any other value must be a valid CR ring_id value
8275 * for this function.
8278 /* This value indicates the command sequence number. */
8281 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8282 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8286 * This is the host address where the response will be written when the
8287 * request is complete. This area must be 16B aligned and must be
8288 * cleared to zero before the request is made.
8291 /* Logical vnic ID */
8293 } __attribute__((packed));
8295 /* Output (24 bytes) */
8296 struct hwrm_vnic_plcmodes_qcfg_output {
8297 uint16_t error_code;
8299 * Pass/Fail or error type Note: receiver to verify the in parameters,
8300 * and fail the call with an error when appropriate
8303 /* This field returns the type of original request. */
8305 /* This field provides original sequence number of the command. */
8308 * This field is the length of the response in bytes. The last byte of
8309 * the response is a valid flag that will read as '1' when the command
8310 * has been completely written to memory.
8314 * When this bit is '1', the VNIC is configured to use regular placement
8317 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_REGULAR_PLACEMENT \
8320 * When this bit is '1', the VNIC is configured to use the jumbo
8321 * placement algorithm.
8323 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_JUMBO_PLACEMENT \
8326 * When this bit is '1', the VNIC is configured to enable Header-Data
8327 * split for IPv4 packets.
8329 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
8331 * When this bit is '1', the VNIC is configured to enable Header-Data
8332 * split for IPv6 packets.
8334 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
8336 * When this bit is '1', the VNIC is configured to enable Header-Data
8337 * split for FCoE packets.
8339 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
8341 * When this bit is '1', the VNIC is configured to enable Header-Data
8342 * split for RoCE packets.
8344 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
8346 * When this bit is '1', the VNIC is configured to be the default VNIC
8347 * of the requesting function.
8349 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_DFLT_VNIC UINT32_C(0x40)
8350 uint16_t jumbo_thresh;
8352 * When jumbo placement algorithm is enabled, this value is used to
8353 * determine the threshold for jumbo placement. Packets with length
8354 * larger than this value will be placed according to the jumbo
8355 * placement algorithm.
8357 uint16_t hds_offset;
8359 * This value is used to determine the offset into packet buffer where
8360 * the split data (payload) will be placed according to one of of HDS
8361 * placement algorithm. The lengths of packet buffers provided for split
8362 * data shall be larger than this value.
8364 uint16_t hds_threshold;
8366 * When one of the HDS placement algorithm is enabled, this value is
8367 * used to determine the threshold for HDS placement. Packets with
8368 * length larger than this value will be placed according to the HDS
8369 * placement algorithm. This value shall be in multiple of 4 bytes.
8378 * This field is used in Output records to indicate that the output is
8379 * completely written to RAM. This field should be read as '1' to
8380 * indicate that the output has been completely written. When writing a
8381 * command completion or response to an internal processor, the order of
8382 * writes has to be such that this field is written last.
8384 } __attribute__((packed));
8386 /* hwrm_vnic_rss_cos_lb_ctx_alloc */
8387 /* Description: This function is used to allocate COS/Load Balance context. */
8388 /* Input (16 bytes) */
8389 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
8392 * This value indicates what type of request this is. The format
8393 * for the rest of the command is determined by this field.
8397 * This value indicates the what completion ring the request
8398 * will be optionally completed on. If the value is -1, then no
8399 * CR completion will be generated. Any other value must be a
8400 * valid CR ring_id value for this function.
8403 /* This value indicates the command sequence number. */
8406 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8407 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8412 * This is the host address where the response will be written
8413 * when the request is complete. This area must be 16B aligned
8414 * and must be cleared to zero before the request is made.
8416 } __attribute__((packed));
8418 /* Output (16 bytes) */
8419 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
8420 uint16_t error_code;
8422 * Pass/Fail or error type Note: receiver to verify the in
8423 * parameters, and fail the call with an error when appropriate
8426 /* This field returns the type of original request. */
8428 /* This field provides original sequence number of the command. */
8431 * This field is the length of the response in bytes. The last
8432 * byte of the response is a valid flag that will read as '1'
8433 * when the command has been completely written to memory.
8435 uint16_t rss_cos_lb_ctx_id;
8436 /* rss_cos_lb_ctx_id is 16 b */
8444 * This field is used in Output records to indicate that the
8445 * output is completely written to RAM. This field should be
8446 * read as '1' to indicate that the output has been completely
8447 * written. When writing a command completion or response to an
8448 * internal processor, the order of writes has to be such that
8449 * this field is written last.
8451 } __attribute__((packed));
8453 /* hwrm_vnic_rss_cos_lb_ctx_free */
8454 /* Description: This function can be used to free COS/Load Balance context. */
8455 /* Input (24 bytes) */
8456 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
8459 * This value indicates what type of request this is. The format
8460 * for the rest of the command is determined by this field.
8464 * This value indicates the what completion ring the request
8465 * will be optionally completed on. If the value is -1, then no
8466 * CR completion will be generated. Any other value must be a
8467 * valid CR ring_id value for this function.
8470 /* This value indicates the command sequence number. */
8473 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8474 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8479 * This is the host address where the response will be written
8480 * when the request is complete. This area must be 16B aligned
8481 * and must be cleared to zero before the request is made.
8483 uint16_t rss_cos_lb_ctx_id;
8484 /* rss_cos_lb_ctx_id is 16 b */
8485 uint16_t unused_0[3];
8486 } __attribute__((packed));
8488 /* Output (16 bytes) */
8489 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
8490 uint16_t error_code;
8492 * Pass/Fail or error type Note: receiver to verify the in
8493 * parameters, and fail the call with an error when appropriate
8496 /* This field returns the type of original request. */
8498 /* This field provides original sequence number of the command. */
8501 * This field is the length of the response in bytes. The last
8502 * byte of the response is a valid flag that will read as '1'
8503 * when the command has been completely written to memory.
8511 * This field is used in Output records to indicate that the
8512 * output is completely written to RAM. This field should be
8513 * read as '1' to indicate that the output has been completely
8514 * written. When writing a command completion or response to an
8515 * internal processor, the order of writes has to be such that
8516 * this field is written last.
8518 } __attribute__((packed));
8520 /* hwrm_ring_alloc */
8522 * Description: This command allocates and does basic preparation for a ring.
8524 /* Input (80 bytes) */
8525 struct hwrm_ring_alloc_input {
8528 * This value indicates what type of request this is. The format
8529 * for the rest of the command is determined by this field.
8533 * This value indicates the what completion ring the request
8534 * will be optionally completed on. If the value is -1, then no
8535 * CR completion will be generated. Any other value must be a
8536 * valid CR ring_id value for this function.
8539 /* This value indicates the command sequence number. */
8542 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8543 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8548 * This is the host address where the response will be written
8549 * when the request is complete. This area must be 16B aligned
8550 * and must be cleared to zero before the request is made.
8553 /* This bit must be '1' for the Reserved1 field to be configured. */
8554 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
8555 /* This bit must be '1' for the ring_arb_cfg field to be configured. */
8556 #define HWRM_RING_ALLOC_INPUT_ENABLES_RING_ARB_CFG UINT32_C(0x2)
8557 /* This bit must be '1' for the Reserved3 field to be configured. */
8558 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
8560 * This bit must be '1' for the stat_ctx_id_valid field to be
8563 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
8564 /* This bit must be '1' for the Reserved4 field to be configured. */
8565 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
8566 /* This bit must be '1' for the max_bw_valid field to be configured. */
8567 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
8570 /* L2 Completion Ring (CR) */
8571 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8573 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1)
8575 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2)
8576 /* RoCE Notification Completion Ring (ROCE_CR) */
8577 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8580 uint64_t page_tbl_addr;
8581 /* This value is a pointer to the page table for the Ring. */
8583 /* First Byte Offset of the first entry in the first page. */
8586 * Actual page size in 2^page_size. The supported range is
8587 * increments in powers of 2 from 16 bytes to 1GB. - 4 = 16 B
8588 * Page size is 16 B. - 12 = 4 KB Page size is 4 KB. - 13 = 8 KB
8589 * Page size is 8 KB. - 16 = 64 KB Page size is 64 KB. - 21 = 2
8590 * MB Page size is 2 MB. - 22 = 4 MB Page size is 4 MB. - 30 = 1
8591 * GB Page size is 1 GB.
8593 uint8_t page_tbl_depth;
8595 * This value indicates the depth of page table. For this
8596 * version of the specification, value other than 0 or 1 shall
8597 * be considered as an invalid value. When the page_tbl_depth =
8598 * 0, then it is treated as a special case with the following.
8599 * 1. FBO and page size fields are not valid. 2. page_tbl_addr
8600 * is the physical address of the first element of the ring.
8606 * Number of 16B units in the ring. Minimum size for a ring is
8609 uint16_t logical_id;
8611 * Logical ring number for the ring to be allocated. This value
8612 * determines the position in the doorbell area where the update
8613 * to the ring will be made. For completion rings, this value is
8614 * also the MSI-X vector number for the function the completion
8615 * ring is associated with.
8617 uint16_t cmpl_ring_id;
8619 * This field is used only when ring_type is a TX ring. This
8620 * value indicates what completion ring the TX ring is
8625 * This field is used only when ring_type is a TX ring. This
8626 * value indicates what CoS queue the TX ring is associated
8632 /* This field is reserved for the future use. It shall be set to 0. */
8633 uint16_t ring_arb_cfg;
8635 * This field is used only when ring_type is a TX ring. This
8636 * field is used to configure arbitration related parameters for
8639 /* Arbitration policy used for the ring. */
8640 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK UINT32_C(0xf)
8641 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SFT 0
8643 * Use strict priority for the TX ring. Priority
8644 * value is specified in arb_policy_param
8646 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \
8647 (UINT32_C(0x1) << 0)
8649 * Use weighted fair queue arbitration for the
8650 * TX ring. Weight is specified in
8653 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \
8654 (UINT32_C(0x2) << 0)
8655 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \
8656 RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ
8657 /* Reserved field. */
8658 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_MASK UINT32_C(0xf0)
8659 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_SFT 4
8661 * Arbitration policy specific parameter. # For strict priority
8662 * arbitration policy, this field represents a priority value.
8663 * If set to 0, then the priority is not specified and the HWRM
8664 * is allowed to select any priority for this TX ring. # For
8665 * weighted fair queue arbitration policy, this field represents
8666 * a weight value. If set to 0, then the weight is not specified
8667 * and the HWRM is allowed to select any weight for this TX
8670 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_MASK \
8672 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8
8676 /* This field is reserved for the future use. It shall be set to 0. */
8677 uint32_t stat_ctx_id;
8679 * This field is used only when ring_type is a TX ring. This
8680 * input indicates what statistics context this ring should be
8684 /* This field is reserved for the future use. It shall be set to 0. */
8687 * This field is used only when ring_type is a TX ring to
8688 * specify maximum BW allocated to the TX ring. The HWRM will
8689 * translate this value into byte counter and time interval used
8690 * for this ring inside the device.
8692 /* The bandwidth value. */
8693 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
8694 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_SFT 0
8695 /* The granularity of the value (bits or bytes). */
8696 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
8697 /* Value is in bits. */
8698 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
8699 /* Value is in bytes. */
8700 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
8701 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_LAST \
8702 RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES
8703 /* bw_value_unit is 3 b */
8704 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
8705 UINT32_C(0xe0000000)
8706 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
8707 /* Value is in Mb or MB (base 10). */
8708 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
8709 (UINT32_C(0x0) << 29)
8710 /* Value is in Kb or KB (base 10). */
8711 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
8712 (UINT32_C(0x2) << 29)
8713 /* Value is in bits or bytes. */
8714 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
8715 (UINT32_C(0x4) << 29)
8716 /* Value is in Gb or GB (base 10). */
8717 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
8718 (UINT32_C(0x6) << 29)
8719 /* Value is in 1/100th of a percentage of total bandwidth. */
8720 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
8721 (UINT32_C(0x1) << 29)
8723 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
8724 (UINT32_C(0x7) << 29)
8725 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
8726 RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
8729 * This field is used only when ring_type is a Completion ring.
8730 * This value indicates what interrupt mode should be used on
8731 * this completion ring. Note: In the legacy interrupt mode, no
8732 * more than 16 completion rings are allowed.
8735 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY UINT32_C(0x0)
8737 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD UINT32_C(0x1)
8739 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX UINT32_C(0x2)
8740 /* No Interrupt - Polled mode */
8741 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL UINT32_C(0x3)
8742 uint8_t unused_8[3];
8743 } __attribute__((packed));
8745 /* Output (16 bytes) */
8746 struct hwrm_ring_alloc_output {
8747 uint16_t error_code;
8749 * Pass/Fail or error type Note: receiver to verify the in
8750 * parameters, and fail the call with an error when appropriate
8753 /* This field returns the type of original request. */
8755 /* This field provides original sequence number of the command. */
8758 * This field is the length of the response in bytes. The last
8759 * byte of the response is a valid flag that will read as '1'
8760 * when the command has been completely written to memory.
8764 * Physical number of ring allocated. This value shall be unique
8767 uint16_t logical_ring_id;
8768 /* Logical number of ring allocated. */
8774 * This field is used in Output records to indicate that the
8775 * output is completely written to RAM. This field should be
8776 * read as '1' to indicate that the output has been completely
8777 * written. When writing a command completion or response to an
8778 * internal processor, the order of writes has to be such that
8779 * this field is written last.
8781 } __attribute__((packed));
8783 /* hwrm_ring_free */
8785 * Description: This command is used to free a ring and associated resources.
8786 * With QoS and DCBx agents, it is possible the traffic classes will be moved
8787 * from one CoS queue to another. When this occurs, the driver shall call
8788 * 'hwrm_ring_free' to free the allocated rings and then call 'hwrm_ring_alloc'
8789 * to re-allocate each ring and assign it to a new CoS queue. hwrm_ring_free
8790 * shall be called on a ring only after it has been idle for 500ms or more and
8791 * no frames have been posted to the ring during this time. All frames queued
8792 * for transmission shall be completed and at least 500ms time elapsed from the
8793 * last completion before calling this command.
8795 /* Input (24 bytes) */
8796 struct hwrm_ring_free_input {
8799 * This value indicates what type of request this is. The format
8800 * for the rest of the command is determined by this field.
8804 * This value indicates the what completion ring the request
8805 * will be optionally completed on. If the value is -1, then no
8806 * CR completion will be generated. Any other value must be a
8807 * valid CR ring_id value for this function.
8810 /* This value indicates the command sequence number. */
8813 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8814 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8819 * This is the host address where the response will be written
8820 * when the request is complete. This area must be 16B aligned
8821 * and must be cleared to zero before the request is made.
8825 /* L2 Completion Ring (CR) */
8826 #define HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8828 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1)
8830 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2)
8831 /* RoCE Notification Completion Ring (ROCE_CR) */
8832 #define HWRM_RING_FREE_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8835 /* Physical number of ring allocated. */
8837 } __attribute__((packed));
8839 /* Output (16 bytes) */
8840 struct hwrm_ring_free_output {
8841 uint16_t error_code;
8843 * Pass/Fail or error type Note: receiver to verify the in
8844 * parameters, and fail the call with an error when appropriate
8847 /* This field returns the type of original request. */
8849 /* This field provides original sequence number of the command. */
8852 * This field is the length of the response in bytes. The last
8853 * byte of the response is a valid flag that will read as '1'
8854 * when the command has been completely written to memory.
8862 * This field is used in Output records to indicate that the
8863 * output is completely written to RAM. This field should be
8864 * read as '1' to indicate that the output has been completely
8865 * written. When writing a command completion or response to an
8866 * internal processor, the order of writes has to be such that
8867 * this field is written last.
8869 } __attribute__((packed));
8871 /* hwrm_ring_grp_alloc */
8873 * Description: This API allocates and does basic preparation for a ring group.
8875 /* Input (24 bytes) */
8876 struct hwrm_ring_grp_alloc_input {
8879 * This value indicates what type of request this is. The format
8880 * for the rest of the command is determined by this field.
8884 * This value indicates the what completion ring the request
8885 * will be optionally completed on. If the value is -1, then no
8886 * CR completion will be generated. Any other value must be a
8887 * valid CR ring_id value for this function.
8890 /* This value indicates the command sequence number. */
8893 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8894 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8899 * This is the host address where the response will be written
8900 * when the request is complete. This area must be 16B aligned
8901 * and must be cleared to zero before the request is made.
8904 /* This value identifies the CR associated with the ring group. */
8906 /* This value identifies the main RR associated with the ring group. */
8909 * This value identifies the aggregation RR associated with the
8910 * ring group. If this value is 0xFF... (All Fs), then no
8911 * Aggregation ring will be set.
8915 * This value identifies the statistics context associated with
8918 } __attribute__((packed));
8920 /* Output (16 bytes) */
8921 struct hwrm_ring_grp_alloc_output {
8922 uint16_t error_code;
8924 * Pass/Fail or error type Note: receiver to verify the in
8925 * parameters, and fail the call with an error when appropriate
8928 /* This field returns the type of original request. */
8930 /* This field provides original sequence number of the command. */
8933 * This field is the length of the response in bytes. The last
8934 * byte of the response is a valid flag that will read as '1'
8935 * when the command has been completely written to memory.
8937 uint32_t ring_group_id;
8939 * This is the ring group ID value. Use this value to program
8940 * the default ring group for the VNIC or as table entries in an
8948 * This field is used in Output records to indicate that the
8949 * output is completely written to RAM. This field should be
8950 * read as '1' to indicate that the output has been completely
8951 * written. When writing a command completion or response to an
8952 * internal processor, the order of writes has to be such that
8953 * this field is written last.
8955 } __attribute__((packed));
8957 /* hwrm_ring_grp_free */
8959 * Description: This API frees a ring group and associated resources. # If a
8960 * ring in the ring group is reset or free, then the associated rings in the
8961 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
8962 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
8963 * a part of executing this command, the HWRM shall reset all associated ring
8966 /* Input (24 bytes) */
8967 struct hwrm_ring_grp_free_input {
8970 * This value indicates what type of request this is. The format
8971 * for the rest of the command is determined by this field.
8975 * This value indicates the what completion ring the request
8976 * will be optionally completed on. If the value is -1, then no
8977 * CR completion will be generated. Any other value must be a
8978 * valid CR ring_id value for this function.
8981 /* This value indicates the command sequence number. */
8984 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8985 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8990 * This is the host address where the response will be written
8991 * when the request is complete. This area must be 16B aligned
8992 * and must be cleared to zero before the request is made.
8994 uint32_t ring_group_id;
8995 /* This is the ring group ID value. */
8997 } __attribute__((packed));
8999 /* Output (16 bytes) */
9000 struct hwrm_ring_grp_free_output {
9001 uint16_t error_code;
9003 * Pass/Fail or error type Note: receiver to verify the in
9004 * parameters, and fail the call with an error when appropriate
9007 /* This field returns the type of original request. */
9009 /* This field provides original sequence number of the command. */
9012 * This field is the length of the response in bytes. The last
9013 * byte of the response is a valid flag that will read as '1'
9014 * when the command has been completely written to memory.
9022 * This field is used in Output records to indicate that the
9023 * output is completely written to RAM. This field should be
9024 * read as '1' to indicate that the output has been completely
9025 * written. When writing a command completion or response to an
9026 * internal processor, the order of writes has to be such that
9027 * this field is written last.
9029 } __attribute__((packed));
9031 /* hwrm_cfa_l2_filter_alloc */
9033 * Description: An L2 filter is a filter resource that is used to identify a
9034 * vnic or ring for a packet based on layer 2 fields. Layer 2 fields for
9035 * encapsulated packets include both outer L2 header and/or inner l2 header of
9036 * encapsulated packet. The L2 filter resource covers the following OS specific
9037 * L2 filters. Linux/FreeBSD (per function): # Broadcast enable/disable # List
9038 * of individual multicast filters # All multicast enable/disable filter #
9039 * Unicast filters # Promiscuous mode VMware: # Broadcast enable/disable (per
9040 * physical function) # All multicast enable/disable (per function) # Unicast
9041 * filters per ring or vnic # Promiscuous mode per PF Windows: # Broadcast
9042 * enable/disable (per physical function) # List of individual multicast filters
9043 * (Driver needs to advertise the maximum number of filters supported) # All
9044 * multicast enable/disable per physical function # Unicast filters per vnic #
9045 * Promiscuous mode per PF Implementation notes on the use of VNIC in this
9046 * command: # By default, these filters belong to default vnic for the function.
9047 * # Once these filters are set up, only destination VNIC can be modified. # If
9048 * the destination VNIC is not specified in this command, then the HWRM shall
9049 * only create an l2 context id. HWRM Implementation notes for multicast
9050 * filters: # The hwrm_filter_alloc command can be used to set up multicast
9051 * filters (perfect match or partial match). Each individual function driver can
9052 * set up multicast filters independently. # The HWRM needs to keep track of
9053 * multicast filters set up by function drivers and maintain multicast group
9054 * replication records to enable a subset of functions to receive traffic for a
9055 * specific multicast address. # When a specific multicast filter cannot be set,
9056 * the HWRM shall return an error. In this error case, the driver should fall
9057 * back to using one general filter (rather than specific) for all multicast
9058 * traffic. # When the SR-IOV is enabled, the HWRM needs to additionally track
9059 * source knockout per multicast group record. Examples of setting unicast
9060 * filters: For a unicast MAC based filter, one can use a combination of the
9061 * fields and masks provided in this command to set up the filter. Below are
9062 * some examples: # MAC + no VLAN filter: This filter is used to identify
9063 * traffic that does not contain any VLAN tags and matches destination (or
9064 * source) MAC address. This filter can be set up by setting only l2_addr field
9065 * to be a valid field. All other fields are not valid. The following value is
9066 * set for l2_addr. l2_addr = MAC # MAC + Any VLAN filter: This filter is used
9067 * to identify traffic that carries single VLAN tag and matches (destination or
9068 * source) MAC address. This filter can be set up by setting only l2_addr and
9069 * l2_ovlan_mask fields to be valid fields. All other fields are not valid. The
9070 * following values are set for those two valid fields. l2_addr = MAC,
9071 * l2_ovlan_mask = 0xFFFF # MAC + no VLAN or VLAN ID=0: This filter is used to
9072 * identify untagged traffic that does not contain any VLAN tags or a VLAN tag
9073 * with VLAN ID = 0 and matches destination (or source) MAC address. This filter
9074 * can be set up by setting only l2_addr and l2_ovlan fields to be valid fields.
9075 * All other fields are not valid. The following value are set for l2_addr and
9076 * l2_ovlan. l2_addr = MAC, l2_ovlan = 0x0 # MAC + no VLAN or any VLAN: This
9077 * filter is used to identify traffic that contains zero or 1 VLAN tag and
9078 * matches destination (or source) MAC address. This filter can be set up by
9079 * setting only l2_addr, l2_ovlan, and l2_mask fields to be valid fields. All
9080 * other fields are not valid. The following value are set for l2_addr,
9081 * l2_ovlan, and l2_mask fields. l2_addr = MAC, l2_ovlan = 0x0, l2_ovlan_mask =
9082 * 0xFFFF # MAC + VLAN ID filter: This filter can be set up by setting only
9083 * l2_addr, l2_ovlan, and l2_ovlan_mask fields to be valid fields. All other
9084 * fields are not valid. The following values are set for those three valid
9085 * fields. l2_addr = MAC, l2_ovlan = VLAN ID, l2_ovlan_mask = 0xF000
9087 /* Input (96 bytes) */
9088 struct hwrm_cfa_l2_filter_alloc_input {
9091 * This value indicates what type of request this is. The format
9092 * for the rest of the command is determined by this field.
9096 * This value indicates the what completion ring the request
9097 * will be optionally completed on. If the value is -1, then no
9098 * CR completion will be generated. Any other value must be a
9099 * valid CR ring_id value for this function.
9102 /* This value indicates the command sequence number. */
9105 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9106 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9111 * This is the host address where the response will be written
9112 * when the request is complete. This area must be 16B aligned
9113 * and must be cleared to zero before the request is made.
9117 * Enumeration denoting the RX, TX type of the resource. This
9118 * enumeration is used for resources that are similar for both
9119 * TX and RX paths of the chip.
9121 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
9123 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
9124 (UINT32_C(0x0) << 0)
9126 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
9127 (UINT32_C(0x1) << 0)
9128 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
9129 CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
9131 * Setting of this flag indicates the applicability to the
9134 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x2)
9136 * Setting of this flag indicates drop action. If this flag is
9137 * not set, then it should be considered accept action.
9139 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x4)
9141 * If this flag is set, all t_l2_* fields are invalid and they
9142 * should not be specified. If this flag is set, then l2_*
9143 * fields refer to fields of outermost L2 header.
9145 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
9147 /* This bit must be '1' for the l2_addr field to be configured. */
9148 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
9149 /* This bit must be '1' for the l2_addr_mask field to be configured. */
9150 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
9152 /* This bit must be '1' for the l2_ovlan field to be configured. */
9153 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4)
9155 * This bit must be '1' for the l2_ovlan_mask field to be
9158 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
9160 /* This bit must be '1' for the l2_ivlan field to be configured. */
9161 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10)
9163 * This bit must be '1' for the l2_ivlan_mask field to be
9166 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
9168 /* This bit must be '1' for the t_l2_addr field to be configured. */
9169 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40)
9171 * This bit must be '1' for the t_l2_addr_mask field to be
9174 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
9176 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
9177 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
9180 * This bit must be '1' for the t_l2_ovlan_mask field to be
9183 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
9185 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
9186 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
9189 * This bit must be '1' for the t_l2_ivlan_mask field to be
9192 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
9194 /* This bit must be '1' for the src_type field to be configured. */
9195 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000)
9196 /* This bit must be '1' for the src_id field to be configured. */
9197 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
9198 /* This bit must be '1' for the tunnel_type field to be configured. */
9199 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
9201 /* This bit must be '1' for the dst_id field to be configured. */
9202 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
9204 * This bit must be '1' for the mirror_vnic_id field to be
9207 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
9211 * This value sets the match value for the L2 MAC address.
9212 * Destination MAC address for RX path. Source MAC address for
9217 uint8_t l2_addr_mask[6];
9219 * This value sets the mask value for the L2 address. A value of
9220 * 0 will mask the corresponding bit from compare.
9223 /* This value sets VLAN ID value for outer VLAN. */
9224 uint16_t l2_ovlan_mask;
9226 * This value sets the mask value for the ovlan id. A value of 0
9227 * will mask the corresponding bit from compare.
9230 /* This value sets VLAN ID value for inner VLAN. */
9231 uint16_t l2_ivlan_mask;
9233 * This value sets the mask value for the ivlan id. A value of 0
9234 * will mask the corresponding bit from compare.
9238 uint8_t t_l2_addr[6];
9240 * This value sets the match value for the tunnel L2 MAC
9241 * address. Destination MAC address for RX path. Source MAC
9242 * address for TX path.
9246 uint8_t t_l2_addr_mask[6];
9248 * This value sets the mask value for the tunnel L2 address. A
9249 * value of 0 will mask the corresponding bit from compare.
9251 uint16_t t_l2_ovlan;
9252 /* This value sets VLAN ID value for tunnel outer VLAN. */
9253 uint16_t t_l2_ovlan_mask;
9255 * This value sets the mask value for the tunnel ovlan id. A
9256 * value of 0 will mask the corresponding bit from compare.
9258 uint16_t t_l2_ivlan;
9259 /* This value sets VLAN ID value for tunnel inner VLAN. */
9260 uint16_t t_l2_ivlan_mask;
9262 * This value sets the mask value for the tunnel ivlan id. A
9263 * value of 0 will mask the corresponding bit from compare.
9266 /* This value identifies the type of source of the packet. */
9268 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT UINT32_C(0x0)
9269 /* Physical function */
9270 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF UINT32_C(0x1)
9271 /* Virtual function */
9272 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF UINT32_C(0x2)
9273 /* Virtual NIC of a function */
9274 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC UINT32_C(0x3)
9275 /* Embedded processor for CFA management */
9276 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG UINT32_C(0x4)
9277 /* Embedded processor for OOB management */
9278 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE UINT32_C(0x5)
9279 /* Embedded processor for RoCE */
9280 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO UINT32_C(0x6)
9281 /* Embedded processor for network proxy functions */
9282 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG UINT32_C(0x7)
9286 * This value is the id of the source. For a network port, it
9287 * represents port_id. For a physical function, it represents
9288 * fid. For a virtual function, it represents vf_id. For a vnic,
9289 * it represents vnic_id. For embedded processors, this id is
9290 * not valid. Notes: 1. The function ID is implied if it src_id
9291 * is not provided for a src_type that is either
9293 uint8_t tunnel_type;
9296 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
9298 /* Virtual eXtensible Local Area Network (VXLAN) */
9299 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
9302 * Network Virtualization Generic Routing
9303 * Encapsulation (NVGRE)
9305 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
9308 * Generic Routing Encapsulation (GRE) inside
9311 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
9313 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
9314 /* Generic Network Virtualization Encapsulation (Geneve) */
9315 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
9316 /* Multi-Protocol Lable Switching (MPLS) */
9317 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
9318 /* Stateless Transport Tunnel (STT) */
9319 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
9321 * Generic Routing Encapsulation (GRE) inside IP
9324 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
9326 * IPV4 over virtual eXtensible Local Area
9327 * Network (IPV4oVXLAN)
9329 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 \
9331 /* Any tunneled traffic */
9332 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
9337 * If set, this value shall represent the Logical VNIC ID of the
9338 * destination VNIC for the RX path and network port id of the
9339 * destination port for the TX path.
9341 uint16_t mirror_vnic_id;
9342 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
9345 * This hint is provided to help in placing the filter in the
9349 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
9351 /* Above the given filter */
9352 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
9354 /* Below the given filter */
9355 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
9357 /* As high as possible */
9358 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3)
9359 /* As low as possible */
9360 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN UINT32_C(0x4)
9363 uint64_t l2_filter_id_hint;
9365 * This is the ID of the filter that goes along with the
9366 * pri_hint. This field is valid only for the following values.
9367 * 1 - Above the given filter 2 - Below the given filter
9369 } __attribute__((packed));
9371 /* Output (24 bytes) */
9372 struct hwrm_cfa_l2_filter_alloc_output {
9373 uint16_t error_code;
9375 * Pass/Fail or error type Note: receiver to verify the in
9376 * parameters, and fail the call with an error when appropriate
9379 /* This field returns the type of original request. */
9381 /* This field provides original sequence number of the command. */
9384 * This field is the length of the response in bytes. The last
9385 * byte of the response is a valid flag that will read as '1'
9386 * when the command has been completely written to memory.
9388 uint64_t l2_filter_id;
9390 * This value identifies a set of CFA data structures used for
9395 * This is the ID of the flow associated with this filter. This
9396 * value shall be used to match and associate the flow
9397 * identifier returned in completion records. A value of
9398 * 0xFFFFFFFF shall indicate no flow id.
9405 * This field is used in Output records to indicate that the
9406 * output is completely written to RAM. This field should be
9407 * read as '1' to indicate that the output has been completely
9408 * written. When writing a command completion or response to an
9409 * internal processor, the order of writes has to be such that
9410 * this field is written last.
9412 } __attribute__((packed));
9414 /* hwrm_cfa_l2_filter_free */
9416 * Description: Free a L2 filter. The HWRM shall free all associated filter
9417 * resources with the L2 filter.
9419 /* Input (24 bytes) */
9420 struct hwrm_cfa_l2_filter_free_input {
9423 * This value indicates what type of request this is. The format
9424 * for the rest of the command is determined by this field.
9428 * This value indicates the what completion ring the request
9429 * will be optionally completed on. If the value is -1, then no
9430 * CR completion will be generated. Any other value must be a
9431 * valid CR ring_id value for this function.
9434 /* This value indicates the command sequence number. */
9437 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9438 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9443 * This is the host address where the response will be written
9444 * when the request is complete. This area must be 16B aligned
9445 * and must be cleared to zero before the request is made.
9447 uint64_t l2_filter_id;
9449 * This value identifies a set of CFA data structures used for
9452 } __attribute__((packed));
9454 /* Output (16 bytes) */
9455 struct hwrm_cfa_l2_filter_free_output {
9456 uint16_t error_code;
9458 * Pass/Fail or error type Note: receiver to verify the in
9459 * parameters, and fail the call with an error when appropriate
9462 /* This field returns the type of original request. */
9464 /* This field provides original sequence number of the command. */
9467 * This field is the length of the response in bytes. The last
9468 * byte of the response is a valid flag that will read as '1'
9469 * when the command has been completely written to memory.
9477 * This field is used in Output records to indicate that the
9478 * output is completely written to RAM. This field should be
9479 * read as '1' to indicate that the output has been completely
9480 * written. When writing a command completion or response to an
9481 * internal processor, the order of writes has to be such that
9482 * this field is written last.
9484 } __attribute__((packed));
9486 /* hwrm_cfa_l2_filter_cfg */
9487 /* Description: Change the configuration of an existing L2 filter */
9488 /* Input (40 bytes) */
9489 struct hwrm_cfa_l2_filter_cfg_input {
9492 * This value indicates what type of request this is. The format
9493 * for the rest of the command is determined by this field.
9497 * This value indicates the what completion ring the request
9498 * will be optionally completed on. If the value is -1, then no
9499 * CR completion will be generated. Any other value must be a
9500 * valid CR ring_id value for this function.
9503 /* This value indicates the command sequence number. */
9506 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9507 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9512 * This is the host address where the response will be written
9513 * when the request is complete. This area must be 16B aligned
9514 * and must be cleared to zero before the request is made.
9518 * Enumeration denoting the RX, TX type of the resource. This
9519 * enumeration is used for resources that are similar for both
9520 * TX and RX paths of the chip.
9522 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9524 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX \
9525 (UINT32_C(0x0) << 0)
9527 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX \
9528 (UINT32_C(0x1) << 0)
9529 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \
9530 CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX
9532 * Setting of this flag indicates drop action. If this flag is
9533 * not set, then it should be considered accept action.
9535 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_DROP UINT32_C(0x2)
9537 /* This bit must be '1' for the dst_id field to be configured. */
9538 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_DST_ID UINT32_C(0x1)
9540 * This bit must be '1' for the new_mirror_vnic_id field to be
9543 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
9545 uint64_t l2_filter_id;
9547 * This value identifies a set of CFA data structures used for
9552 * If set, this value shall represent the Logical VNIC ID of the
9553 * destination VNIC for the RX path and network port id of the
9554 * destination port for the TX path.
9556 uint32_t new_mirror_vnic_id;
9557 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
9558 } __attribute__((packed));
9560 /* Output (16 bytes) */
9561 struct hwrm_cfa_l2_filter_cfg_output {
9562 uint16_t error_code;
9564 * Pass/Fail or error type Note: receiver to verify the in
9565 * parameters, and fail the call with an error when appropriate
9568 /* This field returns the type of original request. */
9570 /* This field provides original sequence number of the command. */
9573 * This field is the length of the response in bytes. The last
9574 * byte of the response is a valid flag that will read as '1'
9575 * when the command has been completely written to memory.
9583 * This field is used in Output records to indicate that the
9584 * output is completely written to RAM. This field should be
9585 * read as '1' to indicate that the output has been completely
9586 * written. When writing a command completion or response to an
9587 * internal processor, the order of writes has to be such that
9588 * this field is written last.
9590 } __attribute__((packed));
9592 /* hwrm_cfa_l2_set_rx_mask */
9593 /* Description: This command will set rx mask of the function. */
9594 /* Input (56 bytes) */
9595 struct hwrm_cfa_l2_set_rx_mask_input {
9598 * This value indicates what type of request this is. The format
9599 * for the rest of the command is determined by this field.
9603 * This value indicates the what completion ring the request
9604 * will be optionally completed on. If the value is -1, then no
9605 * CR completion will be generated. Any other value must be a
9606 * valid CR ring_id value for this function.
9609 /* This value indicates the command sequence number. */
9612 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9613 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9618 * This is the host address where the response will be written
9619 * when the request is complete. This area must be 16B aligned
9620 * and must be cleared to zero before the request is made.
9625 /* Reserved for future use. */
9626 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
9628 * When this bit is '1', the function is requested to accept
9629 * multi-cast packets specified by the multicast addr table.
9631 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
9633 * When this bit is '1', the function is requested to accept all
9634 * multi-cast packets.
9636 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
9638 * When this bit is '1', the function is requested to accept
9639 * broadcast packets.
9641 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
9643 * When this bit is '1', the function is requested to be put in
9644 * the promiscuous mode. The HWRM should accept any function to
9645 * set up promiscuous mode. The HWRM shall follow the semantics
9646 * below for the promiscuous mode support. # When partitioning
9647 * is not enabled on a port (i.e. single PF on the port), then
9648 * the PF shall be allowed to be in the promiscuous mode. When
9649 * the PF is in the promiscuous mode, then it shall receive all
9650 * host bound traffic on that port. # When partitioning is
9651 * enabled on a port (i.e. multiple PFs per port) and a PF on
9652 * that port is in the promiscuous mode, then the PF receives
9653 * all traffic within that partition as identified by a unique
9654 * identifier for the PF (e.g. S-Tag). If a unique outer VLAN
9655 * for the PF is specified, then the setting of promiscuous mode
9656 * on that PF shall result in the PF receiving all host bound
9657 * traffic with matching outer VLAN. # A VF shall can be set in
9658 * the promiscuous mode. In the promiscuous mode, the VF does
9659 * not receive any traffic unless a unique outer VLAN for the VF
9660 * is specified. If a unique outer VLAN for the VF is specified,
9661 * then the setting of promiscuous mode on that VF shall result
9662 * in the VF receiving all host bound traffic with the matching
9663 * outer VLAN. # The HWRM shall allow the setting of promiscuous
9664 * mode on a function independently from the promiscuous mode
9665 * settings on other functions.
9667 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
9669 * If this flag is set, the corresponding RX filters shall be
9670 * set up to cover multicast/broadcast filters for the outermost
9671 * Layer 2 destination MAC address field.
9673 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
9675 * If this flag is set, the corresponding RX filters shall be
9676 * set up to cover multicast/broadcast filters for the VLAN-
9677 * tagged packets that match the TPID and VID fields of VLAN
9678 * tags in the VLAN tag table specified in this command.
9680 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY UINT32_C(0x40)
9682 * If this flag is set, the corresponding RX filters shall be
9683 * set up to cover multicast/broadcast filters for non-VLAN
9684 * tagged packets and VLAN-tagged packets that match the TPID
9685 * and VID fields of VLAN tags in the VLAN tag table specified
9688 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN UINT32_C(0x80)
9690 * If this flag is set, the corresponding RX filters shall be
9691 * set up to cover multicast/broadcast filters for non-VLAN
9692 * tagged packets and VLAN-tagged packets matching any VLAN tag.
9693 * If this flag is set, then the HWRM shall ignore VLAN tags
9694 * specified in vlan_tag_tbl. If none of vlanonly, vlan_nonvlan,
9695 * and anyvlan_nonvlan flags is set, then the HWRM shall ignore
9696 * VLAN tags specified in vlan_tag_tbl. The HWRM client shall
9697 * set at most one flag out of vlanonly, vlan_nonvlan, and
9700 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN \
9702 uint64_t mc_tbl_addr;
9703 /* This is the address for mcast address tbl. */
9704 uint32_t num_mc_entries;
9706 * This value indicates how many entries in mc_tbl are valid.
9707 * Each entry is 6 bytes.
9710 uint64_t vlan_tag_tbl_addr;
9712 * This is the address for VLAN tag table. Each VLAN entry in
9713 * the table is 4 bytes of a VLAN tag including TPID, PCP, DEI,
9714 * and VID fields in network byte order.
9716 uint32_t num_vlan_tags;
9718 * This value indicates how many entries in vlan_tag_tbl are
9719 * valid. Each entry is 4 bytes.
9722 } __attribute__((packed));
9724 /* Output (16 bytes) */
9725 struct hwrm_cfa_l2_set_rx_mask_output {
9726 uint16_t error_code;
9728 * Pass/Fail or error type Note: receiver to verify the in
9729 * parameters, and fail the call with an error when appropriate
9732 /* This field returns the type of original request. */
9734 /* This field provides original sequence number of the command. */
9737 * This field is the length of the response in bytes. The last
9738 * byte of the response is a valid flag that will read as '1'
9739 * when the command has been completely written to memory.
9747 * This field is used in Output records to indicate that the
9748 * output is completely written to RAM. This field should be
9749 * read as '1' to indicate that the output has been completely
9750 * written. When writing a command completion or response to an
9751 * internal processor, the order of writes has to be such that
9752 * this field is written last.
9754 } __attribute__((packed));
9756 /* Command specific Error Codes (8 bytes) */
9757 struct hwrm_cfa_l2_set_rx_mask_cmd_err {
9760 * command specific error codes that goes to the cmd_err field
9761 * in Common HWRM Error Response.
9764 #define HWRM_CFA_L2_SET_RX_MASK_CMD_ERR_CODE_UNKNOWN UINT32_C(0x0)
9766 * Unable to complete operation due to conflict
9767 * with Ntuple Filter
9770 HWRM_CFA_L2_SET_RX_MASK_CMD_ERR_CODE_NTUPLE_FILTER_CONFLICT_ERR \
9772 uint8_t unused_0[7];
9773 } __attribute__((packed));
9775 /* hwrm_cfa_vlan_antispoof_cfg */
9776 /* Description: Configures vlan anti-spoof filters for VF. */
9777 /* Input (32 bytes) */
9778 struct hwrm_cfa_vlan_antispoof_cfg_input {
9781 * This value indicates what type of request this is. The format for the
9782 * rest of the command is determined by this field.
9786 * This value indicates the what completion ring the request will be
9787 * optionally completed on. If the value is -1, then no CR completion
9788 * will be generated. Any other value must be a valid CR ring_id value
9789 * for this function.
9792 /* This value indicates the command sequence number. */
9795 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9796 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9800 * This is the host address where the response will be written when the
9801 * request is complete. This area must be 16B aligned and must be
9802 * cleared to zero before the request is made.
9806 * Function ID of the function that is being configured. Only valid for
9807 * a VF FID configured by the PF.
9811 uint32_t num_vlan_entries;
9812 /* Number of VLAN entries in the vlan_tag_mask_tbl. */
9813 uint64_t vlan_tag_mask_tbl_addr;
9815 * The vlan_tag_mask_tbl_addr is the DMA address of the VLAN antispoof
9816 * table. Each table entry contains the 16-bit TPID (0x8100 or 0x88a8
9817 * only), 16-bit VLAN ID, and a 16-bit mask, all in network order to
9818 * match hwrm_cfa_l2_set_rx_mask. For an individual VLAN entry, the mask
9819 * value should be 0xfff for the 12-bit VLAN ID.
9823 /* Output (16 bytes) */
9824 struct hwrm_cfa_vlan_antispoof_cfg_output {
9825 uint16_t error_code;
9827 * Pass/Fail or error type Note: receiver to verify the in parameters,
9828 * and fail the call with an error when appropriate
9831 /* This field returns the type of original request. */
9833 /* This field provides original sequence number of the command. */
9836 * This field is the length of the response in bytes. The last byte of
9837 * the response is a valid flag that will read as '1' when the command
9838 * has been completely written to memory.
9846 * This field is used in Output records to indicate that the output is
9847 * completely written to RAM. This field should be read as '1' to
9848 * indicate that the output has been completely written. When writing a
9849 * command completion or response to an internal processor, the order of
9850 * writes has to be such that this field is written last.
9854 /* hwrm_cfa_ntuple_filter_alloc */
9856 * Description: This is a ntuple filter that uses fields from L4/L3 header and
9857 * optionally fields from L2. The ntuple filters apply to receive traffic only.
9858 * All L2/L3/L4 header fields are specified in network byte order. These filters
9859 * can be used for Receive Flow Steering (RFS). # For ethertype value, only
9860 * 0x0800 (IPv4) and 0x86dd (IPv6) shall be supported for ntuple filters. # If a
9861 * field specified in this command is not enabled as a valid field, then that
9862 * field shall not be used in matching packet header fields against this filter.
9864 /* Input (128 bytes) */
9865 struct hwrm_cfa_ntuple_filter_alloc_input {
9868 * This value indicates what type of request this is. The format
9869 * for the rest of the command is determined by this field.
9873 * This value indicates the what completion ring the request
9874 * will be optionally completed on. If the value is -1, then no
9875 * CR completion will be generated. Any other value must be a
9876 * valid CR ring_id value for this function.
9879 /* This value indicates the command sequence number. */
9882 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9883 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9888 * This is the host address where the response will be written
9889 * when the request is complete. This area must be 16B aligned
9890 * and must be cleared to zero before the request is made.
9894 * Setting of this flag indicates the applicability to the
9897 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
9900 * Setting of this flag indicates drop action. If this flag is
9901 * not set, then it should be considered accept action.
9903 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x2)
9905 * Setting of this flag indicates that a meter is expected to be
9906 * attached to this flow. This hint can be used when choosing
9907 * the action record format required for the flow.
9909 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_METER UINT32_C(0x4)
9911 /* This bit must be '1' for the l2_filter_id field to be configured. */
9912 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID \
9914 /* This bit must be '1' for the ethertype field to be configured. */
9915 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE \
9917 /* This bit must be '1' for the tunnel_type field to be configured. */
9918 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
9920 /* This bit must be '1' for the src_macaddr field to be configured. */
9921 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR \
9923 /* This bit must be '1' for the ipaddr_type field to be configured. */
9924 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IPADDR_TYPE \
9926 /* This bit must be '1' for the src_ipaddr field to be configured. */
9927 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR \
9930 * This bit must be '1' for the src_ipaddr_mask field to be
9933 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK \
9935 /* This bit must be '1' for the dst_ipaddr field to be configured. */
9936 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR \
9939 * This bit must be '1' for the dst_ipaddr_mask field to be
9942 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK \
9944 /* This bit must be '1' for the ip_protocol field to be configured. */
9945 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL \
9947 /* This bit must be '1' for the src_port field to be configured. */
9948 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT \
9951 * This bit must be '1' for the src_port_mask field to be
9954 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK \
9956 /* This bit must be '1' for the dst_port field to be configured. */
9957 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT \
9960 * This bit must be '1' for the dst_port_mask field to be
9963 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK \
9965 /* This bit must be '1' for the pri_hint field to be configured. */
9966 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_PRI_HINT \
9969 * This bit must be '1' for the ntuple_filter_id field to be
9972 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_NTUPLE_FILTER_ID \
9974 /* This bit must be '1' for the dst_id field to be configured. */
9975 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
9978 * This bit must be '1' for the mirror_vnic_id field to be
9981 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
9983 /* This bit must be '1' for the dst_macaddr field to be configured. */
9984 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR \
9986 uint64_t l2_filter_id;
9988 * This value identifies a set of CFA data structures used for
9991 uint8_t src_macaddr[6];
9993 * This value indicates the source MAC address in the Ethernet
9997 /* This value indicates the ethertype in the Ethernet header. */
9998 uint8_t ip_addr_type;
10000 * This value indicates the type of IP address. 4 - IPv4 6 -
10001 * IPv6 All others are invalid.
10004 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN \
10007 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 \
10010 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \
10012 uint8_t ip_protocol;
10014 * The value of protocol filed in IP header. Applies to UDP and
10015 * TCP traffic. 6 - TCP 17 - UDP
10018 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN \
10021 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP \
10024 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP \
10028 * If set, this value shall represent the Logical VNIC ID of the
10029 * destination VNIC for the RX path and network port id of the
10030 * destination port for the TX path.
10032 uint16_t mirror_vnic_id;
10033 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
10034 uint8_t tunnel_type;
10036 * This value indicates the tunnel type for this filter. If this
10037 * field is not specified, then the filter shall apply to both
10038 * non-tunneled and tunneled packets. If this field conflicts
10039 * with the tunnel_type specified in the l2_filter_id, then the
10040 * HWRM shall return an error for this command.
10043 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
10045 /* Virtual eXtensible Local Area Network (VXLAN) */
10046 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
10049 * Network Virtualization Generic Routing
10050 * Encapsulation (NVGRE)
10052 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
10055 * Generic Routing Encapsulation (GRE) inside
10058 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
10061 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
10063 /* Generic Network Virtualization Encapsulation (Geneve) */
10064 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
10066 /* Multi-Protocol Lable Switching (MPLS) */
10067 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
10069 /* Stateless Transport Tunnel (STT) */
10070 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
10072 * Generic Routing Encapsulation (GRE) inside IP
10075 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
10077 /* Any tunneled traffic */
10078 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
10082 * This hint is provided to help in placing the filter in the
10085 /* No preference */
10086 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
10088 /* Above the given filter */
10089 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE UINT32_C(0x1)
10090 /* Below the given filter */
10091 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_BELOW UINT32_C(0x2)
10092 /* As high as possible */
10093 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_HIGHEST \
10095 /* As low as possible */
10096 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_LOWEST UINT32_C(0x4)
10097 uint32_t src_ipaddr[4];
10099 * The value of source IP address to be used in filtering. For
10100 * IPv4, first four bytes represent the IP address.
10102 uint32_t src_ipaddr_mask[4];
10104 * The value of source IP address mask to be used in filtering.
10105 * For IPv4, first four bytes represent the IP address mask.
10107 uint32_t dst_ipaddr[4];
10109 * The value of destination IP address to be used in filtering.
10110 * For IPv4, first four bytes represent the IP address.
10112 uint32_t dst_ipaddr_mask[4];
10114 * The value of destination IP address mask to be used in
10115 * filtering. For IPv4, first four bytes represent the IP
10120 * The value of source port to be used in filtering. Applies to
10121 * UDP and TCP traffic.
10123 uint16_t src_port_mask;
10125 * The value of source port mask to be used in filtering.
10126 * Applies to UDP and TCP traffic.
10130 * The value of destination port to be used in filtering.
10131 * Applies to UDP and TCP traffic.
10133 uint16_t dst_port_mask;
10135 * The value of destination port mask to be used in filtering.
10136 * Applies to UDP and TCP traffic.
10138 uint64_t ntuple_filter_id_hint;
10139 /* This is the ID of the filter that goes along with the pri_hint. */
10140 } __attribute__((packed));
10142 /* Output (24 bytes) */
10143 struct hwrm_cfa_ntuple_filter_alloc_output {
10144 uint16_t error_code;
10146 * Pass/Fail or error type Note: receiver to verify the in
10147 * parameters, and fail the call with an error when appropriate
10150 /* This field returns the type of original request. */
10152 /* This field provides original sequence number of the command. */
10155 * This field is the length of the response in bytes. The last
10156 * byte of the response is a valid flag that will read as '1'
10157 * when the command has been completely written to memory.
10159 uint64_t ntuple_filter_id;
10160 /* This value is an opaque id into CFA data structures. */
10163 * This is the ID of the flow associated with this filter. This
10164 * value shall be used to match and associate the flow
10165 * identifier returned in completion records. A value of
10166 * 0xFFFFFFFF shall indicate no flow id.
10173 * This field is used in Output records to indicate that the
10174 * output is completely written to RAM. This field should be
10175 * read as '1' to indicate that the output has been completely
10176 * written. When writing a command completion or response to an
10177 * internal processor, the order of writes has to be such that
10178 * this field is written last.
10180 } __attribute__((packed));
10182 /* Command specific Error Codes (8 bytes) */
10183 struct hwrm_cfa_ntuple_filter_alloc_cmd_err {
10186 * command specific error codes that goes to the cmd_err field
10187 * in Common HWRM Error Response.
10189 /* Unknown error */
10190 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_UNKNOWN UINT32_C(0x0)
10192 * Unable to complete operation due to conflict
10193 * with Rx Mask VLAN
10196 HWRM_CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_RX_MASK_VLAN_CONFLICT_ERR \
10198 uint8_t unused_0[7];
10199 } __attribute__((packed));
10201 /* hwrm_cfa_ntuple_filter_free */
10202 /* Description: Free an ntuple filter */
10203 /* Input (24 bytes) */
10204 struct hwrm_cfa_ntuple_filter_free_input {
10207 * This value indicates what type of request this is. The format
10208 * for the rest of the command is determined by this field.
10210 uint16_t cmpl_ring;
10212 * This value indicates the what completion ring the request
10213 * will be optionally completed on. If the value is -1, then no
10214 * CR completion will be generated. Any other value must be a
10215 * valid CR ring_id value for this function.
10218 /* This value indicates the command sequence number. */
10219 uint16_t target_id;
10221 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10222 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10225 uint64_t resp_addr;
10227 * This is the host address where the response will be written
10228 * when the request is complete. This area must be 16B aligned
10229 * and must be cleared to zero before the request is made.
10231 uint64_t ntuple_filter_id;
10232 /* This value is an opaque id into CFA data structures. */
10233 } __attribute__((packed));
10235 /* Output (16 bytes) */
10236 struct hwrm_cfa_ntuple_filter_free_output {
10237 uint16_t error_code;
10239 * Pass/Fail or error type Note: receiver to verify the in
10240 * parameters, and fail the call with an error when appropriate
10243 /* This field returns the type of original request. */
10245 /* This field provides original sequence number of the command. */
10248 * This field is the length of the response in bytes. The last
10249 * byte of the response is a valid flag that will read as '1'
10250 * when the command has been completely written to memory.
10258 * This field is used in Output records to indicate that the
10259 * output is completely written to RAM. This field should be
10260 * read as '1' to indicate that the output has been completely
10261 * written. When writing a command completion or response to an
10262 * internal processor, the order of writes has to be such that
10263 * this field is written last.
10265 } __attribute__((packed));
10267 /* hwrm_cfa_ntuple_filter_cfg */
10269 * Description: Configure an ntuple filter with a new destination VNIC and/or
10272 /* Input (48 bytes) */
10273 struct hwrm_cfa_ntuple_filter_cfg_input {
10276 * This value indicates what type of request this is. The format
10277 * for the rest of the command is determined by this field.
10279 uint16_t cmpl_ring;
10281 * This value indicates the what completion ring the request
10282 * will be optionally completed on. If the value is -1, then no
10283 * CR completion will be generated. Any other value must be a
10284 * valid CR ring_id value for this function.
10287 /* This value indicates the command sequence number. */
10288 uint16_t target_id;
10290 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10291 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10294 uint64_t resp_addr;
10296 * This is the host address where the response will be written
10297 * when the request is complete. This area must be 16B aligned
10298 * and must be cleared to zero before the request is made.
10301 /* This bit must be '1' for the new_dst_id field to be configured. */
10302 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_DST_ID \
10305 * This bit must be '1' for the new_mirror_vnic_id field to be
10308 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
10311 * This bit must be '1' for the new_meter_instance_id field to
10314 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
10317 uint64_t ntuple_filter_id;
10318 /* This value is an opaque id into CFA data structures. */
10319 uint32_t new_dst_id;
10321 * If set, this value shall represent the new Logical VNIC ID of
10322 * the destination VNIC for the RX path and new network port id
10323 * of the destination port for the TX path.
10325 uint32_t new_mirror_vnic_id;
10326 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
10327 uint16_t new_meter_instance_id;
10329 * New meter to attach to the flow. Specifying the invalid
10330 * instance ID is used to remove any existing meter from the
10334 * A value of 0xfff is considered invalid and
10335 * implies the instance is not configured.
10337 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
10339 uint16_t unused_1[3];
10340 } __attribute__((packed));
10342 /* Output (16 bytes) */
10343 struct hwrm_cfa_ntuple_filter_cfg_output {
10344 uint16_t error_code;
10346 * Pass/Fail or error type Note: receiver to verify the in
10347 * parameters, and fail the call with an error when appropriate
10350 /* This field returns the type of original request. */
10352 /* This field provides original sequence number of the command. */
10355 * This field is the length of the response in bytes. The last
10356 * byte of the response is a valid flag that will read as '1'
10357 * when the command has been completely written to memory.
10365 * This field is used in Output records to indicate that the
10366 * output is completely written to RAM. This field should be
10367 * read as '1' to indicate that the output has been completely
10368 * written. When writing a command completion or response to an
10369 * internal processor, the order of writes has to be such that
10370 * this field is written last.
10372 } __attribute__((packed));
10374 /* hwrm_cfa_em_flow_alloc */
10376 * Description: This is a generic Exact Match (EM) flow that uses fields from
10377 * L4/L3/L2 headers. The EM flows apply to transmit and receive traffic. All
10378 * L2/L3/L4 header fields are specified in network byte order. For each EM flow,
10379 * there is an associated set of actions specified. For tunneled packets, all
10380 * L2/L3/L4 fields specified are fields of inner headers unless otherwise
10381 * specified. # If a field specified in this command is not enabled as a valid
10382 * field, then that field shall not be used in matching packet header fields
10383 * against this EM flow entry.
10385 /* Input (112 bytes) */
10386 struct hwrm_cfa_em_flow_alloc_input {
10389 * This value indicates what type of request this is. The format
10390 * for the rest of the command is determined by this field.
10392 uint16_t cmpl_ring;
10394 * This value indicates the what completion ring the request
10395 * will be optionally completed on. If the value is -1, then no
10396 * CR completion will be generated. Any other value must be a
10397 * valid CR ring_id value for this function.
10400 /* This value indicates the command sequence number. */
10401 uint16_t target_id;
10403 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10404 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10407 uint64_t resp_addr;
10409 * This is the host address where the response will be written
10410 * when the request is complete. This area must be 16B aligned
10411 * and must be cleared to zero before the request is made.
10415 * Enumeration denoting the RX, TX type of the resource. This
10416 * enumeration is used for resources that are similar for both
10417 * TX and RX paths of the chip.
10419 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
10421 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_TX \
10422 (UINT32_C(0x0) << 0)
10424 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX \
10425 (UINT32_C(0x1) << 0)
10426 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_LAST \
10427 CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX
10429 * Setting of this flag indicates enabling of a byte counter for
10432 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_BYTE_CTR UINT32_C(0x2)
10434 * Setting of this flag indicates enabling of a packet counter
10435 * for a given flow.
10437 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PKT_CTR UINT32_C(0x4)
10439 * Setting of this flag indicates de-capsulation action for the
10442 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DECAP UINT32_C(0x8)
10444 * Setting of this flag indicates encapsulation action for the
10447 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_ENCAP UINT32_C(0x10)
10449 * Setting of this flag indicates drop action. If this flag is
10450 * not set, then it should be considered accept action.
10452 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x20)
10454 * Setting of this flag indicates that a meter is expected to be
10455 * attached to this flow. This hint can be used when choosing
10456 * the action record format required for the flow.
10458 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_METER UINT32_C(0x40)
10460 /* This bit must be '1' for the l2_filter_id field to be configured. */
10461 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_L2_FILTER_ID UINT32_C(0x1)
10462 /* This bit must be '1' for the tunnel_type field to be configured. */
10463 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x2)
10464 /* This bit must be '1' for the tunnel_id field to be configured. */
10465 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_ID UINT32_C(0x4)
10466 /* This bit must be '1' for the src_macaddr field to be configured. */
10467 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR UINT32_C(0x8)
10468 /* This bit must be '1' for the dst_macaddr field to be configured. */
10469 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR UINT32_C(0x10)
10470 /* This bit must be '1' for the ovlan_vid field to be configured. */
10471 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID UINT32_C(0x20)
10472 /* This bit must be '1' for the ivlan_vid field to be configured. */
10473 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IVLAN_VID UINT32_C(0x40)
10474 /* This bit must be '1' for the ethertype field to be configured. */
10475 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE UINT32_C(0x80)
10476 /* This bit must be '1' for the src_ipaddr field to be configured. */
10477 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR UINT32_C(0x100)
10478 /* This bit must be '1' for the dst_ipaddr field to be configured. */
10479 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR UINT32_C(0x200)
10480 /* This bit must be '1' for the ipaddr_type field to be configured. */
10481 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IPADDR_TYPE UINT32_C(0x400)
10482 /* This bit must be '1' for the ip_protocol field to be configured. */
10483 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL UINT32_C(0x800)
10484 /* This bit must be '1' for the src_port field to be configured. */
10485 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT UINT32_C(0x1000)
10486 /* This bit must be '1' for the dst_port field to be configured. */
10487 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT UINT32_C(0x2000)
10488 /* This bit must be '1' for the dst_id field to be configured. */
10489 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x4000)
10491 * This bit must be '1' for the mirror_vnic_id field to be
10494 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
10497 * This bit must be '1' for the encap_record_id field to be
10500 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ENCAP_RECORD_ID \
10503 * This bit must be '1' for the meter_instance_id field to be
10506 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_METER_INSTANCE_ID \
10508 uint64_t l2_filter_id;
10510 * This value identifies a set of CFA data structures used for
10513 uint8_t tunnel_type;
10516 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
10518 /* Virtual eXtensible Local Area Network (VXLAN) */
10519 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10521 * Network Virtualization Generic Routing
10522 * Encapsulation (NVGRE)
10524 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
10526 * Generic Routing Encapsulation (GRE) inside
10529 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
10531 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
10532 /* Generic Network Virtualization Encapsulation (Geneve) */
10533 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
10534 /* Multi-Protocol Lable Switching (MPLS) */
10535 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
10536 /* Stateless Transport Tunnel (STT) */
10537 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
10539 * Generic Routing Encapsulation (GRE) inside IP
10542 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
10544 * IPV4 over virtual eXtensible Local Area
10545 * Network (IPV4oVXLAN)
10547 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 UINT32_C(0x9)
10548 /* Any tunneled traffic */
10549 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
10553 uint32_t tunnel_id;
10555 * Tunnel identifier. Virtual Network Identifier (VNI). Only
10556 * valid with tunnel_types VXLAN, NVGRE, and Geneve. Only lower
10557 * 24-bits of VNI field are used in setting up the filter.
10559 uint8_t src_macaddr[6];
10561 * This value indicates the source MAC address in the Ethernet
10564 uint16_t meter_instance_id;
10565 /* The meter instance to attach to the flow. */
10567 * A value of 0xfff is considered invalid and
10568 * implies the instance is not configured.
10570 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_METER_INSTANCE_ID_INVALID \
10572 uint8_t dst_macaddr[6];
10574 * This value indicates the destination MAC address in the
10577 uint16_t ovlan_vid;
10579 * This value indicates the VLAN ID of the outer VLAN tag in the
10582 uint16_t ivlan_vid;
10584 * This value indicates the VLAN ID of the inner VLAN tag in the
10587 uint16_t ethertype;
10588 /* This value indicates the ethertype in the Ethernet header. */
10589 uint8_t ip_addr_type;
10591 * This value indicates the type of IP address. 4 - IPv4 6 -
10592 * IPv6 All others are invalid.
10595 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN UINT32_C(0x0)
10597 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 UINT32_C(0x4)
10599 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 UINT32_C(0x6)
10600 uint8_t ip_protocol;
10602 * The value of protocol filed in IP header. Applies to UDP and
10603 * TCP traffic. 6 - TCP 17 - UDP
10606 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN UINT32_C(0x0)
10608 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_TCP UINT32_C(0x6)
10610 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UDP UINT32_C(0x11)
10613 uint32_t src_ipaddr[4];
10615 * The value of source IP address to be used in filtering. For
10616 * IPv4, first four bytes represent the IP address.
10618 uint32_t dst_ipaddr[4];
10620 * big_endian = True The value of destination IP address to be
10621 * used in filtering. For IPv4, first four bytes represent the
10626 * The value of source port to be used in filtering. Applies to
10627 * UDP and TCP traffic.
10631 * The value of destination port to be used in filtering.
10632 * Applies to UDP and TCP traffic.
10636 * If set, this value shall represent the Logical VNIC ID of the
10637 * destination VNIC for the RX path and network port id of the
10638 * destination port for the TX path.
10640 uint16_t mirror_vnic_id;
10641 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
10642 uint32_t encap_record_id;
10643 /* Logical ID of the encapsulation record. */
10645 } __attribute__((packed));
10647 /* Output (24 bytes) */
10648 struct hwrm_cfa_em_flow_alloc_output {
10649 uint16_t error_code;
10651 * Pass/Fail or error type Note: receiver to verify the in
10652 * parameters, and fail the call with an error when appropriate
10655 /* This field returns the type of original request. */
10657 /* This field provides original sequence number of the command. */
10660 * This field is the length of the response in bytes. The last
10661 * byte of the response is a valid flag that will read as '1'
10662 * when the command has been completely written to memory.
10664 uint64_t em_filter_id;
10665 /* This value is an opaque id into CFA data structures. */
10668 * This is the ID of the flow associated with this filter. This
10669 * value shall be used to match and associate the flow
10670 * identifier returned in completion records. A value of
10671 * 0xFFFFFFFF shall indicate no flow id.
10678 * This field is used in Output records to indicate that the
10679 * output is completely written to RAM. This field should be
10680 * read as '1' to indicate that the output has been completely
10681 * written. When writing a command completion or response to an
10682 * internal processor, the order of writes has to be such that
10683 * this field is written last.
10685 } __attribute__((packed));
10687 /* hwrm_cfa_em_flow_free */
10688 /* Description: Free an EM flow table entry */
10689 /* Input (24 bytes) */
10690 struct hwrm_cfa_em_flow_free_input {
10693 * This value indicates what type of request this is. The format
10694 * for the rest of the command is determined by this field.
10696 uint16_t cmpl_ring;
10698 * This value indicates the what completion ring the request
10699 * will be optionally completed on. If the value is -1, then no
10700 * CR completion will be generated. Any other value must be a
10701 * valid CR ring_id value for this function.
10704 /* This value indicates the command sequence number. */
10705 uint16_t target_id;
10707 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10708 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10711 uint64_t resp_addr;
10713 * This is the host address where the response will be written
10714 * when the request is complete. This area must be 16B aligned
10715 * and must be cleared to zero before the request is made.
10717 uint64_t em_filter_id;
10718 /* This value is an opaque id into CFA data structures. */
10719 } __attribute__((packed));
10721 /* Output (16 bytes) */
10722 struct hwrm_cfa_em_flow_free_output {
10723 uint16_t error_code;
10725 * Pass/Fail or error type Note: receiver to verify the in
10726 * parameters, and fail the call with an error when appropriate
10729 /* This field returns the type of original request. */
10731 /* This field provides original sequence number of the command. */
10734 * This field is the length of the response in bytes. The last
10735 * byte of the response is a valid flag that will read as '1'
10736 * when the command has been completely written to memory.
10744 * This field is used in Output records to indicate that the
10745 * output is completely written to RAM. This field should be
10746 * read as '1' to indicate that the output has been completely
10747 * written. When writing a command completion or response to an
10748 * internal processor, the order of writes has to be such that
10749 * this field is written last.
10751 } __attribute__((packed));
10753 /* hwrm_cfa_em_flow_cfg */
10755 * Description: Configure an EM flow with a new destination VNIC and/or meter.
10757 /* Input (48 bytes) */
10758 struct hwrm_cfa_em_flow_cfg_input {
10761 * This value indicates what type of request this is. The format
10762 * for the rest of the command is determined by this field.
10764 uint16_t cmpl_ring;
10766 * This value indicates the what completion ring the request
10767 * will be optionally completed on. If the value is -1, then no
10768 * CR completion will be generated. Any other value must be a
10769 * valid CR ring_id value for this function.
10772 /* This value indicates the command sequence number. */
10773 uint16_t target_id;
10775 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10776 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10779 uint64_t resp_addr;
10781 * This is the host address where the response will be written
10782 * when the request is complete. This area must be 16B aligned
10783 * and must be cleared to zero before the request is made.
10786 /* This bit must be '1' for the new_dst_id field to be configured. */
10787 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_DST_ID UINT32_C(0x1)
10789 * This bit must be '1' for the new_mirror_vnic_id field to be
10792 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
10795 * This bit must be '1' for the new_meter_instance_id field to
10798 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
10801 uint64_t em_filter_id;
10802 /* This value is an opaque id into CFA data structures. */
10803 uint32_t new_dst_id;
10805 * If set, this value shall represent the new Logical VNIC ID of
10806 * the destination VNIC for the RX path and network port id of
10807 * the destination port for the TX path.
10809 uint32_t new_mirror_vnic_id;
10810 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
10811 uint16_t new_meter_instance_id;
10813 * New meter to attach to the flow. Specifying the invalid
10814 * instance ID is used to remove any existing meter from the
10818 * A value of 0xfff is considered invalid and
10819 * implies the instance is not configured.
10821 #define HWRM_CFA_EM_FLOW_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
10823 uint16_t unused_1[3];
10824 } __attribute__((packed));
10826 /* Output (16 bytes) */
10827 struct hwrm_cfa_em_flow_cfg_output {
10828 uint16_t error_code;
10830 * Pass/Fail or error type Note: receiver to verify the in
10831 * parameters, and fail the call with an error when appropriate
10834 /* This field returns the type of original request. */
10836 /* This field provides original sequence number of the command. */
10839 * This field is the length of the response in bytes. The last
10840 * byte of the response is a valid flag that will read as '1'
10841 * when the command has been completely written to memory.
10849 * This field is used in Output records to indicate that the
10850 * output is completely written to RAM. This field should be
10851 * read as '1' to indicate that the output has been completely
10852 * written. When writing a command completion or response to an
10853 * internal processor, the order of writes has to be such that
10854 * this field is written last.
10856 } __attribute__((packed));
10858 /* hwrm_tunnel_dst_port_query */
10860 * Description: This function is called by a driver to query tunnel type
10861 * specific destination port configuration.
10863 /* Input (24 bytes) */
10864 struct hwrm_tunnel_dst_port_query_input {
10867 * This value indicates what type of request this is. The format
10868 * for the rest of the command is determined by this field.
10870 uint16_t cmpl_ring;
10872 * This value indicates the what completion ring the request
10873 * will be optionally completed on. If the value is -1, then no
10874 * CR completion will be generated. Any other value must be a
10875 * valid CR ring_id value for this function.
10878 /* This value indicates the command sequence number. */
10879 uint16_t target_id;
10881 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10882 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10885 uint64_t resp_addr;
10887 * This is the host address where the response will be written
10888 * when the request is complete. This area must be 16B aligned
10889 * and must be cleared to zero before the request is made.
10891 uint8_t tunnel_type;
10893 /* Virtual eXtensible Local Area Network (VXLAN) */
10894 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN \
10896 /* Generic Network Virtualization Encapsulation (Geneve) */
10897 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_GENEVE \
10900 * IPV4 over virtual eXtensible Local Area
10901 * Network (IPV4oVXLAN)
10903 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN_V4 \
10905 uint8_t unused_0[7];
10906 } __attribute__((packed));
10908 /* Output (16 bytes) */
10909 struct hwrm_tunnel_dst_port_query_output {
10910 uint16_t error_code;
10912 * Pass/Fail or error type Note: receiver to verify the in
10913 * parameters, and fail the call with an error when appropriate
10916 /* This field returns the type of original request. */
10918 /* This field provides original sequence number of the command. */
10921 * This field is the length of the response in bytes. The last
10922 * byte of the response is a valid flag that will read as '1'
10923 * when the command has been completely written to memory.
10925 uint16_t tunnel_dst_port_id;
10927 * This field represents the identifier of L4 destination port
10928 * used for the given tunnel type. This field is valid for
10929 * specific tunnel types that use layer 4 (e.g. UDP) transports
10932 uint16_t tunnel_dst_port_val;
10934 * This field represents the value of L4 destination port
10935 * identified by tunnel_dst_port_id. This field is valid for
10936 * specific tunnel types that use layer 4 (e.g. UDP) transports
10937 * for tunneling. This field is in network byte order. A value
10938 * of 0 means that the destination port is not configured.
10945 * This field is used in Output records to indicate that the
10946 * output is completely written to RAM. This field should be
10947 * read as '1' to indicate that the output has been completely
10948 * written. When writing a command completion or response to an
10949 * internal processor, the order of writes has to be such that
10950 * this field is written last.
10952 } __attribute__((packed));
10954 /* hwrm_tunnel_dst_port_alloc */
10956 * Description: This function is called by a driver to allocate l4 destination
10957 * port for a specific tunnel type. The destination port value is provided in
10958 * the input. If the HWRM supports only one global destination port for a tunnel
10959 * type, then the HWRM shall keep track of its usage as described below. # The
10960 * first caller that allocates a destination port shall always succeed and the
10961 * HWRM shall save the destination port configuration for that tunnel type and
10962 * increment the usage count to 1. # Subsequent callers allocating the same
10963 * destination port for that tunnel type shall succeed and the HWRM shall
10964 * increment the usage count for that port for each subsequent caller that
10965 * succeeds. # Any subsequent caller trying to allocate a different destination
10966 * port for that tunnel type shall fail until the usage count for the original
10967 * destination port goes to zero. # A caller that frees a port will cause the
10968 * usage count for that port to decrement.
10970 /* Input (24 bytes) */
10971 struct hwrm_tunnel_dst_port_alloc_input {
10974 * This value indicates what type of request this is. The format
10975 * for the rest of the command is determined by this field.
10977 uint16_t cmpl_ring;
10979 * This value indicates the what completion ring the request
10980 * will be optionally completed on. If the value is -1, then no
10981 * CR completion will be generated. Any other value must be a
10982 * valid CR ring_id value for this function.
10985 /* This value indicates the command sequence number. */
10986 uint16_t target_id;
10988 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10989 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10992 uint64_t resp_addr;
10994 * This is the host address where the response will be written
10995 * when the request is complete. This area must be 16B aligned
10996 * and must be cleared to zero before the request is made.
10998 uint8_t tunnel_type;
11000 /* Virtual eXtensible Local Area Network (VXLAN) */
11001 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
11002 /* Generic Network Virtualization Encapsulation (Geneve) */
11003 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
11006 * IPV4 over virtual eXtensible Local Area
11007 * Network (IPV4oVXLAN)
11009 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 \
11012 uint16_t tunnel_dst_port_val;
11014 * This field represents the value of L4 destination port used
11015 * for the given tunnel type. This field is valid for specific
11016 * tunnel types that use layer 4 (e.g. UDP) transports for
11017 * tunneling. This field is in network byte order. A value of 0
11018 * shall fail the command.
11021 } __attribute__((packed));
11023 /* Output (16 bytes) */
11024 struct hwrm_tunnel_dst_port_alloc_output {
11025 uint16_t error_code;
11027 * Pass/Fail or error type Note: receiver to verify the in
11028 * parameters, and fail the call with an error when appropriate
11031 /* This field returns the type of original request. */
11033 /* This field provides original sequence number of the command. */
11036 * This field is the length of the response in bytes. The last
11037 * byte of the response is a valid flag that will read as '1'
11038 * when the command has been completely written to memory.
11040 uint16_t tunnel_dst_port_id;
11042 * Identifier of a tunnel L4 destination port value. Only
11043 * applies to tunnel types that has l4 destination port
11053 * This field is used in Output records to indicate that the
11054 * output is completely written to RAM. This field should be
11055 * read as '1' to indicate that the output has been completely
11056 * written. When writing a command completion or response to an
11057 * internal processor, the order of writes has to be such that
11058 * this field is written last.
11060 } __attribute__((packed));
11062 /* hwrm_tunnel_dst_port_free */
11064 * Description: This function is called by a driver to free l4 destination port
11065 * for a specific tunnel type.
11067 /* Input (24 bytes) */
11068 struct hwrm_tunnel_dst_port_free_input {
11071 * This value indicates what type of request this is. The format
11072 * for the rest of the command is determined by this field.
11074 uint16_t cmpl_ring;
11076 * This value indicates the what completion ring the request
11077 * will be optionally completed on. If the value is -1, then no
11078 * CR completion will be generated. Any other value must be a
11079 * valid CR ring_id value for this function.
11082 /* This value indicates the command sequence number. */
11083 uint16_t target_id;
11085 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11086 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11089 uint64_t resp_addr;
11091 * This is the host address where the response will be written
11092 * when the request is complete. This area must be 16B aligned
11093 * and must be cleared to zero before the request is made.
11095 uint8_t tunnel_type;
11097 /* Virtual eXtensible Local Area Network (VXLAN) */
11098 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
11099 /* Generic Network Virtualization Encapsulation (Geneve) */
11100 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
11102 * IPV4 over virtual eXtensible Local Area
11103 * Network (IPV4oVXLAN)
11105 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN_V4 \
11108 uint16_t tunnel_dst_port_id;
11110 * Identifier of a tunnel L4 destination port value. Only
11111 * applies to tunnel types that has l4 destination port
11115 } __attribute__((packed));
11117 /* Output (16 bytes) */
11118 struct hwrm_tunnel_dst_port_free_output {
11119 uint16_t error_code;
11121 * Pass/Fail or error type Note: receiver to verify the in
11122 * parameters, and fail the call with an error when appropriate
11125 /* This field returns the type of original request. */
11127 /* This field provides original sequence number of the command. */
11130 * This field is the length of the response in bytes. The last
11131 * byte of the response is a valid flag that will read as '1'
11132 * when the command has been completely written to memory.
11140 * This field is used in Output records to indicate that the
11141 * output is completely written to RAM. This field should be
11142 * read as '1' to indicate that the output has been completely
11143 * written. When writing a command completion or response to an
11144 * internal processor, the order of writes has to be such that
11145 * this field is written last.
11147 } __attribute__((packed));
11149 /* hwrm_stat_ctx_alloc */
11151 * Description: This command allocates and does basic preparation for a stat
11154 /* Input (32 bytes) */
11155 struct hwrm_stat_ctx_alloc_input {
11158 * This value indicates what type of request this is. The format
11159 * for the rest of the command is determined by this field.
11161 uint16_t cmpl_ring;
11163 * This value indicates the what completion ring the request
11164 * will be optionally completed on. If the value is -1, then no
11165 * CR completion will be generated. Any other value must be a
11166 * valid CR ring_id value for this function.
11169 /* This value indicates the command sequence number. */
11170 uint16_t target_id;
11172 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11173 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11176 uint64_t resp_addr;
11178 * This is the host address where the response will be written
11179 * when the request is complete. This area must be 16B aligned
11180 * and must be cleared to zero before the request is made.
11182 uint64_t stats_dma_addr;
11183 /* This is the address for statistic block. */
11184 uint32_t update_period_ms;
11186 * The statistic block update period in ms. e.g. 250ms, 500ms,
11187 * 750ms, 1000ms. If update_period_ms is 0, then the stats
11188 * update shall be never done and the DMA address shall not be
11189 * used. In this case, the stat block can only be read by
11190 * hwrm_stat_ctx_query command.
11192 uint8_t stat_ctx_flags;
11194 * This field is used to specify statistics context specific
11195 * configuration flags.
11198 * When this bit is set to '1', the statistics context shall be
11199 * allocated for RoCE traffic only. In this case, traffic other
11200 * than offloaded RoCE traffic shall not be included in this
11201 * statistic context. When this bit is set to '0', the
11202 * statistics context shall be used for the network traffic
11203 * other than offloaded RoCE traffic.
11205 #define HWRM_STAT_CTX_ALLOC_INPUT_STAT_CTX_FLAGS_ROCE UINT32_C(0x1)
11206 uint8_t unused_0[3];
11207 } __attribute__((packed));
11209 /* Output (16 bytes) */
11210 struct hwrm_stat_ctx_alloc_output {
11211 uint16_t error_code;
11213 * Pass/Fail or error type Note: receiver to verify the in
11214 * parameters, and fail the call with an error when appropriate
11217 /* This field returns the type of original request. */
11219 /* This field provides original sequence number of the command. */
11222 * This field is the length of the response in bytes. The last
11223 * byte of the response is a valid flag that will read as '1'
11224 * when the command has been completely written to memory.
11226 uint32_t stat_ctx_id;
11227 /* This is the statistics context ID value. */
11233 * This field is used in Output records to indicate that the
11234 * output is completely written to RAM. This field should be
11235 * read as '1' to indicate that the output has been completely
11236 * written. When writing a command completion or response to an
11237 * internal processor, the order of writes has to be such that
11238 * this field is written last.
11240 } __attribute__((packed));
11242 /* hwrm_stat_ctx_free */
11243 /* Description: This command is used to free a stat context. */
11244 /* Input (24 bytes) */
11245 struct hwrm_stat_ctx_free_input {
11248 * This value indicates what type of request this is. The format
11249 * for the rest of the command is determined by this field.
11251 uint16_t cmpl_ring;
11253 * This value indicates the what completion ring the request
11254 * will be optionally completed on. If the value is -1, then no
11255 * CR completion will be generated. Any other value must be a
11256 * valid CR ring_id value for this function.
11259 /* This value indicates the command sequence number. */
11260 uint16_t target_id;
11262 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11263 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11266 uint64_t resp_addr;
11268 * This is the host address where the response will be written
11269 * when the request is complete. This area must be 16B aligned
11270 * and must be cleared to zero before the request is made.
11272 uint32_t stat_ctx_id;
11273 /* ID of the statistics context that is being queried. */
11275 } __attribute__((packed));
11277 /* Output (16 bytes) */
11278 struct hwrm_stat_ctx_free_output {
11279 uint16_t error_code;
11281 * Pass/Fail or error type Note: receiver to verify the in
11282 * parameters, and fail the call with an error when appropriate
11285 /* This field returns the type of original request. */
11287 /* This field provides original sequence number of the command. */
11290 * This field is the length of the response in bytes. The last
11291 * byte of the response is a valid flag that will read as '1'
11292 * when the command has been completely written to memory.
11294 uint32_t stat_ctx_id;
11295 /* This is the statistics context ID value. */
11301 * This field is used in Output records to indicate that the
11302 * output is completely written to RAM. This field should be
11303 * read as '1' to indicate that the output has been completely
11304 * written. When writing a command completion or response to an
11305 * internal processor, the order of writes has to be such that
11306 * this field is written last.
11308 } __attribute__((packed));
11310 /* hwrm_stat_ctx_query */
11311 /* Description: This command returns statistics of a context. */
11312 /* Input (24 bytes) */
11313 struct hwrm_stat_ctx_query_input {
11316 * This value indicates what type of request this is. The format for the
11317 * rest of the command is determined by this field.
11319 uint16_t cmpl_ring;
11321 * This value indicates the what completion ring the request will be
11322 * optionally completed on. If the value is -1, then no CR completion
11323 * will be generated. Any other value must be a valid CR ring_id value
11324 * for this function.
11327 /* This value indicates the command sequence number. */
11328 uint16_t target_id;
11330 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11331 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11333 uint64_t resp_addr;
11335 * This is the host address where the response will be written when the
11336 * request is complete. This area must be 16B aligned and must be
11337 * cleared to zero before the request is made.
11339 uint32_t stat_ctx_id;
11340 /* ID of the statistics context that is being queried. */
11342 } __attribute__((packed));
11344 /* Output (176 bytes) */
11345 struct hwrm_stat_ctx_query_output {
11346 uint16_t error_code;
11348 * Pass/Fail or error type Note: receiver to verify the in parameters,
11349 * and fail the call with an error when appropriate
11352 /* This field returns the type of original request. */
11354 /* This field provides original sequence number of the command. */
11357 * This field is the length of the response in bytes. The last byte of
11358 * the response is a valid flag that will read as '1' when the command
11359 * has been completely written to memory.
11361 uint64_t tx_ucast_pkts;
11362 /* Number of transmitted unicast packets */
11363 uint64_t tx_mcast_pkts;
11364 /* Number of transmitted multicast packets */
11365 uint64_t tx_bcast_pkts;
11366 /* Number of transmitted broadcast packets */
11367 uint64_t tx_err_pkts;
11368 /* Number of transmitted packets with error */
11369 uint64_t tx_drop_pkts;
11370 /* Number of dropped packets on transmit path */
11371 uint64_t tx_ucast_bytes;
11372 /* Number of transmitted bytes for unicast traffic */
11373 uint64_t tx_mcast_bytes;
11374 /* Number of transmitted bytes for multicast traffic */
11375 uint64_t tx_bcast_bytes;
11376 /* Number of transmitted bytes for broadcast traffic */
11377 uint64_t rx_ucast_pkts;
11378 /* Number of received unicast packets */
11379 uint64_t rx_mcast_pkts;
11380 /* Number of received multicast packets */
11381 uint64_t rx_bcast_pkts;
11382 /* Number of received broadcast packets */
11383 uint64_t rx_err_pkts;
11384 /* Number of received packets with error */
11385 uint64_t rx_drop_pkts;
11386 /* Number of dropped packets on received path */
11387 uint64_t rx_ucast_bytes;
11388 /* Number of received bytes for unicast traffic */
11389 uint64_t rx_mcast_bytes;
11390 /* Number of received bytes for multicast traffic */
11391 uint64_t rx_bcast_bytes;
11392 /* Number of received bytes for broadcast traffic */
11393 uint64_t rx_agg_pkts;
11394 /* Number of aggregated unicast packets */
11395 uint64_t rx_agg_bytes;
11396 /* Number of aggregated unicast bytes */
11397 uint64_t rx_agg_events;
11398 /* Number of aggregation events */
11399 uint64_t rx_agg_aborts;
11400 /* Number of aborted aggregations */
11407 * This field is used in Output records to indicate that the output is
11408 * completely written to RAM. This field should be read as '1' to
11409 * indicate that the output has been completely written. When writing a
11410 * command completion or response to an internal processor, the order of
11411 * writes has to be such that this field is written last.
11413 } __attribute__((packed));
11415 /* hwrm_stat_ctx_clr_stats */
11416 /* Description: This command clears statistics of a context. */
11417 /* Input (24 bytes) */
11418 struct hwrm_stat_ctx_clr_stats_input {
11421 * This value indicates what type of request this is. The format
11422 * for the rest of the command is determined by this field.
11424 uint16_t cmpl_ring;
11426 * This value indicates the what completion ring the request
11427 * will be optionally completed on. If the value is -1, then no
11428 * CR completion will be generated. Any other value must be a
11429 * valid CR ring_id value for this function.
11432 /* This value indicates the command sequence number. */
11433 uint16_t target_id;
11435 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11436 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11439 uint64_t resp_addr;
11441 * This is the host address where the response will be written
11442 * when the request is complete. This area must be 16B aligned
11443 * and must be cleared to zero before the request is made.
11445 uint32_t stat_ctx_id;
11446 /* ID of the statistics context that is being queried. */
11448 } __attribute__((packed));
11450 /* Output (16 bytes) */
11451 struct hwrm_stat_ctx_clr_stats_output {
11452 uint16_t error_code;
11454 * Pass/Fail or error type Note: receiver to verify the in
11455 * parameters, and fail the call with an error when appropriate
11458 /* This field returns the type of original request. */
11460 /* This field provides original sequence number of the command. */
11463 * This field is the length of the response in bytes. The last
11464 * byte of the response is a valid flag that will read as '1'
11465 * when the command has been completely written to memory.
11473 * This field is used in Output records to indicate that the
11474 * output is completely written to RAM. This field should be
11475 * read as '1' to indicate that the output has been completely
11476 * written. When writing a command completion or response to an
11477 * internal processor, the order of writes has to be such that
11478 * this field is written last.
11480 } __attribute__((packed));
11482 /* hwrm_exec_fwd_resp */
11484 * Description: This command is used to send an encapsulated request to the
11485 * HWRM. This command instructs the HWRM to execute the request and forward the
11486 * response of the encapsulated request to the location specified in the
11487 * original request that is encapsulated. The target id of this command shall be
11488 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11489 * acknowledge the receipt of the encapsulated request and forwarding of the
11492 /* Input (128 bytes) */
11493 struct hwrm_exec_fwd_resp_input {
11496 * This value indicates what type of request this is. The format
11497 * for the rest of the command is determined by this field.
11499 uint16_t cmpl_ring;
11501 * This value indicates the what completion ring the request
11502 * will be optionally completed on. If the value is -1, then no
11503 * CR completion will be generated. Any other value must be a
11504 * valid CR ring_id value for this function.
11507 /* This value indicates the command sequence number. */
11508 uint16_t target_id;
11510 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11511 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11514 uint64_t resp_addr;
11516 * This is the host address where the response will be written
11517 * when the request is complete. This area must be 16B aligned
11518 * and must be cleared to zero before the request is made.
11520 uint32_t encap_request[26];
11522 * This is an encapsulated request. This request should be
11523 * executed by the HWRM and the response should be provided in
11524 * the response buffer inside the encapsulated request.
11526 uint16_t encap_resp_target_id;
11528 * This value indicates the target id of the response to the
11529 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11530 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11533 uint16_t unused_0[3];
11534 } __attribute__((packed));
11536 /* Output (16 bytes) */
11537 struct hwrm_exec_fwd_resp_output {
11538 uint16_t error_code;
11540 * Pass/Fail or error type Note: receiver to verify the in
11541 * parameters, and fail the call with an error when appropriate
11544 /* This field returns the type of original request. */
11546 /* This field provides original sequence number of the command. */
11549 * This field is the length of the response in bytes. The last
11550 * byte of the response is a valid flag that will read as '1'
11551 * when the command has been completely written to memory.
11559 * This field is used in Output records to indicate that the
11560 * output is completely written to RAM. This field should be
11561 * read as '1' to indicate that the output has been completely
11562 * written. When writing a command completion or response to an
11563 * internal processor, the order of writes has to be such that
11564 * this field is written last.
11566 } __attribute__((packed));
11568 /* hwrm_reject_fwd_resp */
11570 * Description: This command is used to send an encapsulated request to the
11571 * HWRM. This command instructs the HWRM to reject the request and forward the
11572 * error response of the encapsulated request to the location specified in the
11573 * original request that is encapsulated. The target id of this command shall be
11574 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11575 * acknowledge the receipt of the encapsulated request and forwarding of the
11578 /* Input (128 bytes) */
11579 struct hwrm_reject_fwd_resp_input {
11582 * This value indicates what type of request this is. The format
11583 * for the rest of the command is determined by this field.
11585 uint16_t cmpl_ring;
11587 * This value indicates the what completion ring the request
11588 * will be optionally completed on. If the value is -1, then no
11589 * CR completion will be generated. Any other value must be a
11590 * valid CR ring_id value for this function.
11593 /* This value indicates the command sequence number. */
11594 uint16_t target_id;
11596 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11597 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11600 uint64_t resp_addr;
11602 * This is the host address where the response will be written
11603 * when the request is complete. This area must be 16B aligned
11604 * and must be cleared to zero before the request is made.
11606 uint32_t encap_request[26];
11608 * This is an encapsulated request. This request should be
11609 * rejected by the HWRM and the error response should be
11610 * provided in the response buffer inside the encapsulated
11613 uint16_t encap_resp_target_id;
11615 * This value indicates the target id of the response to the
11616 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11617 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11620 uint16_t unused_0[3];
11621 } __attribute__((packed));
11623 /* Output (16 bytes) */
11624 struct hwrm_reject_fwd_resp_output {
11625 uint16_t error_code;
11627 * Pass/Fail or error type Note: receiver to verify the in
11628 * parameters, and fail the call with an error when appropriate
11631 /* This field returns the type of original request. */
11633 /* This field provides original sequence number of the command. */
11636 * This field is the length of the response in bytes. The last
11637 * byte of the response is a valid flag that will read as '1'
11638 * when the command has been completely written to memory.
11646 * This field is used in Output records to indicate that the
11647 * output is completely written to RAM. This field should be
11648 * read as '1' to indicate that the output has been completely
11649 * written. When writing a command completion or response to an
11650 * internal processor, the order of writes has to be such that
11651 * this field is written last.
11653 } __attribute__((packed));
11655 /* hwrm_nvm_get_dir_entries */
11656 /* Input (24 bytes) */
11657 struct hwrm_nvm_get_dir_entries_input {
11659 uint16_t cmpl_ring;
11661 uint16_t target_id;
11662 uint64_t resp_addr;
11663 uint64_t host_dest_addr;
11664 } __attribute__((packed));
11666 /* Output (16 bytes) */
11667 struct hwrm_nvm_get_dir_entries_output {
11668 uint16_t error_code;
11677 } __attribute__((packed));
11680 /* hwrm_nvm_erase_dir_entry */
11681 /* Input (24 bytes) */
11682 struct hwrm_nvm_erase_dir_entry_input {
11684 uint16_t cmpl_ring;
11686 uint16_t target_id;
11687 uint64_t resp_addr;
11689 uint16_t unused_0[3];
11692 /* Output (16 bytes) */
11693 struct hwrm_nvm_erase_dir_entry_output {
11694 uint16_t error_code;
11705 /* hwrm_nvm_get_dir_info */
11706 /* Input (16 bytes) */
11707 struct hwrm_nvm_get_dir_info_input {
11709 uint16_t cmpl_ring;
11711 uint16_t target_id;
11712 uint64_t resp_addr;
11713 } __attribute__((packed));
11715 /* Output (24 bytes) */
11716 struct hwrm_nvm_get_dir_info_output {
11717 uint16_t error_code;
11719 * Pass/Fail or error type Note: receiver to verify the in
11720 * parameters, and fail the call with an error when appropriate
11723 /* This field returns the type of original request. */
11725 /* This field provides original sequence number of the command. */
11728 * This field is the length of the response in bytes. The last
11729 * byte of the response is a valid flag that will read as '1'
11730 * when the command has been completely written to memory.
11733 /* Number of directory entries in the directory. */
11734 uint32_t entry_length;
11735 /* Size of each directory entry, in bytes. */
11742 * This field is used in Output records to indicate that the
11743 * output is completely written to RAM. This field should be
11744 * read as '1' to indicate that the output has been completely
11745 * written. When writing a command completion or response to an
11746 * internal processor, the order of writes has to be such that
11747 * this field is written last.
11749 } __attribute__((packed));
11751 /* hwrm_nvm_write */
11753 * Note: Write to the allocated NVRAM of an item referenced by an existing
11756 /* Input (48 bytes) */
11757 struct hwrm_nvm_write_input {
11760 * This value indicates what type of request this is. The format
11761 * for the rest of the command is determined by this field.
11763 uint16_t cmpl_ring;
11765 * This value indicates the what completion ring the request
11766 * will be optionally completed on. If the value is -1, then no
11767 * CR completion will be generated. Any other value must be a
11768 * valid CR ring_id value for this function.
11771 /* This value indicates the command sequence number. */
11772 uint16_t target_id;
11774 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11775 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11778 uint64_t resp_addr;
11780 * This is the host address where the response will be written
11781 * when the request is complete. This area must be 16B aligned
11782 * and must be cleared to zero before the request is made.
11784 uint64_t host_src_addr;
11785 /* 64-bit Host Source Address. This is where the source data is. */
11788 * The Directory Entry Type (valid values are defined in the
11789 * bnxnvm_directory_type enum defined in the file
11792 uint16_t dir_ordinal;
11794 * Directory ordinal. The 0-based instance of the combined
11795 * Directory Entry Type and Extension.
11799 * The Directory Entry Extension flags (see BNX_DIR_EXT_* in the
11800 * file bnxnvm_defs.h).
11804 * Directory Entry Attribute flags (see BNX_DIR_ATTR_* in the
11805 * file bnxnvm_defs.h).
11807 uint32_t dir_data_length;
11809 * Length of data to write, in bytes. May be less than or equal
11810 * to the allocated size for the directory entry. The data
11811 * length stored in the directory entry will be updated to
11812 * reflect this value once the write is complete.
11818 * When this bit is '1', the original active image will not be
11819 * removed. TBD: what purpose is this?
11821 #define HWRM_NVM_WRITE_INPUT_FLAGS_KEEP_ORIG_ACTIVE_IMG UINT32_C(0x1)
11822 uint32_t dir_item_length;
11824 * The requested length of the allocated NVM for the item, in
11825 * bytes. This value may be greater than or equal to the
11826 * specified data length (dir_data_length). If this value is
11827 * less than the specified data length, it will be ignored. The
11828 * response will contain the actual allocated item length, which
11829 * may be greater than the requested item length. The purpose
11830 * for allocating more than the required number of bytes for an
11831 * item's data is to pre-allocate extra storage (padding) to
11832 * accommodate the potential future growth of an item (e.g.
11833 * upgraded firmware with a size increase, log growth, expanded
11834 * configuration data).
11837 } __attribute__((packed));
11839 /* Output (16 bytes) */
11840 struct hwrm_nvm_write_output {
11841 uint16_t error_code;
11843 * Pass/Fail or error type Note: receiver to verify the in
11844 * parameters, and fail the call with an error when appropriate
11847 /* This field returns the type of original request. */
11849 /* This field provides original sequence number of the command. */
11852 * This field is the length of the response in bytes. The last
11853 * byte of the response is a valid flag that will read as '1'
11854 * when the command has been completely written to memory.
11856 uint32_t dir_item_length;
11858 * Length of the allocated NVM for the item, in bytes. The value
11859 * may be greater than or equal to the specified data length or
11860 * the requested item length. The actual item length used when
11861 * creating a new directory entry will be a multiple of an NVM
11865 /* The directory index of the created or modified item. */
11869 * This field is used in Output records to indicate that the
11870 * output is completely written to RAM. This field should be
11871 * read as '1' to indicate that the output has been completely
11872 * written. When writing a command completion or response to an
11873 * internal processor, the order of writes has to be such that
11874 * this field is written last.
11876 } __attribute__((packed));
11878 /* hwrm_nvm_read */
11880 * Note: Read the contents of an NVRAM item as referenced (indexed) by an
11881 * existing directory entry.
11883 /* Input (40 bytes) */
11884 struct hwrm_nvm_read_input {
11887 * This value indicates what type of request this is. The format
11888 * for the rest of the command is determined by this field.
11890 uint16_t cmpl_ring;
11892 * This value indicates the what completion ring the request
11893 * will be optionally completed on. If the value is -1, then no
11894 * CR completion will be generated. Any other value must be a
11895 * valid CR ring_id value for this function.
11898 /* This value indicates the command sequence number. */
11899 uint16_t target_id;
11901 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11902 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11905 uint64_t resp_addr;
11907 * This is the host address where the response will be written
11908 * when the request is complete. This area must be 16B aligned
11909 * and must be cleared to zero before the request is made.
11911 uint64_t host_dest_addr;
11913 * 64-bit Host Destination Address. This is the host address
11914 * where the data will be written to.
11917 /* The 0-based index of the directory entry. */
11921 /* The NVRAM byte-offset to read from. */
11923 /* The length of the data to be read, in bytes. */
11925 } __attribute__((packed));
11927 /* Output (16 bytes) */
11928 struct hwrm_nvm_read_output {
11929 uint16_t error_code;
11931 * Pass/Fail or error type Note: receiver to verify the in
11932 * parameters, and fail the call with an error when appropriate
11935 /* This field returns the type of original request. */
11937 /* This field provides original sequence number of the command. */
11940 * This field is the length of the response in bytes. The last
11941 * byte of the response is a valid flag that will read as '1'
11942 * when the command has been completely written to memory.
11950 * This field is used in Output records to indicate that the
11951 * output is completely written to RAM. This field should be
11952 * read as '1' to indicate that the output has been completely
11953 * written. When writing a command completion or response to an
11954 * internal processor, the order of writes has to be such that
11955 * this field is written last.
11957 } __attribute__((packed));
11959 /* Hardware Resource Manager Specification */
11960 /* Description: This structure is used to specify port description. */
11962 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
11963 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
11964 * processors inside the chip. This firmware service is vital part of the chip.
11965 * The chip can not be used by a driver or HWRM client without the HWRM.
11967 /* Input (16 bytes) */
11971 * This value indicates what type of request this is. The format
11972 * for the rest of the command is determined by this field.
11974 uint16_t cmpl_ring;
11976 * This value indicates the what completion ring the request
11977 * will be optionally completed on. If the value is -1, then no
11978 * CR completion will be generated. Any other value must be a
11979 * valid CR ring_id value for this function.
11982 /* This value indicates the command sequence number. */
11983 uint16_t target_id;
11985 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11986 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11989 uint64_t resp_addr;
11991 * This is the host address where the response will be written
11992 * when the request is complete. This area must be 16B aligned
11993 * and must be cleared to zero before the request is made.
11995 } __attribute__((packed));
11997 /* Output (8 bytes) */
11999 uint16_t error_code;
12001 * Pass/Fail or error type Note: receiver to verify the in
12002 * parameters, and fail the call with an error when appropriate
12005 /* This field returns the type of original request. */
12007 /* This field provides original sequence number of the command. */
12010 * This field is the length of the response in bytes. The last
12011 * byte of the response is a valid flag that will read as '1'
12012 * when the command has been completely written to memory.
12014 } __attribute__((packed));
12016 /* Short Command Structure (16 bytes) */
12017 struct hwrm_short_input {
12020 * This field indicates the type of request in the request
12021 * buffer. The format for the rest of the command (request) is
12022 * determined by this field.
12024 uint16_t signature;
12026 * This field indicates a signature that is used to identify
12027 * short form of the command listed here. This field shall be
12028 * set to 17185 (0x4321).
12030 /* Signature indicating this is a short form of HWRM command */
12031 #define HWRM_SHORT_REQ_SIGNATURE_SHORT_CMD UINT32_C(0x4321)
12033 /* Reserved for future use. */
12035 /* This value indicates the length of the request. */
12038 * This is the host address where the request was written. This
12039 * area must be 16B aligned.
12041 } __attribute__((packed));
12043 #define HWRM_GET_HWRM_ERROR_CODE(arg) \
12045 typeof(arg) x = (arg); \
12046 ((x) == 0xf ? "HWRM_ERROR" : \
12047 ((x) == 0xffff ? "CMD_NOT_SUPPORTED" : \
12048 ((x) == 0xfffe ? "UNKNOWN_ERR" : \
12049 ((x) == 0x4 ? "RESOURCE_ALLOC_ERROR" : \
12050 ((x) == 0x5 ? "INVALID_FLAGS" : \
12051 ((x) == 0x6 ? "INVALID_ENABLES" : \
12052 ((x) == 0x0 ? "SUCCESS" : \
12053 ((x) == 0x1 ? "FAIL" : \
12054 ((x) == 0x2 ? "INVALID_PARAMS" : \
12055 ((x) == 0x3 ? "RESOURCE_ACCESS_DENIED" : \
12056 "Unknown error_code")))))))))) \
12059 /* Return Codes (8 bytes) */
12061 uint16_t error_code;
12062 /* These are numbers assigned to return/error codes. */
12063 /* Request was successfully executed by the HWRM. */
12064 #define HWRM_ERR_CODE_SUCCESS (UINT32_C(0x0))
12065 /* THe HWRM failed to execute the request. */
12066 #define HWRM_ERR_CODE_FAIL (UINT32_C(0x1))
12068 * The request contains invalid argument(s) or
12069 * input parameters.
12071 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
12073 * The requester is not allowed to access the
12074 * requested resource. This error code shall be
12075 * provided in a response to a request to query
12076 * or modify an existing resource that is not
12077 * accessible by the requester.
12079 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
12081 * The HWRM is unable to allocate the requested
12082 * resource. This code only applies to requests
12083 * for HWRM resource allocations.
12085 #define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR (UINT32_C(0x4))
12086 /* Invalid combination of flags is specified in the request. */
12087 #define HWRM_ERR_CODE_INVALID_FLAGS (UINT32_C(0x5))
12089 * Invalid combination of enables fields is
12090 * specified in the request.
12092 #define HWRM_ERR_CODE_INVALID_ENABLES (UINT32_C(0x6))
12094 * Generic HWRM execution error that represents
12095 * an internal error.
12097 #define HWRM_ERR_CODE_HWRM_ERROR (UINT32_C(0xf))
12098 /* Unknown error */
12099 #define HWRM_ERR_CODE_UNKNOWN_ERR (UINT32_C(0xfffe))
12100 /* Unsupported or invalid command */
12101 #define HWRM_ERR_CODE_CMD_NOT_SUPPORTED (UINT32_C(0xffff))
12102 uint16_t unused_0[3];
12103 } __attribute__((packed));
12105 /* Output (16 bytes) */
12106 struct hwrm_err_output {
12107 uint16_t error_code;
12109 * Pass/Fail or error type Note: receiver to verify the in
12110 * parameters, and fail the call with an error when appropriate
12113 /* This field returns the type of original request. */
12115 /* This field provides original sequence number of the command. */
12118 * This field is the length of the response in bytes. The last
12119 * byte of the response is a valid flag that will read as '1'
12120 * when the command has been completely written to memory.
12123 /* debug info for this error response. */
12125 /* debug info for this error response. */
12128 * In the case of an error response, command specific error code
12129 * is returned in this field.
12133 * This field is used in Output records to indicate that the
12134 * output is completely written to RAM. This field should be
12135 * read as '1' to indicate that the output has been completely
12136 * written. When writing a command completion or response to an
12137 * internal processor, the order of writes has to be such that
12138 * this field is written last.
12140 } __attribute__((packed));
12142 /* Port Tx Statistics Formats (408 bytes) */
12143 struct tx_port_stats {
12144 uint64_t tx_64b_frames;
12145 /* Total Number of 64 Bytes frames transmitted */
12146 uint64_t tx_65b_127b_frames;
12147 /* Total Number of 65-127 Bytes frames transmitted */
12148 uint64_t tx_128b_255b_frames;
12149 /* Total Number of 128-255 Bytes frames transmitted */
12150 uint64_t tx_256b_511b_frames;
12151 /* Total Number of 256-511 Bytes frames transmitted */
12152 uint64_t tx_512b_1023b_frames;
12153 /* Total Number of 512-1023 Bytes frames transmitted */
12154 uint64_t tx_1024b_1518_frames;
12155 /* Total Number of 1024-1518 Bytes frames transmitted */
12156 uint64_t tx_good_vlan_frames;
12158 * Total Number of each good VLAN (exludes FCS errors) frame
12159 * transmitted which is 1519 to 1522 bytes in length inclusive
12160 * (excluding framing bits but including FCS bytes).
12162 uint64_t tx_1519b_2047_frames;
12163 /* Total Number of 1519-2047 Bytes frames transmitted */
12164 uint64_t tx_2048b_4095b_frames;
12165 /* Total Number of 2048-4095 Bytes frames transmitted */
12166 uint64_t tx_4096b_9216b_frames;
12167 /* Total Number of 4096-9216 Bytes frames transmitted */
12168 uint64_t tx_9217b_16383b_frames;
12169 /* Total Number of 9217-16383 Bytes frames transmitted */
12170 uint64_t tx_good_frames;
12171 /* Total Number of good frames transmitted */
12172 uint64_t tx_total_frames;
12173 /* Total Number of frames transmitted */
12174 uint64_t tx_ucast_frames;
12175 /* Total number of unicast frames transmitted */
12176 uint64_t tx_mcast_frames;
12177 /* Total number of multicast frames transmitted */
12178 uint64_t tx_bcast_frames;
12179 /* Total number of broadcast frames transmitted */
12180 uint64_t tx_pause_frames;
12181 /* Total number of PAUSE control frames transmitted */
12182 uint64_t tx_pfc_frames;
12183 /* Total number of PFC/per-priority PAUSE control frames transmitted */
12184 uint64_t tx_jabber_frames;
12185 /* Total number of jabber frames transmitted */
12186 uint64_t tx_fcs_err_frames;
12187 /* Total number of frames transmitted with FCS error */
12188 uint64_t tx_control_frames;
12189 /* Total number of control frames transmitted */
12190 uint64_t tx_oversz_frames;
12191 /* Total number of over-sized frames transmitted */
12192 uint64_t tx_single_dfrl_frames;
12193 /* Total number of frames with single deferral */
12194 uint64_t tx_multi_dfrl_frames;
12195 /* Total number of frames with multiple deferrals */
12196 uint64_t tx_single_coll_frames;
12197 /* Total number of frames with single collision */
12198 uint64_t tx_multi_coll_frames;
12199 /* Total number of frames with multiple collisions */
12200 uint64_t tx_late_coll_frames;
12201 /* Total number of frames with late collisions */
12202 uint64_t tx_excessive_coll_frames;
12203 /* Total number of frames with excessive collisions */
12204 uint64_t tx_frag_frames;
12205 /* Total number of fragmented frames transmitted */
12207 /* Total number of transmit errors */
12208 uint64_t tx_tagged_frames;
12209 /* Total number of single VLAN tagged frames transmitted */
12210 uint64_t tx_dbl_tagged_frames;
12211 /* Total number of double VLAN tagged frames transmitted */
12212 uint64_t tx_runt_frames;
12213 /* Total number of runt frames transmitted */
12214 uint64_t tx_fifo_underruns;
12215 /* Total number of TX FIFO under runs */
12216 uint64_t tx_pfc_ena_frames_pri0;
12218 * Total number of PFC frames with PFC enabled bit for Pri 0
12221 uint64_t tx_pfc_ena_frames_pri1;
12223 * Total number of PFC frames with PFC enabled bit for Pri 1
12226 uint64_t tx_pfc_ena_frames_pri2;
12228 * Total number of PFC frames with PFC enabled bit for Pri 2
12231 uint64_t tx_pfc_ena_frames_pri3;
12233 * Total number of PFC frames with PFC enabled bit for Pri 3
12236 uint64_t tx_pfc_ena_frames_pri4;
12238 * Total number of PFC frames with PFC enabled bit for Pri 4
12241 uint64_t tx_pfc_ena_frames_pri5;
12243 * Total number of PFC frames with PFC enabled bit for Pri 5
12246 uint64_t tx_pfc_ena_frames_pri6;
12248 * Total number of PFC frames with PFC enabled bit for Pri 6
12251 uint64_t tx_pfc_ena_frames_pri7;
12253 * Total number of PFC frames with PFC enabled bit for Pri 7
12256 uint64_t tx_eee_lpi_events;
12257 /* Total number of EEE LPI Events on TX */
12258 uint64_t tx_eee_lpi_duration;
12259 /* EEE LPI Duration Counter on TX */
12260 uint64_t tx_llfc_logical_msgs;
12262 * Total number of Link Level Flow Control (LLFC) messages
12265 uint64_t tx_hcfc_msgs;
12266 /* Total number of HCFC messages transmitted */
12267 uint64_t tx_total_collisions;
12268 /* Total number of TX collisions */
12270 /* Total number of transmitted bytes */
12271 uint64_t tx_xthol_frames;
12272 /* Total number of end-to-end HOL frames */
12273 uint64_t tx_stat_discard;
12274 /* Total Tx Drops per Port reported by STATS block */
12275 uint64_t tx_stat_error;
12276 /* Total Tx Error Drops per Port reported by STATS block */
12277 } __attribute__((packed));
12279 /* Port Rx Statistics Formats (528 bytes) */
12280 struct rx_port_stats {
12281 uint64_t rx_64b_frames;
12282 /* Total Number of 64 Bytes frames received */
12283 uint64_t rx_65b_127b_frames;
12284 /* Total Number of 65-127 Bytes frames received */
12285 uint64_t rx_128b_255b_frames;
12286 /* Total Number of 128-255 Bytes frames received */
12287 uint64_t rx_256b_511b_frames;
12288 /* Total Number of 256-511 Bytes frames received */
12289 uint64_t rx_512b_1023b_frames;
12290 /* Total Number of 512-1023 Bytes frames received */
12291 uint64_t rx_1024b_1518_frames;
12292 /* Total Number of 1024-1518 Bytes frames received */
12293 uint64_t rx_good_vlan_frames;
12295 * Total Number of each good VLAN (exludes FCS errors) frame
12296 * received which is 1519 to 1522 bytes in length inclusive
12297 * (excluding framing bits but including FCS bytes).
12299 uint64_t rx_1519b_2047b_frames;
12300 /* Total Number of 1519-2047 Bytes frames received */
12301 uint64_t rx_2048b_4095b_frames;
12302 /* Total Number of 2048-4095 Bytes frames received */
12303 uint64_t rx_4096b_9216b_frames;
12304 /* Total Number of 4096-9216 Bytes frames received */
12305 uint64_t rx_9217b_16383b_frames;
12306 /* Total Number of 9217-16383 Bytes frames received */
12307 uint64_t rx_total_frames;
12308 /* Total number of frames received */
12309 uint64_t rx_ucast_frames;
12310 /* Total number of unicast frames received */
12311 uint64_t rx_mcast_frames;
12312 /* Total number of multicast frames received */
12313 uint64_t rx_bcast_frames;
12314 /* Total number of broadcast frames received */
12315 uint64_t rx_fcs_err_frames;
12316 /* Total number of received frames with FCS error */
12317 uint64_t rx_ctrl_frames;
12318 /* Total number of control frames received */
12319 uint64_t rx_pause_frames;
12320 /* Total number of PAUSE frames received */
12321 uint64_t rx_pfc_frames;
12322 /* Total number of PFC frames received */
12323 uint64_t rx_unsupported_opcode_frames;
12324 /* Total number of frames received with an unsupported opcode */
12325 uint64_t rx_unsupported_da_pausepfc_frames;
12327 * Total number of frames received with an unsupported DA for
12330 uint64_t rx_wrong_sa_frames;
12331 /* Total number of frames received with an unsupported SA */
12332 uint64_t rx_align_err_frames;
12333 /* Total number of received packets with alignment error */
12334 uint64_t rx_oor_len_frames;
12335 /* Total number of received frames with out-of-range length */
12336 uint64_t rx_code_err_frames;
12337 /* Total number of received frames with error termination */
12338 uint64_t rx_false_carrier_frames;
12340 * Total number of received frames with a false carrier is
12341 * detected during idle, as defined by RX_ER samples active and
12342 * RXD is 0xE. The event is reported along with the statistics
12343 * generated on the next received frame. Only one false carrier
12344 * condition can be detected and logged between frames. Carrier
12345 * event, valid for 10M/100M speed modes only.
12347 uint64_t rx_ovrsz_frames;
12348 /* Total number of over-sized frames received */
12349 uint64_t rx_jbr_frames;
12350 /* Total number of jabber packets received */
12351 uint64_t rx_mtu_err_frames;
12352 /* Total number of received frames with MTU error */
12353 uint64_t rx_match_crc_frames;
12354 /* Total number of received frames with CRC match */
12355 uint64_t rx_promiscuous_frames;
12356 /* Total number of frames received promiscuously */
12357 uint64_t rx_tagged_frames;
12358 /* Total number of received frames with one or two VLAN tags */
12359 uint64_t rx_double_tagged_frames;
12360 /* Total number of received frames with two VLAN tags */
12361 uint64_t rx_trunc_frames;
12362 /* Total number of truncated frames received */
12363 uint64_t rx_good_frames;
12364 /* Total number of good frames (without errors) received */
12365 uint64_t rx_pfc_xon2xoff_frames_pri0;
12367 * Total number of received PFC frames with transition from XON
12370 uint64_t rx_pfc_xon2xoff_frames_pri1;
12372 * Total number of received PFC frames with transition from XON
12375 uint64_t rx_pfc_xon2xoff_frames_pri2;
12377 * Total number of received PFC frames with transition from XON
12380 uint64_t rx_pfc_xon2xoff_frames_pri3;
12382 * Total number of received PFC frames with transition from XON
12385 uint64_t rx_pfc_xon2xoff_frames_pri4;
12387 * Total number of received PFC frames with transition from XON
12390 uint64_t rx_pfc_xon2xoff_frames_pri5;
12392 * Total number of received PFC frames with transition from XON
12395 uint64_t rx_pfc_xon2xoff_frames_pri6;
12397 * Total number of received PFC frames with transition from XON
12400 uint64_t rx_pfc_xon2xoff_frames_pri7;
12402 * Total number of received PFC frames with transition from XON
12405 uint64_t rx_pfc_ena_frames_pri0;
12407 * Total number of received PFC frames with PFC enabled bit for
12410 uint64_t rx_pfc_ena_frames_pri1;
12412 * Total number of received PFC frames with PFC enabled bit for
12415 uint64_t rx_pfc_ena_frames_pri2;
12417 * Total number of received PFC frames with PFC enabled bit for
12420 uint64_t rx_pfc_ena_frames_pri3;
12422 * Total number of received PFC frames with PFC enabled bit for
12425 uint64_t rx_pfc_ena_frames_pri4;
12427 * Total number of received PFC frames with PFC enabled bit for
12430 uint64_t rx_pfc_ena_frames_pri5;
12432 * Total number of received PFC frames with PFC enabled bit for
12435 uint64_t rx_pfc_ena_frames_pri6;
12437 * Total number of received PFC frames with PFC enabled bit for
12440 uint64_t rx_pfc_ena_frames_pri7;
12442 * Total number of received PFC frames with PFC enabled bit for
12445 uint64_t rx_sch_crc_err_frames;
12446 /* Total Number of frames received with SCH CRC error */
12447 uint64_t rx_undrsz_frames;
12448 /* Total Number of under-sized frames received */
12449 uint64_t rx_frag_frames;
12450 /* Total Number of fragmented frames received */
12451 uint64_t rx_eee_lpi_events;
12452 /* Total number of RX EEE LPI Events */
12453 uint64_t rx_eee_lpi_duration;
12454 /* EEE LPI Duration Counter on RX */
12455 uint64_t rx_llfc_physical_msgs;
12457 * Total number of physical type Link Level Flow Control (LLFC)
12458 * messages received
12460 uint64_t rx_llfc_logical_msgs;
12462 * Total number of logical type Link Level Flow Control (LLFC)
12463 * messages received
12465 uint64_t rx_llfc_msgs_with_crc_err;
12467 * Total number of logical type Link Level Flow Control (LLFC)
12468 * messages received with CRC error
12470 uint64_t rx_hcfc_msgs;
12471 /* Total number of HCFC messages received */
12472 uint64_t rx_hcfc_msgs_with_crc_err;
12473 /* Total number of HCFC messages received with CRC error */
12475 /* Total number of received bytes */
12476 uint64_t rx_runt_bytes;
12477 /* Total number of bytes received in runt frames */
12478 uint64_t rx_runt_frames;
12479 /* Total number of runt frames received */
12480 uint64_t rx_stat_discard;
12481 /* Total Rx Discards per Port reported by STATS block */
12482 uint64_t rx_stat_err;
12483 /* Total Rx Error Drops per Port reported by STATS block */
12484 } __attribute__((packed));
12486 /* Periodic Statistics Context DMA to host (160 bytes) */
12488 * per-context HW statistics -- chip view
12491 struct ctx_hw_stats64 {
12492 uint64_t rx_ucast_pkts;
12493 uint64_t rx_mcast_pkts;
12494 uint64_t rx_bcast_pkts;
12495 uint64_t rx_drop_pkts;
12496 uint64_t rx_discard_pkts;
12497 uint64_t rx_ucast_bytes;
12498 uint64_t rx_mcast_bytes;
12499 uint64_t rx_bcast_bytes;
12501 uint64_t tx_ucast_pkts;
12502 uint64_t tx_mcast_pkts;
12503 uint64_t tx_bcast_pkts;
12504 uint64_t tx_drop_pkts;
12505 uint64_t tx_discard_pkts;
12506 uint64_t tx_ucast_bytes;
12507 uint64_t tx_mcast_bytes;
12508 uint64_t tx_bcast_bytes;
12511 uint64_t tpa_bytes;
12512 uint64_t tpa_events;
12513 uint64_t tpa_aborts;
12514 } __attribute__((packed));
12516 #endif /* _HSI_STRUCT_DEF_DPDK_ */