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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
46 uint64_t rx_discard_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
55 uint64_t tx_discard_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
64 } __attribute__((packed));
66 /* HW Resource Manager Specification 1.5.1 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 5
69 #define HWRM_VERSION_UPDATE 1
71 #define HWRM_VERSION_STR "1.5.1"
74 * Following is the signature for HWRM message field that indicates not
75 * applicable (All F's). Need to cast it the size of the field if needed.
77 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
78 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
79 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
80 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
81 #define HW_HASH_KEY_SIZE 40
82 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
87 #define HWRM_VER_GET (UINT32_C(0x0))
88 #define HWRM_FUNC_RESET (UINT32_C(0x11))
89 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
90 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
91 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
92 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
93 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
94 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
95 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
96 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
97 #define HWRM_VNIC_FREE (UINT32_C(0x41))
98 #define HWRM_VNIC_CFG (UINT32_C(0x42))
99 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
100 #define HWRM_RING_ALLOC (UINT32_C(0x50))
101 #define HWRM_RING_FREE (UINT32_C(0x51))
102 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
103 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
104 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
105 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
106 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
107 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
108 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
109 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
110 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
111 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
112 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
113 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
116 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
117 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
119 /* Short TX BD (16 bytes) */
123 * All bits in this field must be valid on the first BD of a
124 * packet. Only the packet_end bit must be valid for the
125 * remaining BDs of a packet.
127 /* This value identifies the type of buffer descriptor. */
128 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
129 #define TX_BD_SHORT_TYPE_SFT 0
131 * Indicates that this BD is 16B long and is
132 * used for normal L2 packet transmission.
134 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
136 * If set to 1, the packet ends with the data in the buffer
137 * pointed to by this descriptor. This flag must be valid on
140 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
142 * If set to 1, the device will not generate a completion for
143 * this transmit packet unless there is an error in it's
144 * processing. If this bit is set to 0, then the packet will be
145 * completed normally. This bit must be valid only on the first
148 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
150 * This value indicates how many 16B BD locations are consumed
151 * in the ring by this packet. A value of 1 indicates that this
152 * BD is the only BD (and that the it is a short BD). A value of
153 * 3 indicates either 3 short BDs or 1 long BD and one short BD
154 * in the packet. A value of 0 indicates that there are 32 BD
155 * locations in the packet (the maximum). This field is valid
156 * only on the first BD of a packet.
158 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
159 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
161 * This value is a hint for the length of the entire packet. It
162 * is used by the chip to optimize internal processing. The
163 * packet will be dropped if the hint is too short. This field
164 * is valid only on the first BD of a packet.
166 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
167 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
168 /* indicates packet length < 512B */
169 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
170 /* indicates 512 <= packet length < 1KB */
171 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
172 /* indicates 1KB <= packet length < 2KB */
173 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
174 /* indicates packet length >= 2KB */
175 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
176 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
178 * If set to 1, the device immediately updates the Send Consumer
179 * Index after the buffer associated with this descriptor has
180 * been transferred via DMA to NIC memory from host memory. An
181 * interrupt may or may not be generated according to the state
182 * of the interrupt avoidance mechanisms. If this bit is set to
183 * 0, then the Consumer Index is only updated as soon as one of
184 * the host interrupt coalescing conditions has been met. This
185 * bit must be valid on the first BD of a packet.
187 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
189 * All bits in this field must be valid on the first BD of a
190 * packet. Only the packet_end bit must be valid for the
191 * remaining BDs of a packet.
193 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
194 #define TX_BD_SHORT_FLAGS_SFT 6
197 * This is the length of the host physical buffer this BD
198 * describes in bytes. This field must be valid on all BDs of a
203 * The opaque data field is pass through to the completion and
204 * can be used for any data that the driver wants to associate
205 * with the transmit BD. This field must be valid on the first
210 * This is the host physical address for the portion of the
211 * packet described by this TX BD. This value must be valid on
212 * all BDs of a packet.
214 } __attribute__((packed));
216 /* Long TX BD (32 bytes split to 2 16-byte struct) */
220 * All bits in this field must be valid on the first BD of a
221 * packet. Only the packet_end bit must be valid for the
222 * remaining BDs of a packet.
224 /* This value identifies the type of buffer descriptor. */
225 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
226 #define TX_BD_LONG_TYPE_SFT 0
228 * Indicates that this BD is 32B long and is
229 * used for normal L2 packet transmission.
231 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
233 * If set to 1, the packet ends with the data in the buffer
234 * pointed to by this descriptor. This flag must be valid on
237 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
239 * If set to 1, the device will not generate a completion for
240 * this transmit packet unless there is an error in it's
241 * processing. If this bit is set to 0, then the packet will be
242 * completed normally. This bit must be valid only on the first
245 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
247 * This value indicates how many 16B BD locations are consumed
248 * in the ring by this packet. A value of 1 indicates that this
249 * BD is the only BD (and that the it is a short BD). A value of
250 * 3 indicates either 3 short BDs or 1 long BD and one short BD
251 * in the packet. A value of 0 indicates that there are 32 BD
252 * locations in the packet (the maximum). This field is valid
253 * only on the first BD of a packet.
255 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
256 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
258 * This value is a hint for the length of the entire packet. It
259 * is used by the chip to optimize internal processing. The
260 * packet will be dropped if the hint is too short. This field
261 * is valid only on the first BD of a packet.
263 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
264 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
265 /* indicates packet length < 512B */
266 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
267 /* indicates 512 <= packet length < 1KB */
268 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
269 /* indicates 1KB <= packet length < 2KB */
270 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
271 /* indicates packet length >= 2KB */
272 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
273 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
275 * If set to 1, the device immediately updates the Send Consumer
276 * Index after the buffer associated with this descriptor has
277 * been transferred via DMA to NIC memory from host memory. An
278 * interrupt may or may not be generated according to the state
279 * of the interrupt avoidance mechanisms. If this bit is set to
280 * 0, then the Consumer Index is only updated as soon as one of
281 * the host interrupt coalescing conditions has been met. This
282 * bit must be valid on the first BD of a packet.
284 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
286 * All bits in this field must be valid on the first BD of a
287 * packet. Only the packet_end bit must be valid for the
288 * remaining BDs of a packet.
290 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
291 #define TX_BD_LONG_FLAGS_SFT 6
294 * This is the length of the host physical buffer this BD
295 * describes in bytes. This field must be valid on all BDs of a
300 * The opaque data field is pass through to the completion and
301 * can be used for any data that the driver wants to associate
302 * with the transmit BD. This field must be valid on the first
307 * This is the host physical address for the portion of the
308 * packet described by this TX BD. This value must be valid on
309 * all BDs of a packet.
311 } __attribute__((packed));
313 /* last 16 bytes of Long TX BD */
314 struct tx_bd_long_hi {
317 * All bits in this field must be valid on the first BD of a
318 * packet. Their value on other BDs of the packet will be
322 * If set to 1, the controller replaces the TCP/UPD checksum
323 * fields of normal TCP/UPD checksum, or the inner TCP/UDP
324 * checksum field of the encapsulated TCP/UDP packets with the
325 * hardware calculated TCP/UDP checksum for the packet
326 * associated with this descriptor. The flag is ignored if the
327 * LSO flag is set. This bit must be valid on the first BD of a
330 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
332 * If set to 1, the controller replaces the IP checksum of the
333 * normal packets, or the inner IP checksum of the encapsulated
334 * packets with the hardware calculated IP checksum for the
335 * packet associated with this descriptor. This bit must be
336 * valid on the first BD of a packet.
338 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
340 * If set to 1, the controller will not append an Ethernet CRC
341 * to the end of the frame. This bit must be valid on the first
342 * BD of a packet. Packet must be 64B or longer when this flag
343 * is set. It is not useful to use this bit with any form of TX
344 * offload such as CSO or LSO. The intent is that the packet
345 * from the host already has a valid Ethernet CRC on the packet.
347 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
349 * If set to 1, the device will record the time at which the
350 * packet was actually transmitted at the TX MAC. This bit must
351 * be valid on the first BD of a packet.
353 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
355 * If set to 1, The controller replaces the tunnel IP checksum
356 * field with hardware calculated IP checksum for the IP header
357 * of the packet associated with this descriptor. For outer UDP
358 * checksum, global outer UDP checksum TE_NIC register needs to
359 * be enabled. If the global outer UDP checksum TE_NIC register
360 * bit is set, outer UDP checksum will be calculated for the
361 * following cases: 1. Packets with tcp_udp_chksum flag set to
362 * offload checksum for inner packet AND the inner packet is
363 * TCP/UDP. If the inner packet is ICMP for example (non-
364 * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
365 * checksum will not be calculated. 2. Packets with lso flag set
366 * which implies inner TCP checksum calculation as part of LSO
369 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
371 * If set to 1, the device will treat this packet with LSO(Large
372 * Send Offload) processing for both normal or encapsulated
373 * packets, which is a form of TCP segmentation. When this bit
374 * is 1, the hdr_size and mss fields must be valid. The driver
375 * doesn't need to set t_ip_chksum, ip_chksum, and
376 * tcp_udp_chksum flags since the controller will replace the
377 * appropriate checksum fields for segmented packets. When this
378 * bit is 1, the hdr_size and mss fields must be valid.
380 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
382 * If set to zero when LSO is '1', then the IPID will be treated
383 * as a 16b number and will be wrapped if it exceeds a value of
384 * 0xffff. If set to one when LSO is '1', then the IPID will be
385 * treated as a 15b number and will be wrapped if it exceeds a
388 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
390 * If set to zero when LSO is '1', then the IPID of the tunnel
391 * IP header will not be modified during LSO operations. If set
392 * to one when LSO is '1', then the IPID of the tunnel IP header
393 * will be incremented for each subsequent segment of an LSO
394 * operation. The flag is ignored if the LSO packet is a normal
395 * (non-tunneled) TCP packet.
397 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
399 * If set to '1', then the RoCE ICRC will be appended to the
400 * packet. Packet must be a valid RoCE format packet.
402 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
404 * If set to '1', then the FCoE CRC will be appended to the
405 * packet. Packet must be a valid FCoE format packet.
407 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
410 * When LSO is '1', this field must contain the offset of the
411 * TCP payload from the beginning of the packet in as 16b words.
412 * In case of encapsulated/tunneling packet, this field contains
413 * the offset of the inner TCP payload from beginning of the
414 * packet as 16-bit words. This value must be valid on the first
417 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
418 #define TX_BD_LONG_HDR_SIZE_SFT 0
421 * This is the MSS value that will be used to do the LSO
422 * processing. The value is the length in bytes of the TCP
423 * payload for each segment generated by the LSO operation. This
424 * value must be valid on the first BD of a packet.
426 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
427 #define TX_BD_LONG_MSS_SFT 0
431 * This value selects a CFA action to perform on the packet. Set
432 * this value to zero if no CFA action is desired. This value
433 * must be valid on the first BD of a packet.
437 * This value is action meta-data that defines CFA edit
438 * operations that are done in addition to any action editing.
440 /* When key=1, This is the VLAN tag VID value. */
441 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
442 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
443 /* When key=1, This is the VLAN tag DE value. */
444 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
445 /* When key=1, This is the VLAN tag PRI value. */
446 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
447 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
448 /* When key=1, This is the VLAN tag TPID select value. */
449 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
450 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
452 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
454 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
456 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
458 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
460 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
461 /* Value programmed in CFA VLANTPID register. */
462 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
463 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
464 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
465 /* When key=1, This is the VLAN tag TPID select value. */
466 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
467 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
469 * This field identifies the type of edit to be performed on the
470 * packet. This value must be valid on the first BD of a packet.
472 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
473 #define TX_BD_LONG_CFA_META_KEY_SFT 28
475 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
477 * - meta[17:16] - TPID select value (0 =
478 * 0x8100). - meta[15:12] - PRI/DE value. -
479 * meta[11:0] - VID value.
481 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
482 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
483 } __attribute__((packed));
485 /* RX Producer Packet BD (16 bytes) */
486 struct rx_prod_pkt_bd {
488 /* This value identifies the type of buffer descriptor. */
489 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
490 #define RX_PROD_PKT_BD_TYPE_SFT 0
492 * Indicates that this BD is 16B long and is an
493 * RX Producer (ie. empty) buffer descriptor.
495 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
497 * If set to 1, the packet will be placed at the address plus
498 * 2B. The 2 Bytes of padding will be written as zero.
501 * This is intended to be used when the host buffer is cache-
502 * line aligned to produce packets that are easy to parse in
503 * host memory while still allowing writes to be cache line
506 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
508 * If set to 1, the packet write will be padded out to the
509 * nearest cache-line with zero value padding.
512 * If receive buffers start/end on cache-line boundaries, this
513 * feature will ensure that all data writes on the PCI bus
514 * start/end on cache line boundaries.
516 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
518 * This value is the number of additional buffers in the ring
519 * that describe the buffer space to be consumed for the this
520 * packet. If the value is zero, then the packet must fit within
521 * the space described by this BD. If this value is 1 or more,
522 * it indicates how many additional "buffer" BDs are in the ring
523 * immediately following this BD to be used for the same network
524 * packet. Even if the packet to be placed does not need all the
525 * additional buffers, they will be consumed anyway.
527 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
528 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
529 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
530 #define RX_PROD_PKT_BD_FLAGS_SFT 6
533 * This is the length in Bytes of the host physical buffer where
534 * data for the packet may be placed in host memory.
537 * While this is a Byte resolution value, it is often
538 * advantageous to ensure that the buffers provided end on a
543 * The opaque data field is pass through to the completion and
544 * can be used for any data that the driver wants to associate
545 * with this receive buffer set.
549 * This is the host physical address where data for the packet
550 * may by placed in host memory.
553 * While this is a Byte resolution value, it is often
554 * advantageous to ensure that the buffers provide start on a
557 } __attribute__((packed));
559 /* Completion Ring Structures */
560 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
561 /* Base Completion Record (16 bytes) */
566 * This field indicates the exact type of the completion. By
567 * convention, the LSB identifies the length of the record in
568 * 16B units. Even values indicate 16B records. Odd values
569 * indicate 32B records.
571 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
572 #define CMPL_BASE_TYPE_SFT 0
573 /* TX L2 completion: Completion of TX packet. Length = 16B */
574 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
576 * RX L2 completion: Completion of and L2 RX
577 * packet. Length = 32B
579 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
581 * RX Aggregation Buffer completion : Completion
582 * of an L2 aggregation buffer in support of
583 * TPA, HDS, or Jumbo packet completion. Length
586 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
588 * RX L2 TPA Start Completion: Completion at the
589 * beginning of a TPA operation. Length = 32B
591 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
593 * RX L2 TPA End Completion: Completion at the
594 * end of a TPA operation. Length = 32B
596 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
598 * Statistics Ejection Completion: Completion of
599 * statistics data ejection buffer. Length = 16B
601 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
602 /* HWRM Command Completion: Completion of an HWRM command. */
603 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
604 /* Forwarded HWRM Request */
605 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
606 /* Forwarded HWRM Response */
607 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
608 /* HWRM Asynchronous Event Information */
609 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
610 /* CQ Notification */
611 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
612 /* SRQ Threshold Event */
613 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
614 /* DBQ Threshold Event */
615 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
616 /* QP Async Notification */
617 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
618 /* Function Async Notification */
619 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
628 * This value is written by the NIC such that it will be
629 * different for each pass through the completion queue. The
630 * even passes will write 1. The odd passes will write 0.
632 #define CMPL_BASE_V UINT32_C(0x1)
634 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
635 #define CMPL_BASE_INFO3_SFT 1
638 } __attribute__((packed));
640 /* TX Completion Record (16 bytes) */
644 * This field indicates the exact type of the completion. By
645 * convention, the LSB identifies the length of the record in
646 * 16B units. Even values indicate 16B records. Odd values
647 * indicate 32B records.
649 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
650 #define TX_CMPL_TYPE_SFT 0
651 /* TX L2 completion: Completion of TX packet. Length = 16B */
652 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
654 * When this bit is '1', it indicates a packet that has an error
655 * of some type. Type of error is indicated in error_flags.
657 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
659 * When this bit is '1', it indicates that the packet completed
660 * was transmitted using the push acceleration data provided by
661 * the driver. When this bit is '0', it indicates that the
662 * packet had not push acceleration data written or was executed
663 * as a normal packet even though push data was provided.
665 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
666 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
667 #define TX_CMPL_FLAGS_SFT 6
669 /* unused1 is 16 b */
672 * This is a copy of the opaque field from the first TX BD of
673 * this transmitted packet.
677 * This value is written by the NIC such that it will be
678 * different for each pass through the completion queue. The
679 * even passes will write 1. The odd passes will write 0.
681 #define TX_CMPL_V UINT32_C(0x1)
683 * This error indicates that there was some sort of problem with
684 * the BDs for the packet.
686 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
687 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
689 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
690 /* Bad Format: BDs were not formatted correctly. */
691 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
692 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
693 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
695 * When this bit is '1', it indicates that the length of the
696 * packet was zero. No packet was transmitted.
698 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
700 * When this bit is '1', it indicates that the packet was longer
701 * than the programmed limit in TDI. No packet was transmitted.
703 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
705 * When this bit is '1', it indicates that one or more of the
706 * BDs associated with this packet generated a PCI error. This
707 * probably means the address was not valid.
709 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
711 * When this bit is '1', it indicates that the packet was longer
712 * than indicated by the hint. No packet was transmitted.
714 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
716 * When this bit is '1', it indicates that the packet was
717 * dropped due to Poison TLP error on one or more of the TLPs in
718 * the PXP completion.
720 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
721 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
722 #define TX_CMPL_ERRORS_SFT 1
724 /* unused2 is 16 b */
726 /* unused3 is 32 b */
727 } __attribute__((packed));
729 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
733 * This field indicates the exact type of the completion. By
734 * convention, the LSB identifies the length of the record in
735 * 16B units. Even values indicate 16B records. Odd values
736 * indicate 32B records.
738 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
739 #define RX_PKT_CMPL_TYPE_SFT 0
741 * RX L2 completion: Completion of and L2 RX
742 * packet. Length = 32B
744 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
746 * When this bit is '1', it indicates a packet that has an error
747 * of some type. Type of error is indicated in error_flags.
749 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
750 /* This field indicates how the packet was placed in the buffer. */
751 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
752 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
753 /* Normal: Packet was placed using normal algorithm. */
754 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
755 /* Jumbo: Packet was placed using jumbo algorithm. */
756 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
758 * Header/Data Separation: Packet was placed
759 * using Header/Data separation algorithm. The
760 * separation location is indicated by the itype
763 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
764 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
765 /* This bit is '1' if the RSS field in this completion is valid. */
766 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
769 * This value indicates what the inner packet determined for the
772 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
773 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
774 /* Not Known: Indicates that the packet type was not known. */
775 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
777 * IP Packet: Indicates that the packet was an
778 * IP packet, but further classification was not
781 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
783 * TCP Packet: Indicates that the packet was IP
784 * and TCP. This indicates that the
785 * payload_offset field is valid.
787 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
789 * UDP Packet: Indicates that the packet was IP
790 * and UDP. This indicates that the
791 * payload_offset field is valid.
793 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
795 * FCoE Packet: Indicates that the packet was
796 * recognized as a FCoE. This also indicates
797 * that the payload_offset field is valid.
799 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
801 * RoCE Packet: Indicates that the packet was
802 * recognized as a RoCE. This also indicates
803 * that the payload_offset field is valid.
805 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
807 * ICMP Packet: Indicates that the packet was
808 * recognized as ICMP. This indicates that the
809 * payload_offset field is valid.
811 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
813 * PtP packet wo/timestamp: Indicates that the
814 * packet was recognized as a PtP packet.
816 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
818 * PtP packet w/timestamp: Indicates that the
819 * packet was recognized as a PtP packet and
820 * that a timestamp was taken for the packet.
822 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
823 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
824 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
825 #define RX_PKT_CMPL_FLAGS_SFT 6
828 * This is the length of the data for the packet stored in the
829 * buffer(s) identified by the opaque value. This includes the
830 * packet BD and any associated buffer BDs. This does not
831 * include the the length of any data places in aggregation BDs.
835 * This is a copy of the opaque field from the RX BD this
836 * completion corresponds to.
841 * This value is written by the NIC such that it will be
842 * different for each pass through the completion queue. The
843 * even passes will write 1. The odd passes will write 0.
845 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
847 * This value is the number of aggregation buffers that follow
848 * this entry in the completion ring that are a part of this
849 * packet. If the value is zero, then the packet is completely
850 * contained in the buffer space provided for the packet in the
853 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
854 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
856 uint8_t rss_hash_type;
858 * This is the RSS hash type for the packet. The value is packed
859 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
860 * . The value of tuple_extrac_op provides the information about
861 * what fields the hash was computed on. * 0: The RSS hash was
862 * computed over source IP address, destination IP address,
863 * source port, and destination port of inner IP and TCP or UDP
864 * headers. Note: For non-tunneled packets, the packet headers
865 * are considered inner packet headers for the RSS hash
866 * computation purpose. * 1: The RSS hash was computed over
867 * source IP address and destination IP address of inner IP
868 * header. Note: For non-tunneled packets, the packet headers
869 * are considered inner packet headers for the RSS hash
870 * computation purpose. * 2: The RSS hash was computed over
871 * source IP address, destination IP address, source port, and
872 * destination port of IP and TCP or UDP headers of outer tunnel
873 * headers. Note: For non-tunneled packets, this value is not
874 * applicable. * 3: The RSS hash was computed over source IP
875 * address and destination IP address of IP header of outer
876 * tunnel headers. Note: For non-tunneled packets, this value is
877 * not applicable. Note that 4-tuples values listed above are
878 * applicable for layer 4 protocols supported and enabled for
879 * RSS in the hardware, HWRM firmware, and drivers. For example,
880 * if RSS hash is supported and enabled for TCP traffic only,
881 * then the values of tuple_extract_op corresponding to 4-tuples
882 * are only valid for TCP traffic.
884 uint8_t payload_offset;
886 * This value indicates the offset in bytes from the beginning
887 * of the packet where the inner payload starts. This value is
888 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
889 * indicates that header is 256B into the packet.
895 * This value is the RSS hash value calculated for the packet
896 * based on the mode bits and key value in the VNIC.
898 } __attribute__((packed));
900 /* last 16 bytes of RX Packet Completion Record */
901 struct rx_pkt_cmpl_hi {
904 * This indicates that the ip checksum was calculated for the
905 * inner packet and that the ip_cs_error field indicates if
906 * there was an error.
908 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
910 * This indicates that the TCP, UDP or ICMP checksum was
911 * calculated for the inner packet and that the l4_cs_error
912 * field indicates if there was an error.
914 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
916 * This indicates that the ip checksum was calculated for the
917 * tunnel header and that the t_ip_cs_error field indicates if
918 * there was an error.
920 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
922 * This indicates that the UDP checksum was calculated for the
923 * tunnel packet and that the t_l4_cs_error field indicates if
924 * there was an error.
926 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
927 /* This value indicates what format the metadata field is. */
928 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
929 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
930 /* No metadata informtaion. Value is zero. */
931 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
933 * The metadata field contains the VLAN tag and
934 * TPID value. - metadata[11:0] contains the
935 * vlan VID value. - metadata[12] contains the
936 * vlan DE value. - metadata[15:13] contains the
937 * vlan PRI value. - metadata[31:16] contains
938 * the vlan TPID value.
940 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
941 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
942 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
944 * This field indicates the IP type for the inner-most IP
945 * header. A value of '0' indicates IPv4. A value of '1'
946 * indicates IPv6. This value is only valid if itype indicates a
947 * packet with an IP header.
949 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
952 * This is data from the CFA block as indicated by the
955 /* When meta_format=1, this value is the VLAN VID. */
956 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
957 #define RX_PKT_CMPL_METADATA_VID_SFT 0
958 /* When meta_format=1, this value is the VLAN DE. */
959 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
960 /* When meta_format=1, this value is the VLAN PRI. */
961 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
962 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
963 /* When meta_format=1, this value is the VLAN TPID. */
964 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
965 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
968 * This value is written by the NIC such that it will be
969 * different for each pass through the completion queue. The
970 * even passes will write 1. The odd passes will write 0.
972 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
974 * This error indicates that there was some sort of problem with
975 * the BDs for the packet that was found after part of the
976 * packet was already placed. The packet should be treated as
979 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
980 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
981 /* No buffer error */
982 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
984 * Did Not Fit: Packet did not fit into packet
985 * buffer provided. For regular placement, this
986 * means the packet did not fit in the buffer
987 * provided. For HDS and jumbo placement, this
988 * means that the packet could not be placed
989 * into 7 physical buffers or less.
991 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT (UINT32_C(0x1) << 1)
993 * Not On Chip: All BDs needed for the packet
994 * were not on-chip when the packet arrived.
996 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP (UINT32_C(0x2) << 1)
997 /* Bad Format: BDs were not formatted correctly. */
998 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT (UINT32_C(0x3) << 1)
999 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
1000 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1001 /* This indicates that there was an error in the IP header checksum. */
1002 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1004 * This indicates that there was an error in the TCP, UDP or
1007 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1009 * This indicates that there was an error in the tunnel IP
1012 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1014 * This indicates that there was an error in the tunnel UDP
1017 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1019 * This indicates that there was a CRC error on either an FCoE
1020 * or RoCE packet. The itype indicates the packet type.
1022 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1024 * This indicates that there was an error in the tunnel portion
1025 * of the packet when this field is non-zero.
1027 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1028 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1030 * No additional error occurred on the tunnel
1031 * portion of the packet of the packet does not
1034 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1036 * Indicates that IP header version does not
1037 * match expectation from L2 Ethertype for IPv4
1038 * and IPv6 in the tunnel header.
1040 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION (UINT32_C(0x1) << 9)
1042 * Indicates that header length is out of range
1043 * in the tunnel header. Valid for IPv4.
1045 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN (UINT32_C(0x2) << 9)
1047 * Indicates that the physical packet is shorter
1048 * than that claimed by the PPPoE header length
1049 * for a tunnel PPPoE packet.
1051 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR (UINT32_C(0x3) << 9)
1053 * Indicates that physical packet is shorter
1054 * than that claimed by the tunnel l3 header
1055 * length. Valid for IPv4, or IPv6 tunnel packet
1058 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR (UINT32_C(0x4) << 9)
1060 * Indicates that the physical packet is shorter
1061 * than that claimed by the tunnel UDP header
1062 * length for a tunnel UDP packet that is not
1065 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR (UINT32_C(0x5) << 9)
1067 * indicates that the IPv4 TTL or IPv6 hop limit
1068 * check have failed (e.g. TTL = 0) in the
1069 * tunnel header. Valid for IPv4, and IPv6.
1071 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL (UINT32_C(0x6) << 9)
1072 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1073 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1075 * This indicates that there was an error in the inner portion
1076 * of the packet when this field is non-zero.
1078 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1079 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1081 * No additional error occurred on the tunnel
1082 * portion of the packet of the packet does not
1085 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1087 * Indicates that IP header version does not
1088 * match expectation from L2 Ethertype for IPv4
1089 * and IPv6 or that option other than VFT was
1090 * parsed on FCoE packet.
1092 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION (UINT32_C(0x1) << 12)
1094 * indicates that header length is out of range.
1095 * Valid for IPv4 and RoCE
1097 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN (UINT32_C(0x2) << 12)
1099 * indicates that the IPv4 TTL or IPv6 hop limit
1100 * check have failed (e.g. TTL = 0). Valid for
1103 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1105 * Indicates that physical packet is shorter
1106 * than that claimed by the l3 header length.
1107 * Valid for IPv4, IPv6 packet or RoCE packets.
1109 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR (UINT32_C(0x4) << 12)
1111 * Indicates that the physical packet is shorter
1112 * than that claimed by the UDP header length
1113 * for a UDP packet that is not fragmented.
1115 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR (UINT32_C(0x5) << 12)
1117 * Indicates that TCP header length > IP
1118 * payload. Valid for TCP packets only.
1120 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN (UINT32_C(0x6) << 12)
1121 /* Indicates that TCP header length < 5. Valid for TCP. */
1122 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1123 (UINT32_C(0x7) << 12)
1125 * Indicates that TCP option headers result in a
1126 * TCP header size that does not match data
1127 * offset in TCP header. Valid for TCP.
1129 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1130 (UINT32_C(0x8) << 12)
1131 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1132 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1133 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1134 #define RX_PKT_CMPL_ERRORS_SFT 1
1137 * This field identifies the CFA action rule that was used for
1142 * This value holds the reordering sequence number for the
1143 * packet. If the reordering sequence is not valid, then this
1144 * value is zero. The reordering domain for the packet is in the
1145 * bottom 8 to 10b of the rss_hash value. The bottom 20b of this
1146 * value contain the ordering domain value for the packet.
1148 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1149 #define RX_PKT_CMPL_REORDER_SFT 0
1150 } __attribute__((packed));
1152 /* HWRM Forwarded Request (16 bytes) */
1153 struct hwrm_fwd_req_cmpl {
1154 uint16_t req_len_type;
1155 /* Length of forwarded request in bytes. */
1157 * This field indicates the exact type of the completion. By
1158 * convention, the LSB identifies the length of the record in
1159 * 16B units. Even values indicate 16B records. Odd values
1160 * indicate 32B records.
1162 #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f)
1163 #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0
1164 /* Forwarded HWRM Request */
1165 #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22)
1166 /* Length of forwarded request in bytes. */
1167 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1168 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1171 * Source ID of this request. Typically used in forwarding
1172 * requests and responses. 0x0 - 0xFFF8 - Used for function ids
1173 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
1177 /* unused1 is 32 b */
1178 uint32_t req_buf_addr_v[2];
1179 /* Address of forwarded request. */
1181 * This value is written by the NIC such that it will be
1182 * different for each pass through the completion queue. The
1183 * even passes will write 1. The odd passes will write 0.
1185 #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1)
1186 /* Address of forwarded request. */
1187 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1188 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1189 } __attribute__((packed));
1191 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1192 struct hwrm_async_event_cmpl {
1194 /* unused1 is 10 b */
1196 * This field indicates the exact type of the completion. By
1197 * convention, the LSB identifies the length of the record in
1198 * 16B units. Even values indicate 16B records. Odd values
1199 * indicate 32B records.
1201 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1202 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1203 /* HWRM Asynchronous Event Information */
1204 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1205 /* unused1 is 10 b */
1207 /* Identifiers of events. */
1208 /* Link status changed */
1209 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1210 /* Link MTU changed */
1211 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1212 /* Link speed changed */
1213 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1214 /* DCB Configuration changed */
1215 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1216 /* Port connection not allowed */
1217 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1218 /* Link speed configuration was not allowed */
1219 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED UINT32_C(0x5)
1220 /* Link speed configuration change */
1221 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1222 /* Port PHY configuration change */
1223 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1224 /* Function driver unloaded */
1225 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1226 /* Function driver loaded */
1227 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1228 /* Function FLR related processing has completed */
1229 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1230 /* PF driver unloaded */
1231 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1232 /* PF driver loaded */
1233 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1234 /* VF Function Level Reset (FLR) */
1235 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1236 /* VF MAC Address Change */
1237 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1238 /* PF-VF communication channel status change. */
1239 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE UINT32_C(0x32)
1240 /* VF Configuration Change */
1241 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1243 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1244 uint32_t event_data2;
1245 /* Event specific data */
1249 * This value is written by the NIC such that it will be
1250 * different for each pass through the completion queue. The
1251 * even passes will write 1. The odd passes will write 0.
1253 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1255 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1256 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1257 uint8_t timestamp_lo;
1258 /* 8-lsb timestamp from POR (100-msec resolution) */
1259 uint16_t timestamp_hi;
1260 /* 16-lsb timestamp from POR (100-msec resolution) */
1261 uint32_t event_data1;
1262 /* Event specific data */
1263 } __attribute__((packed));
1266 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1267 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1268 * processors inside the chip. This firmware service is vital part of the chip.
1269 * The chip can not be used by a driver or HWRM client without the HWRM.
1272 /* Input (16 bytes) */
1276 * This value indicates what type of request this is. The format
1277 * for the rest of the command is determined by this field.
1281 * This value indicates the what completion ring the request
1282 * will be optionally completed on. If the value is -1, then no
1283 * CR completion will be generated. Any other value must be a
1284 * valid CR ring_id value for this function.
1287 /* This value indicates the command sequence number. */
1290 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1291 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1296 * This is the host address where the response will be written
1297 * when the request is complete. This area must be 16B aligned
1298 * and must be cleared to zero before the request is made.
1300 } __attribute__((packed));
1302 /* Output (8 bytes) */
1304 uint16_t error_code;
1306 * Pass/Fail or error type Note: receiver to verify the in
1307 * parameters, and fail the call with an error when appropriate
1310 /* This field returns the type of original request. */
1312 /* This field provides original sequence number of the command. */
1315 * This field is the length of the response in bytes. The last
1316 * byte of the response is a valid flag that will read as '1'
1317 * when the command has been completely written to memory.
1319 } __attribute__((packed));
1323 * Description: This function is called by a driver to determine the HWRM
1324 * interface version supported by the HWRM firmware, the version of HWRM
1325 * firmware implementation, the name of HWRM firmware, the versions of other
1326 * embedded firmwares, and the names of other embedded firmwares, etc. Any
1327 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
1328 * be considered an invalid version.
1330 /* Input (24 bytes) */
1331 struct hwrm_ver_get_input {
1334 * This value indicates what type of request this is. The format
1335 * for the rest of the command is determined by this field.
1339 * This value indicates the what completion ring the request
1340 * will be optionally completed on. If the value is -1, then no
1341 * CR completion will be generated. Any other value must be a
1342 * valid CR ring_id value for this function.
1345 /* This value indicates the command sequence number. */
1348 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1349 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1354 * This is the host address where the response will be written
1355 * when the request is complete. This area must be 16B aligned
1356 * and must be cleared to zero before the request is made.
1358 uint8_t hwrm_intf_maj;
1360 * This field represents the major version of HWRM interface
1361 * specification supported by the driver HWRM implementation.
1362 * The interface major version is intended to change only when
1363 * non backward compatible changes are made to the HWRM
1364 * interface specification.
1366 uint8_t hwrm_intf_min;
1368 * This field represents the minor version of HWRM interface
1369 * specification supported by the driver HWRM implementation. A
1370 * change in interface minor version is used to reflect
1371 * significant backward compatible modification to HWRM
1372 * interface specification. This can be due to addition or
1373 * removal of functionality. HWRM interface specifications with
1374 * the same major version but different minor versions are
1377 uint8_t hwrm_intf_upd;
1379 * This field represents the update version of HWRM interface
1380 * specification supported by the driver HWRM implementation.
1381 * The interface update version is used to reflect minor changes
1382 * or bug fixes to a released HWRM interface specification.
1384 uint8_t unused_0[5];
1385 } __attribute__((packed));
1387 /* Output (128 bytes) */
1388 struct hwrm_ver_get_output {
1389 uint16_t error_code;
1391 * Pass/Fail or error type Note: receiver to verify the in
1392 * parameters, and fail the call with an error when appropriate
1395 /* This field returns the type of original request. */
1397 /* This field provides original sequence number of the command. */
1400 * This field is the length of the response in bytes. The last
1401 * byte of the response is a valid flag that will read as '1'
1402 * when the command has been completely written to memory.
1404 uint8_t hwrm_intf_maj;
1406 * This field represents the major version of HWRM interface
1407 * specification supported by the HWRM implementation. The
1408 * interface major version is intended to change only when non
1409 * backward compatible changes are made to the HWRM interface
1410 * specification. A HWRM implementation that is compliant with
1411 * this specification shall provide value of 1 in this field.
1413 uint8_t hwrm_intf_min;
1415 * This field represents the minor version of HWRM interface
1416 * specification supported by the HWRM implementation. A change
1417 * in interface minor version is used to reflect significant
1418 * backward compatible modification to HWRM interface
1419 * specification. This can be due to addition or removal of
1420 * functionality. HWRM interface specifications with the same
1421 * major version but different minor versions are compatible. A
1422 * HWRM implementation that is compliant with this specification
1423 * shall provide value of 2 in this field.
1425 uint8_t hwrm_intf_upd;
1427 * This field represents the update version of HWRM interface
1428 * specification supported by the HWRM implementation. The
1429 * interface update version is used to reflect minor changes or
1430 * bug fixes to a released HWRM interface specification. A HWRM
1431 * implementation that is compliant with this specification
1432 * shall provide value of 2 in this field.
1434 uint8_t hwrm_intf_rsvd;
1435 uint8_t hwrm_fw_maj;
1437 * This field represents the major version of HWRM firmware. A
1438 * change in firmware major version represents a major firmware
1441 uint8_t hwrm_fw_min;
1443 * This field represents the minor version of HWRM firmware. A
1444 * change in firmware minor version represents significant
1445 * firmware functionality changes.
1447 uint8_t hwrm_fw_bld;
1449 * This field represents the build version of HWRM firmware. A
1450 * change in firmware build version represents bug fixes to a
1451 * released firmware.
1453 uint8_t hwrm_fw_rsvd;
1455 * This field is a reserved field. This field can be used to
1456 * represent firmware branches or customer specific releases
1457 * tied to a specific (major,minor,update) version of the HWRM
1460 uint8_t mgmt_fw_maj;
1462 * This field represents the major version of mgmt firmware. A
1463 * change in major version represents a major release.
1465 uint8_t mgmt_fw_min;
1467 * This field represents the minor version of mgmt firmware. A
1468 * change in minor version represents significant functionality
1471 uint8_t mgmt_fw_bld;
1473 * This field represents the build version of mgmt firmware. A
1474 * change in update version represents bug fixes.
1476 uint8_t mgmt_fw_rsvd;
1478 * This field is a reserved field. This field can be used to
1479 * represent firmware branches or customer specific releases
1480 * tied to a specific (major,minor,update) version
1482 uint8_t netctrl_fw_maj;
1484 * This field represents the major version of network control
1485 * firmware. A change in major version represents a major
1488 uint8_t netctrl_fw_min;
1490 * This field represents the minor version of network control
1491 * firmware. A change in minor version represents significant
1492 * functionality changes.
1494 uint8_t netctrl_fw_bld;
1496 * This field represents the build version of network control
1497 * firmware. A change in update version represents bug fixes.
1499 uint8_t netctrl_fw_rsvd;
1501 * This field is a reserved field. This field can be used to
1502 * represent firmware branches or customer specific releases
1503 * tied to a specific (major,minor,update) version
1505 uint32_t dev_caps_cfg;
1507 * This field is used to indicate device's capabilities and
1511 * If set to 1, then secure firmware update behavior is
1512 * supported. If set to 0, then secure firmware update behavior
1515 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED UINT32_C(0x1)
1517 * If set to 1, then firmware based DCBX agent is supported. If
1518 * set to 0, then firmware based DCBX agent capability is not
1519 * supported on this device.
1521 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED UINT32_C(0x2)
1522 uint8_t roce_fw_maj;
1524 * This field represents the major version of RoCE firmware. A
1525 * change in major version represents a major release.
1527 uint8_t roce_fw_min;
1529 * This field represents the minor version of RoCE firmware. A
1530 * change in minor version represents significant functionality
1533 uint8_t roce_fw_bld;
1535 * This field represents the build version of RoCE firmware. A
1536 * change in update version represents bug fixes.
1538 uint8_t roce_fw_rsvd;
1540 * This field is a reserved field. This field can be used to
1541 * represent firmware branches or customer specific releases
1542 * tied to a specific (major,minor,update) version
1544 char hwrm_fw_name[16];
1546 * This field represents the name of HWRM FW (ASCII chars with
1549 char mgmt_fw_name[16];
1551 * This field represents the name of mgmt FW (ASCII chars with
1554 char netctrl_fw_name[16];
1556 * This field represents the name of network control firmware
1557 * (ASCII chars with NULL at the end).
1559 uint32_t reserved2[4];
1561 * This field is reserved for future use. The responder should
1562 * set it to 0. The requester should ignore this field.
1564 char roce_fw_name[16];
1566 * This field represents the name of RoCE FW (ASCII chars with
1570 /* This field returns the chip number. */
1572 /* This field returns the revision of chip. */
1574 /* This field returns the chip metal number. */
1575 uint8_t chip_bond_id;
1576 /* This field returns the bond id of the chip. */
1577 uint8_t chip_platform_type;
1579 * This value indicates the type of platform used for chip
1583 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
1584 /* FPGA platform of the chip. */
1585 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
1586 /* Palladium platform of the chip. */
1587 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
1588 uint16_t max_req_win_len;
1590 * This field returns the maximum value of request window that
1591 * is supported by the HWRM. The request window is mapped into
1592 * device address space using MMIO.
1594 uint16_t max_resp_len;
1595 /* This field returns the maximum value of response buffer in bytes. */
1596 uint16_t def_req_timeout;
1598 * This field returns the default request timeout value in
1606 * This field is used in Output records to indicate that the
1607 * output is completely written to RAM. This field should be
1608 * read as '1' to indicate that the output has been completely
1609 * written. When writing a command completion or response to an
1610 * internal processor, the order of writes has to be such that
1611 * this field is written last.
1613 } __attribute__((packed));
1615 /* hwrm_func_reset */
1617 * Description: This command resets a hardware function (PCIe function) and
1618 * frees any resources used by the function. This command shall be initiated by
1619 * the driver after an FLR has occurred to prepare the function for re-use. This
1620 * command may also be initiated by a driver prior to doing it's own
1621 * configuration. This command puts the function into the reset state. In the
1622 * reset state, global and port related features of the chip are not available.
1625 * Note: This command will reset a function that has already been disabled or
1626 * idled. The command returns all the resources owned by the function so a new
1627 * driver may allocate and configure resources normally.
1629 /* Input (24 bytes) */
1630 struct hwrm_func_reset_input {
1633 * This value indicates what type of request this is. The format
1634 * for the rest of the command is determined by this field.
1638 * This value indicates the what completion ring the request
1639 * will be optionally completed on. If the value is -1, then no
1640 * CR completion will be generated. Any other value must be a
1641 * valid CR ring_id value for this function.
1644 /* This value indicates the command sequence number. */
1647 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1648 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1653 * This is the host address where the response will be written
1654 * when the request is complete. This area must be 16B aligned
1655 * and must be cleared to zero before the request is made.
1658 /* This bit must be '1' for the vf_id_valid field to be configured. */
1659 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
1662 * The ID of the VF that this PF is trying to reset. Only the
1663 * parent PF shall be allowed to reset a child VF. A parent PF
1664 * driver shall use this field only when a specific child VF is
1665 * requested to be reset.
1667 uint8_t func_reset_level;
1668 /* This value indicates the level of a function reset. */
1670 * Reset the caller function and its children
1671 * VFs (if any). If no children functions exist,
1672 * then reset the caller function only.
1674 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
1675 /* Reset the caller function only */
1676 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1)
1678 * Reset all children VFs of the caller function
1679 * driver if the caller is a PF driver. It is an
1680 * error to specify this level by a VF driver.
1681 * It is an error to specify this level by a PF
1682 * driver with no children VFs.
1684 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN UINT32_C(0x2)
1686 * Reset a specific VF of the caller function
1687 * driver if the caller is the parent PF driver.
1688 * It is an error to specify this level by a VF
1689 * driver. It is an error to specify this level
1690 * by a PF driver that is not the parent of the
1691 * VF that is being requested to reset.
1693 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3)
1695 } __attribute__((packed));
1697 /* Output (16 bytes) */
1698 struct hwrm_func_reset_output {
1699 uint16_t error_code;
1701 * Pass/Fail or error type Note: receiver to verify the in
1702 * parameters, and fail the call with an error when appropriate
1705 /* This field returns the type of original request. */
1707 /* This field provides original sequence number of the command. */
1710 * This field is the length of the response in bytes. The last
1711 * byte of the response is a valid flag that will read as '1'
1712 * when the command has been completely written to memory.
1720 * This field is used in Output records to indicate that the
1721 * output is completely written to RAM. This field should be
1722 * read as '1' to indicate that the output has been completely
1723 * written. When writing a command completion or response to an
1724 * internal processor, the order of writes has to be such that
1725 * this field is written last.
1727 } __attribute__((packed));
1729 /* hwrm_func_qcaps */
1731 * Description: This command returns capabilities of a function. The input FID
1732 * value is used to indicate what function is being queried. This allows a
1733 * physical function driver to query virtual functions that are children of the
1734 * physical function. The output FID value is needed to configure Rings and
1735 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1737 /* Input (24 bytes) */
1738 struct hwrm_func_qcaps_input {
1741 * This value indicates what type of request this is. The format
1742 * for the rest of the command is determined by this field.
1746 * This value indicates the what completion ring the request
1747 * will be optionally completed on. If the value is -1, then no
1748 * CR completion will be generated. Any other value must be a
1749 * valid CR ring_id value for this function.
1752 /* This value indicates the command sequence number. */
1755 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1756 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1761 * This is the host address where the response will be written
1762 * when the request is complete. This area must be 16B aligned
1763 * and must be cleared to zero before the request is made.
1767 * Function ID of the function that is being queried. 0xFF...
1768 * (All Fs) if the query is for the requesting function.
1770 uint16_t unused_0[3];
1771 } __attribute__((packed));
1773 /* Output (80 bytes) */
1774 struct hwrm_func_qcaps_output {
1775 uint16_t error_code;
1777 * Pass/Fail or error type Note: receiver to verify the in
1778 * parameters, and fail the call with an error when appropriate
1781 /* This field returns the type of original request. */
1783 /* This field provides original sequence number of the command. */
1786 * This field is the length of the response in bytes. The last
1787 * byte of the response is a valid flag that will read as '1'
1788 * when the command has been completely written to memory.
1792 * FID value. This value is used to identify operations on the
1793 * PCI bus as belonging to a particular PCI function.
1797 * Port ID of port that this function is associated with. Valid
1798 * only for the PF. 0xFF... (All Fs) if this function is not
1799 * associated with any port. 0xFF... (All Fs) if this function
1800 * is called from a VF.
1803 /* If 1, then Push mode is supported on this function. */
1804 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
1806 * If 1, then the global MSI-X auto-masking is enabled for the
1809 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING UINT32_C(0x2)
1811 * If 1, then the Precision Time Protocol (PTP) processing is
1812 * supported on this function. The HWRM should enable PTP on
1813 * only a single Physical Function (PF) per port.
1815 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
1817 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
1818 * supported on this function.
1820 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
1822 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
1823 * supported on this function.
1825 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
1827 * If 1, then control and configuration of WoL magic packet are
1828 * supported on this function.
1830 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED UINT32_C(0x20)
1832 * If 1, then control and configuration of bitmap pattern packet
1833 * are supported on this function.
1835 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
1837 * If set to 1, then the control and configuration of rate limit
1838 * of an allocated TX ring on the queried function is supported.
1840 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
1842 * If 1, then control and configuration of minimum and maximum
1843 * bandwidths are supported on the queried function.
1845 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
1847 * If the query is for a VF, then this flag shall be ignored. If
1848 * this query is for a PF and this flag is set to 1, then the PF
1849 * has the capability to set the rate limits on the TX rings of
1850 * its children VFs. If this query is for a PF and this flag is
1851 * set to 0, then the PF does not have the capability to set the
1852 * rate limits on the TX rings of its children VFs.
1854 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED UINT32_C(0x200)
1856 * If the query is for a VF, then this flag shall be ignored. If
1857 * this query is for a PF and this flag is set to 1, then the PF
1858 * has the capability to set the minimum and/or maximum
1859 * bandwidths for its children VFs. If this query is for a PF
1860 * and this flag is set to 0, then the PF does not have the
1861 * capability to set the minimum or maximum bandwidths for its
1864 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
1865 uint8_t mac_address[6];
1867 * This value is current MAC address configured for this
1868 * function. A value of 00-00-00-00-00-00 indicates no MAC
1869 * address is currently configured.
1871 uint16_t max_rsscos_ctx;
1873 * The maximum number of RSS/COS contexts that can be allocated
1876 uint16_t max_cmpl_rings;
1878 * The maximum number of completion rings that can be allocated
1881 uint16_t max_tx_rings;
1883 * The maximum number of transmit rings that can be allocated to
1886 uint16_t max_rx_rings;
1888 * The maximum number of receive rings that can be allocated to
1891 uint16_t max_l2_ctxs;
1893 * The maximum number of L2 contexts that can be allocated to
1898 * The maximum number of VNICs that can be allocated to the
1901 uint16_t first_vf_id;
1903 * The identifier for the first VF enabled on a PF. This is
1904 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
1905 * this command is called on a PF with SR-IOV disabled or on a
1910 * The maximum number of VFs that can be allocated to the
1911 * function. This is valid only on the PF with SR-IOV enabled.
1912 * 0xFF... (All Fs) if this command is called on a PF with SR-
1913 * IOV disabled or on a VF.
1915 uint16_t max_stat_ctx;
1917 * The maximum number of statistic contexts that can be
1918 * allocated to the function.
1920 uint32_t max_encap_records;
1922 * The maximum number of Encapsulation records that can be
1923 * offloaded by this function.
1925 uint32_t max_decap_records;
1927 * The maximum number of decapsulation records that can be
1928 * offloaded by this function.
1930 uint32_t max_tx_em_flows;
1932 * The maximum number of Exact Match (EM) flows that can be
1933 * offloaded by this function on the TX side.
1935 uint32_t max_tx_wm_flows;
1937 * The maximum number of Wildcard Match (WM) flows that can be
1938 * offloaded by this function on the TX side.
1940 uint32_t max_rx_em_flows;
1942 * The maximum number of Exact Match (EM) flows that can be
1943 * offloaded by this function on the RX side.
1945 uint32_t max_rx_wm_flows;
1947 * The maximum number of Wildcard Match (WM) flows that can be
1948 * offloaded by this function on the RX side.
1950 uint32_t max_mcast_filters;
1952 * The maximum number of multicast filters that can be supported
1953 * by this function on the RX side.
1955 uint32_t max_flow_id;
1957 * The maximum value of flow_id that can be supported in
1958 * completion records.
1960 uint32_t max_hw_ring_grps;
1962 * The maximum number of HW ring groups that can be supported on
1965 uint16_t max_sp_tx_rings;
1967 * The maximum number of strict priority transmit rings that can
1968 * be allocated to the function. This number indicates the
1969 * maximum number of TX rings that can be assigned strict
1970 * priorities out of the maximum number of TX rings that can be
1971 * allocated (max_tx_rings) to the function.
1976 * This field is used in Output records to indicate that the
1977 * output is completely written to RAM. This field should be
1978 * read as '1' to indicate that the output has been completely
1979 * written. When writing a command completion or response to an
1980 * internal processor, the order of writes has to be such that
1981 * this field is written last.
1983 } __attribute__((packed));
1985 /* hwrm_func_qcfg */
1987 * Description: This command returns the current configuration of a function.
1988 * The input FID value is used to indicate what function is being queried. This
1989 * allows a physical function driver to query virtual functions that are
1990 * children of the physical function. The output FID value is needed to
1991 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
1994 /* Input (24 bytes) */
1995 struct hwrm_func_qcfg_input {
1998 * This value indicates what type of request this is. The format
1999 * for the rest of the command is determined by this field.
2003 * This value indicates the what completion ring the request
2004 * will be optionally completed on. If the value is -1, then no
2005 * CR completion will be generated. Any other value must be a
2006 * valid CR ring_id value for this function.
2009 /* This value indicates the command sequence number. */
2012 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2013 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2018 * This is the host address where the response will be written
2019 * when the request is complete. This area must be 16B aligned
2020 * and must be cleared to zero before the request is made.
2024 * Function ID of the function that is being queried. 0xFF...
2025 * (All Fs) if the query is for the requesting function.
2027 uint16_t unused_0[3];
2028 } __attribute__((packed));
2030 /* Output (72 bytes) */
2031 struct hwrm_func_qcfg_output {
2032 uint16_t error_code;
2034 * Pass/Fail or error type Note: receiver to verify the in
2035 * parameters, and fail the call with an error when appropriate
2038 /* This field returns the type of original request. */
2040 /* This field provides original sequence number of the command. */
2043 * This field is the length of the response in bytes. The last
2044 * byte of the response is a valid flag that will read as '1'
2045 * when the command has been completely written to memory.
2049 * FID value. This value is used to identify operations on the
2050 * PCI bus as belonging to a particular PCI function.
2054 * Port ID of port that this function is associated with.
2055 * 0xFF... (All Fs) if this function is not associated with any
2060 * This value is the current VLAN setting for this function. The
2061 * value of 0 for this field indicates no priority tagging or
2062 * VLAN is used. This field's format is same as 802.1Q Tag's Tag
2063 * Control Information (TCI) format that includes both Priority
2064 * Code Point (PCP) and VLAN Identifier (VID).
2068 * If 1, then magic packet based Out-Of-Box WoL is enabled on
2069 * the port associated with this function.
2071 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
2074 * If 1, then bitmap pattern based Out-Of-Box WoL packet is
2075 * enabled on the port associated with this function.
2077 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2)
2079 * If set to 1, then FW based DCBX agent is enabled and running
2080 * on the port associated with this function. If set to 0, then
2081 * DCBX agent is not running in the firmware.
2083 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
2085 uint8_t mac_address[6];
2087 * This value is current MAC address configured for this
2088 * function. A value of 00-00-00-00-00-00 indicates no MAC
2089 * address is currently configured.
2093 * This value is current PCI ID of this function. If ARI is
2094 * enabled, then it is Bus Number (8b):Function Number(8b).
2095 * Otherwise, it is Bus Number (8b):Device Number (4b):Function
2098 uint16_t alloc_rsscos_ctx;
2100 * The number of RSS/COS contexts currently allocated to the
2103 uint16_t alloc_cmpl_rings;
2105 * The number of completion rings currently allocated to the
2106 * function. This does not include the rings allocated to any
2107 * children functions if any.
2109 uint16_t alloc_tx_rings;
2111 * The number of transmit rings currently allocated to the
2112 * function. This does not include the rings allocated to any
2113 * children functions if any.
2115 uint16_t alloc_rx_rings;
2117 * The number of receive rings currently allocated to the
2118 * function. This does not include the rings allocated to any
2119 * children functions if any.
2121 uint16_t alloc_l2_ctx;
2122 /* The allocated number of L2 contexts to the function. */
2123 uint16_t alloc_vnics;
2124 /* The allocated number of vnics to the function. */
2127 * The maximum transmission unit of the function. For rings
2128 * allocated on this function, this default value is used if
2129 * ring MTU is not specified.
2133 * The maximum receive unit of the function. For vnics allocated
2134 * on this function, this default value is used if vnic MRU is
2137 uint16_t stat_ctx_id;
2138 /* The statistics context assigned to a function. */
2139 uint8_t port_partition_type;
2141 * The HWRM shall return Unknown value for this field when this
2142 * command is used to query VF's configuration.
2144 /* Single physical function */
2145 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0)
2146 /* Multiple physical functions */
2147 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
2148 /* Network Partitioning 1.0 */
2149 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 \
2151 /* Network Partitioning 1.5 */
2152 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 \
2154 /* Network Partitioning 2.0 */
2155 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 \
2158 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN \
2161 uint16_t dflt_vnic_id;
2162 /* The default VNIC ID assigned to a function that is being queried. */
2167 * Minimum BW allocated for this function. The HWRM will
2168 * translate this value into byte counter and time interval used
2169 * for the scheduler inside the device. A value of 0 indicates
2170 * the minimum bandwidth is not configured.
2172 /* Bandwidth value */
2173 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK \
2175 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0
2177 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_RSVD UINT32_C(0x10000000)
2178 /* bw_value_unit is 3 b */
2179 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \
2180 UINT32_C(0xe0000000)
2181 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
2182 /* Value is in Mbps */
2183 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MBPS \
2184 (UINT32_C(0x0) << 29)
2185 /* Value is in 1/100th of a percentage of total bandwidth. */
2186 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
2187 (UINT32_C(0x1) << 29)
2189 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
2190 (UINT32_C(0x7) << 29)
2191 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
2192 FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID
2195 * Maximum BW allocated for this function. The HWRM will
2196 * translate this value into byte counter and time interval used
2197 * for the scheduler inside the device. A value of 0 indicates
2198 * that the maximum bandwidth is not configured.
2200 /* Bandwidth value */
2201 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK \
2203 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0
2205 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_RSVD UINT32_C(0x10000000)
2206 /* bw_value_unit is 3 b */
2207 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \
2208 UINT32_C(0xe0000000)
2209 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
2210 /* Value is in Mbps */
2211 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MBPS \
2212 (UINT32_C(0x0) << 29)
2213 /* Value is in 1/100th of a percentage of total bandwidth. */
2214 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
2215 (UINT32_C(0x1) << 29)
2217 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
2218 (UINT32_C(0x7) << 29)
2219 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
2220 FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID
2223 * This value indicates the Edge virtual bridge mode for the
2224 * domain that this function belongs to.
2226 /* No Edge Virtual Bridging (EVB) */
2227 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
2228 /* Virtual Ethernet Bridge (VEB) */
2229 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
2230 /* Virtual Ethernet Port Aggregator (VEPA) */
2231 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
2235 * The number of VFs that are allocated to the function. This is
2236 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2237 * this command is called on a PF with SR-IOV disabled or on a
2240 uint32_t alloc_mcast_filters;
2242 * The number of allocated multicast filters for this function
2245 uint32_t alloc_hw_ring_grps;
2246 /* The number of allocated HW ring groups for this function. */
2247 uint16_t alloc_sp_tx_rings;
2249 * The number of strict priority transmit rings out of currently
2250 * allocated TX rings to the function (alloc_tx_rings).
2255 * This field is used in Output records to indicate that the
2256 * output is completely written to RAM. This field should be
2257 * read as '1' to indicate that the output has been completely
2258 * written. When writing a command completion or response to an
2259 * internal processor, the order of writes has to be such that
2260 * this field is written last.
2262 } __attribute__((packed));
2264 /* hwrm_func_drv_rgtr */
2266 * Description: This command is used by the function driver to register its
2267 * information with the HWRM. A function driver shall implement this command. A
2268 * function driver shall use this command during the driver initialization right
2269 * after the HWRM version discovery and default ring resources allocation.
2271 /* Input (80 bytes) */
2272 struct hwrm_func_drv_rgtr_input {
2275 * This value indicates what type of request this is. The format
2276 * for the rest of the command is determined by this field.
2280 * This value indicates the what completion ring the request
2281 * will be optionally completed on. If the value is -1, then no
2282 * CR completion will be generated. Any other value must be a
2283 * valid CR ring_id value for this function.
2286 /* This value indicates the command sequence number. */
2289 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2290 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2295 * This is the host address where the response will be written
2296 * when the request is complete. This area must be 16B aligned
2297 * and must be cleared to zero before the request is made.
2301 * When this bit is '1', the function driver is requesting all
2302 * requests from its children VF drivers to be forwarded to
2303 * itself. This flag can only be set by the PF driver. If a VF
2304 * driver sets this flag, it should be ignored by the HWRM.
2306 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
2308 * When this bit is '1', the function is requesting none of the
2309 * requests from its children VF drivers to be forwarded to
2310 * itself. This flag can only be set by the PF driver. If a VF
2311 * driver sets this flag, it should be ignored by the HWRM.
2313 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
2315 /* This bit must be '1' for the os_type field to be configured. */
2316 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
2317 /* This bit must be '1' for the ver field to be configured. */
2318 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
2319 /* This bit must be '1' for the timestamp field to be configured. */
2320 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
2321 /* This bit must be '1' for the vf_req_fwd field to be configured. */
2322 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_INPUT_FWD UINT32_C(0x8)
2324 * This bit must be '1' for the async_event_fwd field to be
2327 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
2329 /* This value indicates the type of OS. */
2331 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
2332 /* Other OS not listed below. */
2333 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1)
2335 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe)
2337 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
2339 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
2341 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24)
2343 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
2344 /* VMware ESXi OS. */
2345 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68)
2346 /* Microsoft Windows 8 64-bit OS. */
2347 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73)
2348 /* Microsoft Windows Server 2012 R2 OS. */
2349 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
2351 /* This is the major version of the driver. */
2353 /* This is the minor version of the driver. */
2355 /* This is the update version of the driver. */
2360 * This is a 32-bit timestamp provided by the driver for keep
2361 * alive. The timestamp is in multiples of 1ms.
2364 uint32_t vf_req_fwd[8];
2366 * This is a 256-bit bit mask provided by the PF driver for
2367 * letting the HWRM know what commands issued by the VF driver
2368 * to the HWRM should be forwarded to the PF driver. Nth bit
2369 * refers to the Nth req_type. Setting Nth bit to 1 indicates
2370 * that requests from the VF driver with req_type equal to N
2371 * shall be forwarded to the parent PF driver. This field is not
2372 * valid for the VF driver.
2374 uint32_t async_event_fwd[8];
2376 * This is a 256-bit bit mask provided by the function driver
2377 * (PF or VF driver) to indicate the list of asynchronous event
2378 * completions to be forwarded. Nth bit refers to the Nth
2379 * event_id. Setting Nth bit to 1 by the function driver shall
2380 * result in the HWRM forwarding asynchronous event completion
2381 * with event_id equal to N. If all bits are set to 0 (value of
2382 * 0), then the HWRM shall not forward any asynchronous event
2383 * completion to this function driver.
2385 } __attribute__((packed));
2387 /* Output (16 bytes) */
2388 struct hwrm_func_drv_rgtr_output {
2389 uint16_t error_code;
2391 * Pass/Fail or error type Note: receiver to verify the in
2392 * parameters, and fail the call with an error when appropriate
2395 /* This field returns the type of original request. */
2397 /* This field provides original sequence number of the command. */
2400 * This field is the length of the response in bytes. The last
2401 * byte of the response is a valid flag that will read as '1'
2402 * when the command has been completely written to memory.
2410 * This field is used in Output records to indicate that the
2411 * output is completely written to RAM. This field should be
2412 * read as '1' to indicate that the output has been completely
2413 * written. When writing a command completion or response to an
2414 * internal processor, the order of writes has to be such that
2415 * this field is written last.
2417 } __attribute__((packed));
2419 /* hwrm_func_drv_unrgtr */
2421 * Description: This command is used by the function driver to un register with
2422 * the HWRM. A function driver shall implement this command. A function driver
2423 * shall use this command during the driver unloading.
2425 /* Input (24 bytes) */
2426 struct hwrm_func_drv_unrgtr_input {
2429 * This value indicates what type of request this is. The format
2430 * for the rest of the command is determined by this field.
2434 * This value indicates the what completion ring the request
2435 * will be optionally completed on. If the value is -1, then no
2436 * CR completion will be generated. Any other value must be a
2437 * valid CR ring_id value for this function.
2440 /* This value indicates the command sequence number. */
2443 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2444 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2449 * This is the host address where the response will be written
2450 * when the request is complete. This area must be 16B aligned
2451 * and must be cleared to zero before the request is made.
2455 * When this bit is '1', the function driver is notifying the
2456 * HWRM to prepare for the shutdown.
2458 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN UINT32_C(0x1)
2460 } __attribute__((packed));
2462 /* Output (16 bytes) */
2463 struct hwrm_func_drv_unrgtr_output {
2464 uint16_t error_code;
2466 * Pass/Fail or error type Note: receiver to verify the in
2467 * parameters, and fail the call with an error when appropriate
2470 /* This field returns the type of original request. */
2472 /* This field provides original sequence number of the command. */
2475 * This field is the length of the response in bytes. The last
2476 * byte of the response is a valid flag that will read as '1'
2477 * when the command has been completely written to memory.
2485 * This field is used in Output records to indicate that the
2486 * output is completely written to RAM. This field should be
2487 * read as '1' to indicate that the output has been completely
2488 * written. When writing a command completion or response to an
2489 * internal processor, the order of writes has to be such that
2490 * this field is written last.
2492 } __attribute__((packed));
2494 /* hwrm_port_phy_cfg */
2496 * Description: This command configures the PHY device for the port. It allows
2497 * setting of the most generic settings for the PHY. The HWRM shall complete
2498 * this command as soon as PHY settings are configured. They may not be applied
2499 * when the command response is provided. A VF driver shall not be allowed to
2500 * configure PHY using this command. In a network partition mode, a PF driver
2501 * shall not be allowed to configure PHY using this command.
2503 /* Input (56 bytes) */
2504 struct hwrm_port_phy_cfg_input {
2507 * This value indicates what type of request this is. The format
2508 * for the rest of the command is determined by this field.
2512 * This value indicates the what completion ring the request
2513 * will be optionally completed on. If the value is -1, then no
2514 * CR completion will be generated. Any other value must be a
2515 * valid CR ring_id value for this function.
2518 /* This value indicates the command sequence number. */
2521 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2522 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2527 * This is the host address where the response will be written
2528 * when the request is complete. This area must be 16B aligned
2529 * and must be cleared to zero before the request is made.
2533 * When this bit is set to '1', the PHY for the port shall be
2534 * reset. # If this bit is set to 1, then the HWRM shall reset
2535 * the PHY after applying PHY configuration changes specified in
2536 * this command. # In order to guarantee that PHY configuration
2537 * changes specified in this command take effect, the HWRM
2538 * client should set this flag to 1. # If this bit is not set to
2539 * 1, then the HWRM may reset the PHY depending on the current
2540 * PHY configuration and settings specified in this command.
2542 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2544 * When this bit is set to '1', the link shall be forced to be
2545 * taken down. # When this bit is set to '1", all other command
2546 * input settings related to the link speed shall be ignored.
2547 * Once the link state is forced down, it can be explicitly
2548 * cleared from that state by setting this flag to '0'. # If
2549 * this flag is set to '0', then the link shall be cleared from
2550 * forced down state if the link is in forced down state. There
2551 * may be conditions (e.g. out-of-band or sideband configuration
2552 * changes for the link) outside the scope of the HWRM
2553 * implementation that may clear forced down link state.
2555 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2557 * When this bit is set to '1', the link shall be forced to the
2558 * force_link_speed value. When this bit is set to '1', the HWRM
2559 * client should not enable any of the auto negotiation related
2560 * fields represented by auto_XXX fields in this command. When
2561 * this bit is set to '1' and the HWRM client has enabled a
2562 * auto_XXX field in this command, then the HWRM shall ignore
2563 * the enabled auto_XXX field. When this bit is set to zero, the
2564 * link shall be allowed to autoneg.
2566 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2568 * When this bit is set to '1', the auto-negotiation process
2569 * shall be restarted on the link.
2571 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2573 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
2574 * is requested to be enabled on this link. If EEE is not
2575 * supported on this port, then this flag shall be ignored by
2578 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2580 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
2581 * is requested to be disabled on this link. If EEE is not
2582 * supported on this port, then this flag shall be ignored by
2585 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2587 * When this bit is set to '1' and EEE is enabled on this link,
2588 * then TX LPI is requested to be enabled on the link. If EEE is
2589 * not supported on this port, then this flag shall be ignored
2590 * by the HWRM. If EEE is disabled on this port, then this flag
2591 * shall be ignored by the HWRM.
2593 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40)
2595 * When this bit is set to '1' and EEE is enabled on this link,
2596 * then TX LPI is requested to be disabled on the link. If EEE
2597 * is not supported on this port, then this flag shall be
2598 * ignored by the HWRM. If EEE is disabled on this port, then
2599 * this flag shall be ignored by the HWRM.
2601 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
2603 * When set to 1, then the HWRM shall enable FEC
2604 * autonegotitation on this port if supported. When set to 0,
2605 * then this flag shall be ignored. If FEC autonegotiation is
2606 * not supported, then the HWRM shall ignore this flag.
2608 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100)
2610 * When set to 1, then the HWRM shall disable FEC
2611 * autonegotiation on this port if supported. When set to 0,
2612 * then this flag shall be ignored. If FEC autonegotiation is
2613 * not supported, then the HWRM shall ignore this flag.
2615 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE UINT32_C(0x200)
2617 * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
2618 * Code) on this port if supported. When set to 0, then this
2619 * flag shall be ignored. If FEC CLAUSE 74 is not supported,
2620 * then the HWRM shall ignore this flag.
2622 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE UINT32_C(0x400)
2624 * When set to 1, then the HWRM shall disable FEC CLAUSE 74
2625 * (Fire Code) on this port if supported. When set to 0, then
2626 * this flag shall be ignored. If FEC CLAUSE 74 is not
2627 * supported, then the HWRM shall ignore this flag.
2629 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE UINT32_C(0x800)
2631 * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
2632 * Solomon) on this port if supported. When set to 0, then this
2633 * flag shall be ignored. If FEC CLAUSE 91 is not supported,
2634 * then the HWRM shall ignore this flag.
2636 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE UINT32_C(0x1000)
2638 * When set to 1, then the HWRM shall disable FEC CLAUSE 91
2639 * (Reed Solomon) on this port if supported. When set to 0, then
2640 * this flag shall be ignored. If FEC CLAUSE 91 is not
2641 * supported, then the HWRM shall ignore this flag.
2643 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE UINT32_C(0x2000)
2645 /* This bit must be '1' for the auto_mode field to be configured. */
2646 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2647 /* This bit must be '1' for the auto_duplex field to be configured. */
2648 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2649 /* This bit must be '1' for the auto_pause field to be configured. */
2650 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2652 * This bit must be '1' for the auto_link_speed field to be
2655 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2657 * This bit must be '1' for the auto_link_speed_mask field to be
2660 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK UINT32_C(0x10)
2661 /* This bit must be '1' for the wirespeed field to be configured. */
2662 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20)
2663 /* This bit must be '1' for the lpbk field to be configured. */
2664 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2665 /* This bit must be '1' for the preemphasis field to be configured. */
2666 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2667 /* This bit must be '1' for the force_pause field to be configured. */
2668 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2670 * This bit must be '1' for the eee_link_speed_mask field to be
2673 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK UINT32_C(0x200)
2674 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2675 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2677 /* Port ID of port that is to be configured. */
2678 uint16_t force_link_speed;
2680 * This is the speed that will be used if the force bit is '1'.
2681 * If unsupported speed is selected, an error will be generated.
2683 /* 100Mb link speed */
2684 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
2685 /* 1Gb link speed */
2686 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
2687 /* 2Gb link speed */
2688 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
2689 /* 2.5Gb link speed */
2690 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
2691 /* 10Gb link speed */
2692 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
2693 /* 20Mb link speed */
2694 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
2695 /* 25Gb link speed */
2696 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
2697 /* 40Gb link speed */
2698 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
2699 /* 50Gb link speed */
2700 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
2701 /* 100Gb link speed */
2702 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
2703 /* 10Mb link speed */
2704 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
2707 * This value is used to identify what autoneg mode is used when
2708 * the link speed is not being forced.
2711 * Disable autoneg or autoneg disabled. No
2712 * speeds are selected.
2714 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0)
2715 /* Select all possible speeds for autoneg mode. */
2716 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
2718 * Select only the auto_link_speed speed for
2719 * autoneg mode. This mode has been DEPRECATED.
2720 * An HWRM client should not use this mode.
2722 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
2724 * Select the auto_link_speed or any speed below
2725 * that speed for autoneg. This mode has been
2726 * DEPRECATED. An HWRM client should not use
2729 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
2731 * Select the speeds based on the corresponding
2732 * link speed mask value that is provided.
2734 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
2735 uint8_t auto_duplex;
2737 * This is the duplex setting that will be used if the
2738 * autoneg_mode is "one_speed" or "one_or_below".
2740 /* Half Duplex will be requested. */
2741 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0)
2742 /* Full duplex will be requested. */
2743 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1)
2744 /* Both Half and Full dupex will be requested. */
2745 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2)
2748 * This value is used to configure the pause that will be used
2749 * for autonegotiation. Add text on the usage of auto_pause and
2753 * When this bit is '1', Generation of tx pause messages has
2754 * been requested. Disabled otherwise.
2756 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2758 * When this bit is '1', Reception of rx pause messages has been
2759 * requested. Disabled otherwise.
2761 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2763 * When set to 1, the advertisement of pause is enabled. # When
2764 * the auto_mode is not set to none and this flag is set to 1,
2765 * then the auto_pause bits on this port are being advertised
2766 * and autoneg pause results are being interpreted. # When the
2767 * auto_mode is not set to none and this flag is set to 0, the
2768 * pause is forced as indicated in force_pause, and also
2769 * advertised as auto_pause bits, but the autoneg results are
2770 * not interpreted since the pause configuration is being
2771 * forced. # When the auto_mode is set to none and this flag is
2772 * set to 1, auto_pause bits should be ignored and should be set
2775 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2777 uint16_t auto_link_speed;
2779 * This is the speed that will be used if the autoneg_mode is
2780 * "one_speed" or "one_or_below". If an unsupported speed is
2781 * selected, an error will be generated.
2783 /* 100Mb link speed */
2784 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
2785 /* 1Gb link speed */
2786 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
2787 /* 2Gb link speed */
2788 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
2789 /* 2.5Gb link speed */
2790 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
2791 /* 10Gb link speed */
2792 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
2793 /* 20Mb link speed */
2794 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
2795 /* 25Gb link speed */
2796 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
2797 /* 40Gb link speed */
2798 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
2799 /* 50Gb link speed */
2800 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
2801 /* 100Gb link speed */
2802 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
2803 /* 10Mb link speed */
2804 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
2805 uint16_t auto_link_speed_mask;
2807 * This is a mask of link speeds that will be used if
2808 * autoneg_mode is "mask". If unsupported speed is enabled an
2809 * error will be generated.
2811 /* 100Mb link speed (Half-duplex) */
2812 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD UINT32_C(0x1)
2813 /* 100Mb link speed (Full-duplex) */
2814 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2815 /* 1Gb link speed (Half-duplex) */
2816 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD UINT32_C(0x4)
2817 /* 1Gb link speed (Full-duplex) */
2818 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2819 /* 2Gb link speed */
2820 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB UINT32_C(0x10)
2821 /* 2.5Gb link speed */
2822 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB UINT32_C(0x20)
2823 /* 10Gb link speed */
2824 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
2825 /* 20Gb link speed */
2826 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
2827 /* 25Gb link speed */
2828 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB UINT32_C(0x100)
2829 /* 40Gb link speed */
2830 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB UINT32_C(0x200)
2831 /* 50Gb link speed */
2832 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB UINT32_C(0x400)
2833 /* 100Gb link speed */
2834 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB UINT32_C(0x800)
2835 /* 10Mb link speed (Half-duplex) */
2836 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD UINT32_C(0x1000)
2837 /* 10Mb link speed (Full-duplex) */
2838 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB UINT32_C(0x2000)
2840 /* This value controls the wirespeed feature. */
2841 /* Wirespeed feature is disabled. */
2842 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
2843 /* Wirespeed feature is enabled. */
2844 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_ON UINT32_C(0x1)
2846 /* This value controls the loopback setting for the PHY. */
2847 /* No loopback is selected. Normal operation. */
2848 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
2850 * The HW will be configured with local loopback
2851 * such that host data is sent back to the host
2852 * without modification.
2854 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
2856 * The HW will be configured with remote
2857 * loopback such that port logic will send
2858 * packets back out the transmitter that are
2861 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
2862 uint8_t force_pause;
2864 * This value is used to configure the pause that will be used
2868 * When this bit is '1', Generation of tx pause messages is
2869 * supported. Disabled otherwise.
2871 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2873 * When this bit is '1', Reception of rx pause messages is
2874 * supported. Disabled otherwise.
2876 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2878 uint32_t preemphasis;
2880 * This value controls the pre-emphasis to be used for the link.
2881 * Driver should not set this value (use enable.preemphasis = 0)
2882 * unless driver is sure of setting. Normally HWRM FW will
2883 * determine proper pre-emphasis.
2885 uint16_t eee_link_speed_mask;
2887 * Setting for link speed mask that is used to advertise speeds
2888 * during autonegotiation when EEE is enabled. This field is
2889 * valid only when EEE is enabled. The speeds specified in this
2890 * field shall be a subset of speeds specified in
2891 * auto_link_speed_mask. If EEE is enabled,then at least one
2892 * speed shall be provided in this mask.
2895 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2896 /* 100Mb link speed (Full-duplex) */
2897 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2899 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2900 /* 1Gb link speed (Full-duplex) */
2901 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2903 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
2905 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
2906 /* 10Gb link speed */
2907 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
2910 uint32_t tx_lpi_timer;
2913 * Reuested setting of TX LPI timer in microseconds. This field
2914 * is valid only when EEE is enabled and TX LPI is enabled.
2916 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
2917 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2918 } __attribute__((packed));
2920 /* Output (16 bytes) */
2921 struct hwrm_port_phy_cfg_output {
2922 uint16_t error_code;
2924 * Pass/Fail or error type Note: receiver to verify the in
2925 * parameters, and fail the call with an error when appropriate
2928 /* This field returns the type of original request. */
2930 /* This field provides original sequence number of the command. */
2933 * This field is the length of the response in bytes. The last
2934 * byte of the response is a valid flag that will read as '1'
2935 * when the command has been completely written to memory.
2943 * This field is used in Output records to indicate that the
2944 * output is completely written to RAM. This field should be
2945 * read as '1' to indicate that the output has been completely
2946 * written. When writing a command completion or response to an
2947 * internal processor, the order of writes has to be such that
2948 * this field is written last.
2950 } __attribute__((packed));
2952 /* hwrm_port_phy_qcfg */
2953 /* Description: This command queries the PHY configuration for the port. */
2954 /* Input (24 bytes) */
2955 struct hwrm_port_phy_qcfg_input {
2958 * This value indicates what type of request this is. The format
2959 * for the rest of the command is determined by this field.
2963 * This value indicates the what completion ring the request
2964 * will be optionally completed on. If the value is -1, then no
2965 * CR completion will be generated. Any other value must be a
2966 * valid CR ring_id value for this function.
2969 /* This value indicates the command sequence number. */
2972 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2973 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2978 * This is the host address where the response will be written
2979 * when the request is complete. This area must be 16B aligned
2980 * and must be cleared to zero before the request is made.
2983 /* Port ID of port that is to be queried. */
2984 uint16_t unused_0[3];
2985 } __attribute__((packed));
2987 /* Output (96 bytes) */
2988 struct hwrm_port_phy_qcfg_output {
2989 uint16_t error_code;
2991 * Pass/Fail or error type Note: receiver to verify the in
2992 * parameters, and fail the call with an error when appropriate
2995 /* This field returns the type of original request. */
2997 /* This field provides original sequence number of the command. */
3000 * This field is the length of the response in bytes. The last
3001 * byte of the response is a valid flag that will read as '1'
3002 * when the command has been completely written to memory.
3005 /* This value indicates the current link status. */
3006 /* There is no link or cable detected. */
3007 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0)
3008 /* There is no link, but a cable has been detected. */
3009 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1)
3010 /* There is a link. */
3011 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2)
3013 uint16_t link_speed;
3014 /* This value indicates the current link speed of the connection. */
3015 /* 100Mb link speed */
3016 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1)
3017 /* 1Gb link speed */
3018 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa)
3019 /* 2Gb link speed */
3020 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14)
3021 /* 2.5Gb link speed */
3022 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19)
3023 /* 10Gb link speed */
3024 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64)
3025 /* 20Mb link speed */
3026 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8)
3027 /* 25Gb link speed */
3028 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa)
3029 /* 40Gb link speed */
3030 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190)
3031 /* 50Gb link speed */
3032 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4)
3033 /* 100Gb link speed */
3034 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8)
3035 /* 10Mb link speed */
3036 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff)
3038 /* This value is indicates the duplex of the current connection. */
3039 /* Half Duplex connection. */
3040 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF UINT32_C(0x0)
3041 /* Full duplex connection. */
3042 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL UINT32_C(0x1)
3045 * This value is used to indicate the current pause
3046 * configuration. When autoneg is enabled, this value represents
3047 * the autoneg results of pause configuration.
3050 * When this bit is '1', Generation of tx pause messages is
3051 * supported. Disabled otherwise.
3053 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
3055 * When this bit is '1', Reception of rx pause messages is
3056 * supported. Disabled otherwise.
3058 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
3059 uint16_t support_speeds;
3061 * The supported speeds for the port. This is a bit mask. For
3062 * each speed that is supported, the corrresponding bit will be
3065 /* 100Mb link speed (Half-duplex) */
3066 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD \
3068 /* 100Mb link speed (Full-duplex) */
3069 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
3070 /* 1Gb link speed (Half-duplex) */
3071 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
3072 /* 1Gb link speed (Full-duplex) */
3073 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
3074 /* 2Gb link speed */
3075 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
3076 /* 2.5Gb link speed */
3077 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
3078 /* 10Gb link speed */
3079 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
3080 /* 20Gb link speed */
3081 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
3082 /* 25Gb link speed */
3083 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
3084 /* 40Gb link speed */
3085 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
3086 /* 50Gb link speed */
3087 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
3088 /* 100Gb link speed */
3089 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
3090 /* 10Mb link speed (Half-duplex) */
3091 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
3092 /* 10Mb link speed (Full-duplex) */
3093 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
3094 uint16_t force_link_speed;
3096 * Current setting of forced link speed. When the link speed is
3097 * not being forced, this value shall be set to 0.
3099 /* 100Mb link speed */
3100 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB \
3102 /* 1Gb link speed */
3103 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
3104 /* 2Gb link speed */
3105 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
3106 /* 2.5Gb link speed */
3107 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB \
3109 /* 10Gb link speed */
3110 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
3111 /* 20Mb link speed */
3112 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
3113 /* 25Gb link speed */
3114 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
3115 /* 40Gb link speed */
3116 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
3117 /* 50Gb link speed */
3118 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
3119 /* 100Gb link speed */
3120 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB \
3122 /* 10Mb link speed */
3123 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
3125 /* Current setting of auto negotiation mode. */
3127 * Disable autoneg or autoneg disabled. No
3128 * speeds are selected.
3130 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0)
3131 /* Select all possible speeds for autoneg mode. */
3132 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
3134 * Select only the auto_link_speed speed for
3135 * autoneg mode. This mode has been DEPRECATED.
3136 * An HWRM client should not use this mode.
3138 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
3140 * Select the auto_link_speed or any speed below
3141 * that speed for autoneg. This mode has been
3142 * DEPRECATED. An HWRM client should not use
3145 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW \
3148 * Select the speeds based on the corresponding
3149 * link speed mask value that is provided.
3151 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
3154 * Current setting of pause autonegotiation. Move autoneg_pause
3158 * When this bit is '1', Generation of tx pause messages has
3159 * been requested. Disabled otherwise.
3161 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
3163 * When this bit is '1', Reception of rx pause messages has been
3164 * requested. Disabled otherwise.
3166 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
3168 * When set to 1, the advertisement of pause is enabled. # When
3169 * the auto_mode is not set to none and this flag is set to 1,
3170 * then the auto_pause bits on this port are being advertised
3171 * and autoneg pause results are being interpreted. # When the
3172 * auto_mode is not set to none and this flag is set to 0, the
3173 * pause is forced as indicated in force_pause, and also
3174 * advertised as auto_pause bits, but the autoneg results are
3175 * not interpreted since the pause configuration is being
3176 * forced. # When the auto_mode is set to none and this flag is
3177 * set to 1, auto_pause bits should be ignored and should be set
3180 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE \
3182 uint16_t auto_link_speed;
3184 * Current setting for auto_link_speed. This field is only valid
3185 * when auto_mode is set to "one_speed" or "one_or_below".
3187 /* 100Mb link speed */
3188 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
3189 /* 1Gb link speed */
3190 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
3191 /* 2Gb link speed */
3192 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
3193 /* 2.5Gb link speed */
3194 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
3195 /* 10Gb link speed */
3196 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
3197 /* 20Mb link speed */
3198 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
3199 /* 25Gb link speed */
3200 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
3201 /* 40Gb link speed */
3202 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
3203 /* 50Gb link speed */
3204 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
3205 /* 100Gb link speed */
3206 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
3207 /* 10Mb link speed */
3208 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
3209 uint16_t auto_link_speed_mask;
3211 * Current setting for auto_link_speed_mask that is used to
3212 * advertise speeds during autonegotiation. This field is only
3213 * valid when auto_mode is set to "mask". The speeds specified
3214 * in this field shall be a subset of supported speeds on this
3217 /* 100Mb link speed (Half-duplex) */
3218 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
3220 /* 100Mb link speed (Full-duplex) */
3221 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
3223 /* 1Gb link speed (Half-duplex) */
3224 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
3226 /* 1Gb link speed (Full-duplex) */
3227 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB \
3229 /* 2Gb link speed */
3230 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
3232 /* 2.5Gb link speed */
3233 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
3235 /* 10Gb link speed */
3236 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
3238 /* 20Gb link speed */
3239 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
3241 /* 25Gb link speed */
3242 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
3244 /* 40Gb link speed */
3245 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
3247 /* 50Gb link speed */
3248 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
3250 /* 100Gb link speed */
3251 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
3253 /* 10Mb link speed (Half-duplex) */
3254 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
3256 /* 10Mb link speed (Full-duplex) */
3257 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
3260 /* Current setting for wirespeed. */
3261 /* Wirespeed feature is disabled. */
3262 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
3263 /* Wirespeed feature is enabled. */
3264 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_ON UINT32_C(0x1)
3266 /* Current setting for loopback. */
3267 /* No loopback is selected. Normal operation. */
3268 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
3270 * The HW will be configured with local loopback
3271 * such that host data is sent back to the host
3272 * without modification.
3274 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
3276 * The HW will be configured with remote
3277 * loopback such that port logic will send
3278 * packets back out the transmitter that are
3281 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
3282 uint8_t force_pause;
3284 * Current setting of forced pause. When the pause configuration
3285 * is not being forced, then this value shall be set to 0.
3288 * When this bit is '1', Generation of tx pause messages is
3289 * supported. Disabled otherwise.
3291 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1)
3293 * When this bit is '1', Reception of rx pause messages is
3294 * supported. Disabled otherwise.
3296 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2)
3297 uint8_t module_status;
3299 * This value indicates the current status of the optics module
3302 /* Module is inserted and accepted */
3303 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
3304 /* Module is rejected and transmit side Laser is disabled. */
3305 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX \
3307 /* Module mismatch warning. */
3308 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG \
3310 /* Module is rejected and powered down. */
3311 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
3312 /* Module is not inserted. */
3313 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
3315 /* Module status is not applicable. */
3316 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
3318 uint32_t preemphasis;
3319 /* Current setting for preemphasis. */
3321 /* This field represents the major version of the PHY. */
3323 /* This field represents the minor version of the PHY. */
3325 /* This field represents the build version of the PHY. */
3327 /* This value represents a PHY type. */
3329 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
3331 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
3332 /* BASE-KR4 (Deprecated) */
3333 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
3335 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
3337 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
3338 /* BASE-KR2 (Deprecated) */
3339 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
3341 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
3343 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7)
3345 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8)
3346 /* EEE capable BASE-T */
3347 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
3348 /* SGMII connected external PHY */
3349 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
3351 /* This value represents a media type. */
3353 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0)
3355 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1)
3356 /* Direct Attached Copper */
3357 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2)
3359 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3)
3360 uint8_t xcvr_pkg_type;
3361 /* This value represents a transceiver type. */
3362 /* PHY and MAC are in the same package */
3363 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
3365 /* PHY and MAC are in different packages */
3366 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
3368 uint8_t eee_config_phy_addr;
3370 * This field represents flags related to EEE configuration.
3371 * These EEE configuration flags are valid only when the
3372 * auto_mode is not set to none (in other words autonegotiation
3375 /* This field represents PHY address. */
3376 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
3377 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
3379 * When set to 1, Energy Efficient Ethernet (EEE) mode is
3380 * enabled. Speeds for autoneg with EEE mode enabled are based
3381 * on eee_link_speed_mask.
3383 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED \
3386 * This flag is valid only when eee_enabled is set to 1. # If
3387 * eee_enabled is set to 0, then EEE mode is disabled and this
3388 * flag shall be ignored. # If eee_enabled is set to 1 and this
3389 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
3390 * is enabled and in use. # If eee_enabled is set to 1 and this
3391 * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
3392 * is enabled but is currently not in use.
3394 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
3396 * This flag is valid only when eee_enabled is set to 1. # If
3397 * eee_enabled is set to 0, then EEE mode is disabled and this
3398 * flag shall be ignored. # If eee_enabled is set to 1 and this
3399 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
3400 * is enabled and TX LPI is enabled. # If eee_enabled is set to
3401 * 1 and this flag is set to 0, then Energy Efficient Ethernet
3402 * (EEE) mode is enabled but TX LPI is disabled.
3404 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
3406 * This field represents flags related to EEE configuration.
3407 * These EEE configuration flags are valid only when the
3408 * auto_mode is not set to none (in other words autonegotiation
3411 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
3412 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
3413 uint8_t parallel_detect;
3414 /* Reserved field, set to 0 */
3416 * When set to 1, the parallel detection is used to determine
3417 * the speed of the link partner. Parallel detection is used
3418 * when a autonegotiation capable device is connected to a link
3419 * parter that is not capable of autonegotiation.
3421 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1)
3422 /* Reserved field, set to 0 */
3423 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
3424 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
3425 uint16_t link_partner_adv_speeds;
3427 * The advertised speeds for the port by the link partner. Each
3428 * advertised speed will be set to '1'.
3430 /* 100Mb link speed (Half-duplex) */
3431 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
3433 /* 100Mb link speed (Full-duplex) */
3434 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
3436 /* 1Gb link speed (Half-duplex) */
3437 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
3439 /* 1Gb link speed (Full-duplex) */
3440 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
3442 /* 2Gb link speed */
3443 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
3445 /* 2.5Gb link speed */
3446 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
3448 /* 10Gb link speed */
3449 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
3451 /* 20Gb link speed */
3452 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
3454 /* 25Gb link speed */
3455 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
3457 /* 40Gb link speed */
3458 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
3460 /* 50Gb link speed */
3461 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
3463 /* 100Gb link speed */
3464 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
3466 /* 10Mb link speed (Half-duplex) */
3467 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
3469 /* 10Mb link speed (Full-duplex) */
3470 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
3472 uint8_t link_partner_adv_auto_mode;
3474 * The advertised autoneg for the port by the link partner. This
3475 * field is deprecated and should be set to 0.
3478 * Disable autoneg or autoneg disabled. No
3479 * speeds are selected.
3481 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
3483 /* Select all possible speeds for autoneg mode. */
3485 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \
3488 * Select only the auto_link_speed speed for
3489 * autoneg mode. This mode has been DEPRECATED.
3490 * An HWRM client should not use this mode.
3492 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
3495 * Select the auto_link_speed or any speed below
3496 * that speed for autoneg. This mode has been
3497 * DEPRECATED. An HWRM client should not use
3501 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
3504 * Select the speeds based on the corresponding
3505 * link speed mask value that is provided.
3508 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \
3510 uint8_t link_partner_adv_pause;
3511 /* The advertised pause settings on the port by the link partner. */
3513 * When this bit is '1', Generation of tx pause messages is
3514 * supported. Disabled otherwise.
3516 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
3519 * When this bit is '1', Reception of rx pause messages is
3520 * supported. Disabled otherwise.
3522 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
3524 uint16_t adv_eee_link_speed_mask;
3526 * Current setting for link speed mask that is used to advertise
3527 * speeds during autonegotiation when EEE is enabled. This field
3528 * is valid only when eee_enabled flags is set to 1. The speeds
3529 * specified in this field shall be a subset of speeds specified
3530 * in auto_link_speed_mask.
3533 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3535 /* 100Mb link speed (Full-duplex) */
3536 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
3539 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3541 /* 1Gb link speed (Full-duplex) */
3542 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
3545 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3548 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3550 /* 10Gb link speed */
3551 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
3553 uint16_t link_partner_adv_eee_link_speed_mask;
3555 * Current setting for link speed mask that is advertised by the
3556 * link partner when EEE is enabled. This field is valid only
3557 * when eee_enabled flags is set to 1.
3561 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3563 /* 100Mb link speed (Full-duplex) */
3565 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
3569 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3571 /* 1Gb link speed (Full-duplex) */
3573 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
3577 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3581 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3583 /* 10Gb link speed */
3585 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
3587 uint32_t xcvr_identifier_type_tx_lpi_timer;
3588 /* This value represents transceiver identifier type. */
3590 * Current setting of TX LPI timer in microseconds. This field
3591 * is valid only when_eee_enabled flag is set to 1 and
3592 * tx_lpi_enabled is set to 1.
3594 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK \
3596 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
3597 /* This value represents transceiver identifier type. */
3598 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
3599 UINT32_C(0xff000000)
3600 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
3602 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
3603 (UINT32_C(0x0) << 24)
3604 /* SFP/SFP+/SFP28 */
3605 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
3606 (UINT32_C(0x3) << 24)
3608 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
3609 (UINT32_C(0xc) << 24)
3611 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
3612 (UINT32_C(0xd) << 24)
3614 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
3615 (UINT32_C(0x11) << 24)
3618 * This value represents the current configuration of Forward
3619 * Error Correction (FEC) on the port.
3622 * When set to 1, then FEC is not supported on this port. If
3623 * this flag is set to 1, then all other FEC configuration flags
3624 * shall be ignored. When set to 0, then FEC is supported as
3625 * indicated by other configuration flags. If no cable is
3626 * attached and the HWRM does not yet know the FEC capability,
3627 * then the HWRM shall set this flag to 1 when reporting FEC
3630 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
3633 * When set to 1, then FEC autonegotiation is supported on this
3634 * port. When set to 0, then FEC autonegotiation is not
3635 * supported on this port.
3637 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED \
3640 * When set to 1, then FEC autonegotiation is enabled on this
3641 * port. When set to 0, then FEC autonegotiation is disabled if
3642 * supported. This flag should be ignored if FEC autonegotiation
3643 * is not supported on this port.
3645 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \
3648 * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
3649 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
3650 * not supported on this port.
3652 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \
3655 * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
3656 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
3657 * disabled if supported. This flag should be ignored if FEC
3658 * CLAUSE 74 is not supported on this port.
3660 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \
3663 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
3664 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
3665 * Solomon) is not supported on this port.
3667 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \
3670 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
3671 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
3672 * Solomon) is disabled if supported. This flag should be
3673 * ignored if FEC CLAUSE 91 is not supported on this port.
3675 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED \
3679 char phy_vendor_name[16];
3681 * Up to 16 bytes of null padded ASCII string representing PHY
3682 * vendor. If the string is set to null, then the vendor name is
3685 char phy_vendor_partnumber[16];
3687 * Up to 16 bytes of null padded ASCII string that identifies
3688 * vendor specific part number of the PHY. If the string is set
3689 * to null, then the vendor specific part number is not
3698 * This field is used in Output records to indicate that the
3699 * output is completely written to RAM. This field should be
3700 * read as '1' to indicate that the output has been completely
3701 * written. When writing a command completion or response to an
3702 * internal processor, the order of writes has to be such that
3703 * this field is written last.
3705 } __attribute__((packed));
3707 /* hwrm_queue_qportcfg */
3709 * Description: This function is called by a driver to query queue configuration
3710 * of a port. # The HWRM shall at least advertise one queue with lossy service
3711 * profile. # The driver shall use this command to query queue ids before
3712 * configuring or using any queues. # If a service profile is not set for a
3713 * queue, then the driver shall not use that queue without configuring a service
3714 * profile for it. # If the driver is not allowed to configure service profiles,
3715 * then the driver shall only use queues for which service profiles are pre-
3718 /* Input (24 bytes) */
3719 struct hwrm_queue_qportcfg_input {
3722 * This value indicates what type of request this is. The format
3723 * for the rest of the command is determined by this field.
3727 * This value indicates the what completion ring the request
3728 * will be optionally completed on. If the value is -1, then no
3729 * CR completion will be generated. Any other value must be a
3730 * valid CR ring_id value for this function.
3733 /* This value indicates the command sequence number. */
3736 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3737 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3742 * This is the host address where the response will be written
3743 * when the request is complete. This area must be 16B aligned
3744 * and must be cleared to zero before the request is made.
3748 * Enumeration denoting the RX, TX type of the resource. This
3749 * enumeration is used for resources that are similar for both
3750 * TX and RX paths of the chip.
3752 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
3754 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
3756 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
3757 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3758 QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3761 * Port ID of port for which the queue configuration is being
3762 * queried. This field is only required when sent by IPC.
3765 } __attribute__((packed));
3767 /* Output (32 bytes) */
3768 struct hwrm_queue_qportcfg_output {
3769 uint16_t error_code;
3771 * Pass/Fail or error type Note: receiver to verify the in
3772 * parameters, and fail the call with an error when appropriate
3775 /* This field returns the type of original request. */
3777 /* This field provides original sequence number of the command. */
3780 * This field is the length of the response in bytes. The last
3781 * byte of the response is a valid flag that will read as '1'
3782 * when the command has been completely written to memory.
3784 uint8_t max_configurable_queues;
3786 * The maximum number of queues that can be configured on this
3787 * port. Valid values range from 1 through 8.
3789 uint8_t max_configurable_lossless_queues;
3791 * The maximum number of lossless queues that can be configured
3792 * on this port. Valid values range from 0 through 8.
3794 uint8_t queue_cfg_allowed;
3796 * Bitmask indicating which queues can be configured by the
3797 * hwrm_queue_cfg command. Each bit represents a specific queue
3798 * where bit 0 represents queue 0 and bit 7 represents queue 7.
3799 * # A value of 0 indicates that the queue is not configurable
3800 * by the hwrm_queue_cfg command. # A value of 1 indicates that
3801 * the queue is configurable. # A hwrm_queue_cfg command shall
3802 * return error when trying to configure a queue not
3805 uint8_t queue_cfg_info;
3806 /* Information about queue configuration. */
3808 * If this flag is set to '1', then the queues are configured
3809 * asymmetrically on TX and RX sides. If this flag is set to
3810 * '0', then the queues are configured symmetrically on TX and
3811 * RX sides. For symmetric configuration, the queue
3812 * configuration including queue ids and service profiles on the
3813 * TX side is the same as the corresponding queue configuration
3816 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG \
3818 uint8_t queue_pfcenable_cfg_allowed;
3820 * Bitmask indicating which queues can be configured by the
3821 * hwrm_queue_pfcenable_cfg command. Each bit represents a
3822 * specific queue where bit 0 represents queue 0 and bit 7
3823 * represents queue 7. # A value of 0 indicates that the queue
3824 * is not configurable by the hwrm_queue_pfcenable_cfg command.
3825 * # A value of 1 indicates that the queue is configurable. # A
3826 * hwrm_queue_pfcenable_cfg command shall return error when
3827 * trying to configure a queue that is not configurable.
3829 uint8_t queue_pri2cos_cfg_allowed;
3831 * Bitmask indicating which queues can be configured by the
3832 * hwrm_queue_pri2cos_cfg command. Each bit represents a
3833 * specific queue where bit 0 represents queue 0 and bit 7
3834 * represents queue 7. # A value of 0 indicates that the queue
3835 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
3836 * A value of 1 indicates that the queue is configurable. # A
3837 * hwrm_queue_pri2cos_cfg command shall return error when trying
3838 * to configure a queue that is not configurable.
3840 uint8_t queue_cos2bw_cfg_allowed;
3842 * Bitmask indicating which queues can be configured by the
3843 * hwrm_queue_pri2cos_cfg command. Each bit represents a
3844 * specific queue where bit 0 represents queue 0 and bit 7
3845 * represents queue 7. # A value of 0 indicates that the queue
3846 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
3847 * A value of 1 indicates that the queue is configurable. # A
3848 * hwrm_queue_pri2cos_cfg command shall return error when trying
3849 * to configure a queue not configurable.
3853 * ID of CoS Queue 0. FF - Invalid id # This ID can be used on
3854 * any subsequent call to an hwrm command that takes a queue id.
3855 * # IDs must always be queried by this command before any use
3856 * by the driver or software. # Any driver or software should
3857 * not make any assumptions about queue IDs. # A value of 0xff
3858 * indicates that the queue is not available. # Available queues
3859 * may not be in sequential order.
3861 uint8_t queue_id0_service_profile;
3862 /* This value is applicable to CoS queues only. */
3863 /* Lossy (best-effort) */
3864 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
3867 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
3870 * Set to 0xFF... (All Fs) if there is no
3871 * service profile specified
3873 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
3877 * ID of CoS Queue 1. FF - Invalid id # This ID can be used on
3878 * any subsequent call to an hwrm command that takes a queue id.
3879 * # IDs must always be queried by this command before any use
3880 * by the driver or software. # Any driver or software should
3881 * not make any assumptions about queue IDs. # A value of 0xff
3882 * indicates that the queue is not available. # Available queues
3883 * may not be in sequential order.
3885 uint8_t queue_id1_service_profile;
3886 /* This value is applicable to CoS queues only. */
3887 /* Lossy (best-effort) */
3888 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
3891 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
3894 * Set to 0xFF... (All Fs) if there is no
3895 * service profile specified
3897 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
3901 * ID of CoS Queue 2. FF - Invalid id # This ID can be used on
3902 * any subsequent call to an hwrm command that takes a queue id.
3903 * # IDs must always be queried by this command before any use
3904 * by the driver or software. # Any driver or software should
3905 * not make any assumptions about queue IDs. # A value of 0xff
3906 * indicates that the queue is not available. # Available queues
3907 * may not be in sequential order.
3909 uint8_t queue_id2_service_profile;
3910 /* This value is applicable to CoS queues only. */
3911 /* Lossy (best-effort) */
3912 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
3915 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
3918 * Set to 0xFF... (All Fs) if there is no
3919 * service profile specified
3921 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
3925 * ID of CoS Queue 3. FF - Invalid id # This ID can be used on
3926 * any subsequent call to an hwrm command that takes a queue id.
3927 * # IDs must always be queried by this command before any use
3928 * by the driver or software. # Any driver or software should
3929 * not make any assumptions about queue IDs. # A value of 0xff
3930 * indicates that the queue is not available. # Available queues
3931 * may not be in sequential order.
3933 uint8_t queue_id3_service_profile;
3934 /* This value is applicable to CoS queues only. */
3935 /* Lossy (best-effort) */
3936 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
3939 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
3942 * Set to 0xFF... (All Fs) if there is no
3943 * service profile specified
3945 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
3949 * ID of CoS Queue 4. FF - Invalid id # This ID can be used on
3950 * any subsequent call to an hwrm command that takes a queue id.
3951 * # IDs must always be queried by this command before any use
3952 * by the driver or software. # Any driver or software should
3953 * not make any assumptions about queue IDs. # A value of 0xff
3954 * indicates that the queue is not available. # Available queues
3955 * may not be in sequential order.
3957 uint8_t queue_id4_service_profile;
3958 /* This value is applicable to CoS queues only. */
3959 /* Lossy (best-effort) */
3960 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
3963 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
3966 * Set to 0xFF... (All Fs) if there is no
3967 * service profile specified
3969 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
3973 * ID of CoS Queue 5. FF - Invalid id # This ID can be used on
3974 * any subsequent call to an hwrm command that takes a queue id.
3975 * # IDs must always be queried by this command before any use
3976 * by the driver or software. # Any driver or software should
3977 * not make any assumptions about queue IDs. # A value of 0xff
3978 * indicates that the queue is not available. # Available queues
3979 * may not be in sequential order.
3981 uint8_t queue_id5_service_profile;
3982 /* This value is applicable to CoS queues only. */
3983 /* Lossy (best-effort) */
3984 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
3987 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
3990 * Set to 0xFF... (All Fs) if there is no
3991 * service profile specified
3993 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
3997 * ID of CoS Queue 6. FF - Invalid id # This ID can be used on
3998 * any subsequent call to an hwrm command that takes a queue id.
3999 * # IDs must always be queried by this command before any use
4000 * by the driver or software. # Any driver or software should
4001 * not make any assumptions about queue IDs. # A value of 0xff
4002 * indicates that the queue is not available. # Available queues
4003 * may not be in sequential order.
4005 uint8_t queue_id6_service_profile;
4006 /* This value is applicable to CoS queues only. */
4007 /* Lossy (best-effort) */
4008 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
4011 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
4014 * Set to 0xFF... (All Fs) if there is no
4015 * service profile specified
4017 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
4021 * ID of CoS Queue 7. FF - Invalid id # This ID can be used on
4022 * any subsequent call to an hwrm command that takes a queue id.
4023 * # IDs must always be queried by this command before any use
4024 * by the driver or software. # Any driver or software should
4025 * not make any assumptions about queue IDs. # A value of 0xff
4026 * indicates that the queue is not available. # Available queues
4027 * may not be in sequential order.
4029 uint8_t queue_id7_service_profile;
4030 /* This value is applicable to CoS queues only. */
4031 /* Lossy (best-effort) */
4032 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
4035 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
4038 * Set to 0xFF... (All Fs) if there is no
4039 * service profile specified
4041 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
4045 * This field is used in Output records to indicate that the
4046 * output is completely written to RAM. This field should be
4047 * read as '1' to indicate that the output has been completely
4048 * written. When writing a command completion or response to an
4049 * internal processor, the order of writes has to be such that
4050 * this field is written last.
4052 } __attribute__((packed));
4054 /* hwrm_cfa_l2_filter_alloc */
4056 * A filter is used to identify traffic that contains a matching set of
4057 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
4058 * other things which then allows the ASIC to direct the incoming traffic
4059 * to an appropriate VNIC or Rx ring.
4062 /* Input (96 bytes) */
4063 struct hwrm_cfa_l2_filter_alloc_input {
4065 * This value indicates what type of request this is. The format for the
4066 * rest of the command is determined by this field.
4071 * This value indicates the what completion ring the request will be
4072 * optionally completed on. If the value is -1, then no CR completion
4073 * will be generated. Any other value must be a valid CR ring_id value
4074 * for this function.
4078 /* This value indicates the command sequence number. */
4082 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4083 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4088 * This is the host address where the response will be written when the
4089 * request is complete. This area must be 16B aligned and must be
4090 * cleared to zero before the request is made.
4095 * Enumeration denoting the RX, TX type of the resource. This
4096 * enumeration is used for resources that are similar for both TX and RX
4097 * paths of the chip.
4099 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
4102 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
4103 (UINT32_C(0x0) << 0)
4105 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
4106 (UINT32_C(0x1) << 0)
4107 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
4108 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
4110 * Setting of this flag indicates the applicability to the loopback
4113 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
4116 * Setting of this flag indicates drop action. If this flag is not set,
4117 * then it should be considered accept action.
4119 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
4122 * If this flag is set, all t_l2_* fields are invalid and they should
4123 * not be specified. If this flag is set, then l2_* fields refer to
4124 * fields of outermost L2 header.
4126 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
4130 /* This bit must be '1' for the l2_addr field to be configured. */
4131 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
4133 /* This bit must be '1' for the l2_addr_mask field to be configured. */
4134 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
4136 /* This bit must be '1' for the l2_ovlan field to be configured. */
4137 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
4139 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
4140 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
4142 /* This bit must be '1' for the l2_ivlan field to be configured. */
4143 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
4145 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
4146 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
4148 /* This bit must be '1' for the t_l2_addr field to be configured. */
4149 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
4152 * This bit must be '1' for the t_l2_addr_mask field to be configured.
4154 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
4156 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
4157 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
4160 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
4162 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
4164 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
4165 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
4168 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
4170 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
4172 /* This bit must be '1' for the src_type field to be configured. */
4173 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
4175 /* This bit must be '1' for the src_id field to be configured. */
4176 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
4178 /* This bit must be '1' for the tunnel_type field to be configured. */
4179 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
4181 /* This bit must be '1' for the dst_id field to be configured. */
4182 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
4185 * This bit must be '1' for the mirror_vnic_id field to be configured.
4187 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
4192 * This value sets the match value for the L2 MAC address. Destination
4193 * MAC address for RX path. Source MAC address for TX path.
4201 * This value sets the mask value for the L2 address. A value of 0 will
4202 * mask the corresponding bit from compare.
4204 uint8_t l2_addr_mask[6];
4206 /* This value sets VLAN ID value for outer VLAN. */
4210 * This value sets the mask value for the ovlan id. A value of 0 will
4211 * mask the corresponding bit from compare.
4213 uint16_t l2_ovlan_mask;
4215 /* This value sets VLAN ID value for inner VLAN. */
4219 * This value sets the mask value for the ivlan id. A value of 0 will
4220 * mask the corresponding bit from compare.
4222 uint16_t l2_ivlan_mask;
4228 * This value sets the match value for the tunnel L2 MAC address.
4229 * Destination MAC address for RX path. Source MAC address for TX path.
4231 uint8_t t_l2_addr[6];
4237 * This value sets the mask value for the tunnel L2 address. A value of
4238 * 0 will mask the corresponding bit from compare.
4240 uint8_t t_l2_addr_mask[6];
4242 /* This value sets VLAN ID value for tunnel outer VLAN. */
4243 uint16_t t_l2_ovlan;
4246 * This value sets the mask value for the tunnel ovlan id. A value of 0
4247 * will mask the corresponding bit from compare.
4249 uint16_t t_l2_ovlan_mask;
4251 /* This value sets VLAN ID value for tunnel inner VLAN. */
4252 uint16_t t_l2_ivlan;
4255 * This value sets the mask value for the tunnel ivlan id. A value of 0
4256 * will mask the corresponding bit from compare.
4258 uint16_t t_l2_ivlan_mask;
4260 /* This value identifies the type of source of the packet. */
4262 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
4263 (UINT32_C(0x0) << 0)
4264 /* Physical function */
4265 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
4266 (UINT32_C(0x1) << 0)
4267 /* Virtual function */
4268 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
4269 (UINT32_C(0x2) << 0)
4270 /* Virtual NIC of a function */
4271 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
4272 (UINT32_C(0x3) << 0)
4273 /* Embedded processor for CFA management */
4274 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
4275 (UINT32_C(0x4) << 0)
4276 /* Embedded processor for OOB management */
4277 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
4278 (UINT32_C(0x5) << 0)
4279 /* Embedded processor for RoCE */
4280 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
4281 (UINT32_C(0x6) << 0)
4282 /* Embedded processor for network proxy functions */
4283 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
4284 (UINT32_C(0x7) << 0)
4289 * This value is the id of the source. For a network port, it represents
4290 * port_id. For a physical function, it represents fid. For a virtual
4291 * function, it represents vf_id. For a vnic, it represents vnic_id. For
4292 * embedded processors, this id is not valid. Notes: 1. The function ID
4293 * is implied if it src_id is not provided for a src_type that is either
4299 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
4300 (UINT32_C(0x0) << 0)
4301 /* Virtual eXtensible Local Area Network (VXLAN) */
4302 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
4303 (UINT32_C(0x1) << 0)
4305 * Network Virtualization Generic Routing Encapsulation (NVGRE)
4307 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
4308 (UINT32_C(0x2) << 0)
4310 * Generic Routing Encapsulation (GRE) inside Ethernet payload
4312 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
4313 (UINT32_C(0x3) << 0)
4315 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
4316 (UINT32_C(0x4) << 0)
4317 /* Generic Network Virtualization Encapsulation (Geneve) */
4318 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
4319 (UINT32_C(0x5) << 0)
4320 /* Multi-Protocol Lable Switching (MPLS) */
4321 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
4322 (UINT32_C(0x6) << 0)
4323 /* Stateless Transport Tunnel (STT) */
4324 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
4325 (UINT32_C(0x7) << 0)
4327 * Generic Routing Encapsulation (GRE) inside IP datagram
4330 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
4331 (UINT32_C(0x8) << 0)
4332 /* Any tunneled traffic */
4333 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
4334 (UINT32_C(0xff) << 0)
4335 uint8_t tunnel_type;
4340 * If set, this value shall represent the Logical VNIC ID of the
4341 * destination VNIC for the RX path and network port id of the
4342 * destination port for the TX path.
4346 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
4347 uint16_t mirror_vnic_id;
4350 * This hint is provided to help in placing the filter in the filter
4354 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
4355 (UINT32_C(0x0) << 0)
4356 /* Above the given filter */
4357 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
4358 (UINT32_C(0x1) << 0)
4359 /* Below the given filter */
4360 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
4361 (UINT32_C(0x2) << 0)
4362 /* As high as possible */
4363 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
4364 (UINT32_C(0x3) << 0)
4365 /* As low as possible */
4366 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
4367 (UINT32_C(0x4) << 0)
4374 * This is the ID of the filter that goes along with the pri_hint. This
4375 * field is valid only for the following values. 1 - Above the given
4376 * filter 2 - Below the given filter
4378 uint64_t l2_filter_id_hint;
4379 } __attribute__((packed));
4381 /* Output (24 bytes) */
4382 struct hwrm_cfa_l2_filter_alloc_output {
4384 * Pass/Fail or error type Note: receiver to verify the in parameters,
4385 * and fail the call with an error when appropriate
4387 uint16_t error_code;
4389 /* This field returns the type of original request. */
4392 /* This field provides original sequence number of the command. */
4396 * This field is the length of the response in bytes. The last byte of
4397 * the response is a valid flag that will read as '1' when the command
4398 * has been completely written to memory.
4403 * This value identifies a set of CFA data structures used for an L2
4406 uint64_t l2_filter_id;
4409 * This is the ID of the flow associated with this filter. This value
4410 * shall be used to match and associate the flow identifier returned in
4411 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
4420 * This field is used in Output records to indicate that the output is
4421 * completely written to RAM. This field should be read as '1' to
4422 * indicate that the output has been completely written. When writing a
4423 * command completion or response to an internal processor, the order of
4424 * writes has to be such that this field is written last.
4427 } __attribute__((packed));
4429 /* hwrm_cfa_l2_filter_free */
4431 * Description: Free a L2 filter. The HWRM shall free all associated filter
4432 * resources with the L2 filter.
4435 /* Input (24 bytes) */
4436 struct hwrm_cfa_l2_filter_free_input {
4438 * This value indicates what type of request this is. The format for the
4439 * rest of the command is determined by this field.
4444 * This value indicates the what completion ring the request will be
4445 * optionally completed on. If the value is -1, then no CR completion
4446 * will be generated. Any other value must be a valid CR ring_id value
4447 * for this function.
4451 /* This value indicates the command sequence number. */
4455 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4456 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4461 * This is the host address where the response will be written when the
4462 * request is complete. This area must be 16B aligned and must be
4463 * cleared to zero before the request is made.
4468 * This value identifies a set of CFA data structures used for an L2
4471 uint64_t l2_filter_id;
4472 } __attribute__((packed));
4474 /* Output (16 bytes) */
4475 struct hwrm_cfa_l2_filter_free_output {
4477 * Pass/Fail or error type Note: receiver to verify the in parameters,
4478 * and fail the call with an error when appropriate
4480 uint16_t error_code;
4482 /* This field returns the type of original request. */
4485 /* This field provides original sequence number of the command. */
4489 * This field is the length of the response in bytes. The last byte of
4490 * the response is a valid flag that will read as '1' when the command
4491 * has been completely written to memory.
4501 * This field is used in Output records to indicate that the output is
4502 * completely written to RAM. This field should be read as '1' to
4503 * indicate that the output has been completely written. When writing a
4504 * command completion or response to an internal processor, the order of
4505 * writes has to be such that this field is written last.
4508 } __attribute__((packed));
4510 /* hwrm_cfa_l2_set_rx_mask */
4511 /* Description: This command will set rx mask of the function. */
4513 /* Input (40 bytes) */
4514 struct hwrm_cfa_l2_set_rx_mask_input {
4516 * This value indicates what type of request this is. The format for the
4517 * rest of the command is determined by this field.
4522 * This value indicates the what completion ring the request will be
4523 * optionally completed on. If the value is -1, then no CR completion
4524 * will be generated. Any other value must be a valid CR ring_id value
4525 * for this function.
4529 /* This value indicates the command sequence number. */
4533 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4534 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4539 * This is the host address where the response will be written when the
4540 * request is complete. This area must be 16B aligned and must be
4541 * cleared to zero before the request is made.
4548 /* Reserved for future use. */
4549 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
4551 * When this bit is '1', the function is requested to accept multi-cast
4552 * packets specified by the multicast addr table.
4554 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
4556 * When this bit is '1', the function is requested to accept all multi-
4559 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
4561 * When this bit is '1', the function is requested to accept broadcast
4564 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
4566 * When this bit is '1', the function is requested to be put in the
4567 * promiscuous mode. The HWRM should accept any function to set up
4568 * promiscuous mode. The HWRM shall follow the semantics below for the
4569 * promiscuous mode support. # When partitioning is not enabled on a
4570 * port (i.e. single PF on the port), then the PF shall be allowed to be
4571 * in the promiscuous mode. When the PF is in the promiscuous mode, then
4572 * it shall receive all host bound traffic on that port. # When
4573 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
4574 * PF on that port is in the promiscuous mode, then the PF receives all
4575 * traffic within that partition as identified by a unique identifier
4576 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
4577 * specified, then the setting of promiscuous mode on that PF shall
4578 * result in the PF receiving all host bound traffic with matching outer
4579 * VLAN. # A VF shall can be set in the promiscuous mode. In the
4580 * promiscuous mode, the VF does not receive any traffic unless a unique
4581 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
4582 * is specified, then the setting of promiscuous mode on that VF shall
4583 * result in the VF receiving all host bound traffic with the matching
4584 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
4585 * a function independently from the promiscuous mode settings on other
4588 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
4590 * If this flag is set, the corresponding RX filters shall be set up to
4591 * cover multicast/broadcast filters for the outermost Layer 2
4592 * destination MAC address field.
4594 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
4597 /* This is the address for mcast address tbl. */
4598 uint64_t mc_tbl_addr;
4601 * This value indicates how many entries in mc_tbl are valid. Each entry
4604 uint32_t num_mc_entries;
4607 } __attribute__((packed));
4609 /* Output (16 bytes) */
4610 struct hwrm_cfa_l2_set_rx_mask_output {
4612 * Pass/Fail or error type Note: receiver to verify the in parameters,
4613 * and fail the call with an error when appropriate
4615 uint16_t error_code;
4617 /* This field returns the type of original request. */
4620 /* This field provides original sequence number of the command. */
4624 * This field is the length of the response in bytes. The last byte of
4625 * the response is a valid flag that will read as '1' when the command
4626 * has been completely written to memory.
4636 * This field is used in Output records to indicate that the output is
4637 * completely written to RAM. This field should be read as '1' to
4638 * indicate that the output has been completely written. When writing a
4639 * command completion or response to an internal processor, the order of
4640 * writes has to be such that this field is written last.
4643 } __attribute__((packed));
4645 /* hwrm_exec_fwd_resp */
4647 * Description: This command is used to send an encapsulated request to the
4648 * HWRM. This command instructs the HWRM to execute the request and forward the
4649 * response of the encapsulated request to the location specified in the
4650 * original request that is encapsulated. The target id of this command shall be
4651 * set to 0xFFFF (HWRM). The response location in this command shall be used to
4652 * acknowledge the receipt of the encapsulated request and forwarding of the
4656 /* Input (128 bytes) */
4657 struct hwrm_exec_fwd_resp_input {
4659 * This value indicates what type of request this is. The format for the
4660 * rest of the command is determined by this field.
4665 * This value indicates the what completion ring the request will be
4666 * optionally completed on. If the value is -1, then no CR completion
4667 * will be generated. Any other value must be a valid CR ring_id value
4668 * for this function.
4672 /* This value indicates the command sequence number. */
4676 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4677 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4682 * This is the host address where the response will be written when the
4683 * request is complete. This area must be 16B aligned and must be
4684 * cleared to zero before the request is made.
4689 * This is an encapsulated request. This request should be executed by
4690 * the HWRM and the response should be provided in the response buffer
4691 * inside the encapsulated request.
4693 uint32_t encap_request[26];
4696 * This value indicates the target id of the response to the
4697 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
4698 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4700 uint16_t encap_resp_target_id;
4702 uint16_t unused_0[3];
4703 } __attribute__((packed));
4705 /* Output (16 bytes) */
4706 struct hwrm_exec_fwd_resp_output {
4708 * Pass/Fail or error type Note: receiver to verify the in parameters,
4709 * and fail the call with an error when appropriate
4711 uint16_t error_code;
4713 /* This field returns the type of original request. */
4716 /* This field provides original sequence number of the command. */
4720 * This field is the length of the response in bytes. The last byte of
4721 * the response is a valid flag that will read as '1' when the command
4722 * has been completely written to memory.
4732 * This field is used in Output records to indicate that the output is
4733 * completely written to RAM. This field should be read as '1' to
4734 * indicate that the output has been completely written. When writing a
4735 * command completion or response to an internal processor, the order of
4736 * writes has to be such that this field is written last.
4739 } __attribute__((packed));
4742 /* hwrm_ring_alloc */
4744 * Description: This command allocates and does basic preparation for a ring.
4747 /* Input (80 bytes) */
4748 struct hwrm_ring_alloc_input {
4750 * This value indicates what type of request this is. The format for the
4751 * rest of the command is determined by this field.
4756 * This value indicates the what completion ring the request will be
4757 * optionally completed on. If the value is -1, then no CR completion
4758 * will be generated. Any other value must be a valid CR ring_id value
4759 * for this function.
4763 /* This value indicates the command sequence number. */
4767 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4768 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4773 * This is the host address where the response will be written when the
4774 * request is complete. This area must be 16B aligned and must be
4775 * cleared to zero before the request is made.
4779 /* This bit must be '1' for the Reserved1 field to be configured. */
4780 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
4781 /* This bit must be '1' for the Reserved2 field to be configured. */
4782 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
4783 /* This bit must be '1' for the Reserved3 field to be configured. */
4784 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
4786 * This bit must be '1' for the stat_ctx_id_valid field to be
4789 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
4790 /* This bit must be '1' for the Reserved4 field to be configured. */
4791 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
4792 /* This bit must be '1' for the max_bw_valid field to be configured. */
4793 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
4797 /* Completion Ring (CR) */
4798 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4800 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4802 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
4808 /* This value is a pointer to the page table for the Ring. */
4809 uint64_t page_tbl_addr;
4811 /* First Byte Offset of the first entry in the first page. */
4815 * Actual page size in 2^page_size. The supported range is increments in
4816 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
4817 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
4818 * Page size is 64 KB. - 22 = 2 MB Page size is 2 MB. - 23 = 4 MB Page
4819 * size is 4 MB. - 31 = 1 GB Page size is 1 GB.
4824 * This value indicates the depth of page table. For this version of the
4825 * specification, value other than 0 or 1 shall be considered as an
4826 * invalid value. When the page_tbl_depth = 0, then it is treated as a
4827 * special case with the following. 1. FBO and page size fields are not
4828 * valid. 2. page_tbl_addr is the physical address of the first element
4831 uint8_t page_tbl_depth;
4837 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
4843 * Logical ring number for the ring to be allocated. This value
4844 * determines the position in the doorbell area where the update to the
4845 * ring will be made. For completion rings, this value is also the MSI-X
4846 * vector number for the function the completion ring is associated
4849 uint16_t logical_id;
4852 * This field is used only when ring_type is a TX ring. This value
4853 * indicates what completion ring the TX ring is associated with.
4855 uint16_t cmpl_ring_id;
4858 * This field is used only when ring_type is a TX ring. This value
4859 * indicates what CoS queue the TX ring is associated with.
4866 /* This field is reserved for the future use. It shall be set to 0. */
4868 /* This field is reserved for the future use. It shall be set to 0. */
4873 /* This field is reserved for the future use. It shall be set to 0. */
4877 * This field is used only when ring_type is a TX ring. This input
4878 * indicates what statistics context this ring should be associated
4881 uint32_t stat_ctx_id;
4883 /* This field is reserved for the future use. It shall be set to 0. */
4887 * This field is used only when ring_type is a TX ring. Maximum BW
4888 * allocated to this TX ring in Mbps. The HWRM will translate this value
4889 * into byte counter and time interval used for this ring inside the
4895 * This field is used only when ring_type is a Completion ring. This
4896 * value indicates what interrupt mode should be used on this completion
4897 * ring. Note: In the legacy interrupt mode, no more than 16 completion
4898 * rings are allowed.
4901 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY (UINT32_C(0x0) << 0)
4903 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD (UINT32_C(0x1) << 0)
4905 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX (UINT32_C(0x2) << 0)
4906 /* No Interrupt - Polled mode */
4907 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL (UINT32_C(0x3) << 0)
4910 uint8_t unused_8[3];
4911 } __attribute__((packed));
4913 /* Output (16 bytes) */
4915 struct hwrm_ring_alloc_output {
4917 * Pass/Fail or error type Note: receiver to verify the in parameters,
4918 * and fail the call with an error when appropriate
4920 uint16_t error_code;
4922 /* This field returns the type of original request. */
4925 /* This field provides original sequence number of the command. */
4929 * This field is the length of the response in bytes. The last byte of
4930 * the response is a valid flag that will read as '1' when the command
4931 * has been completely written to memory.
4935 /* Physical number of ring allocated. */
4938 /* Logical number of ring allocated. */
4939 uint16_t logical_ring_id;
4946 * This field is used in Output records to indicate that the output is
4947 * completely written to RAM. This field should be read as '1' to
4948 * indicate that the output has been completely written. When writing a
4949 * command completion or response to an internal processor, the order of
4950 * writes has to be such that this field is written last.
4953 } __attribute__((packed));
4955 /* hwrm_ring_free */
4957 * Description: This command is used to free a ring and associated resources.
4959 /* Input (24 bytes) */
4961 struct hwrm_ring_free_input {
4963 * This value indicates what type of request this is. The format for the
4964 * rest of the command is determined by this field.
4969 * This value indicates the what completion ring the request will be
4970 * optionally completed on. If the value is -1, then no CR completion
4971 * will be generated. Any other value must be a valid CR ring_id value
4972 * for this function.
4976 /* This value indicates the command sequence number. */
4980 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4981 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4986 * This is the host address where the response will be written when the
4987 * request is complete. This area must be 16B aligned and must be
4988 * cleared to zero before the request is made.
4993 /* Completion Ring (CR) */
4994 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4996 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4998 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
5003 /* Physical number of ring allocated. */
5007 } __attribute__((packed));
5009 /* Output (16 bytes) */
5010 struct hwrm_ring_free_output {
5012 * Pass/Fail or error type Note: receiver to verify the in parameters,
5013 * and fail the call with an error when appropriate
5015 uint16_t error_code;
5017 /* This field returns the type of original request. */
5020 /* This field provides original sequence number of the command. */
5024 * This field is the length of the response in bytes. The last byte of
5025 * the response is a valid flag that will read as '1' when the command
5026 * has been completely written to memory.
5036 * This field is used in Output records to indicate that the output is
5037 * completely written to RAM. This field should be read as '1' to
5038 * indicate that the output has been completely written. When writing a
5039 * command completion or response to an internal processor, the order of
5040 * writes has to be such that this field is written last.
5043 } __attribute__((packed));
5045 /* hwrm_ring_grp_alloc */
5047 * Description: This API allocates and does basic preparation for a ring group.
5050 /* Input (24 bytes) */
5051 struct hwrm_ring_grp_alloc_input {
5053 * This value indicates what type of request this is. The format for the
5054 * rest of the command is determined by this field.
5059 * This value indicates the what completion ring the request will be
5060 * optionally completed on. If the value is -1, then no CR completion
5061 * will be generated. Any other value must be a valid CR ring_id value
5062 * for this function.
5066 /* This value indicates the command sequence number. */
5070 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5071 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5076 * This is the host address where the response will be written when the
5077 * request is complete. This area must be 16B aligned and must be
5078 * cleared to zero before the request is made.
5082 /* This value identifies the CR associated with the ring group. */
5085 /* This value identifies the main RR associated with the ring group. */
5089 * This value identifies the aggregation RR associated with the ring
5090 * group. If this value is 0xFF... (All Fs), then no Aggregation ring
5096 * This value identifies the statistics context associated with the ring
5100 } __attribute__((packed));
5102 /* Output (16 bytes) */
5103 struct hwrm_ring_grp_alloc_output {
5105 * Pass/Fail or error type Note: receiver to verify the in parameters,
5106 * and fail the call with an error when appropriate
5108 uint16_t error_code;
5110 /* This field returns the type of original request. */
5113 /* This field provides original sequence number of the command. */
5117 * This field is the length of the response in bytes. The last byte of
5118 * the response is a valid flag that will read as '1' when the command
5119 * has been completely written to memory.
5124 * This is the ring group ID value. Use this value to program the
5125 * default ring group for the VNIC or as table entries in an RSS/COS
5128 uint32_t ring_group_id;
5135 * This field is used in Output records to indicate that the output is
5136 * completely written to RAM. This field should be read as '1' to
5137 * indicate that the output has been completely written. When writing a
5138 * command completion or response to an internal processor, the order of
5139 * writes has to be such that this field is written last.
5142 } __attribute__((packed));
5144 /* hwrm_ring_grp_free */
5146 * Description: This API frees a ring group and associated resources. # If a
5147 * ring in the ring group is reset or free, then the associated rings in the
5148 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
5149 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
5150 * a part of executing this command, the HWRM shall reset all associated ring
5154 /* Input (24 bytes) */
5155 struct hwrm_ring_grp_free_input {
5157 * This value indicates what type of request this is. The format for the
5158 * rest of the command is determined by this field.
5163 * This value indicates the what completion ring the request will be
5164 * optionally completed on. If the value is -1, then no CR completion
5165 * will be generated. Any other value must be a valid CR ring_id value
5166 * for this function.
5170 /* This value indicates the command sequence number. */
5174 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5175 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5180 * This is the host address where the response will be written when the
5181 * request is complete. This area must be 16B aligned and must be
5182 * cleared to zero before the request is made.
5186 /* This is the ring group ID value. */
5187 uint32_t ring_group_id;
5190 } __attribute__((packed));
5192 /* Output (16 bytes) */
5193 struct hwrm_ring_grp_free_output {
5195 * Pass/Fail or error type Note: receiver to verify the in parameters,
5196 * and fail the call with an error when appropriate
5198 uint16_t error_code;
5200 /* This field returns the type of original request. */
5203 /* This field provides original sequence number of the command. */
5207 * This field is the length of the response in bytes. The last byte of
5208 * the response is a valid flag that will read as '1' when the command
5209 * has been completely written to memory.
5219 * This field is used in Output records to indicate that the output is
5220 * completely written to RAM. This field should be read as '1' to
5221 * indicate that the output has been completely written. When writing a
5222 * command completion or response to an internal processor, the order of
5223 * writes has to be such that this field is written last.
5226 } __attribute__((packed));
5228 /* hwrm_stat_ctx_alloc */
5230 * Description: This command allocates and does basic preparation for a stat
5234 /* Input (32 bytes) */
5235 struct hwrm_stat_ctx_alloc_input {
5237 * This value indicates what type of request this is. The format for the
5238 * rest of the command is determined by this field.
5243 * This value indicates the what completion ring the request will be
5244 * optionally completed on. If the value is -1, then no CR completion
5245 * will be generated. Any other value must be a valid CR ring_id value
5246 * for this function.
5250 /* This value indicates the command sequence number. */
5254 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5255 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5260 * This is the host address where the response will be written when the
5261 * request is complete. This area must be 16B aligned and must be
5262 * cleared to zero before the request is made.
5266 /* This is the address for statistic block. */
5267 uint64_t stats_dma_addr;
5270 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
5273 uint32_t update_period_ms;
5276 } __attribute__((packed));
5278 /* Output (16 bytes) */
5279 struct hwrm_stat_ctx_alloc_output {
5281 * Pass/Fail or error type Note: receiver to verify the in parameters,
5282 * and fail the call with an error when appropriate
5284 uint16_t error_code;
5286 /* This field returns the type of original request. */
5289 /* This field provides original sequence number of the command. */
5293 * This field is the length of the response in bytes. The last byte of
5294 * the response is a valid flag that will read as '1' when the command
5295 * has been completely written to memory.
5299 /* This is the statistics context ID value. */
5300 uint32_t stat_ctx_id;
5307 * This field is used in Output records to indicate that the output is
5308 * completely written to RAM. This field should be read as '1' to
5309 * indicate that the output has been completely written. When writing a
5310 * command completion or response to an internal processor, the order of
5311 * writes has to be such that this field is written last.
5314 } __attribute__((packed));
5316 /* hwrm_stat_ctx_clr_stats */
5317 /* Description: This command clears statistics of a context. */
5319 /* Input (24 bytes) */
5320 struct hwrm_stat_ctx_clr_stats_input {
5322 * This value indicates what type of request this is. The format for the
5323 * rest of the command is determined by this field.
5328 * This value indicates the what completion ring the request will be
5329 * optionally completed on. If the value is -1, then no CR completion
5330 * will be generated. Any other value must be a valid CR ring_id value
5331 * for this function.
5335 /* This value indicates the command sequence number. */
5339 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5340 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5345 * This is the host address where the response will be written when the
5346 * request is complete. This area must be 16B aligned and must be
5347 * cleared to zero before the request is made.
5351 /* ID of the statistics context that is being queried. */
5352 uint32_t stat_ctx_id;
5355 } __attribute__((packed));
5357 /* Output (16 bytes) */
5358 struct hwrm_stat_ctx_clr_stats_output {
5360 * Pass/Fail or error type Note: receiver to verify the in parameters,
5361 * and fail the call with an error when appropriate
5363 uint16_t error_code;
5365 /* This field returns the type of original request. */
5368 /* This field provides original sequence number of the command. */
5372 * This field is the length of the response in bytes. The last byte of
5373 * the response is a valid flag that will read as '1' when the command
5374 * has been completely written to memory.
5384 * This field is used in Output records to indicate that the output is
5385 * completely written to RAM. This field should be read as '1' to
5386 * indicate that the output has been completely written. When writing a
5387 * command completion or response to an internal processor, the order of
5388 * writes has to be such that this field is written last.
5391 } __attribute__((packed));
5393 /* hwrm_stat_ctx_free */
5394 /* Description: This command is used to free a stat context. */
5395 /* Input (24 bytes) */
5397 struct hwrm_stat_ctx_free_input {
5399 * This value indicates what type of request this is. The format for the
5400 * rest of the command is determined by this field.
5405 * This value indicates the what completion ring the request will be
5406 * optionally completed on. If the value is -1, then no CR completion
5407 * will be generated. Any other value must be a valid CR ring_id value
5408 * for this function.
5412 /* This value indicates the command sequence number. */
5416 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5417 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5422 * This is the host address where the response will be written when the
5423 * request is complete. This area must be 16B aligned and must be
5424 * cleared to zero before the request is made.
5428 /* ID of the statistics context that is being queried. */
5429 uint32_t stat_ctx_id;
5432 } __attribute__((packed));
5434 /* Output (16 bytes) */
5436 struct hwrm_stat_ctx_free_output {
5438 * Pass/Fail or error type Note: receiver to verify the in parameters,
5439 * and fail the call with an error when appropriate
5441 uint16_t error_code;
5443 /* This field returns the type of original request. */
5446 /* This field provides original sequence number of the command. */
5450 * This field is the length of the response in bytes. The last byte of
5451 * the response is a valid flag that will read as '1' when the command
5452 * has been completely written to memory.
5456 /* This is the statistics context ID value. */
5457 uint32_t stat_ctx_id;
5464 * This field is used in Output records to indicate that the output is
5465 * completely written to RAM. This field should be read as '1' to
5466 * indicate that the output has been completely written. When writing a
5467 * command completion or response to an internal processor, the order of
5468 * writes has to be such that this field is written last.
5471 } __attribute__((packed));
5473 /* hwrm_vnic_alloc */
5475 * Description: This VNIC is a resource in the RX side of the chip that is used
5476 * to represent a virtual host "interface". # At the time of VNIC allocation or
5477 * configuration, the function can specify whether it wants the requested VNIC
5478 * to be the default VNIC for the function or not. # If a function requests
5479 * allocation of a VNIC for the first time and a VNIC is successfully allocated
5480 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
5481 * for that function. # The default VNIC shall be used for the default action
5482 * for a partition or function. # For each VNIC allocated on a function, a
5483 * mapping on the RX side to map the allocated VNIC to source virtual interface
5484 * shall be performed by the HWRM. This should be hidden to the function driver
5485 * requesting the VNIC allocation. This enables broadcast/multicast replication
5486 * with source knockout. # If multicast replication with source knockout is
5487 * enabled, then the internal VNIC to SVIF mapping data structures shall be
5488 * programmed at the time of VNIC allocation.
5491 /* Input (24 bytes) */
5492 struct hwrm_vnic_alloc_input {
5494 * This value indicates what type of request this is. The format for the
5495 * rest of the command is determined by this field.
5500 * This value indicates the what completion ring the request will be
5501 * optionally completed on. If the value is -1, then no CR completion
5502 * will be generated. Any other value must be a valid CR ring_id value
5503 * for this function.
5507 /* This value indicates the command sequence number. */
5511 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5512 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5517 * This is the host address where the response will be written when the
5518 * request is complete. This area must be 16B aligned and must be
5519 * cleared to zero before the request is made.
5524 * When this bit is '1', this VNIC is requested to be the default VNIC
5525 * for this function.
5527 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
5531 } __attribute__((packed));
5533 /* Output (16 bytes) */
5534 struct hwrm_vnic_alloc_output {
5536 * Pass/Fail or error type Note: receiver to verify the in parameters,
5537 * and fail the call with an error when appropriate
5539 uint16_t error_code;
5541 /* This field returns the type of original request. */
5544 /* This field provides original sequence number of the command. */
5548 * This field is the length of the response in bytes. The last byte of
5549 * the response is a valid flag that will read as '1' when the command
5550 * has been completely written to memory.
5554 /* Logical vnic ID */
5562 * This field is used in Output records to indicate that the output is
5563 * completely written to RAM. This field should be read as '1' to
5564 * indicate that the output has been completely written. When writing a
5565 * command completion or response to an internal processor, the order of
5566 * writes has to be such that this field is written last.
5569 } __attribute__((packed));
5572 /* Description: Configure the RX VNIC structure. */
5574 /* Input (40 bytes) */
5575 struct hwrm_vnic_cfg_input {
5577 * This value indicates what type of request this is. The format for the
5578 * rest of the command is determined by this field.
5583 * This value indicates the what completion ring the request will be
5584 * optionally completed on. If the value is -1, then no CR completion
5585 * will be generated. Any other value must be a valid CR ring_id value
5586 * for this function.
5590 /* This value indicates the command sequence number. */
5594 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5595 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5600 * This is the host address where the response will be written when the
5601 * request is complete. This area must be 16B aligned and must be
5602 * cleared to zero before the request is made.
5607 * When this bit is '1', the VNIC is requested to be the default VNIC
5610 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
5612 * When this bit is '1', the VNIC is being configured to strip VLAN in
5613 * the RX path. If set to '0', then VLAN stripping is disabled on this
5616 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
5618 * When this bit is '1', the VNIC is being configured to buffer receive
5619 * packets in the hardware until the host posts new receive buffers. If
5620 * set to '0', then bd_stall is being configured to be disabled on this
5623 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
5625 * When this bit is '1', the VNIC is being configured to receive both
5626 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
5627 * configured to be operating in dual VNIC mode.
5629 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
5631 * When this flag is set to '1', the VNIC is requested to be configured
5632 * to receive only RoCE traffic. If this flag is set to '0', then this
5633 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
5634 * to '1', then the HWRM client shall not set this flag to '1'.
5636 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
5639 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
5640 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
5641 /* This bit must be '1' for the rss_rule field to be configured. */
5642 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
5643 /* This bit must be '1' for the cos_rule field to be configured. */
5644 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
5645 /* This bit must be '1' for the lb_rule field to be configured. */
5646 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
5647 /* This bit must be '1' for the mru field to be configured. */
5648 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
5651 /* Logical vnic ID */
5655 * Default Completion ring for the VNIC. This ring will be chosen if
5656 * packet does not match any RSS rules and if there is no COS rule.
5658 uint16_t dflt_ring_grp;
5661 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
5667 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
5673 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
5674 * there is no LB rule.
5679 * The maximum receive unit of the vnic. Each vnic is associated with a
5680 * function. The vnic mru value overwrites the mru setting of the
5681 * associated function. The HWRM shall make sure that vnic mru does not
5682 * exceed the mru of the port the function is associated with.
5687 } __attribute__((packed));
5689 /* Output (16 bytes) */
5690 struct hwrm_vnic_cfg_output {
5692 * Pass/Fail or error type Note: receiver to verify the in parameters,
5693 * and fail the call with an error when appropriate
5695 uint16_t error_code;
5697 /* This field returns the type of original request. */
5700 /* This field provides original sequence number of the command. */
5704 * This field is the length of the response in bytes. The last byte of
5705 * the response is a valid flag that will read as '1' when the command
5706 * has been completely written to memory.
5716 * This field is used in Output records to indicate that the output is
5717 * completely written to RAM. This field should be read as '1' to
5718 * indicate that the output has been completely written. When writing a
5719 * command completion or response to an internal processor, the order of
5720 * writes has to be such that this field is written last.
5723 } __attribute__((packed));
5725 /* hwrm_vnic_free */
5727 * Description: Free a VNIC resource. Idle any resources associated with the
5728 * VNIC as well as the VNIC. Reset and release all resources associated with the
5732 /* Input (24 bytes) */
5733 struct hwrm_vnic_free_input {
5735 * This value indicates what type of request this is. The format for the
5736 * rest of the command is determined by this field.
5741 * This value indicates the what completion ring the request will be
5742 * optionally completed on. If the value is -1, then no CR completion
5743 * will be generated. Any other value must be a valid CR ring_id value
5744 * for this function.
5748 /* This value indicates the command sequence number. */
5752 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5753 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5758 * This is the host address where the response will be written when the
5759 * request is complete. This area must be 16B aligned and must be
5760 * cleared to zero before the request is made.
5764 /* Logical vnic ID */
5768 } __attribute__((packed));
5770 /* Output (16 bytes) */
5771 struct hwrm_vnic_free_output {
5773 * Pass/Fail or error type Note: receiver to verify the in parameters,
5774 * and fail the call with an error when appropriate
5776 uint16_t error_code;
5778 /* This field returns the type of original request. */
5781 /* This field provides original sequence number of the command. */
5785 * This field is the length of the response in bytes. The last byte of
5786 * the response is a valid flag that will read as '1' when the command
5787 * has been completely written to memory.
5797 * This field is used in Output records to indicate that the output is
5798 * completely written to RAM. This field should be read as '1' to
5799 * indicate that the output has been completely written. When writing a
5800 * command completion or response to an internal processor, the order of
5801 * writes has to be such that this field is written last.
5804 } __attribute__((packed));
5806 /* hwrm_vnic_rss_cfg */
5807 /* Description: This function is used to enable RSS configuration. */
5809 /* Input (48 bytes) */
5810 struct hwrm_vnic_rss_cfg_input {
5812 * This value indicates what type of request this is. The format for the
5813 * rest of the command is determined by this field.
5818 * This value indicates the what completion ring the request will be
5819 * optionally completed on. If the value is -1, then no CR completion
5820 * will be generated. Any other value must be a valid CR ring_id value
5821 * for this function.
5825 /* This value indicates the command sequence number. */
5829 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5830 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5835 * This is the host address where the response will be written when the
5836 * request is complete. This area must be 16B aligned and must be
5837 * cleared to zero before the request is made.
5842 * When this bit is '1', the RSS hash shall be computed over source and
5843 * destination IPv4 addresses of IPv4 packets.
5845 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
5847 * When this bit is '1', the RSS hash shall be computed over
5848 * source/destination IPv4 addresses and source/destination ports of
5851 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
5853 * When this bit is '1', the RSS hash shall be computed over
5854 * source/destination IPv4 addresses and source/destination ports of
5857 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
5859 * When this bit is '1', the RSS hash shall be computed over source and
5860 * destination IPv4 addresses of IPv6 packets.
5862 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
5864 * When this bit is '1', the RSS hash shall be computed over
5865 * source/destination IPv6 addresses and source/destination ports of
5868 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
5870 * When this bit is '1', the RSS hash shall be computed over
5871 * source/destination IPv6 addresses and source/destination ports of
5874 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
5879 /* This is the address for rss ring group table */
5880 uint64_t ring_grp_tbl_addr;
5882 /* This is the address for rss hash key table */
5883 uint64_t hash_key_tbl_addr;
5885 /* Index to the rss indirection table. */
5886 uint16_t rss_ctx_idx;
5888 uint16_t unused_1[3];
5889 } __attribute__((packed));
5891 /* Output (16 bytes) */
5892 struct hwrm_vnic_rss_cfg_output {
5894 * Pass/Fail or error type Note: receiver to verify the in parameters,
5895 * and fail the call with an error when appropriate
5897 uint16_t error_code;
5899 /* This field returns the type of original request. */
5902 /* This field provides original sequence number of the command. */
5906 * This field is the length of the response in bytes. The last byte of
5907 * the response is a valid flag that will read as '1' when the command
5908 * has been completely written to memory.
5918 * This field is used in Output records to indicate that the output is
5919 * completely written to RAM. This field should be read as '1' to
5920 * indicate that the output has been completely written. When writing a
5921 * command completion or response to an internal processor, the order of
5922 * writes has to be such that this field is written last.
5925 } __attribute__((packed));
5927 /* Input (16 bytes) */
5928 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
5930 * This value indicates what type of request this is. The format for the
5931 * rest of the command is determined by this field.
5936 * This value indicates the what completion ring the request will be
5937 * optionally completed on. If the value is -1, then no CR completion
5938 * will be generated. Any other value must be a valid CR ring_id value
5939 * for this function.
5943 /* This value indicates the command sequence number. */
5947 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5948 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5953 * This is the host address where the response will be written when the
5954 * request is complete. This area must be 16B aligned and must be
5955 * cleared to zero before the request is made.
5958 } __attribute__((packed));
5960 /* Output (16 bytes) */
5962 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
5964 * Pass/Fail or error type Note: receiver to verify the in parameters,
5965 * and fail the call with an error when appropriate
5967 uint16_t error_code;
5969 /* This field returns the type of original request. */
5972 /* This field provides original sequence number of the command. */
5976 * This field is the length of the response in bytes. The last byte of
5977 * the response is a valid flag that will read as '1' when the command
5978 * has been completely written to memory.
5982 /* rss_cos_lb_ctx_id is 16 b */
5983 uint16_t rss_cos_lb_ctx_id;
5992 * This field is used in Output records to indicate that the output is
5993 * completely written to RAM. This field should be read as '1' to
5994 * indicate that the output has been completely written. When writing a
5995 * command completion or response to an internal processor, the order of
5996 * writes has to be such that this field is written last.
5999 } __attribute__((packed));
6001 /* hwrm_vnic_rss_cos_lb_ctx_free */
6002 /* Description: This function can be used to free COS/Load Balance context. */
6003 /* Input (24 bytes) */
6005 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
6007 * This value indicates what type of request this is. The format for the
6008 * rest of the command is determined by this field.
6013 * This value indicates the what completion ring the request will be
6014 * optionally completed on. If the value is -1, then no CR completion
6015 * will be generated. Any other value must be a valid CR ring_id value
6016 * for this function.
6020 /* This value indicates the command sequence number. */
6024 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
6025 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
6030 * This is the host address where the response will be written when the
6031 * request is complete. This area must be 16B aligned and must be
6032 * cleared to zero before the request is made.
6036 /* rss_cos_lb_ctx_id is 16 b */
6037 uint16_t rss_cos_lb_ctx_id;
6039 uint16_t unused_0[3];
6040 } __attribute__((packed));
6042 /* Output (16 bytes) */
6043 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
6045 * Pass/Fail or error type Note: receiver to verify the in parameters,
6046 * and fail the call with an error when appropriate
6048 uint16_t error_code;
6050 /* This field returns the type of original request. */
6053 /* This field provides original sequence number of the command. */
6057 * This field is the length of the response in bytes. The last byte of
6058 * the response is a valid flag that will read as '1' when the command
6059 * has been completely written to memory.
6069 * This field is used in Output records to indicate that the output is
6070 * completely written to RAM. This field should be read as '1' to
6071 * indicate that the output has been completely written. When writing a
6072 * command completion or response to an internal processor, the order of
6073 * writes has to be such that this field is written last.
6076 } __attribute__((packed));