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34 #ifndef _HSI_STRUCT_DEF_DPDK_
35 #define _HSI_STRUCT_DEF_DPDK_
36 /* HSI and HWRM Specification 1.7.7 */
37 #define HWRM_VERSION_MAJOR 1
38 #define HWRM_VERSION_MINOR 7
39 #define HWRM_VERSION_UPDATE 7
41 #define HWRM_VERSION_STR "1.7.7"
43 * Following is the signature for HWRM message field that indicates not
44 * applicable (All F's). Need to cast it the size of the field if needed.
46 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
47 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
48 #define HWRM_MAX_RESP_LEN (248) /* hwrm_selftest_qlist */
49 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
50 #define HW_HASH_KEY_SIZE 40
51 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
52 #define HWRM_ROCE_SP_HSI_VERSION_MAJOR 1
53 #define HWRM_ROCE_SP_HSI_VERSION_MINOR 7
54 #define HWRM_ROCE_SP_HSI_VERSION_UPDATE 4
59 #define HWRM_VER_GET (UINT32_C(0x0))
60 #define HWRM_FUNC_BUF_UNRGTR (UINT32_C(0xe))
61 #define HWRM_FUNC_VF_CFG (UINT32_C(0xf))
62 /* Reserved for future use */
63 #define RESERVED1 (UINT32_C(0x10))
64 #define HWRM_FUNC_RESET (UINT32_C(0x11))
65 #define HWRM_FUNC_GETFID (UINT32_C(0x12))
66 #define HWRM_FUNC_VF_ALLOC (UINT32_C(0x13))
67 #define HWRM_FUNC_VF_FREE (UINT32_C(0x14))
68 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
69 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
70 #define HWRM_FUNC_CFG (UINT32_C(0x17))
71 #define HWRM_FUNC_QSTATS (UINT32_C(0x18))
72 #define HWRM_FUNC_CLR_STATS (UINT32_C(0x19))
73 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
74 #define HWRM_FUNC_VF_RESC_FREE (UINT32_C(0x1b))
75 #define HWRM_FUNC_VF_VNIC_IDS_QUERY (UINT32_C(0x1c))
76 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
77 #define HWRM_FUNC_DRV_QVER (UINT32_C(0x1e))
78 #define HWRM_FUNC_BUF_RGTR (UINT32_C(0x1f))
79 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
80 #define HWRM_PORT_MAC_CFG (UINT32_C(0x21))
81 #define HWRM_PORT_QSTATS (UINT32_C(0x23))
82 #define HWRM_PORT_LPBK_QSTATS (UINT32_C(0x24))
83 #define HWRM_PORT_CLR_STATS (UINT32_C(0x25))
84 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
85 #define HWRM_PORT_MAC_QCFG (UINT32_C(0x28))
86 #define HWRM_PORT_PHY_QCAPS (UINT32_C(0x2a))
87 #define HWRM_PORT_LED_CFG (UINT32_C(0x2d))
88 #define HWRM_PORT_LED_QCFG (UINT32_C(0x2e))
89 #define HWRM_PORT_LED_QCAPS (UINT32_C(0x2f))
90 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
91 #define HWRM_QUEUE_QCFG (UINT32_C(0x31))
92 #define HWRM_QUEUE_CFG (UINT32_C(0x32))
93 #define HWRM_FUNC_VLAN_CFG (UINT32_C(0x33))
94 #define HWRM_FUNC_VLAN_QCFG (UINT32_C(0x34))
95 #define HWRM_QUEUE_PFCENABLE_QCFG (UINT32_C(0x35))
96 #define HWRM_QUEUE_PFCENABLE_CFG (UINT32_C(0x36))
97 #define HWRM_QUEUE_PRI2COS_QCFG (UINT32_C(0x37))
98 #define HWRM_QUEUE_PRI2COS_CFG (UINT32_C(0x38))
99 #define HWRM_QUEUE_COS2BW_QCFG (UINT32_C(0x39))
100 #define HWRM_QUEUE_COS2BW_CFG (UINT32_C(0x3a))
101 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
102 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
103 #define HWRM_VNIC_FREE (UINT32_C(0x41))
104 #define HWRM_VNIC_CFG (UINT32_C(0x42))
105 #define HWRM_VNIC_QCFG (UINT32_C(0x43))
106 #define HWRM_VNIC_TPA_CFG (UINT32_C(0x44))
107 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
108 #define HWRM_VNIC_RSS_QCFG (UINT32_C(0x47))
109 #define HWRM_VNIC_PLCMODES_CFG (UINT32_C(0x48))
110 #define HWRM_VNIC_PLCMODES_QCFG (UINT32_C(0x49))
111 #define HWRM_VNIC_QCAPS (UINT32_C(0x4a))
112 #define HWRM_RING_ALLOC (UINT32_C(0x50))
113 #define HWRM_RING_FREE (UINT32_C(0x51))
114 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS (UINT32_C(0x52))
115 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS (UINT32_C(0x53))
116 #define HWRM_RING_RESET (UINT32_C(0x5e))
117 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
118 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
119 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
120 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
121 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
122 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
123 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
124 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
125 /* Reserved for future use */
126 #define RESERVED4 (UINT32_C(0x94))
127 #define HWRM_CFA_TUNNEL_FILTER_ALLOC (UINT32_C(0x95))
128 #define HWRM_CFA_TUNNEL_FILTER_FREE (UINT32_C(0x96))
129 #define HWRM_CFA_NTUPLE_FILTER_ALLOC (UINT32_C(0x99))
130 #define HWRM_CFA_NTUPLE_FILTER_FREE (UINT32_C(0x9a))
131 #define HWRM_CFA_NTUPLE_FILTER_CFG (UINT32_C(0x9b))
132 #define HWRM_TUNNEL_DST_PORT_QUERY (UINT32_C(0xa0))
133 #define HWRM_TUNNEL_DST_PORT_ALLOC (UINT32_C(0xa1))
134 #define HWRM_TUNNEL_DST_PORT_FREE (UINT32_C(0xa2))
135 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
136 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
137 #define HWRM_STAT_CTX_QUERY (UINT32_C(0xb2))
138 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
139 #define HWRM_FW_RESET (UINT32_C(0xc0))
140 #define HWRM_FW_QSTATUS (UINT32_C(0xc1))
141 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
142 #define HWRM_REJECT_FWD_RESP (UINT32_C(0xd1))
143 #define HWRM_FWD_RESP (UINT32_C(0xd2))
144 #define HWRM_FWD_ASYNC_EVENT_CMPL (UINT32_C(0xd3))
145 #define HWRM_TEMP_MONITOR_QUERY (UINT32_C(0xe0))
146 #define HWRM_WOL_FILTER_ALLOC (UINT32_C(0xf0))
147 #define HWRM_WOL_FILTER_FREE (UINT32_C(0xf1))
148 #define HWRM_WOL_FILTER_QCFG (UINT32_C(0xf2))
149 #define HWRM_WOL_REASON_QCFG (UINT32_C(0xf3))
150 #define HWRM_DBG_DUMP (UINT32_C(0xff14))
151 #define HWRM_NVM_VALIDATE_OPTION (UINT32_C(0xffef))
152 #define HWRM_NVM_FLUSH (UINT32_C(0xfff0))
153 #define HWRM_NVM_GET_VARIABLE (UINT32_C(0xfff1))
154 #define HWRM_NVM_SET_VARIABLE (UINT32_C(0xfff2))
155 #define HWRM_NVM_INSTALL_UPDATE (UINT32_C(0xfff3))
156 #define HWRM_NVM_MODIFY (UINT32_C(0xfff4))
157 #define HWRM_NVM_VERIFY_UPDATE (UINT32_C(0xfff5))
158 #define HWRM_NVM_GET_DEV_INFO (UINT32_C(0xfff6))
159 #define HWRM_NVM_ERASE_DIR_ENTRY (UINT32_C(0xfff7))
160 #define HWRM_NVM_MOD_DIR_ENTRY (UINT32_C(0xfff8))
161 #define HWRM_NVM_FIND_DIR_ENTRY (UINT32_C(0xfff9))
162 #define HWRM_NVM_GET_DIR_ENTRIES (UINT32_C(0xfffa))
163 #define HWRM_NVM_GET_DIR_INFO (UINT32_C(0xfffb))
164 #define HWRM_NVM_RAW_DUMP (UINT32_C(0xfffc))
165 #define HWRM_NVM_READ (UINT32_C(0xfffd))
166 #define HWRM_NVM_WRITE (UINT32_C(0xfffe))
167 #define HWRM_NVM_RAW_WRITE_BLK (UINT32_C(0xffff))
170 * Note: The Host Software Interface (HSI) and Hardware Resource Manager (HWRM)
171 * specification describes the data structures used in Ethernet packet or RDMA
172 * message data transfers as well as an abstract interface for managing Ethernet
173 * NIC hardware resources.
175 /* Ethernet Data path Host Structures */
177 * Description: The following three sections document the host structures used
178 * between device and software drivers for communicating Ethernet packets.
180 /* BD Ring Structures */
182 * Description: This structure is used to inform the NIC of a location for and
183 * an aggregation buffer that will be used for packet data that is received. An
184 * aggregation buffer creates a different kind of completion operation for a
185 * packet where a variable number of BDs may be used to place the packet in the
186 * host. RX Rings that have aggregation buffers are known as aggregation rings
187 * and must contain only aggregation buffers.
189 /* Short TX BD (16 bytes) */
193 * All bits in this field must be valid on the first BD of a
194 * packet. Only the packet_end bit must be valid for the
195 * remaining BDs of a packet.
197 /* This value identifies the type of buffer descriptor. */
198 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
199 #define TX_BD_SHORT_TYPE_SFT 0
201 * Indicates that this BD is 16B long and is
202 * used for normal L2 packet transmission.
204 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
206 * If set to 1, the packet ends with the data in the buffer
207 * pointed to by this descriptor. This flag must be valid on
210 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
212 * If set to 1, the device will not generate a completion for
213 * this transmit packet unless there is an error in it's
214 * processing. If this bit is set to 0, then the packet will be
215 * completed normally. This bit must be valid only on the first
218 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
220 * This value indicates how many 16B BD locations are consumed
221 * in the ring by this packet. A value of 1 indicates that this
222 * BD is the only BD (and that the it is a short BD). A value of
223 * 3 indicates either 3 short BDs or 1 long BD and one short BD
224 * in the packet. A value of 0 indicates that there are 32 BD
225 * locations in the packet (the maximum). This field is valid
226 * only on the first BD of a packet.
228 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
229 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
231 * This value is a hint for the length of the entire packet. It
232 * is used by the chip to optimize internal processing. The
233 * packet will be dropped if the hint is too short. This field
234 * is valid only on the first BD of a packet.
236 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
237 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
238 /* indicates packet length < 512B */
239 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
240 /* indicates 512 <= packet length < 1KB */
241 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
242 /* indicates 1KB <= packet length < 2KB */
243 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
244 /* indicates packet length >= 2KB */
245 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
246 #define TX_BD_SHORT_FLAGS_LHINT_LAST \
247 TX_BD_SHORT_FLAGS_LHINT_GTE2K
249 * If set to 1, the device immediately updates the Send Consumer
250 * Index after the buffer associated with this descriptor has
251 * been transferred via DMA to NIC memory from host memory. An
252 * interrupt may or may not be generated according to the state
253 * of the interrupt avoidance mechanisms. If this bit is set to
254 * 0, then the Consumer Index is only updated as soon as one of
255 * the host interrupt coalescing conditions has been met. This
256 * bit must be valid on the first BD of a packet.
258 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
260 * All bits in this field must be valid on the first BD of a
261 * packet. Only the packet_end bit must be valid for the
262 * remaining BDs of a packet.
264 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
265 #define TX_BD_SHORT_FLAGS_SFT 6
268 * This is the length of the host physical buffer this BD
269 * describes in bytes. This field must be valid on all BDs of a
274 * The opaque data field is pass through to the completion and
275 * can be used for any data that the driver wants to associate
276 * with the transmit BD. This field must be valid on the first
281 * This is the host physical address for the portion of the
282 * packet described by this TX BD. This value must be valid on
283 * all BDs of a packet.
285 } __attribute__((packed));
287 /* Long TX BD (32 bytes split to 2 16-byte struct) */
291 * All bits in this field must be valid on the first BD of a
292 * packet. Only the packet_end bit must be valid for the
293 * remaining BDs of a packet.
295 /* This value identifies the type of buffer descriptor. */
296 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
297 #define TX_BD_LONG_TYPE_SFT 0
299 * Indicates that this BD is 32B long and is
300 * used for normal L2 packet transmission.
302 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
304 * If set to 1, the packet ends with the data in the buffer
305 * pointed to by this descriptor. This flag must be valid on
308 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
310 * If set to 1, the device will not generate a completion for
311 * this transmit packet unless there is an error in it's
312 * processing. If this bit is set to 0, then the packet will be
313 * completed normally. This bit must be valid only on the first
316 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
318 * This value indicates how many 16B BD locations are consumed
319 * in the ring by this packet. A value of 1 indicates that this
320 * BD is the only BD (and that the it is a short BD). A value of
321 * 3 indicates either 3 short BDs or 1 long BD and one short BD
322 * in the packet. A value of 0 indicates that there are 32 BD
323 * locations in the packet (the maximum). This field is valid
324 * only on the first BD of a packet.
326 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
327 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
329 * This value is a hint for the length of the entire packet. It
330 * is used by the chip to optimize internal processing. The
331 * packet will be dropped if the hint is too short. This field
332 * is valid only on the first BD of a packet.
334 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
335 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
336 /* indicates packet length < 512B */
337 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
338 /* indicates 512 <= packet length < 1KB */
339 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
340 /* indicates 1KB <= packet length < 2KB */
341 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
342 /* indicates packet length >= 2KB */
343 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
344 #define TX_BD_LONG_FLAGS_LHINT_LAST \
345 TX_BD_LONG_FLAGS_LHINT_GTE2K
347 * If set to 1, the device immediately updates the Send Consumer
348 * Index after the buffer associated with this descriptor has
349 * been transferred via DMA to NIC memory from host memory. An
350 * interrupt may or may not be generated according to the state
351 * of the interrupt avoidance mechanisms. If this bit is set to
352 * 0, then the Consumer Index is only updated as soon as one of
353 * the host interrupt coalescing conditions has been met. This
354 * bit must be valid on the first BD of a packet.
356 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
358 * All bits in this field must be valid on the first BD of a
359 * packet. Only the packet_end bit must be valid for the
360 * remaining BDs of a packet.
362 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
363 #define TX_BD_LONG_FLAGS_SFT 6
366 * This is the length of the host physical buffer this BD
367 * describes in bytes. This field must be valid on all BDs of a
372 * The opaque data field is pass through to the completion and
373 * can be used for any data that the driver wants to associate
374 * with the transmit BD. This field must be valid on the first
379 * This is the host physical address for the portion of the
380 * packet described by this TX BD. This value must be valid on
381 * all BDs of a packet.
383 } __attribute__((packed));
385 /* last 16 bytes of Long TX BD */
386 struct tx_bd_long_hi {
389 * All bits in this field must be valid on the first BD of a
390 * packet. Their value on other BDs of the packet will be
394 * If set to 1, the controller replaces the TCP/UPD checksum
395 * fields of normal TCP/UPD checksum, or the inner TCP/UDP
396 * checksum field of the encapsulated TCP/UDP packets with the
397 * hardware calculated TCP/UDP checksum for the packet
398 * associated with this descriptor. The flag is ignored if the
399 * LSO flag is set. This bit must be valid on the first BD of a
402 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
404 * If set to 1, the controller replaces the IP checksum of the
405 * normal packets, or the inner IP checksum of the encapsulated
406 * packets with the hardware calculated IP checksum for the
407 * packet associated with this descriptor. This bit must be
408 * valid on the first BD of a packet.
410 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
412 * If set to 1, the controller will not append an Ethernet CRC
413 * to the end of the frame. This bit must be valid on the first
414 * BD of a packet. Packet must be 64B or longer when this flag
415 * is set. It is not useful to use this bit with any form of TX
416 * offload such as CSO or LSO. The intent is that the packet
417 * from the host already has a valid Ethernet CRC on the packet.
419 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
421 * If set to 1, the device will record the time at which the
422 * packet was actually transmitted at the TX MAC. This bit must
423 * be valid on the first BD of a packet.
425 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
427 * If set to 1, The controller replaces the tunnel IP checksum
428 * field with hardware calculated IP checksum for the IP header
429 * of the packet associated with this descriptor. For outer UDP
430 * checksum, global outer UDP checksum TE_NIC register needs to
431 * be enabled. If the global outer UDP checksum TE_NIC register
432 * bit is set, outer UDP checksum will be calculated for the
433 * following cases: 1. Packets with tcp_udp_chksum flag set to
434 * offload checksum for inner packet AND the inner packet is
435 * TCP/UDP. If the inner packet is ICMP for example (non-
436 * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
437 * checksum will not be calculated. 2. Packets with lso flag set
438 * which implies inner TCP checksum calculation as part of LSO
441 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
443 * If set to 1, the device will treat this packet with LSO(Large
444 * Send Offload) processing for both normal or encapsulated
445 * packets, which is a form of TCP segmentation. When this bit
446 * is 1, the hdr_size and mss fields must be valid. The driver
447 * doesn't need to set t_ip_chksum, ip_chksum, and
448 * tcp_udp_chksum flags since the controller will replace the
449 * appropriate checksum fields for segmented packets. When this
450 * bit is 1, the hdr_size and mss fields must be valid.
452 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
454 * If set to zero when LSO is '1', then the IPID will be treated
455 * as a 16b number and will be wrapped if it exceeds a value of
456 * 0xffff. If set to one when LSO is '1', then the IPID will be
457 * treated as a 15b number and will be wrapped if it exceeds a
460 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
462 * If set to zero when LSO is '1', then the IPID of the tunnel
463 * IP header will not be modified during LSO operations. If set
464 * to one when LSO is '1', then the IPID of the tunnel IP header
465 * will be incremented for each subsequent segment of an LSO
466 * operation. The flag is ignored if the LSO packet is a normal
467 * (non-tunneled) TCP packet.
469 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
471 * If set to '1', then the RoCE ICRC will be appended to the
472 * packet. Packet must be a valid RoCE format packet.
474 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
476 * If set to '1', then the FCoE CRC will be appended to the
477 * packet. Packet must be a valid FCoE format packet.
479 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
482 * When LSO is '1', this field must contain the offset of the
483 * TCP payload from the beginning of the packet in as 16b words.
484 * In case of encapsulated/tunneling packet, this field contains
485 * the offset of the inner TCP payload from beginning of the
486 * packet as 16-bit words. This value must be valid on the first
489 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
490 #define TX_BD_LONG_HDR_SIZE_SFT 0
493 * This is the MSS value that will be used to do the LSO
494 * processing. The value is the length in bytes of the TCP
495 * payload for each segment generated by the LSO operation. This
496 * value must be valid on the first BD of a packet.
498 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
499 #define TX_BD_LONG_MSS_SFT 0
503 * This value selects a CFA action to perform on the packet. Set
504 * this value to zero if no CFA action is desired. This value
505 * must be valid on the first BD of a packet.
509 * This value is action meta-data that defines CFA edit
510 * operations that are done in addition to any action editing.
512 /* When key=1, This is the VLAN tag VID value. */
513 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
514 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
515 /* When key=1, This is the VLAN tag DE value. */
516 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
517 /* When key=1, This is the VLAN tag PRI value. */
518 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
519 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
520 /* When key=1, This is the VLAN tag TPID select value. */
521 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
522 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
524 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
526 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
528 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
530 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
532 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
533 /* Value programmed in CFA VLANTPID register. */
534 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
535 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
536 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
537 /* When key=1, This is the VLAN tag TPID select value. */
538 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
539 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
541 * This field identifies the type of edit to be performed on the
542 * packet. This value must be valid on the first BD of a packet.
544 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
545 #define TX_BD_LONG_CFA_META_KEY_SFT 28
547 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
549 * - meta[17:16] - TPID select value (0 =
550 * 0x8100). - meta[15:12] - PRI/DE value. -
551 * meta[11:0] - VID value.
553 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
554 #define TX_BD_LONG_CFA_META_KEY_LAST \
555 TX_BD_LONG_CFA_META_KEY_VLAN_TAG
556 } __attribute__((packed));
558 /* RX Producer Packet BD (16 bytes) */
559 struct rx_prod_pkt_bd {
561 /* This value identifies the type of buffer descriptor. */
562 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
563 #define RX_PROD_PKT_BD_TYPE_SFT 0
565 * Indicates that this BD is 16B long and is an
566 * RX Producer (ie. empty) buffer descriptor.
568 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
570 * If set to 1, the packet will be placed at the address plus
571 * 2B. The 2 Bytes of padding will be written as zero.
574 * This is intended to be used when the host buffer is cache-
575 * line aligned to produce packets that are easy to parse in
576 * host memory while still allowing writes to be cache line
579 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
581 * If set to 1, the packet write will be padded out to the
582 * nearest cache-line with zero value padding.
585 * If receive buffers start/end on cache-line boundaries, this
586 * feature will ensure that all data writes on the PCI bus
587 * start/end on cache line boundaries.
589 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
591 * This value is the number of additional buffers in the ring
592 * that describe the buffer space to be consumed for the this
593 * packet. If the value is zero, then the packet must fit within
594 * the space described by this BD. If this value is 1 or more,
595 * it indicates how many additional "buffer" BDs are in the ring
596 * immediately following this BD to be used for the same network
597 * packet. Even if the packet to be placed does not need all the
598 * additional buffers, they will be consumed anyway.
600 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
601 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
602 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
603 #define RX_PROD_PKT_BD_FLAGS_SFT 6
606 * This is the length in Bytes of the host physical buffer where
607 * data for the packet may be placed in host memory.
610 * While this is a Byte resolution value, it is often
611 * advantageous to ensure that the buffers provided end on a
616 * The opaque data field is pass through to the completion and
617 * can be used for any data that the driver wants to associate
618 * with this receive buffer set.
622 * This is the host physical address where data for the packet
623 * may by placed in host memory.
626 * While this is a Byte resolution value, it is often
627 * advantageous to ensure that the buffers provide start on a
630 } __attribute__((packed));
632 /* Completion Ring Structures */
633 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
634 /* Base Completion Record (16 bytes) */
639 * This field indicates the exact type of the completion. By
640 * convention, the LSB identifies the length of the record in
641 * 16B units. Even values indicate 16B records. Odd values
642 * indicate 32B records.
644 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
645 #define CMPL_BASE_TYPE_SFT 0
646 /* TX L2 completion: Completion of TX packet. Length = 16B */
647 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
649 * RX L2 completion: Completion of and L2 RX
650 * packet. Length = 32B
652 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
654 * RX Aggregation Buffer completion : Completion
655 * of an L2 aggregation buffer in support of
656 * TPA, HDS, or Jumbo packet completion. Length
659 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
661 * RX L2 TPA Start Completion: Completion at the
662 * beginning of a TPA operation. Length = 32B
664 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
666 * RX L2 TPA End Completion: Completion at the
667 * end of a TPA operation. Length = 32B
669 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
671 * Statistics Ejection Completion: Completion of
672 * statistics data ejection buffer. Length = 16B
674 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
675 /* HWRM Command Completion: Completion of an HWRM command. */
676 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
677 /* Forwarded HWRM Request */
678 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
679 /* Forwarded HWRM Response */
680 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
681 /* HWRM Asynchronous Event Information */
682 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
683 /* CQ Notification */
684 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
685 /* SRQ Threshold Event */
686 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
687 /* DBQ Threshold Event */
688 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
689 /* QP Async Notification */
690 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
691 /* Function Async Notification */
692 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
701 * This value is written by the NIC such that it will be
702 * different for each pass through the completion queue. The
703 * even passes will write 1. The odd passes will write 0.
705 #define CMPL_BASE_V UINT32_C(0x1)
707 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
708 #define CMPL_BASE_INFO3_SFT 1
711 } __attribute__((packed));
713 /* TX Completion Record (16 bytes) */
717 * This field indicates the exact type of the completion. By
718 * convention, the LSB identifies the length of the record in
719 * 16B units. Even values indicate 16B records. Odd values
720 * indicate 32B records.
722 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
723 #define TX_CMPL_TYPE_SFT 0
724 /* TX L2 completion: Completion of TX packet. Length = 16B */
725 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
727 * When this bit is '1', it indicates a packet that has an error
728 * of some type. Type of error is indicated in error_flags.
730 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
732 * When this bit is '1', it indicates that the packet completed
733 * was transmitted using the push acceleration data provided by
734 * the driver. When this bit is '0', it indicates that the
735 * packet had not push acceleration data written or was executed
736 * as a normal packet even though push data was provided.
738 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
739 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
740 #define TX_CMPL_FLAGS_SFT 6
742 /* unused1 is 16 b */
745 * This is a copy of the opaque field from the first TX BD of
746 * this transmitted packet.
750 * This value is written by the NIC such that it will be
751 * different for each pass through the completion queue. The
752 * even passes will write 1. The odd passes will write 0.
754 #define TX_CMPL_V UINT32_C(0x1)
756 * This error indicates that there was some sort of problem with
757 * the BDs for the packet.
759 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
760 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
762 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
763 /* Bad Format: BDs were not formatted correctly. */
764 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
765 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
766 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
768 * When this bit is '1', it indicates that the length of the
769 * packet was zero. No packet was transmitted.
771 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
773 * When this bit is '1', it indicates that the packet was longer
774 * than the programmed limit in TDI. No packet was transmitted.
776 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
778 * When this bit is '1', it indicates that one or more of the
779 * BDs associated with this packet generated a PCI error. This
780 * probably means the address was not valid.
782 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
784 * When this bit is '1', it indicates that the packet was longer
785 * than indicated by the hint. No packet was transmitted.
787 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
789 * When this bit is '1', it indicates that the packet was
790 * dropped due to Poison TLP error on one or more of the TLPs in
791 * the PXP completion.
793 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
794 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
795 #define TX_CMPL_ERRORS_SFT 1
797 /* unused2 is 16 b */
799 /* unused3 is 32 b */
800 } __attribute__((packed));
802 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
806 * This field indicates the exact type of the completion. By
807 * convention, the LSB identifies the length of the record in
808 * 16B units. Even values indicate 16B records. Odd values
809 * indicate 32B records.
811 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
812 #define RX_PKT_CMPL_TYPE_SFT 0
814 * RX L2 completion: Completion of and L2 RX
815 * packet. Length = 32B
817 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
818 #define RX_PKT_CMPL_TYPE_RX_L2_TPA_START UINT32_C(0x13)
819 #define RX_PKT_CMPL_TYPE_RX_L2_TPA_END UINT32_C(0x15)
821 * When this bit is '1', it indicates a packet that has an error
822 * of some type. Type of error is indicated in error_flags.
824 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
825 /* This field indicates how the packet was placed in the buffer. */
826 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
827 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
828 /* Normal: Packet was placed using normal algorithm. */
829 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
830 /* Jumbo: Packet was placed using jumbo algorithm. */
831 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
833 * Header/Data Separation: Packet was placed
834 * using Header/Data separation algorithm. The
835 * separation location is indicated by the itype
838 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
839 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
840 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
841 /* This bit is '1' if the RSS field in this completion is valid. */
842 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
844 #define RX_PKT_CMPL_FLAGS_UNUSED UINT32_C(0x800)
846 * This value indicates what the inner packet determined for the
849 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
850 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
851 /* Not Known: Indicates that the packet type was not known. */
852 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
854 * IP Packet: Indicates that the packet was an
855 * IP packet, but further classification was not
858 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
860 * TCP Packet: Indicates that the packet was IP
861 * and TCP. This indicates that the
862 * payload_offset field is valid.
864 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
866 * UDP Packet: Indicates that the packet was IP
867 * and UDP. This indicates that the
868 * payload_offset field is valid.
870 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
872 * FCoE Packet: Indicates that the packet was
873 * recognized as a FCoE. This also indicates
874 * that the payload_offset field is valid.
876 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
878 * RoCE Packet: Indicates that the packet was
879 * recognized as a RoCE. This also indicates
880 * that the payload_offset field is valid.
882 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
884 * ICMP Packet: Indicates that the packet was
885 * recognized as ICMP. This indicates that the
886 * payload_offset field is valid.
888 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
890 * PtP packet wo/timestamp: Indicates that the
891 * packet was recognized as a PtP packet.
893 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
895 * PtP packet w/timestamp: Indicates that the
896 * packet was recognized as a PtP packet and
897 * that a timestamp was taken for the packet.
899 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
900 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
901 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
902 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
903 #define RX_PKT_CMPL_FLAGS_SFT 6
906 * This is the length of the data for the packet stored in the
907 * buffer(s) identified by the opaque value. This includes the
908 * packet BD and any associated buffer BDs. This does not
909 * include the the length of any data places in aggregation BDs.
913 * This is a copy of the opaque field from the RX BD this
914 * completion corresponds to.
919 * This value is written by the NIC such that it will be
920 * different for each pass through the completion queue. The
921 * even passes will write 1. The odd passes will write 0.
923 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
925 * This value is the number of aggregation buffers that follow
926 * this entry in the completion ring that are a part of this
927 * packet. If the value is zero, then the packet is completely
928 * contained in the buffer space provided for the packet in the
931 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
932 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
934 uint8_t rss_hash_type;
936 * This is the RSS hash type for the packet. The value is packed
937 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
938 * . The value of tuple_extrac_op provides the information about
939 * what fields the hash was computed on. * 0: The RSS hash was
940 * computed over source IP address, destination IP address,
941 * source port, and destination port of inner IP and TCP or UDP
942 * headers. Note: For non-tunneled packets, the packet headers
943 * are considered inner packet headers for the RSS hash
944 * computation purpose. * 1: The RSS hash was computed over
945 * source IP address and destination IP address of inner IP
946 * header. Note: For non-tunneled packets, the packet headers
947 * are considered inner packet headers for the RSS hash
948 * computation purpose. * 2: The RSS hash was computed over
949 * source IP address, destination IP address, source port, and
950 * destination port of IP and TCP or UDP headers of outer tunnel
951 * headers. Note: For non-tunneled packets, this value is not
952 * applicable. * 3: The RSS hash was computed over source IP
953 * address and destination IP address of IP header of outer
954 * tunnel headers. Note: For non-tunneled packets, this value is
955 * not applicable. Note that 4-tuples values listed above are
956 * applicable for layer 4 protocols supported and enabled for
957 * RSS in the hardware, HWRM firmware, and drivers. For example,
958 * if RSS hash is supported and enabled for TCP traffic only,
959 * then the values of tuple_extract_op corresponding to 4-tuples
960 * are only valid for TCP traffic.
962 uint8_t payload_offset;
964 * This value indicates the offset in bytes from the beginning
965 * of the packet where the inner payload starts. This value is
966 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
967 * indicates that header is 256B into the packet.
973 * This value is the RSS hash value calculated for the packet
974 * based on the mode bits and key value in the VNIC.
976 } __attribute__((packed));
978 /* last 16 bytes of RX Packet Completion Record */
979 struct rx_pkt_cmpl_hi {
982 * This indicates that the ip checksum was calculated for the
983 * inner packet and that the ip_cs_error field indicates if
984 * there was an error.
986 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
988 * This indicates that the TCP, UDP or ICMP checksum was
989 * calculated for the inner packet and that the l4_cs_error
990 * field indicates if there was an error.
992 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
994 * This indicates that the ip checksum was calculated for the
995 * tunnel header and that the t_ip_cs_error field indicates if
996 * there was an error.
998 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1000 * This indicates that the UDP checksum was calculated for the
1001 * tunnel packet and that the t_l4_cs_error field indicates if
1002 * there was an error.
1004 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1005 /* This value indicates what format the metadata field is. */
1006 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1007 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
1008 /* No metadata informtaion. Value is zero. */
1009 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1011 * The metadata field contains the VLAN tag and
1012 * TPID value. - metadata[11:0] contains the
1013 * vlan VID value. - metadata[12] contains the
1014 * vlan DE value. - metadata[15:13] contains the
1015 * vlan PRI value. - metadata[31:16] contains
1016 * the vlan TPID value.
1018 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1019 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
1020 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
1022 * This field indicates the IP type for the inner-most IP
1023 * header. A value of '0' indicates IPv4. A value of '1'
1024 * indicates IPv6. This value is only valid if itype indicates a
1025 * packet with an IP header.
1027 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1030 * This is data from the CFA block as indicated by the
1031 * meta_format field.
1033 /* When meta_format=1, this value is the VLAN VID. */
1034 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1035 #define RX_PKT_CMPL_METADATA_VID_SFT 0
1036 /* When meta_format=1, this value is the VLAN DE. */
1037 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
1038 /* When meta_format=1, this value is the VLAN PRI. */
1039 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1040 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
1041 /* When meta_format=1, this value is the VLAN TPID. */
1042 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1043 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
1046 * This value is written by the NIC such that it will be
1047 * different for each pass through the completion queue. The
1048 * even passes will write 1. The odd passes will write 0.
1050 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
1052 * This error indicates that there was some sort of problem with
1053 * the BDs for the packet that was found after part of the
1054 * packet was already placed. The packet should be treated as
1057 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1058 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1059 /* No buffer error */
1060 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
1062 * Did Not Fit: Packet did not fit into packet
1063 * buffer provided. For regular placement, this
1064 * means the packet did not fit in the buffer
1065 * provided. For HDS and jumbo placement, this
1066 * means that the packet could not be placed
1067 * into 7 physical buffers or less.
1069 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
1070 (UINT32_C(0x1) << 1)
1072 * Not On Chip: All BDs needed for the packet
1073 * were not on-chip when the packet arrived.
1075 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1076 (UINT32_C(0x2) << 1)
1077 /* Bad Format: BDs were not formatted correctly. */
1078 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
1079 (UINT32_C(0x3) << 1)
1080 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
1081 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1082 /* This indicates that there was an error in the IP header checksum. */
1083 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1085 * This indicates that there was an error in the TCP, UDP or
1088 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1090 * This indicates that there was an error in the tunnel IP
1093 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1095 * This indicates that there was an error in the tunnel UDP
1098 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1100 * This indicates that there was a CRC error on either an FCoE
1101 * or RoCE packet. The itype indicates the packet type.
1103 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1105 * This indicates that there was an error in the tunnel portion
1106 * of the packet when this field is non-zero.
1108 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1109 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1111 * No additional error occurred on the tunnel
1112 * portion of the packet of the packet does not
1115 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1117 * Indicates that IP header version does not
1118 * match expectation from L2 Ethertype for IPv4
1119 * and IPv6 in the tunnel header.
1121 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
1122 (UINT32_C(0x1) << 9)
1124 * Indicates that header length is out of range
1125 * in the tunnel header. Valid for IPv4.
1127 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
1128 (UINT32_C(0x2) << 9)
1130 * Indicates that the physical packet is shorter
1131 * than that claimed by the PPPoE header length
1132 * for a tunnel PPPoE packet.
1134 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
1135 (UINT32_C(0x3) << 9)
1137 * Indicates that physical packet is shorter
1138 * than that claimed by the tunnel l3 header
1139 * length. Valid for IPv4, or IPv6 tunnel packet
1142 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1143 (UINT32_C(0x4) << 9)
1145 * Indicates that the physical packet is shorter
1146 * than that claimed by the tunnel UDP header
1147 * length for a tunnel UDP packet that is not
1150 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1151 (UINT32_C(0x5) << 9)
1153 * indicates that the IPv4 TTL or IPv6 hop limit
1154 * check have failed (e.g. TTL = 0) in the
1155 * tunnel header. Valid for IPv4, and IPv6.
1157 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1158 (UINT32_C(0x6) << 9)
1159 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1160 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1162 * This indicates that there was an error in the inner portion
1163 * of the packet when this field is non-zero.
1165 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1166 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1168 * No additional error occurred on the tunnel
1169 * portion of the packet of the packet does not
1172 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1174 * Indicates that IP header version does not
1175 * match expectation from L2 Ethertype for IPv4
1176 * and IPv6 or that option other than VFT was
1177 * parsed on FCoE packet.
1179 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1180 (UINT32_C(0x1) << 12)
1182 * indicates that header length is out of range.
1183 * Valid for IPv4 and RoCE
1185 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1186 (UINT32_C(0x2) << 12)
1188 * indicates that the IPv4 TTL or IPv6 hop limit
1189 * check have failed (e.g. TTL = 0). Valid for
1192 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1194 * Indicates that physical packet is shorter
1195 * than that claimed by the l3 header length.
1196 * Valid for IPv4, IPv6 packet or RoCE packets.
1198 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1199 (UINT32_C(0x4) << 12)
1201 * Indicates that the physical packet is shorter
1202 * than that claimed by the UDP header length
1203 * for a UDP packet that is not fragmented.
1205 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1206 (UINT32_C(0x5) << 12)
1208 * Indicates that TCP header length > IP
1209 * payload. Valid for TCP packets only.
1211 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1212 (UINT32_C(0x6) << 12)
1213 /* Indicates that TCP header length < 5. Valid for TCP. */
1214 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1215 (UINT32_C(0x7) << 12)
1217 * Indicates that TCP option headers result in a
1218 * TCP header size that does not match data
1219 * offset in TCP header. Valid for TCP.
1221 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1222 (UINT32_C(0x8) << 12)
1223 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1224 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1225 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1226 #define RX_PKT_CMPL_ERRORS_SFT 1
1229 * This field identifies the CFA action rule that was used for
1234 * This value holds the reordering sequence number for the
1235 * packet. If the reordering sequence is not valid, then this
1236 * value is zero. The reordering domain for the packet is in the
1237 * bottom 8 to 10b of the rss_hash value. The bottom 20b of this
1238 * value contain the ordering domain value for the packet.
1240 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1241 #define RX_PKT_CMPL_REORDER_SFT 0
1242 } __attribute__((packed));
1244 /* RX L2 TPA Start Completion Record (32 bytes split to 2 16-byte struct) */
1245 struct rx_tpa_start_cmpl {
1246 uint16_t flags_type;
1248 * This field indicates the exact type of the completion. By
1249 * convention, the LSB identifies the length of the record in
1250 * 16B units. Even values indicate 16B records. Odd values
1251 * indicate 32B records.
1253 #define RX_TPA_START_CMPL_TYPE_MASK UINT32_C(0x3f)
1254 #define RX_TPA_START_CMPL_TYPE_SFT 0
1256 * RX L2 TPA Start Completion: Completion at the
1257 * beginning of a TPA operation. Length = 32B
1259 #define RX_TPA_START_CMPL_TYPE_RX_TPA_START UINT32_C(0x13)
1260 /* This bit will always be '0' for TPA start completions. */
1261 #define RX_TPA_START_CMPL_FLAGS_ERROR UINT32_C(0x40)
1262 /* This field indicates how the packet was placed in the buffer. */
1263 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1264 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_SFT 7
1266 * Jumbo: TPA Packet was placed using jumbo
1267 * algorithm. This means that the first buffer
1268 * will be filled with data before moving to
1269 * aggregation buffers. Each aggregation buffer
1270 * will be filled before moving to the next
1271 * aggregation buffer.
1273 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1275 * Header/Data Separation: Packet was placed
1276 * using Header/Data separation algorithm. The
1277 * separation location is indicated by the itype
1280 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1282 * GRO/Jumbo: Packet will be placed using
1283 * GRO/Jumbo where the first packet is filled
1284 * with data. Subsequent packets will be placed
1285 * such that any one packet does not span two
1286 * aggregation buffers unless it starts at the
1287 * beginning of an aggregation buffer.
1289 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_JUMBO \
1290 (UINT32_C(0x5) << 7)
1292 * GRO/Header-Data Separation: Packet will be
1293 * placed using GRO/HDS where the header is in
1294 * the first packet. Payload of each packet will
1295 * be placed such that any one packet does not
1296 * span two aggregation buffers unless it starts
1297 * at the beginning of an aggregation buffer.
1299 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1300 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_LAST \
1301 RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS
1302 /* This bit is '1' if the RSS field in this completion is valid. */
1303 #define RX_TPA_START_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
1305 #define RX_TPA_START_CMPL_FLAGS_UNUSED UINT32_C(0x800)
1307 * This value indicates what the inner packet determined for the
1310 #define RX_TPA_START_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1311 #define RX_TPA_START_CMPL_FLAGS_ITYPE_SFT 12
1312 /* TCP Packet: Indicates that the packet was IP and TCP. */
1313 #define RX_TPA_START_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
1314 #define RX_TPA_START_CMPL_FLAGS_ITYPE_LAST \
1315 RX_TPA_START_CMPL_FLAGS_ITYPE_TCP
1316 #define RX_TPA_START_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1317 #define RX_TPA_START_CMPL_FLAGS_SFT 6
1320 * This value indicates the amount of packet data written to the
1321 * buffer the opaque field in this completion corresponds to.
1325 * This is a copy of the opaque field from the RX BD this
1326 * completion corresponds to.
1329 /* unused1 is 7 b */
1331 * This value is written by the NIC such that it will be
1332 * different for each pass through the completion queue. The
1333 * even passes will write 1. The odd passes will write 0.
1335 #define RX_TPA_START_CMPL_V1 UINT32_C(0x1)
1336 /* unused1 is 7 b */
1337 uint8_t rss_hash_type;
1339 * This is the RSS hash type for the packet. The value is packed
1340 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
1341 * . The value of tuple_extrac_op provides the information about
1342 * what fields the hash was computed on. * 0: The RSS hash was
1343 * computed over source IP address, destination IP address,
1344 * source port, and destination port of inner IP and TCP or UDP
1345 * headers. Note: For non-tunneled packets, the packet headers
1346 * are considered inner packet headers for the RSS hash
1347 * computation purpose. * 1: The RSS hash was computed over
1348 * source IP address and destination IP address of inner IP
1349 * header. Note: For non-tunneled packets, the packet headers
1350 * are considered inner packet headers for the RSS hash
1351 * computation purpose. * 2: The RSS hash was computed over
1352 * source IP address, destination IP address, source port, and
1353 * destination port of IP and TCP or UDP headers of outer tunnel
1354 * headers. Note: For non-tunneled packets, this value is not
1355 * applicable. * 3: The RSS hash was computed over source IP
1356 * address and destination IP address of IP header of outer
1357 * tunnel headers. Note: For non-tunneled packets, this value is
1358 * not applicable. Note that 4-tuples values listed above are
1359 * applicable for layer 4 protocols supported and enabled for
1360 * RSS in the hardware, HWRM firmware, and drivers. For example,
1361 * if RSS hash is supported and enabled for TCP traffic only,
1362 * then the values of tuple_extract_op corresponding to 4-tuples
1363 * are only valid for TCP traffic.
1367 * This is the aggregation ID that the completion is associated
1368 * with. Use this number to correlate the TPA start completion
1369 * with the TPA end completion.
1371 /* unused2 is 9 b */
1373 * This is the aggregation ID that the completion is associated
1374 * with. Use this number to correlate the TPA start completion
1375 * with the TPA end completion.
1377 #define RX_TPA_START_CMPL_AGG_ID_MASK UINT32_C(0xfe00)
1378 #define RX_TPA_START_CMPL_AGG_ID_SFT 9
1381 * This value is the RSS hash value calculated for the packet
1382 * based on the mode bits and key value in the VNIC.
1384 } __attribute__((packed));
1386 /* last 16 bytes of RX L2 TPA Start Completion Record */
1387 struct rx_tpa_start_cmpl_hi {
1390 * This indicates that the ip checksum was calculated for the
1391 * inner packet and that the sum passed for all segments
1392 * included in the aggregation.
1394 #define RX_TPA_START_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
1396 * This indicates that the TCP, UDP or ICMP checksum was
1397 * calculated for the inner packet and that the sum passed for
1398 * all segments included in the aggregation.
1400 #define RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
1402 * This indicates that the ip checksum was calculated for the
1403 * tunnel header and that the sum passed for all segments
1404 * included in the aggregation.
1406 #define RX_TPA_START_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1408 * This indicates that the UDP checksum was calculated for the
1409 * tunnel packet and that the sum passed for all segments
1410 * included in the aggregation.
1412 #define RX_TPA_START_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1413 /* This value indicates what format the metadata field is. */
1414 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1415 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
1416 /* No metadata informtaion. Value is zero. */
1417 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1419 * The metadata field contains the VLAN tag and
1420 * TPID value. - metadata[11:0] contains the
1421 * vlan VID value. - metadata[12] contains the
1422 * vlan DE value. - metadata[15:13] contains the
1423 * vlan PRI value. - metadata[31:16] contains
1424 * the vlan TPID value.
1426 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1427 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_LAST \
1428 RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN
1430 * This field indicates the IP type for the inner-most IP
1431 * header. A value of '0' indicates IPv4. A value of '1'
1434 #define RX_TPA_START_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1437 * This is data from the CFA block as indicated by the
1438 * meta_format field.
1440 /* When meta_format=1, this value is the VLAN VID. */
1441 #define RX_TPA_START_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1442 #define RX_TPA_START_CMPL_METADATA_VID_SFT 0
1443 /* When meta_format=1, this value is the VLAN DE. */
1444 #define RX_TPA_START_CMPL_METADATA_DE UINT32_C(0x1000)
1445 /* When meta_format=1, this value is the VLAN PRI. */
1446 #define RX_TPA_START_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1447 #define RX_TPA_START_CMPL_METADATA_PRI_SFT 13
1448 /* When meta_format=1, this value is the VLAN TPID. */
1449 #define RX_TPA_START_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1450 #define RX_TPA_START_CMPL_METADATA_TPID_SFT 16
1452 /* unused4 is 15 b */
1454 * This value is written by the NIC such that it will be
1455 * different for each pass through the completion queue. The
1456 * even passes will write 1. The odd passes will write 0.
1458 #define RX_TPA_START_CMPL_V2 UINT32_C(0x1)
1459 /* unused4 is 15 b */
1462 * This field identifies the CFA action rule that was used for
1465 uint32_t inner_l4_size_inner_l3_offset_inner_l2_offset_outer_l3_offset;
1467 * This is the size in bytes of the inner most L4 header. This
1468 * can be subtracted from the payload_offset to determine the
1469 * start of the inner most L4 header.
1472 * This is the offset from the beginning of the packet in bytes
1473 * for the outer L3 header. If there is no outer L3 header, then
1474 * this value is zero.
1476 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_MASK UINT32_C(0x1ff)
1477 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_SFT 0
1479 * This is the offset from the beginning of the packet in bytes
1480 * for the inner most L2 header.
1482 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_MASK UINT32_C(0x3fe00)
1483 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_SFT 9
1485 * This is the offset from the beginning of the packet in bytes
1486 * for the inner most L3 header.
1488 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_MASK UINT32_C(0x7fc0000)
1489 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_SFT 18
1491 * This is the size in bytes of the inner most L4 header. This
1492 * can be subtracted from the payload_offset to determine the
1493 * start of the inner most L4 header.
1495 #define RX_TPA_START_CMPL_INNER_L4_SIZE_MASK UINT32_C(0xf8000000)
1496 #define RX_TPA_START_CMPL_INNER_L4_SIZE_SFT 27
1497 } __attribute__((packed));
1499 /* RX TPA End Completion Record (32 bytes split to 2 16-byte struct) */
1500 struct rx_tpa_end_cmpl {
1501 uint16_t flags_type;
1503 * This field indicates the exact type of the completion. By
1504 * convention, the LSB identifies the length of the record in
1505 * 16B units. Even values indicate 16B records. Odd values
1506 * indicate 32B records.
1508 #define RX_TPA_END_CMPL_TYPE_MASK UINT32_C(0x3f)
1509 #define RX_TPA_END_CMPL_TYPE_SFT 0
1511 * RX L2 TPA End Completion: Completion at the
1512 * end of a TPA operation. Length = 32B
1514 #define RX_TPA_END_CMPL_TYPE_RX_TPA_END UINT32_C(0x15)
1516 * When this bit is '1', it indicates a packet that has an error
1517 * of some type. Type of error is indicated in error_flags.
1519 #define RX_TPA_END_CMPL_FLAGS_ERROR UINT32_C(0x40)
1520 /* This field indicates how the packet was placed in the buffer. */
1521 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1522 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_SFT 7
1524 * Jumbo: TPA Packet was placed using jumbo
1525 * algorithm. This means that the first buffer
1526 * will be filled with data before moving to
1527 * aggregation buffers. Each aggregation buffer
1528 * will be filled before moving to the next
1529 * aggregation buffer.
1531 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1533 * Header/Data Separation: Packet was placed
1534 * using Header/Data separation algorithm. The
1535 * separation location is indicated by the itype
1538 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1540 * GRO/Jumbo: Packet will be placed using
1541 * GRO/Jumbo where the first packet is filled
1542 * with data. Subsequent packets will be placed
1543 * such that any one packet does not span two
1544 * aggregation buffers unless it starts at the
1545 * beginning of an aggregation buffer.
1547 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_JUMBO (UINT32_C(0x5) << 7)
1549 * GRO/Header-Data Separation: Packet will be
1550 * placed using GRO/HDS where the header is in
1551 * the first packet. Payload of each packet will
1552 * be placed such that any one packet does not
1553 * span two aggregation buffers unless it starts
1554 * at the beginning of an aggregation buffer.
1556 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1557 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_LAST \
1558 RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS
1560 #define RX_TPA_END_CMPL_FLAGS_UNUSED_MASK UINT32_C(0xc00)
1561 #define RX_TPA_END_CMPL_FLAGS_UNUSED_SFT 10
1563 * This value indicates what the inner packet determined for the
1564 * packet was. - 2 TCP Packet Indicates that the packet was IP
1565 * and TCP. This indicates that the ip_cs field is valid and
1566 * that the tcp_udp_cs field is valid and contains the TCP
1567 * checksum. This also indicates that the payload_offset field
1570 #define RX_TPA_END_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1571 #define RX_TPA_END_CMPL_FLAGS_ITYPE_SFT 12
1572 #define RX_TPA_END_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1573 #define RX_TPA_END_CMPL_FLAGS_SFT 6
1576 * This value is zero for TPA End completions. There is no data
1577 * in the buffer that corresponds to the opaque value in this
1582 * This is a copy of the opaque field from the RX BD this
1583 * completion corresponds to.
1585 uint8_t agg_bufs_v1;
1586 /* unused1 is 1 b */
1588 * This value is written by the NIC such that it will be
1589 * different for each pass through the completion queue. The
1590 * even passes will write 1. The odd passes will write 0.
1592 #define RX_TPA_END_CMPL_V1 UINT32_C(0x1)
1594 * This value is the number of aggregation buffers that follow
1595 * this entry in the completion ring that are a part of this
1596 * aggregation packet. If the value is zero, then the packet is
1597 * completely contained in the buffer space provided in the
1598 * aggregation start completion.
1600 #define RX_TPA_END_CMPL_AGG_BUFS_MASK UINT32_C(0x7e)
1601 #define RX_TPA_END_CMPL_AGG_BUFS_SFT 1
1602 /* unused1 is 1 b */
1604 /* This value is the number of segments in the TPA operation. */
1605 uint8_t payload_offset;
1607 * This value indicates the offset in bytes from the beginning
1608 * of the packet where the inner payload starts. This value is
1609 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
1610 * indicates an offset of 256 bytes.
1614 * This is the aggregation ID that the completion is associated
1615 * with. Use this number to correlate the TPA start completion
1616 * with the TPA end completion.
1618 /* unused2 is 1 b */
1620 * This is the aggregation ID that the completion is associated
1621 * with. Use this number to correlate the TPA start completion
1622 * with the TPA end completion.
1624 #define RX_TPA_END_CMPL_AGG_ID_MASK UINT32_C(0xfe)
1625 #define RX_TPA_END_CMPL_AGG_ID_SFT 1
1628 * For non-GRO packets, this value is the timestamp delta
1629 * between earliest and latest timestamp values for TPA packet.
1630 * If packets were not time stamped, then delta will be zero.
1631 * For GRO packets, this field is zero except for the following
1632 * sub-fields. - tsdelta[31] Timestamp present indication. When
1633 * '0', no Timestamp option is in the packet. When '1', then a
1634 * Timestamp option is present in the packet.
1636 } __attribute__((packed));
1638 /* last 16 bytes of RX TPA End Completion Record */
1639 struct rx_tpa_end_cmpl_hi {
1640 uint32_t tpa_dup_acks;
1641 /* unused3 is 28 b */
1643 * This value is the number of duplicate ACKs that have been
1644 * received as part of the TPA operation.
1646 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_MASK UINT32_C(0xf)
1647 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_SFT 0
1648 /* unused3 is 28 b */
1649 uint16_t tpa_seg_len;
1651 * This value is the valid when TPA completion is active. It
1652 * indicates the length of the longest segment of the TPA
1653 * operation for LRO mode and the length of the first segment in
1654 * GRO mode. This value may be used by GRO software to re-
1655 * construct the original packet stream from the TPA packet.
1656 * This is the length of all but the last segment for GRO. In
1657 * LRO mode this value may be used to indicate MSS size to the
1661 /* unused4 is 16 b */
1664 * This value is written by the NIC such that it will be
1665 * different for each pass through the completion queue. The
1666 * even passes will write 1. The odd passes will write 0.
1668 #define RX_TPA_END_CMPL_V2 UINT32_C(0x1)
1670 * This error indicates that there was some sort of problem with
1671 * the BDs for the packet that was found after part of the
1672 * packet was already placed. The packet should be treated as
1675 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1676 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1678 * This error occurs when there is a fatal HW
1679 * problem in the chip only. It indicates that
1680 * there were not BDs on chip but that there was
1681 * adequate reservation. provided by the TPA
1684 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1685 (UINT32_C(0x2) << 1)
1687 * This error occurs when TPA block was not
1688 * configured to reserve adequate BDs for TPA
1689 * operations on this RX ring. All data for the
1690 * TPA operation was not placed. This error can
1691 * also be generated when the number of segments
1692 * is not programmed correctly in TPA and the 33
1693 * total aggregation buffers allowed for the TPA
1694 * operation has been exceeded.
1696 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR \
1697 (UINT32_C(0x4) << 1)
1698 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_LAST \
1699 RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR
1700 #define RX_TPA_END_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1701 #define RX_TPA_END_CMPL_ERRORS_SFT 1
1703 /* unused5 is 16 b */
1704 uint32_t start_opaque;
1706 * This is the opaque value that was completed for the TPA start
1707 * completion that corresponds to this TPA end completion.
1709 } __attribute__((packed));
1711 /* HWRM Forwarded Request (16 bytes) */
1712 struct hwrm_fwd_req_cmpl {
1713 uint16_t req_len_type;
1714 /* Length of forwarded request in bytes. */
1716 * This field indicates the exact type of the completion. By
1717 * convention, the LSB identifies the length of the record in
1718 * 16B units. Even values indicate 16B records. Odd values
1719 * indicate 32B records.
1721 #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f)
1722 #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0
1723 /* Forwarded HWRM Request */
1724 #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22)
1725 /* Length of forwarded request in bytes. */
1726 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1727 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1730 * Source ID of this request. Typically used in forwarding
1731 * requests and responses. 0x0 - 0xFFF8 - Used for function ids
1732 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
1736 /* unused1 is 32 b */
1737 uint32_t req_buf_addr_v[2];
1738 /* Address of forwarded request. */
1740 * This value is written by the NIC such that it will be
1741 * different for each pass through the completion queue. The
1742 * even passes will write 1. The odd passes will write 0.
1744 #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1)
1745 /* Address of forwarded request. */
1746 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1747 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1748 } __attribute__((packed));
1750 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1751 struct hwrm_async_event_cmpl {
1753 /* unused1 is 10 b */
1755 * This field indicates the exact type of the completion. By
1756 * convention, the LSB identifies the length of the record in
1757 * 16B units. Even values indicate 16B records. Odd values
1758 * indicate 32B records.
1760 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1761 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1762 /* HWRM Asynchronous Event Information */
1763 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1764 /* unused1 is 10 b */
1766 /* Identifiers of events. */
1767 /* Link status changed */
1768 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1769 /* Link MTU changed */
1770 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1771 /* Link speed changed */
1772 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1773 /* DCB Configuration changed */
1774 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1775 /* Port connection not allowed */
1776 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1777 /* Link speed configuration was not allowed */
1778 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1780 /* Link speed configuration change */
1781 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1782 /* Port PHY configuration change */
1783 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1784 /* Function driver unloaded */
1785 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1786 /* Function driver loaded */
1787 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1788 /* Function FLR related processing has completed */
1789 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1790 /* PF driver unloaded */
1791 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1792 /* PF driver loaded */
1793 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1794 /* VF Function Level Reset (FLR) */
1795 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1796 /* VF MAC Address Change */
1797 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1798 /* PF-VF communication channel status change. */
1799 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1801 /* VF Configuration Change */
1802 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1804 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1805 uint32_t event_data2;
1806 /* Event specific data */
1810 * This value is written by the NIC such that it will be
1811 * different for each pass through the completion queue. The
1812 * even passes will write 1. The odd passes will write 0.
1814 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1816 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1817 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1818 uint8_t timestamp_lo;
1819 /* 8-lsb timestamp from POR (100-msec resolution) */
1820 uint16_t timestamp_hi;
1821 /* 16-lsb timestamp from POR (100-msec resolution) */
1822 uint32_t event_data1;
1823 /* Event specific data */
1824 } __attribute__((packed));
1828 * Description: This function is called by a driver to determine the HWRM
1829 * interface version supported by the HWRM firmware, the version of HWRM
1830 * firmware implementation, the name of HWRM firmware, the versions of other
1831 * embedded firmwares, and the names of other embedded firmwares, etc. Any
1832 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
1833 * be considered an invalid version.
1835 /* Input (24 bytes) */
1836 struct hwrm_ver_get_input {
1839 * This value indicates what type of request this is. The format
1840 * for the rest of the command is determined by this field.
1844 * This value indicates the what completion ring the request
1845 * will be optionally completed on. If the value is -1, then no
1846 * CR completion will be generated. Any other value must be a
1847 * valid CR ring_id value for this function.
1850 /* This value indicates the command sequence number. */
1853 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1854 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1859 * This is the host address where the response will be written
1860 * when the request is complete. This area must be 16B aligned
1861 * and must be cleared to zero before the request is made.
1863 uint8_t hwrm_intf_maj;
1865 * This field represents the major version of HWRM interface
1866 * specification supported by the driver HWRM implementation.
1867 * The interface major version is intended to change only when
1868 * non backward compatible changes are made to the HWRM
1869 * interface specification.
1871 uint8_t hwrm_intf_min;
1873 * This field represents the minor version of HWRM interface
1874 * specification supported by the driver HWRM implementation. A
1875 * change in interface minor version is used to reflect
1876 * significant backward compatible modification to HWRM
1877 * interface specification. This can be due to addition or
1878 * removal of functionality. HWRM interface specifications with
1879 * the same major version but different minor versions are
1882 uint8_t hwrm_intf_upd;
1884 * This field represents the update version of HWRM interface
1885 * specification supported by the driver HWRM implementation.
1886 * The interface update version is used to reflect minor changes
1887 * or bug fixes to a released HWRM interface specification.
1889 uint8_t unused_0[5];
1890 } __attribute__((packed));
1892 /* Output (128 bytes) */
1893 struct hwrm_ver_get_output {
1894 uint16_t error_code;
1896 * Pass/Fail or error type Note: receiver to verify the in
1897 * parameters, and fail the call with an error when appropriate
1900 /* This field returns the type of original request. */
1902 /* This field provides original sequence number of the command. */
1905 * This field is the length of the response in bytes. The last
1906 * byte of the response is a valid flag that will read as '1'
1907 * when the command has been completely written to memory.
1909 uint8_t hwrm_intf_maj;
1911 * This field represents the major version of HWRM interface
1912 * specification supported by the HWRM implementation. The
1913 * interface major version is intended to change only when non
1914 * backward compatible changes are made to the HWRM interface
1915 * specification. A HWRM implementation that is compliant with
1916 * this specification shall provide value of 1 in this field.
1918 uint8_t hwrm_intf_min;
1920 * This field represents the minor version of HWRM interface
1921 * specification supported by the HWRM implementation. A change
1922 * in interface minor version is used to reflect significant
1923 * backward compatible modification to HWRM interface
1924 * specification. This can be due to addition or removal of
1925 * functionality. HWRM interface specifications with the same
1926 * major version but different minor versions are compatible. A
1927 * HWRM implementation that is compliant with this specification
1928 * shall provide value of 2 in this field.
1930 uint8_t hwrm_intf_upd;
1932 * This field represents the update version of HWRM interface
1933 * specification supported by the HWRM implementation. The
1934 * interface update version is used to reflect minor changes or
1935 * bug fixes to a released HWRM interface specification. A HWRM
1936 * implementation that is compliant with this specification
1937 * shall provide value of 2 in this field.
1939 uint8_t hwrm_intf_rsvd;
1940 uint8_t hwrm_fw_maj;
1942 * This field represents the major version of HWRM firmware. A
1943 * change in firmware major version represents a major firmware
1946 uint8_t hwrm_fw_min;
1948 * This field represents the minor version of HWRM firmware. A
1949 * change in firmware minor version represents significant
1950 * firmware functionality changes.
1952 uint8_t hwrm_fw_bld;
1954 * This field represents the build version of HWRM firmware. A
1955 * change in firmware build version represents bug fixes to a
1956 * released firmware.
1958 uint8_t hwrm_fw_rsvd;
1960 * This field is a reserved field. This field can be used to
1961 * represent firmware branches or customer specific releases
1962 * tied to a specific (major,minor,update) version of the HWRM
1965 uint8_t mgmt_fw_maj;
1967 * This field represents the major version of mgmt firmware. A
1968 * change in major version represents a major release.
1970 uint8_t mgmt_fw_min;
1972 * This field represents the minor version of mgmt firmware. A
1973 * change in minor version represents significant functionality
1976 uint8_t mgmt_fw_bld;
1978 * This field represents the build version of mgmt firmware. A
1979 * change in update version represents bug fixes.
1981 uint8_t mgmt_fw_rsvd;
1983 * This field is a reserved field. This field can be used to
1984 * represent firmware branches or customer specific releases
1985 * tied to a specific (major,minor,update) version
1987 uint8_t netctrl_fw_maj;
1989 * This field represents the major version of network control
1990 * firmware. A change in major version represents a major
1993 uint8_t netctrl_fw_min;
1995 * This field represents the minor version of network control
1996 * firmware. A change in minor version represents significant
1997 * functionality changes.
1999 uint8_t netctrl_fw_bld;
2001 * This field represents the build version of network control
2002 * firmware. A change in update version represents bug fixes.
2004 uint8_t netctrl_fw_rsvd;
2006 * This field is a reserved field. This field can be used to
2007 * represent firmware branches or customer specific releases
2008 * tied to a specific (major,minor,update) version
2010 uint32_t dev_caps_cfg;
2012 * This field is used to indicate device's capabilities and
2016 * If set to 1, then secure firmware update behavior is
2017 * supported. If set to 0, then secure firmware update behavior
2020 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED \
2023 * If set to 1, then firmware based DCBX agent is supported. If
2024 * set to 0, then firmware based DCBX agent capability is not
2025 * supported on this device.
2027 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED \
2030 * If set to 1, then HWRM short command format is supported. If
2031 * set to 0, then HWRM short command format is not supported.
2033 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED \
2036 * If set to 1, then HWRM short command format is required. If
2037 * set to 0, then HWRM short command format is not required.
2039 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_INPUTUIRED \
2041 uint8_t roce_fw_maj;
2043 * This field represents the major version of RoCE firmware. A
2044 * change in major version represents a major release.
2046 uint8_t roce_fw_min;
2048 * This field represents the minor version of RoCE firmware. A
2049 * change in minor version represents significant functionality
2052 uint8_t roce_fw_bld;
2054 * This field represents the build version of RoCE firmware. A
2055 * change in update version represents bug fixes.
2057 uint8_t roce_fw_rsvd;
2059 * This field is a reserved field. This field can be used to
2060 * represent firmware branches or customer specific releases
2061 * tied to a specific (major,minor,update) version
2063 char hwrm_fw_name[16];
2065 * This field represents the name of HWRM FW (ASCII chars with
2068 char mgmt_fw_name[16];
2070 * This field represents the name of mgmt FW (ASCII chars with
2073 char netctrl_fw_name[16];
2075 * This field represents the name of network control firmware
2076 * (ASCII chars with NULL at the end).
2078 uint32_t reserved2[4];
2080 * This field is reserved for future use. The responder should
2081 * set it to 0. The requester should ignore this field.
2083 char roce_fw_name[16];
2085 * This field represents the name of RoCE FW (ASCII chars with
2089 /* This field returns the chip number. */
2091 /* This field returns the revision of chip. */
2093 /* This field returns the chip metal number. */
2094 uint8_t chip_bond_id;
2095 /* This field returns the bond id of the chip. */
2096 uint8_t chip_platform_type;
2098 * This value indicates the type of platform used for chip
2102 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
2103 /* FPGA platform of the chip. */
2104 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
2105 /* Palladium platform of the chip. */
2106 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
2107 uint16_t max_req_win_len;
2109 * This field returns the maximum value of request window that
2110 * is supported by the HWRM. The request window is mapped into
2111 * device address space using MMIO.
2113 uint16_t max_resp_len;
2114 /* This field returns the maximum value of response buffer in bytes. */
2115 uint16_t def_req_timeout;
2117 * This field returns the default request timeout value in
2125 * This field is used in Output records to indicate that the
2126 * output is completely written to RAM. This field should be
2127 * read as '1' to indicate that the output has been completely
2128 * written. When writing a command completion or response to an
2129 * internal processor, the order of writes has to be such that
2130 * this field is written last.
2132 } __attribute__((packed));
2134 /* hwrm_func_reset */
2136 * Description: This command resets a hardware function (PCIe function) and
2137 * frees any resources used by the function. This command shall be initiated by
2138 * the driver after an FLR has occurred to prepare the function for re-use. This
2139 * command may also be initiated by a driver prior to doing it's own
2140 * configuration. This command puts the function into the reset state. In the
2141 * reset state, global and port related features of the chip are not available.
2144 * Note: This command will reset a function that has already been disabled or
2145 * idled. The command returns all the resources owned by the function so a new
2146 * driver may allocate and configure resources normally.
2148 /* Input (24 bytes) */
2149 struct hwrm_func_reset_input {
2152 * This value indicates what type of request this is. The format
2153 * for the rest of the command is determined by this field.
2157 * This value indicates the what completion ring the request
2158 * will be optionally completed on. If the value is -1, then no
2159 * CR completion will be generated. Any other value must be a
2160 * valid CR ring_id value for this function.
2163 /* This value indicates the command sequence number. */
2166 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2167 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2172 * This is the host address where the response will be written
2173 * when the request is complete. This area must be 16B aligned
2174 * and must be cleared to zero before the request is made.
2177 /* This bit must be '1' for the vf_id_valid field to be configured. */
2178 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
2181 * The ID of the VF that this PF is trying to reset. Only the
2182 * parent PF shall be allowed to reset a child VF. A parent PF
2183 * driver shall use this field only when a specific child VF is
2184 * requested to be reset.
2186 uint8_t func_reset_level;
2187 /* This value indicates the level of a function reset. */
2189 * Reset the caller function and its children
2190 * VFs (if any). If no children functions exist,
2191 * then reset the caller function only.
2193 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
2194 /* Reset the caller function only */
2195 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1)
2197 * Reset all children VFs of the caller function
2198 * driver if the caller is a PF driver. It is an
2199 * error to specify this level by a VF driver.
2200 * It is an error to specify this level by a PF
2201 * driver with no children VFs.
2203 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2206 * Reset a specific VF of the caller function
2207 * driver if the caller is the parent PF driver.
2208 * It is an error to specify this level by a VF
2209 * driver. It is an error to specify this level
2210 * by a PF driver that is not the parent of the
2211 * VF that is being requested to reset.
2213 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3)
2215 } __attribute__((packed));
2217 /* Output (16 bytes) */
2218 struct hwrm_func_reset_output {
2219 uint16_t error_code;
2221 * Pass/Fail or error type Note: receiver to verify the in
2222 * parameters, and fail the call with an error when appropriate
2225 /* This field returns the type of original request. */
2227 /* This field provides original sequence number of the command. */
2230 * This field is the length of the response in bytes. The last
2231 * byte of the response is a valid flag that will read as '1'
2232 * when the command has been completely written to memory.
2240 * This field is used in Output records to indicate that the
2241 * output is completely written to RAM. This field should be
2242 * read as '1' to indicate that the output has been completely
2243 * written. When writing a command completion or response to an
2244 * internal processor, the order of writes has to be such that
2245 * this field is written last.
2247 } __attribute__((packed));
2249 /* hwrm_func_qcaps */
2251 * Description: This command returns capabilities of a function. The input FID
2252 * value is used to indicate what function is being queried. This allows a
2253 * physical function driver to query virtual functions that are children of the
2254 * physical function. The output FID value is needed to configure Rings and
2255 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
2257 /* Input (24 bytes) */
2258 struct hwrm_func_qcaps_input {
2261 * This value indicates what type of request this is. The format
2262 * for the rest of the command is determined by this field.
2266 * This value indicates the what completion ring the request
2267 * will be optionally completed on. If the value is -1, then no
2268 * CR completion will be generated. Any other value must be a
2269 * valid CR ring_id value for this function.
2272 /* This value indicates the command sequence number. */
2275 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2276 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2281 * This is the host address where the response will be written
2282 * when the request is complete. This area must be 16B aligned
2283 * and must be cleared to zero before the request is made.
2287 * Function ID of the function that is being queried. 0xFF...
2288 * (All Fs) if the query is for the requesting function.
2290 uint16_t unused_0[3];
2291 } __attribute__((packed));
2293 /* Output (80 bytes) */
2294 struct hwrm_func_qcaps_output {
2295 uint16_t error_code;
2297 * Pass/Fail or error type Note: receiver to verify the in
2298 * parameters, and fail the call with an error when appropriate
2301 /* This field returns the type of original request. */
2303 /* This field provides original sequence number of the command. */
2306 * This field is the length of the response in bytes. The last
2307 * byte of the response is a valid flag that will read as '1'
2308 * when the command has been completely written to memory.
2312 * FID value. This value is used to identify operations on the
2313 * PCI bus as belonging to a particular PCI function.
2317 * Port ID of port that this function is associated with. Valid
2318 * only for the PF. 0xFF... (All Fs) if this function is not
2319 * associated with any port. 0xFF... (All Fs) if this function
2320 * is called from a VF.
2323 /* If 1, then Push mode is supported on this function. */
2324 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2326 * If 1, then the global MSI-X auto-masking is enabled for the
2329 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2332 * If 1, then the Precision Time Protocol (PTP) processing is
2333 * supported on this function. The HWRM should enable PTP on
2334 * only a single Physical Function (PF) per port.
2336 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2338 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
2339 * supported on this function.
2341 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
2343 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
2344 * supported on this function.
2346 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
2348 * If 1, then control and configuration of WoL magic packet are
2349 * supported on this function.
2351 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED \
2354 * If 1, then control and configuration of bitmap pattern packet
2355 * are supported on this function.
2357 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
2359 * If set to 1, then the control and configuration of rate limit
2360 * of an allocated TX ring on the queried function is supported.
2362 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
2364 * If 1, then control and configuration of minimum and maximum
2365 * bandwidths are supported on the queried function.
2367 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
2369 * If the query is for a VF, then this flag shall be ignored. If
2370 * this query is for a PF and this flag is set to 1, then the PF
2371 * has the capability to set the rate limits on the TX rings of
2372 * its children VFs. If this query is for a PF and this flag is
2373 * set to 0, then the PF does not have the capability to set the
2374 * rate limits on the TX rings of its children VFs.
2376 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED \
2379 * If the query is for a VF, then this flag shall be ignored. If
2380 * this query is for a PF and this flag is set to 1, then the PF
2381 * has the capability to set the minimum and/or maximum
2382 * bandwidths for its children VFs. If this query is for a PF
2383 * and this flag is set to 0, then the PF does not have the
2384 * capability to set the minimum or maximum bandwidths for its
2387 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
2389 * Standard TX Ring mode is used for the allocation of TX ring
2390 * and underlying scheduling resources that allow bandwidth
2391 * reservation and limit settings on the queried function. If
2392 * set to 1, then standard TX ring mode is supported on the
2393 * queried function. If set to 0, then standard TX ring mode is
2394 * not available on the queried function.
2396 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_STD_TX_RING_MODE_SUPPORTED \
2398 uint8_t mac_address[6];
2400 * This value is current MAC address configured for this
2401 * function. A value of 00-00-00-00-00-00 indicates no MAC
2402 * address is currently configured.
2404 uint16_t max_rsscos_ctx;
2406 * The maximum number of RSS/COS contexts that can be allocated
2409 uint16_t max_cmpl_rings;
2411 * The maximum number of completion rings that can be allocated
2414 uint16_t max_tx_rings;
2416 * The maximum number of transmit rings that can be allocated to
2419 uint16_t max_rx_rings;
2421 * The maximum number of receive rings that can be allocated to
2424 uint16_t max_l2_ctxs;
2426 * The maximum number of L2 contexts that can be allocated to
2431 * The maximum number of VNICs that can be allocated to the
2434 uint16_t first_vf_id;
2436 * The identifier for the first VF enabled on a PF. This is
2437 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2438 * this command is called on a PF with SR-IOV disabled or on a
2443 * The maximum number of VFs that can be allocated to the
2444 * function. This is valid only on the PF with SR-IOV enabled.
2445 * 0xFF... (All Fs) if this command is called on a PF with SR-
2446 * IOV disabled or on a VF.
2448 uint16_t max_stat_ctx;
2450 * The maximum number of statistic contexts that can be
2451 * allocated to the function.
2453 uint32_t max_encap_records;
2455 * The maximum number of Encapsulation records that can be
2456 * offloaded by this function.
2458 uint32_t max_decap_records;
2460 * The maximum number of decapsulation records that can be
2461 * offloaded by this function.
2463 uint32_t max_tx_em_flows;
2465 * The maximum number of Exact Match (EM) flows that can be
2466 * offloaded by this function on the TX side.
2468 uint32_t max_tx_wm_flows;
2470 * The maximum number of Wildcard Match (WM) flows that can be
2471 * offloaded by this function on the TX side.
2473 uint32_t max_rx_em_flows;
2475 * The maximum number of Exact Match (EM) flows that can be
2476 * offloaded by this function on the RX side.
2478 uint32_t max_rx_wm_flows;
2480 * The maximum number of Wildcard Match (WM) flows that can be
2481 * offloaded by this function on the RX side.
2483 uint32_t max_mcast_filters;
2485 * The maximum number of multicast filters that can be supported
2486 * by this function on the RX side.
2488 uint32_t max_flow_id;
2490 * The maximum value of flow_id that can be supported in
2491 * completion records.
2493 uint32_t max_hw_ring_grps;
2495 * The maximum number of HW ring groups that can be supported on
2498 uint16_t max_sp_tx_rings;
2500 * The maximum number of strict priority transmit rings that can
2501 * be allocated to the function. This number indicates the
2502 * maximum number of TX rings that can be assigned strict
2503 * priorities out of the maximum number of TX rings that can be
2504 * allocated (max_tx_rings) to the function.
2509 * This field is used in Output records to indicate that the
2510 * output is completely written to RAM. This field should be
2511 * read as '1' to indicate that the output has been completely
2512 * written. When writing a command completion or response to an
2513 * internal processor, the order of writes has to be such that
2514 * this field is written last.
2516 } __attribute__((packed));
2518 /* hwrm_func_qcfg */
2520 * Description: This command returns the current configuration of a function.
2521 * The input FID value is used to indicate what function is being queried. This
2522 * allows a physical function driver to query virtual functions that are
2523 * children of the physical function. The output FID value is needed to
2524 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
2525 * the PCI bus. This command should be called by every driver after
2526 * 'hwrm_func_cfg' to get the actual number of resources allocated by the HWRM.
2527 * The values returned by hwrm_func_qcfg are the values the driver shall use.
2528 * These values may be different than what was originally requested in the
2529 * 'hwrm_func_cfg' command.
2531 /* Input (24 bytes) */
2532 struct hwrm_func_qcfg_input {
2535 * This value indicates what type of request this is. The format
2536 * for the rest of the command is determined by this field.
2540 * This value indicates the what completion ring the request
2541 * will be optionally completed on. If the value is -1, then no
2542 * CR completion will be generated. Any other value must be a
2543 * valid CR ring_id value for this function.
2546 /* This value indicates the command sequence number. */
2549 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2550 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2555 * This is the host address where the response will be written
2556 * when the request is complete. This area must be 16B aligned
2557 * and must be cleared to zero before the request is made.
2561 * Function ID of the function that is being queried. 0xFF...
2562 * (All Fs) if the query is for the requesting function.
2564 uint16_t unused_0[3];
2565 } __attribute__((packed));
2567 /* Output (72 bytes) */
2568 struct hwrm_func_qcfg_output {
2569 uint16_t error_code;
2571 * Pass/Fail or error type Note: receiver to verify the in
2572 * parameters, and fail the call with an error when appropriate
2575 /* This field returns the type of original request. */
2577 /* This field provides original sequence number of the command. */
2580 * This field is the length of the response in bytes. The last
2581 * byte of the response is a valid flag that will read as '1'
2582 * when the command has been completely written to memory.
2586 * FID value. This value is used to identify operations on the
2587 * PCI bus as belonging to a particular PCI function.
2591 * Port ID of port that this function is associated with.
2592 * 0xFF... (All Fs) if this function is not associated with any
2597 * This value is the current VLAN setting for this function. The
2598 * value of 0 for this field indicates no priority tagging or
2599 * VLAN is used. This field's format is same as 802.1Q Tag's Tag
2600 * Control Information (TCI) format that includes both Priority
2601 * Code Point (PCP) and VLAN Identifier (VID).
2605 * If 1, then magic packet based Out-Of-Box WoL is enabled on
2606 * the port associated with this function.
2608 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
2611 * If 1, then bitmap pattern based Out-Of-Box WoL packet is
2612 * enabled on the port associated with this function.
2614 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2)
2616 * If set to 1, then FW based DCBX agent is enabled and running
2617 * on the port associated with this function. If set to 0, then
2618 * DCBX agent is not running in the firmware.
2620 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
2623 * Standard TX Ring mode is used for the allocation of TX ring
2624 * and underlying scheduling resources that allow bandwidth
2625 * reservation and limit settings on the queried function. If
2626 * set to 1, then standard TX ring mode is enabled on the
2627 * queried function. If set to 0, then the standard TX ring mode
2628 * is disabled on the queried function. In this extended TX ring
2629 * resource mode, the minimum and maximum bandwidth settings are
2630 * not supported to allow the allocation of TX rings to span
2631 * multiple scheduler nodes.
2633 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_STD_TX_RING_MODE_ENABLED \
2636 * If set to 1 then FW based LLDP agent is enabled and running
2637 * on the port associated with this function. If set to 0 then
2638 * the LLDP agent is not running in the firmware.
2640 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_LLDP_AGENT_ENABLED UINT32_C(0x10)
2642 * If set to 1, then multi-host mode is active for this
2643 * function. If set to 0, then multi-host mode is inactive for
2644 * this function or not applicable for this device.
2646 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_MULTI_HOST UINT32_C(0x20)
2647 uint8_t mac_address[6];
2649 * This value is current MAC address configured for this
2650 * function. A value of 00-00-00-00-00-00 indicates no MAC
2651 * address is currently configured.
2655 * This value is current PCI ID of this function. If ARI is
2656 * enabled, then it is Bus Number (8b):Function Number(8b).
2657 * Otherwise, it is Bus Number (8b):Device Number (4b):Function
2660 uint16_t alloc_rsscos_ctx;
2662 * The number of RSS/COS contexts currently allocated to the
2665 uint16_t alloc_cmpl_rings;
2667 * The number of completion rings currently allocated to the
2668 * function. This does not include the rings allocated to any
2669 * children functions if any.
2671 uint16_t alloc_tx_rings;
2673 * The number of transmit rings currently allocated to the
2674 * function. This does not include the rings allocated to any
2675 * children functions if any.
2677 uint16_t alloc_rx_rings;
2679 * The number of receive rings currently allocated to the
2680 * function. This does not include the rings allocated to any
2681 * children functions if any.
2683 uint16_t alloc_l2_ctx;
2684 /* The allocated number of L2 contexts to the function. */
2685 uint16_t alloc_vnics;
2686 /* The allocated number of vnics to the function. */
2689 * The maximum transmission unit of the function. For rings
2690 * allocated on this function, this default value is used if
2691 * ring MTU is not specified.
2695 * The maximum receive unit of the function. For vnics allocated
2696 * on this function, this default value is used if vnic MRU is
2699 uint16_t stat_ctx_id;
2700 /* The statistics context assigned to a function. */
2701 uint8_t port_partition_type;
2703 * The HWRM shall return Unknown value for this field when this
2704 * command is used to query VF's configuration.
2706 /* Single physical function */
2707 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0)
2708 /* Multiple physical functions */
2709 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
2710 /* Network Partitioning 1.0 */
2711 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 UINT32_C(0x2)
2712 /* Network Partitioning 1.5 */
2713 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 UINT32_C(0x3)
2714 /* Network Partitioning 2.0 */
2715 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 UINT32_C(0x4)
2717 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN UINT32_C(0xff)
2718 uint8_t port_pf_cnt;
2720 * This field will indicate number of physical functions on this
2721 * port_partition. HWRM shall return unavail (i.e. value of 0)
2722 * for this field when this command is used to query VF's
2723 * configuration or from older firmware that doesn't support
2726 /* number of PFs is not available */
2727 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PF_CNT_UNAVAIL UINT32_C(0x0)
2728 uint16_t dflt_vnic_id;
2729 /* The default VNIC ID assigned to a function that is being queried. */
2734 * Minimum BW allocated for this function. The HWRM will
2735 * translate this value into byte counter and time interval used
2736 * for the scheduler inside the device. A value of 0 indicates
2737 * the minimum bandwidth is not configured.
2739 /* The bandwidth value. */
2740 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2741 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0
2742 /* The granularity of the value (bits or bytes). */
2743 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE UINT32_C(0x10000000)
2744 /* Value is in bits. */
2745 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2746 /* Value is in bytes. */
2747 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES \
2748 (UINT32_C(0x1) << 28)
2749 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_LAST \
2750 FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES
2751 /* bw_value_unit is 3 b */
2752 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \
2753 UINT32_C(0xe0000000)
2754 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
2755 /* Value is in Mb or MB (base 10). */
2756 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
2757 (UINT32_C(0x0) << 29)
2758 /* Value is in Kb or KB (base 10). */
2759 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_KILO \
2760 (UINT32_C(0x2) << 29)
2761 /* Value is in bits or bytes. */
2762 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_BASE \
2763 (UINT32_C(0x4) << 29)
2764 /* Value is in Gb or GB (base 10). */
2765 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
2766 (UINT32_C(0x6) << 29)
2767 /* Value is in 1/100th of a percentage of total bandwidth. */
2768 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
2769 (UINT32_C(0x1) << 29)
2771 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
2772 (UINT32_C(0x7) << 29)
2773 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
2774 FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID
2777 * Maximum BW allocated for this function. The HWRM will
2778 * translate this value into byte counter and time interval used
2779 * for the scheduler inside the device. A value of 0 indicates
2780 * that the maximum bandwidth is not configured.
2782 /* The bandwidth value. */
2783 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2784 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0
2785 /* The granularity of the value (bits or bytes). */
2786 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE UINT32_C(0x10000000)
2787 /* Value is in bits. */
2788 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2789 /* Value is in bytes. */
2790 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES \
2791 (UINT32_C(0x1) << 28)
2792 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_LAST \
2793 FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES
2794 /* bw_value_unit is 3 b */
2795 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \
2796 UINT32_C(0xe0000000)
2797 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
2798 /* Value is in Mb or MB (base 10). */
2799 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
2800 (UINT32_C(0x0) << 29)
2801 /* Value is in Kb or KB (base 10). */
2802 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_KILO \
2803 (UINT32_C(0x2) << 29)
2804 /* Value is in bits or bytes. */
2805 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_BASE \
2806 (UINT32_C(0x4) << 29)
2807 /* Value is in Gb or GB (base 10). */
2808 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
2809 (UINT32_C(0x6) << 29)
2810 /* Value is in 1/100th of a percentage of total bandwidth. */
2811 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
2812 (UINT32_C(0x1) << 29)
2814 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
2815 (UINT32_C(0x7) << 29)
2816 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
2817 FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID
2820 * This value indicates the Edge virtual bridge mode for the
2821 * domain that this function belongs to.
2823 /* No Edge Virtual Bridging (EVB) */
2824 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
2825 /* Virtual Ethernet Bridge (VEB) */
2826 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
2827 /* Virtual Ethernet Port Aggregator (VEPA) */
2828 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
2832 * The number of VFs that are allocated to the function. This is
2833 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2834 * this command is called on a PF with SR-IOV disabled or on a
2837 uint32_t alloc_mcast_filters;
2839 * The number of allocated multicast filters for this function
2842 uint32_t alloc_hw_ring_grps;
2843 /* The number of allocated HW ring groups for this function. */
2844 uint16_t alloc_sp_tx_rings;
2846 * The number of strict priority transmit rings out of currently
2847 * allocated TX rings to the function (alloc_tx_rings).
2852 * This field is used in Output records to indicate that the
2853 * output is completely written to RAM. This field should be
2854 * read as '1' to indicate that the output has been completely
2855 * written. When writing a command completion or response to an
2856 * internal processor, the order of writes has to be such that
2857 * this field is written last.
2859 } __attribute__((packed));
2861 /* hwrm_func_vlan_qcfg */
2863 * Description: This command should be called by PF driver to get the current
2864 * C-TAG, S-TAG and correcponsing PCP and TPID values configured for the
2867 /* Input (24 bytes) */
2868 struct hwrm_func_vlan_qcfg_input {
2871 * This value indicates what type of request this is. The format
2872 * for the rest of the command is determined by this field.
2876 * This value indicates the what completion ring the request
2877 * will be optionally completed on. If the value is -1, then no
2878 * CR completion will be generated. Any other value must be a
2879 * valid CR ring_id value for this function.
2882 /* This value indicates the command sequence number. */
2885 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2886 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2891 * This is the host address where the response will be written
2892 * when the request is complete. This area must be 16B aligned
2893 * and must be cleared to zero before the request is made.
2897 * Function ID of the function that is being configured. If set
2898 * to 0xFF... (All Fs), then the configuration is for the
2899 * requesting function.
2901 uint16_t unused_0[3];
2904 /* Output (40 bytes) */
2905 struct hwrm_func_vlan_qcfg_output {
2906 uint16_t error_code;
2908 * Pass/Fail or error type Note: receiver to verify the in
2909 * parameters, and fail the call with an error when appropriate
2912 /* This field returns the type of original request. */
2914 /* This field provides original sequence number of the command. */
2917 * This field is the length of the response in bytes. The last
2918 * byte of the response is a valid flag that will read as '1'
2919 * when the command has been completely written to memory.
2927 * This field is used in Output records to indicate that the
2928 * output is completely written to RAM. This field should be
2929 * read as '1' to indicate that the output has been completely
2930 * written. When writing a command completion or response to an
2931 * internal processor, the order of writes has to be such that
2932 * this field is written last.
2935 /* S-TAG VLAN identifier configured for the function. */
2937 /* S-TAG PCP value configured for the function. */
2941 * S-TAG TPID value configured for the function. This field is
2942 * specified in network byte order.
2945 /* C-TAG VLAN identifier configured for the function. */
2947 /* C-TAG PCP value configured for the function. */
2951 * C-TAG TPID value configured for the function. This field is
2952 * specified in network byte order.
2961 /* hwrm_func_vlan_cfg */
2963 * Description: This command allows PF driver to configure C-TAG, S-TAG and
2964 * corresponding PCP and TPID values for a function.
2966 /* Input (48 bytes) */
2967 struct hwrm_func_vlan_cfg_input {
2970 * This value indicates what type of request this is. The format
2971 * for the rest of the command is determined by this field.
2975 * This value indicates the what completion ring the request
2976 * will be optionally completed on. If the value is -1, then no
2977 * CR completion will be generated. Any other value must be a
2978 * valid CR ring_id value for this function.
2981 /* This value indicates the command sequence number. */
2984 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2985 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2990 * This is the host address where the response will be written
2991 * when the request is complete. This area must be 16B aligned
2992 * and must be cleared to zero before the request is made.
2996 * Function ID of the function that is being configured. If set
2997 * to 0xFF... (All Fs), then the configuration is for the
2998 * requesting function.
3003 /* This bit must be '1' for the stag_vid field to be configured. */
3004 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_VID UINT32_C(0x1)
3005 /* This bit must be '1' for the ctag_vid field to be configured. */
3006 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_VID UINT32_C(0x2)
3007 /* This bit must be '1' for the stag_pcp field to be configured. */
3008 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_PCP UINT32_C(0x4)
3009 /* This bit must be '1' for the ctag_pcp field to be configured. */
3010 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_PCP UINT32_C(0x8)
3011 /* This bit must be '1' for the stag_tpid field to be configured. */
3012 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_TPID UINT32_C(0x10)
3013 /* This bit must be '1' for the ctag_tpid field to be configured. */
3014 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_TPID UINT32_C(0x20)
3016 /* S-TAG VLAN identifier configured for the function. */
3018 /* S-TAG PCP value configured for the function. */
3022 * S-TAG TPID value configured for the function. This field is
3023 * specified in network byte order.
3026 /* C-TAG VLAN identifier configured for the function. */
3028 /* C-TAG PCP value configured for the function. */
3032 * C-TAG TPID value configured for the function. This field is
3033 * specified in network byte order.
3042 /* Output (16 bytes) */
3043 struct hwrm_func_vlan_cfg_output {
3044 uint16_t error_code;
3046 * Pass/Fail or error type Note: receiver to verify the in
3047 * parameters, and fail the call with an error when appropriate
3050 /* This field returns the type of original request. */
3052 /* This field provides original sequence number of the command. */
3055 * This field is the length of the response in bytes. The last
3056 * byte of the response is a valid flag that will read as '1'
3057 * when the command has been completely written to memory.
3065 * This field is used in Output records to indicate that the
3066 * output is completely written to RAM. This field should be
3067 * read as '1' to indicate that the output has been completely
3068 * written. When writing a command completion or response to an
3069 * internal processor, the order of writes has to be such that
3070 * this field is written last.
3076 * Description: This command allows configuration of a PF by the corresponding
3077 * PF driver. This command also allows configuration of a child VF by its parent
3078 * PF driver. The input FID value is used to indicate what function is being
3079 * configured. This allows a PF driver to configure the PF owned by itself or a
3080 * virtual function that is a child of the PF. This command allows to reserve
3081 * resources for a VF by its parent PF. To reverse the process, the command
3082 * should be called with all enables flags cleared for resources. This will free
3083 * allocated resources for the VF and return them to the resource pool. If this
3084 * command is requested by a VF driver to configure or reserve resources, then
3085 * the HWRM shall fail this command. If default MAC address and/or VLAN are
3086 * provided in this command, then the HWRM shall set up appropriate MAC/VLAN
3087 * filters for the function that is being configured. If source properties
3088 * checks are enabled and default MAC address and/or IP address are provided in
3089 * this command, then the HWRM shall set appropriate source property checks
3090 * based on provided MAC and/or IP addresses. The parent PF driver should not
3091 * set MTU/MRU for a VF using this command. This is to allow MTU/MRU setting by
3092 * the VF driver. If the MTU or MRU for a VF is set by the PF driver, then the
3093 * HWRM should ignore it. A function's MTU/MRU should be set prior to allocating
3094 * RX VNICs or TX rings. A PF driver calls hwrm_func_cfg to allocate resources
3095 * for itself or its children VFs. All function drivers shall call hwrm_func_cfg
3096 * to reserve resources. A request to hwrm_func_cfg may not be fully granted;
3097 * that is, a request for resources may be larger than what can be supported by
3098 * the device and the HWRM will allocate the best set of resources available,
3099 * but that may be less than requested. If all the amounts requested could not
3100 * be fulfilled, the HWRM shall allocate what it could and return a status code
3101 * of success. A function driver should call hwrm_func_qcfg immediately after
3102 * hwrm_func_cfg to determine what resources were assigned to the configured
3103 * function. A call by a PF driver to hwrm_func_cfg to allocate resources for
3104 * itself shall only allocate resources for the PF driver to use, not for its
3105 * children VFs. Likewise, a call to hwrm_func_qcfg shall return the resources
3106 * available for the PF driver to use, not what is available to its children
3109 /* Input (88 bytes) */
3110 struct hwrm_func_cfg_input {
3113 * This value indicates what type of request this is. The format
3114 * for the rest of the command is determined by this field.
3118 * This value indicates the what completion ring the request
3119 * will be optionally completed on. If the value is -1, then no
3120 * CR completion will be generated. Any other value must be a
3121 * valid CR ring_id value for this function.
3124 /* This value indicates the command sequence number. */
3127 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3128 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3133 * This is the host address where the response will be written
3134 * when the request is complete. This area must be 16B aligned
3135 * and must be cleared to zero before the request is made.
3139 * Function ID of the function that is being configured. If set
3140 * to 0xFF... (All Fs), then the the configuration is for the
3141 * requesting function.
3147 * When this bit is '1', the function is disabled with source
3148 * MAC address check. This is an anti-spoofing check. If this
3149 * flag is set, then the function shall be configured to
3150 * disallow transmission of frames with the source MAC address
3151 * that is configured for this function.
3153 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE \
3156 * When this bit is '1', the function is enabled with source MAC
3157 * address check. This is an anti-spoofing check. If this flag
3158 * is set, then the function shall be configured to allow
3159 * transmission of frames with the source MAC address that is
3160 * configured for this function.
3162 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE \
3165 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_MASK UINT32_C(0x1fc)
3166 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_SFT 2
3168 * Standard TX Ring mode is used for the allocation of TX ring
3169 * and underlying scheduling resources that allow bandwidth
3170 * reservation and limit settings on the queried function. If
3171 * set to 1, then standard TX ring mode is requested to be
3172 * enabled on the function being configured.
3174 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_ENABLE \
3177 * Standard TX Ring mode is used for the allocation of TX ring
3178 * and underlying scheduling resources that allow bandwidth
3179 * reservation and limit settings on the queried function. If
3180 * set to 1, then the standard TX ring mode is requested to be
3181 * disabled on the function being configured. In this extended
3182 * TX ring resource mode, the minimum and maximum bandwidth
3183 * settings are not supported to allow the allocation of TX
3184 * rings to span multiple scheduler nodes.
3186 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_DISABLE \
3189 * If this bit is set, virtual mac address configured in this
3190 * command will be persistent over warm boot.
3192 #define HWRM_FUNC_CFG_INPUT_FLAGS_VIRT_MAC_PERSIST UINT32_C(0x800)
3194 /* This bit must be '1' for the mtu field to be configured. */
3195 #define HWRM_FUNC_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
3196 /* This bit must be '1' for the mru field to be configured. */
3197 #define HWRM_FUNC_CFG_INPUT_ENABLES_MRU UINT32_C(0x2)
3199 * This bit must be '1' for the num_rsscos_ctxs field to be
3202 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RSSCOS_CTXS UINT32_C(0x4)
3204 * This bit must be '1' for the num_cmpl_rings field to be
3207 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_CMPL_RINGS UINT32_C(0x8)
3208 /* This bit must be '1' for the num_tx_rings field to be configured. */
3209 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_TX_RINGS UINT32_C(0x10)
3210 /* This bit must be '1' for the num_rx_rings field to be configured. */
3211 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RX_RINGS UINT32_C(0x20)
3212 /* This bit must be '1' for the num_l2_ctxs field to be configured. */
3213 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_L2_CTXS UINT32_C(0x40)
3214 /* This bit must be '1' for the num_vnics field to be configured. */
3215 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_VNICS UINT32_C(0x80)
3217 * This bit must be '1' for the num_stat_ctxs field to be
3220 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_STAT_CTXS UINT32_C(0x100)
3222 * This bit must be '1' for the dflt_mac_addr field to be
3225 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x200)
3226 /* This bit must be '1' for the dflt_vlan field to be configured. */
3227 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN UINT32_C(0x400)
3228 /* This bit must be '1' for the dflt_ip_addr field to be configured. */
3229 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_IP_ADDR UINT32_C(0x800)
3230 /* This bit must be '1' for the min_bw field to be configured. */
3231 #define HWRM_FUNC_CFG_INPUT_ENABLES_MIN_BW UINT32_C(0x1000)
3232 /* This bit must be '1' for the max_bw field to be configured. */
3233 #define HWRM_FUNC_CFG_INPUT_ENABLES_MAX_BW UINT32_C(0x2000)
3235 * This bit must be '1' for the async_event_cr field to be
3238 #define HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4000)
3240 * This bit must be '1' for the vlan_antispoof_mode field to be
3243 #define HWRM_FUNC_CFG_INPUT_ENABLES_VLAN_ANTISPOOF_MODE UINT32_C(0x8000)
3245 * This bit must be '1' for the allowed_vlan_pris field to be
3248 #define HWRM_FUNC_CFG_INPUT_ENABLES_ALLOWED_VLAN_PRIS UINT32_C(0x10000)
3249 /* This bit must be '1' for the evb_mode field to be configured. */
3250 #define HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE UINT32_C(0x20000)
3252 * This bit must be '1' for the num_mcast_filters field to be
3255 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_MCAST_FILTERS UINT32_C(0x40000)
3257 * This bit must be '1' for the num_hw_ring_grps field to be
3260 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS UINT32_C(0x80000)
3263 * The maximum transmission unit of the function. The HWRM
3264 * should make sure that the mtu of the function does not exceed
3265 * the mtu of the physical port that this function is associated
3266 * with. In addition to configuring mtu per function, it is
3267 * possible to configure mtu per transmit ring. By default, the
3268 * mtu of each transmit ring associated with a function is equal
3269 * to the mtu of the function. The HWRM should make sure that
3270 * the mtu of each transmit ring that is assigned to a function
3275 * The maximum receive unit of the function. The HWRM should
3276 * make sure that the mru of the function does not exceed the
3277 * mru of the physical port that this function is associated
3278 * with. In addition to configuring mru per function, it is
3279 * possible to configure mru per vnic. By default, the mru of
3280 * each vnic associated with a function is equal to the mru of
3281 * the function. The HWRM should make sure that the mru of each
3282 * vnic that is assigned to a function has a valid mru.
3284 uint16_t num_rsscos_ctxs;
3285 /* The number of RSS/COS contexts requested for the function. */
3286 uint16_t num_cmpl_rings;
3288 * The number of completion rings requested for the function.
3289 * This does not include the rings allocated to any children
3292 uint16_t num_tx_rings;
3294 * The number of transmit rings requested for the function. This
3295 * does not include the rings allocated to any children
3298 uint16_t num_rx_rings;
3300 * The number of receive rings requested for the function. This
3301 * does not include the rings allocated to any children
3304 uint16_t num_l2_ctxs;
3305 /* The requested number of L2 contexts for the function. */
3307 /* The requested number of vnics for the function. */
3308 uint16_t num_stat_ctxs;
3309 /* The requested number of statistic contexts for the function. */
3310 uint16_t num_hw_ring_grps;
3312 * The number of HW ring groups that should be reserved for this
3315 uint8_t dflt_mac_addr[6];
3316 /* The default MAC address for the function being configured. */
3319 * The default VLAN for the function being configured. This
3320 * field's format is same as 802.1Q Tag's Tag Control
3321 * Information (TCI) format that includes both Priority Code
3322 * Point (PCP) and VLAN Identifier (VID).
3324 uint32_t dflt_ip_addr[4];
3326 * The default IP address for the function being configured.
3327 * This address is only used in enabling source property check.
3331 * Minimum BW allocated for this function. The HWRM will
3332 * translate this value into byte counter and time interval used
3333 * for the scheduler inside the device.
3335 /* The bandwidth value. */
3336 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
3337 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_SFT 0
3338 /* The granularity of the value (bits or bytes). */
3339 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE UINT32_C(0x10000000)
3340 /* Value is in bits. */
3341 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3342 /* Value is in bytes. */
3343 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3344 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_LAST \
3345 FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES
3346 /* bw_value_unit is 3 b */
3347 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MASK \
3348 UINT32_C(0xe0000000)
3349 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
3350 /* Value is in Mb or MB (base 10). */
3351 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
3352 (UINT32_C(0x0) << 29)
3353 /* Value is in Kb or KB (base 10). */
3354 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO \
3355 (UINT32_C(0x2) << 29)
3356 /* Value is in bits or bytes. */
3357 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE \
3358 (UINT32_C(0x4) << 29)
3359 /* Value is in Gb or GB (base 10). */
3360 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
3361 (UINT32_C(0x6) << 29)
3362 /* Value is in 1/100th of a percentage of total bandwidth. */
3363 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
3364 (UINT32_C(0x1) << 29)
3366 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
3367 (UINT32_C(0x7) << 29)
3368 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_LAST \
3369 FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID
3372 * Maximum BW allocated for this function. The HWRM will
3373 * translate this value into byte counter and time interval used
3374 * for the scheduler inside the device.
3376 /* The bandwidth value. */
3377 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK \
3379 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_SFT 0
3380 /* The granularity of the value (bits or bytes). */
3381 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
3382 /* Value is in bits. */
3383 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3384 /* Value is in bytes. */
3385 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3386 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_LAST \
3387 FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES
3388 /* bw_value_unit is 3 b */
3389 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
3390 UINT32_C(0xe0000000)
3391 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
3392 /* Value is in Mb or MB (base 10). */
3393 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
3394 (UINT32_C(0x0) << 29)
3395 /* Value is in Kb or KB (base 10). */
3396 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
3397 (UINT32_C(0x2) << 29)
3398 /* Value is in bits or bytes. */
3399 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
3400 (UINT32_C(0x4) << 29)
3401 /* Value is in Gb or GB (base 10). */
3402 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
3403 (UINT32_C(0x6) << 29)
3404 /* Value is in 1/100th of a percentage of total bandwidth. */
3405 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
3406 (UINT32_C(0x1) << 29)
3408 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
3409 (UINT32_C(0x7) << 29)
3410 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
3411 FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
3412 uint16_t async_event_cr;
3414 * ID of the target completion ring for receiving asynchronous
3415 * event completions. If this field is not valid, then the HWRM
3416 * shall use the default completion ring of the function that is
3417 * being configured as the target completion ring for providing
3418 * any asynchronous event completions for that function. If this
3419 * field is valid, then the HWRM shall use the completion ring
3420 * identified by this ID as the target completion ring for
3421 * providing any asynchronous event completions for the function
3422 * that is being configured.
3424 uint8_t vlan_antispoof_mode;
3425 /* VLAN Anti-spoofing mode. */
3426 /* No VLAN anti-spoofing checks are enabled */
3427 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK UINT32_C(0x0)
3428 /* Validate VLAN against the configured VLAN(s) */
3429 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN \
3431 /* Insert VLAN if it does not exist, otherwise discard */
3432 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE \
3435 * Insert VLAN if it does not exist, override
3439 HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN \
3441 uint8_t allowed_vlan_pris;
3443 * This bit field defines VLAN PRIs that are allowed on this
3444 * function. If nth bit is set, then VLAN PRI n is allowed on
3449 * The HWRM shall allow a PF driver to change EVB mode for the
3450 * partition it belongs to. The HWRM shall not allow a VF driver
3451 * to change the EVB mode. The HWRM shall take into account the
3452 * switching of EVB mode from one to another and reconfigure
3453 * hardware resources as appropriately. The switching from VEB
3454 * to VEPA mode requires the disabling of the loopback traffic.
3455 * Additionally, source knock outs are handled differently in
3456 * VEB and VEPA modes.
3458 /* No Edge Virtual Bridging (EVB) */
3459 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
3460 /* Virtual Ethernet Bridge (VEB) */
3461 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEB UINT32_C(0x1)
3462 /* Virtual Ethernet Port Aggregator (VEPA) */
3463 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEPA UINT32_C(0x2)
3465 uint16_t num_mcast_filters;
3467 * The number of multicast filters that should be reserved for
3468 * this function on the RX side.
3470 } __attribute__((packed));
3472 /* Output (16 bytes) */
3473 struct hwrm_func_cfg_output {
3474 uint16_t error_code;
3476 * Pass/Fail or error type Note: receiver to verify the in
3477 * parameters, and fail the call with an error when appropriate
3480 /* This field returns the type of original request. */
3482 /* This field provides original sequence number of the command. */
3485 * This field is the length of the response in bytes. The last
3486 * byte of the response is a valid flag that will read as '1'
3487 * when the command has been completely written to memory.
3495 * This field is used in Output records to indicate that the
3496 * output is completely written to RAM. This field should be
3497 * read as '1' to indicate that the output has been completely
3498 * written. When writing a command completion or response to an
3499 * internal processor, the order of writes has to be such that
3500 * this field is written last.
3502 } __attribute__((packed));
3504 /* hwrm_func_qstats */
3506 * Description: This command returns statistics of a function. The input FID
3507 * value is used to indicate what function is being queried. This allows a
3508 * physical function driver to query virtual functions that are children of the
3509 * physical function. The HWRM shall return any unsupported counter with a value
3510 * of 0xFFFFFFFF for 32-bit counters and 0xFFFFFFFFFFFFFFFF for 64-bit counters.
3512 /* Input (24 bytes) */
3513 struct hwrm_func_qstats_input {
3516 * This value indicates what type of request this is. The format
3517 * for the rest of the command is determined by this field.
3521 * This value indicates the what completion ring the request
3522 * will be optionally completed on. If the value is -1, then no
3523 * CR completion will be generated. Any other value must be a
3524 * valid CR ring_id value for this function.
3527 /* This value indicates the command sequence number. */
3530 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3531 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3536 * This is the host address where the response will be written
3537 * when the request is complete. This area must be 16B aligned
3538 * and must be cleared to zero before the request is made.
3542 * Function ID of the function that is being queried. 0xFF...
3543 * (All Fs) if the query is for the requesting function.
3545 uint16_t unused_0[3];
3546 } __attribute__((packed));
3548 /* Output (176 bytes) */
3549 struct hwrm_func_qstats_output {
3550 uint16_t error_code;
3552 * Pass/Fail or error type Note: receiver to verify the in
3553 * parameters, and fail the call with an error when appropriate
3556 /* This field returns the type of original request. */
3558 /* This field provides original sequence number of the command. */
3561 * This field is the length of the response in bytes. The last
3562 * byte of the response is a valid flag that will read as '1'
3563 * when the command has been completely written to memory.
3565 uint64_t tx_ucast_pkts;
3566 /* Number of transmitted unicast packets on the function. */
3567 uint64_t tx_mcast_pkts;
3568 /* Number of transmitted multicast packets on the function. */
3569 uint64_t tx_bcast_pkts;
3570 /* Number of transmitted broadcast packets on the function. */
3571 uint64_t tx_err_pkts;
3573 * Number of transmitted packets that were discarded due to
3574 * internal NIC resource problems. For transmit, this can only
3575 * happen if TMP is configured to allow dropping in HOL blocking
3576 * conditions, which is not a normal configuration.
3578 uint64_t tx_drop_pkts;
3580 * Number of dropped packets on transmit path on the function.
3581 * These are packets that have been marked for drop by the TE
3582 * CFA block or are packets that exceeded the transmit MTU limit
3585 uint64_t tx_ucast_bytes;
3586 /* Number of transmitted bytes for unicast traffic on the function. */
3587 uint64_t tx_mcast_bytes;
3589 * Number of transmitted bytes for multicast traffic on the
3592 uint64_t tx_bcast_bytes;
3594 * Number of transmitted bytes for broadcast traffic on the
3597 uint64_t rx_ucast_pkts;
3598 /* Number of received unicast packets on the function. */
3599 uint64_t rx_mcast_pkts;
3600 /* Number of received multicast packets on the function. */
3601 uint64_t rx_bcast_pkts;
3602 /* Number of received broadcast packets on the function. */
3603 uint64_t rx_err_pkts;
3605 * Number of received packets that were discarded on the
3606 * function due to resource limitations. This can happen for 3
3607 * reasons. # The BD used for the packet has a bad format. #
3608 * There were no BDs available in the ring for the packet. #
3609 * There were no BDs available on-chip for the packet.
3611 uint64_t rx_drop_pkts;
3613 * Number of dropped packets on received path on the function.
3614 * These are packets that have been marked for drop by the RE
3617 uint64_t rx_ucast_bytes;
3618 /* Number of received bytes for unicast traffic on the function. */
3619 uint64_t rx_mcast_bytes;
3620 /* Number of received bytes for multicast traffic on the function. */
3621 uint64_t rx_bcast_bytes;
3622 /* Number of received bytes for broadcast traffic on the function. */
3623 uint64_t rx_agg_pkts;
3624 /* Number of aggregated unicast packets on the function. */
3625 uint64_t rx_agg_bytes;
3626 /* Number of aggregated unicast bytes on the function. */
3627 uint64_t rx_agg_events;
3628 /* Number of aggregation events on the function. */
3629 uint64_t rx_agg_aborts;
3630 /* Number of aborted aggregations on the function. */
3637 * This field is used in Output records to indicate that the
3638 * output is completely written to RAM. This field should be
3639 * read as '1' to indicate that the output has been completely
3640 * written. When writing a command completion or response to an
3641 * internal processor, the order of writes has to be such that
3642 * this field is written last.
3644 } __attribute__((packed));
3646 /* hwrm_func_clr_stats */
3648 * Description: This command clears statistics of a function. The input FID
3649 * value is used to indicate what function's statistics is being cleared. This
3650 * allows a physical function driver to clear statistics of virtual functions
3651 * that are children of the physical function.
3653 /* Input (24 bytes) */
3654 struct hwrm_func_clr_stats_input {
3657 * This value indicates what type of request this is. The format
3658 * for the rest of the command is determined by this field.
3662 * This value indicates the what completion ring the request
3663 * will be optionally completed on. If the value is -1, then no
3664 * CR completion will be generated. Any other value must be a
3665 * valid CR ring_id value for this function.
3668 /* This value indicates the command sequence number. */
3671 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3672 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3677 * This is the host address where the response will be written
3678 * when the request is complete. This area must be 16B aligned
3679 * and must be cleared to zero before the request is made.
3683 * Function ID of the function. 0xFF... (All Fs) if the query is
3684 * for the requesting function.
3686 uint16_t unused_0[3];
3687 } __attribute__((packed));
3689 /* Output (16 bytes) */
3690 struct hwrm_func_clr_stats_output {
3691 uint16_t error_code;
3693 * Pass/Fail or error type Note: receiver to verify the in
3694 * parameters, and fail the call with an error when appropriate
3697 /* This field returns the type of original request. */
3699 /* This field provides original sequence number of the command. */
3702 * This field is the length of the response in bytes. The last
3703 * byte of the response is a valid flag that will read as '1'
3704 * when the command has been completely written to memory.
3712 * This field is used in Output records to indicate that the
3713 * output is completely written to RAM. This field should be
3714 * read as '1' to indicate that the output has been completely
3715 * written. When writing a command completion or response to an
3716 * internal processor, the order of writes has to be such that
3717 * this field is written last.
3719 } __attribute__((packed));
3721 /* hwrm_func_vf_vnic_ids_query */
3722 /* Description: This command is used to query vf vnic ids. */
3723 /* Input (32 bytes) */
3724 struct hwrm_func_vf_vnic_ids_query_input {
3727 * This value indicates what type of request this is. The format
3728 * for the rest of the command is determined by this field.
3732 * This value indicates the what completion ring the request
3733 * will be optionally completed on. If the value is -1, then no
3734 * CR completion will be generated. Any other value must be a
3735 * valid CR ring_id value for this function.
3738 /* This value indicates the command sequence number. */
3741 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3742 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3747 * This is the host address where the response will be written
3748 * when the request is complete. This area must be 16B aligned
3749 * and must be cleared to zero before the request is made.
3753 * This value is used to identify a Virtual Function (VF). The
3754 * scope of VF ID is local within a PF.
3758 uint32_t max_vnic_id_cnt;
3759 /* Max number of vnic ids in vnic id table */
3760 uint64_t vnic_id_tbl_addr;
3761 /* This is the address for VF VNIC ID table */
3762 } __attribute__((packed));
3764 /* Output (16 bytes) */
3765 struct hwrm_func_vf_vnic_ids_query_output {
3766 uint16_t error_code;
3768 * Pass/Fail or error type Note: receiver to verify the in
3769 * parameters, and fail the call with an error when appropriate
3772 /* This field returns the type of original request. */
3774 /* This field provides original sequence number of the command. */
3777 * This field is the length of the response in bytes. The last
3778 * byte of the response is a valid flag that will read as '1'
3779 * when the command has been completely written to memory.
3781 uint32_t vnic_id_cnt;
3783 * Actual number of vnic ids Each VNIC ID is written as a 32-bit
3791 * This field is used in Output records to indicate that the
3792 * output is completely written to RAM. This field should be
3793 * read as '1' to indicate that the output has been completely
3794 * written. When writing a command completion or response to an
3795 * internal processor, the order of writes has to be such that
3796 * this field is written last.
3798 } __attribute__((packed));
3800 /* hwrm_func_drv_rgtr */
3802 * Description: This command is used by the function driver to register its
3803 * information with the HWRM. A function driver shall implement this command. A
3804 * function driver shall use this command during the driver initialization right
3805 * after the HWRM version discovery and default ring resources allocation.
3807 /* Input (80 bytes) */
3808 struct hwrm_func_drv_rgtr_input {
3811 * This value indicates what type of request this is. The format
3812 * for the rest of the command is determined by this field.
3816 * This value indicates the what completion ring the request
3817 * will be optionally completed on. If the value is -1, then no
3818 * CR completion will be generated. Any other value must be a
3819 * valid CR ring_id value for this function.
3822 /* This value indicates the command sequence number. */
3825 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3826 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3831 * This is the host address where the response will be written
3832 * when the request is complete. This area must be 16B aligned
3833 * and must be cleared to zero before the request is made.
3837 * When this bit is '1', the function driver is requesting all
3838 * requests from its children VF drivers to be forwarded to
3839 * itself. This flag can only be set by the PF driver. If a VF
3840 * driver sets this flag, it should be ignored by the HWRM.
3842 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
3844 * When this bit is '1', the function is requesting none of the
3845 * requests from its children VF drivers to be forwarded to
3846 * itself. This flag can only be set by the PF driver. If a VF
3847 * driver sets this flag, it should be ignored by the HWRM.
3849 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
3851 /* This bit must be '1' for the os_type field to be configured. */
3852 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
3853 /* This bit must be '1' for the ver field to be configured. */
3854 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
3855 /* This bit must be '1' for the timestamp field to be configured. */
3856 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
3857 /* This bit must be '1' for the vf_req_fwd field to be configured. */
3858 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_INPUT_FWD UINT32_C(0x8)
3860 * This bit must be '1' for the async_event_fwd field to be
3863 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
3866 * This value indicates the type of OS. The values are based on
3867 * CIM_OperatingSystem.mof file as published by the DMTF.
3870 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
3871 /* Other OS not listed below. */
3872 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1)
3874 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe)
3876 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
3878 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
3880 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24)
3882 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
3883 /* VMware ESXi OS. */
3884 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68)
3885 /* Microsoft Windows 8 64-bit OS. */
3886 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73)
3887 /* Microsoft Windows Server 2012 R2 OS. */
3888 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
3890 /* This is the major version of the driver. */
3892 /* This is the minor version of the driver. */
3894 /* This is the update version of the driver. */
3899 * This is a 32-bit timestamp provided by the driver for keep
3900 * alive. The timestamp is in multiples of 1ms.
3903 uint32_t vf_req_fwd[8];
3905 * This is a 256-bit bit mask provided by the PF driver for
3906 * letting the HWRM know what commands issued by the VF driver
3907 * to the HWRM should be forwarded to the PF driver. Nth bit
3908 * refers to the Nth req_type. Setting Nth bit to 1 indicates
3909 * that requests from the VF driver with req_type equal to N
3910 * shall be forwarded to the parent PF driver. This field is not
3911 * valid for the VF driver.
3913 uint32_t async_event_fwd[8];
3915 * This is a 256-bit bit mask provided by the function driver
3916 * (PF or VF driver) to indicate the list of asynchronous event
3917 * completions to be forwarded. Nth bit refers to the Nth
3918 * event_id. Setting Nth bit to 1 by the function driver shall
3919 * result in the HWRM forwarding asynchronous event completion
3920 * with event_id equal to N. If all bits are set to 0 (value of
3921 * 0), then the HWRM shall not forward any asynchronous event
3922 * completion to this function driver.
3924 } __attribute__((packed));
3926 /* Output (16 bytes) */
3927 struct hwrm_func_drv_rgtr_output {
3928 uint16_t error_code;
3930 * Pass/Fail or error type Note: receiver to verify the in
3931 * parameters, and fail the call with an error when appropriate
3934 /* This field returns the type of original request. */
3936 /* This field provides original sequence number of the command. */
3939 * This field is the length of the response in bytes. The last
3940 * byte of the response is a valid flag that will read as '1'
3941 * when the command has been completely written to memory.
3949 * This field is used in Output records to indicate that the
3950 * output is completely written to RAM. This field should be
3951 * read as '1' to indicate that the output has been completely
3952 * written. When writing a command completion or response to an
3953 * internal processor, the order of writes has to be such that
3954 * this field is written last.
3956 } __attribute__((packed));
3958 /* hwrm_func_drv_unrgtr */
3960 * Description: This command is used by the function driver to un register with
3961 * the HWRM. A function driver shall implement this command. A function driver
3962 * shall use this command during the driver unloading.
3964 /* Input (24 bytes) */
3965 struct hwrm_func_drv_unrgtr_input {
3968 * This value indicates what type of request this is. The format
3969 * for the rest of the command is determined by this field.
3973 * This value indicates the what completion ring the request
3974 * will be optionally completed on. If the value is -1, then no
3975 * CR completion will be generated. Any other value must be a
3976 * valid CR ring_id value for this function.
3979 /* This value indicates the command sequence number. */
3982 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3983 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3988 * This is the host address where the response will be written
3989 * when the request is complete. This area must be 16B aligned
3990 * and must be cleared to zero before the request is made.
3994 * When this bit is '1', the function driver is notifying the
3995 * HWRM to prepare for the shutdown.
3997 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4000 } __attribute__((packed));
4002 /* Output (16 bytes) */
4003 struct hwrm_func_drv_unrgtr_output {
4004 uint16_t error_code;
4006 * Pass/Fail or error type Note: receiver to verify the in
4007 * parameters, and fail the call with an error when appropriate
4010 /* This field returns the type of original request. */
4012 /* This field provides original sequence number of the command. */
4015 * This field is the length of the response in bytes. The last
4016 * byte of the response is a valid flag that will read as '1'
4017 * when the command has been completely written to memory.
4025 * This field is used in Output records to indicate that the
4026 * output is completely written to RAM. This field should be
4027 * read as '1' to indicate that the output has been completely
4028 * written. When writing a command completion or response to an
4029 * internal processor, the order of writes has to be such that
4030 * this field is written last.
4032 } __attribute__((packed));
4034 /* hwrm_func_buf_rgtr */
4036 * Description: This command is used by the PF driver to register buffers used
4037 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4038 * register buffers for each PF-VF channel. A parent PF may issue this command
4039 * per child VF. If VF ID is not valid, then this command is used to register
4040 * buffers for all children VFs of the PF.
4042 /* Input (128 bytes) */
4043 struct hwrm_func_buf_rgtr_input {
4046 * This value indicates what type of request this is. The format
4047 * for the rest of the command is determined by this field.
4051 * This value indicates the what completion ring the request
4052 * will be optionally completed on. If the value is -1, then no
4053 * CR completion will be generated. Any other value must be a
4054 * valid CR ring_id value for this function.
4057 /* This value indicates the command sequence number. */
4060 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4061 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4066 * This is the host address where the response will be written
4067 * when the request is complete. This area must be 16B aligned
4068 * and must be cleared to zero before the request is made.
4071 /* This bit must be '1' for the vf_id field to be configured. */
4072 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4073 /* This bit must be '1' for the err_buf_addr field to be configured. */
4074 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_ERR_BUF_ADDR UINT32_C(0x2)
4077 * This value is used to identify a Virtual Function (VF). The
4078 * scope of VF ID is local within a PF.
4080 uint16_t req_buf_num_pages;
4082 * This field represents the number of pages used for request
4085 uint16_t req_buf_page_size;
4086 /* This field represents the page size used for request buffer(s). */
4088 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_16B UINT32_C(0x4)
4090 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4K UINT32_C(0xc)
4092 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_8K UINT32_C(0xd)
4094 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_64K UINT32_C(0x10)
4096 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_2M UINT32_C(0x15)
4098 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4M UINT32_C(0x16)
4100 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_1G UINT32_C(0x1e)
4101 uint16_t req_buf_len;
4102 /* The length of the request buffer per VF in bytes. */
4103 uint16_t resp_buf_len;
4104 /* The length of the response buffer in bytes. */
4107 uint64_t req_buf_page_addr[10];
4108 /* This field represents the page address of req buffer. */
4109 uint64_t error_buf_addr;
4111 * This field is used to receive the error reporting from the
4112 * chipset. Only applicable for PFs.
4114 uint64_t resp_buf_addr;
4115 /* This field is used to receive the response forwarded by the HWRM. */
4116 } __attribute__((packed));
4118 /* Output (16 bytes) */
4119 struct hwrm_func_buf_rgtr_output {
4120 uint16_t error_code;
4122 * Pass/Fail or error type Note: receiver to verify the in
4123 * parameters, and fail the call with an error when appropriate
4126 /* This field returns the type of original request. */
4128 /* This field provides original sequence number of the command. */
4131 * This field is the length of the response in bytes. The last
4132 * byte of the response is a valid flag that will read as '1'
4133 * when the command has been completely written to memory.
4141 * This field is used in Output records to indicate that the
4142 * output is completely written to RAM. This field should be
4143 * read as '1' to indicate that the output has been completely
4144 * written. When writing a command completion or response to an
4145 * internal processor, the order of writes has to be such that
4146 * this field is written last.
4148 } __attribute__((packed));
4150 /* hwrm_func_buf_unrgtr */
4152 * Description: This command is used by the PF driver to unregister buffers used
4153 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4154 * unregister buffers for PF-VF communication. A parent PF may issue this
4155 * command to unregister buffers for communication between the PF and a specific
4156 * VF. If the VF ID is not valid, then this command is used to unregister
4157 * buffers used for communications with all children VFs of the PF.
4159 /* Input (24 bytes) */
4160 struct hwrm_func_buf_unrgtr_input {
4163 * This value indicates what type of request this is. The format
4164 * for the rest of the command is determined by this field.
4168 * This value indicates the what completion ring the request
4169 * will be optionally completed on. If the value is -1, then no
4170 * CR completion will be generated. Any other value must be a
4171 * valid CR ring_id value for this function.
4174 /* This value indicates the command sequence number. */
4177 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4178 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4183 * This is the host address where the response will be written
4184 * when the request is complete. This area must be 16B aligned
4185 * and must be cleared to zero before the request is made.
4188 /* This bit must be '1' for the vf_id field to be configured. */
4189 #define HWRM_FUNC_BUF_UNRGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4192 * This value is used to identify a Virtual Function (VF). The
4193 * scope of VF ID is local within a PF.
4196 } __attribute__((packed));
4198 /* Output (16 bytes) */
4199 struct hwrm_func_buf_unrgtr_output {
4200 uint16_t error_code;
4202 * Pass/Fail or error type Note: receiver to verify the in
4203 * parameters, and fail the call with an error when appropriate
4206 /* This field returns the type of original request. */
4208 /* This field provides original sequence number of the command. */
4211 * This field is the length of the response in bytes. The last
4212 * byte of the response is a valid flag that will read as '1'
4213 * when the command has been completely written to memory.
4221 * This field is used in Output records to indicate that the
4222 * output is completely written to RAM. This field should be
4223 * read as '1' to indicate that the output has been completely
4224 * written. When writing a command completion or response to an
4225 * internal processor, the order of writes has to be such that
4226 * this field is written last.
4228 } __attribute__((packed));
4230 /* hwrm_func_vf_cfg */
4232 * Description: This command allows configuration of a VF by its driver. If this
4233 * function is called by a PF driver, then the HWRM shall fail this command. If
4234 * guest VLAN and/or MAC address are provided in this command, then the HWRM
4235 * shall set up appropriate MAC/VLAN filters for the VF that is being
4236 * configured. A VF driver should set VF MTU/MRU using this command prior to
4237 * allocating RX VNICs or TX rings for the corresponding VF.
4239 /* Input (32 bytes) */
4241 struct hwrm_func_vf_cfg_input {
4244 * This value indicates what type of request this is. The format for the
4245 * rest of the command is determined by this field.
4249 * This value indicates the what completion ring the request will be
4250 * optionally completed on. If the value is -1, then no CR completion
4251 * will be generated. Any other value must be a valid CR ring_id value
4252 * for this function.
4255 /* This value indicates the command sequence number. */
4258 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4259 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4263 * This is the host address where the response will be written when the
4264 * request is complete. This area must be 16B aligned and must be
4265 * cleared to zero before the request is made.
4268 /* This bit must be '1' for the mtu field to be configured. */
4269 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
4270 /* This bit must be '1' for the guest_vlan field to be configured. */
4271 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_GUEST_VLAN UINT32_C(0x2)
4273 * This bit must be '1' for the async_event_cr field to be configured.
4275 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4)
4276 /* This bit must be '1' for the dflt_mac_addr field to be configured. */
4277 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x8)
4280 * The maximum transmission unit requested on the function. The HWRM
4281 * should make sure that the mtu of the function does not exceed the mtu
4282 * of the physical port that this function is associated with. In
4283 * addition to requesting mtu per function, it is possible to configure
4284 * mtu per transmit ring. By default, the mtu of each transmit ring
4285 * associated with a function is equal to the mtu of the function. The
4286 * HWRM should make sure that the mtu of each transmit ring that is
4287 * assigned to a function has a valid mtu.
4289 uint16_t guest_vlan;
4291 * The guest VLAN for the function being configured. This field's format
4292 * is same as 802.1Q Tag's Tag Control Information (TCI) format that
4293 * includes both Priority Code Point (PCP) and VLAN Identifier (VID).
4295 uint16_t async_event_cr;
4297 * ID of the target completion ring for receiving asynchronous event
4298 * completions. If this field is not valid, then the HWRM shall use the
4299 * default completion ring of the function that is being configured as
4300 * the target completion ring for providing any asynchronous event
4301 * completions for that function. If this field is valid, then the HWRM
4302 * shall use the completion ring identified by this ID as the target
4303 * completion ring for providing any asynchronous event completions for
4304 * the function that is being configured.
4306 uint8_t dflt_mac_addr[6];
4308 * This value is the current MAC address requested by the VF driver to
4309 * be configured on this VF. A value of 00-00-00-00-00-00 indicates no
4310 * MAC address configuration is requested by the VF driver. The parent
4311 * PF driver may reject or overwrite this MAC address.
4313 } __attribute__((packed));
4315 /* Output (16 bytes) */
4317 struct hwrm_func_vf_cfg_output {
4318 uint16_t error_code;
4320 * Pass/Fail or error type Note: receiver to verify the in parameters,
4321 * and fail the call with an error when appropriate
4324 /* This field returns the type of original request. */
4326 /* This field provides original sequence number of the command. */
4329 * This field is the length of the response in bytes. The last
4330 * byte of the response is a valid flag that will read as '1'
4331 * when the command has been completely written to memory.
4339 * This field is used in Output records to indicate that the output is
4340 * completely written to RAM. This field should be read as '1' to
4341 * indicate that the output has been completely written. When writing a
4342 * command completion or response to an internal processor, the order of
4343 * writes has to be such that this field is written last.
4345 } __attribute__((packed));
4347 /* hwrm_port_phy_cfg */
4349 * Description: This command configures the PHY device for the port. It allows
4350 * setting of the most generic settings for the PHY. The HWRM shall complete
4351 * this command as soon as PHY settings are configured. They may not be applied
4352 * when the command response is provided. A VF driver shall not be allowed to
4353 * configure PHY using this command. In a network partition mode, a PF driver
4354 * shall not be allowed to configure PHY using this command.
4356 /* Input (56 bytes) */
4357 struct hwrm_port_phy_cfg_input {
4360 * This value indicates what type of request this is. The format
4361 * for the rest of the command is determined by this field.
4365 * This value indicates the what completion ring the request
4366 * will be optionally completed on. If the value is -1, then no
4367 * CR completion will be generated. Any other value must be a
4368 * valid CR ring_id value for this function.
4371 /* This value indicates the command sequence number. */
4374 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4375 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4380 * This is the host address where the response will be written
4381 * when the request is complete. This area must be 16B aligned
4382 * and must be cleared to zero before the request is made.
4386 * When this bit is set to '1', the PHY for the port shall be
4387 * reset. # If this bit is set to 1, then the HWRM shall reset
4388 * the PHY after applying PHY configuration changes specified in
4389 * this command. # In order to guarantee that PHY configuration
4390 * changes specified in this command take effect, the HWRM
4391 * client should set this flag to 1. # If this bit is not set to
4392 * 1, then the HWRM may reset the PHY depending on the current
4393 * PHY configuration and settings specified in this command.
4395 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
4396 /* deprecated bit. Do not use!!! */
4397 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_DEPRECATED UINT32_C(0x2)
4399 * When this bit is set to '1', the link shall be forced to the
4400 * force_link_speed value. When this bit is set to '1', the HWRM
4401 * client should not enable any of the auto negotiation related
4402 * fields represented by auto_XXX fields in this command. When
4403 * this bit is set to '1' and the HWRM client has enabled a
4404 * auto_XXX field in this command, then the HWRM shall ignore
4405 * the enabled auto_XXX field. When this bit is set to zero, the
4406 * link shall be allowed to autoneg.
4408 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
4410 * When this bit is set to '1', the auto-negotiation process
4411 * shall be restarted on the link.
4413 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
4415 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4416 * is requested to be enabled on this link. If EEE is not
4417 * supported on this port, then this flag shall be ignored by
4420 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
4422 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4423 * is requested to be disabled on this link. If EEE is not
4424 * supported on this port, then this flag shall be ignored by
4427 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
4429 * When this bit is set to '1' and EEE is enabled on this link,
4430 * then TX LPI is requested to be enabled on the link. If EEE is
4431 * not supported on this port, then this flag shall be ignored
4432 * by the HWRM. If EEE is disabled on this port, then this flag
4433 * shall be ignored by the HWRM.
4435 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40)
4437 * When this bit is set to '1' and EEE is enabled on this link,
4438 * then TX LPI is requested to be disabled on the link. If EEE
4439 * is not supported on this port, then this flag shall be
4440 * ignored by the HWRM. If EEE is disabled on this port, then
4441 * this flag shall be ignored by the HWRM.
4443 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
4445 * When set to 1, then the HWRM shall enable FEC
4446 * autonegotitation on this port if supported. When set to 0,
4447 * then this flag shall be ignored. If FEC autonegotiation is
4448 * not supported, then the HWRM shall ignore this flag.
4450 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100)
4452 * When set to 1, then the HWRM shall disable FEC
4453 * autonegotiation on this port if supported. When set to 0,
4454 * then this flag shall be ignored. If FEC autonegotiation is
4455 * not supported, then the HWRM shall ignore this flag.
4457 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE \
4460 * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
4461 * Code) on this port if supported. When set to 0, then this
4462 * flag shall be ignored. If FEC CLAUSE 74 is not supported,
4463 * then the HWRM shall ignore this flag.
4465 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE \
4468 * When set to 1, then the HWRM shall disable FEC CLAUSE 74
4469 * (Fire Code) on this port if supported. When set to 0, then
4470 * this flag shall be ignored. If FEC CLAUSE 74 is not
4471 * supported, then the HWRM shall ignore this flag.
4473 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE \
4476 * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
4477 * Solomon) on this port if supported. When set to 0, then this
4478 * flag shall be ignored. If FEC CLAUSE 91 is not supported,
4479 * then the HWRM shall ignore this flag.
4481 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE \
4484 * When set to 1, then the HWRM shall disable FEC CLAUSE 91
4485 * (Reed Solomon) on this port if supported. When set to 0, then
4486 * this flag shall be ignored. If FEC CLAUSE 91 is not
4487 * supported, then the HWRM shall ignore this flag.
4489 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE \
4492 * When this bit is set to '1', the link shall be forced to be
4493 * taken down. # When this bit is set to '1", all other command
4494 * input settings related to the link speed shall be ignored.
4495 * Once the link state is forced down, it can be explicitly
4496 * cleared from that state by setting this flag to '0'. # If
4497 * this flag is set to '0', then the link shall be cleared from
4498 * forced down state if the link is in forced down state. There
4499 * may be conditions (e.g. out-of-band or sideband configuration
4500 * changes for the link) outside the scope of the HWRM
4501 * implementation that may clear forced down link state.
4503 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DWN UINT32_C(0x4000)
4505 /* This bit must be '1' for the auto_mode field to be configured. */
4506 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
4507 /* This bit must be '1' for the auto_duplex field to be configured. */
4508 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
4509 /* This bit must be '1' for the auto_pause field to be configured. */
4510 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
4512 * This bit must be '1' for the auto_link_speed field to be
4515 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
4517 * This bit must be '1' for the auto_link_speed_mask field to be
4520 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
4522 /* This bit must be '1' for the wirespeed field to be configured. */
4523 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20)
4524 /* This bit must be '1' for the lpbk field to be configured. */
4525 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
4526 /* This bit must be '1' for the preemphasis field to be configured. */
4527 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
4528 /* This bit must be '1' for the force_pause field to be configured. */
4529 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
4531 * This bit must be '1' for the eee_link_speed_mask field to be
4534 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
4536 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
4537 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
4539 /* Port ID of port that is to be configured. */
4540 uint16_t force_link_speed;
4542 * This is the speed that will be used if the force bit is '1'.
4543 * If unsupported speed is selected, an error will be generated.
4545 /* 100Mb link speed */
4546 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4547 /* 1Gb link speed */
4548 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4549 /* 2Gb link speed */
4550 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4551 /* 2.5Gb link speed */
4552 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4553 /* 10Gb link speed */
4554 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4555 /* 20Mb link speed */
4556 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4557 /* 25Gb link speed */
4558 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4559 /* 40Gb link speed */
4560 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
4561 /* 50Gb link speed */
4562 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
4563 /* 100Gb link speed */
4564 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
4565 /* 10Mb link speed */
4566 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
4569 * This value is used to identify what autoneg mode is used when
4570 * the link speed is not being forced.
4573 * Disable autoneg or autoneg disabled. No
4574 * speeds are selected.
4576 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0)
4577 /* Select all possible speeds for autoneg mode. */
4578 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
4580 * Select only the auto_link_speed speed for
4581 * autoneg mode. This mode has been DEPRECATED.
4582 * An HWRM client should not use this mode.
4584 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
4586 * Select the auto_link_speed or any speed below
4587 * that speed for autoneg. This mode has been
4588 * DEPRECATED. An HWRM client should not use
4591 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
4593 * Select the speeds based on the corresponding
4594 * link speed mask value that is provided.
4596 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
4597 uint8_t auto_duplex;
4599 * This is the duplex setting that will be used if the
4600 * autoneg_mode is "one_speed" or "one_or_below".
4602 /* Half Duplex will be requested. */
4603 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0)
4604 /* Full duplex will be requested. */
4605 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1)
4606 /* Both Half and Full dupex will be requested. */
4607 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2)
4610 * This value is used to configure the pause that will be used
4611 * for autonegotiation. Add text on the usage of auto_pause and
4615 * When this bit is '1', Generation of tx pause messages has
4616 * been requested. Disabled otherwise.
4618 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
4620 * When this bit is '1', Reception of rx pause messages has been
4621 * requested. Disabled otherwise.
4623 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
4625 * When set to 1, the advertisement of pause is enabled. # When
4626 * the auto_mode is not set to none and this flag is set to 1,
4627 * then the auto_pause bits on this port are being advertised
4628 * and autoneg pause results are being interpreted. # When the
4629 * auto_mode is not set to none and this flag is set to 0, the
4630 * pause is forced as indicated in force_pause, and also
4631 * advertised as auto_pause bits, but the autoneg results are
4632 * not interpreted since the pause configuration is being
4633 * forced. # When the auto_mode is set to none and this flag is
4634 * set to 1, auto_pause bits should be ignored and should be set
4637 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
4639 uint16_t auto_link_speed;
4641 * This is the speed that will be used if the autoneg_mode is
4642 * "one_speed" or "one_or_below". If an unsupported speed is
4643 * selected, an error will be generated.
4645 /* 100Mb link speed */
4646 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
4647 /* 1Gb link speed */
4648 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
4649 /* 2Gb link speed */
4650 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
4651 /* 2.5Gb link speed */
4652 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
4653 /* 10Gb link speed */
4654 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
4655 /* 20Mb link speed */
4656 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
4657 /* 25Gb link speed */
4658 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
4659 /* 40Gb link speed */
4660 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
4661 /* 50Gb link speed */
4662 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
4663 /* 100Gb link speed */
4664 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
4665 /* 10Mb link speed */
4666 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
4667 uint16_t auto_link_speed_mask;
4669 * This is a mask of link speeds that will be used if
4670 * autoneg_mode is "mask". If unsupported speed is enabled an
4671 * error will be generated.
4673 /* 100Mb link speed (Half-duplex) */
4674 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
4676 /* 100Mb link speed (Full-duplex) */
4677 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
4679 /* 1Gb link speed (Half-duplex) */
4680 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
4682 /* 1Gb link speed (Full-duplex) */
4683 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
4685 /* 2Gb link speed */
4686 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
4688 /* 2.5Gb link speed */
4689 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
4691 /* 10Gb link speed */
4692 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4693 /* 20Gb link speed */
4694 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
4695 /* 25Gb link speed */
4696 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
4698 /* 40Gb link speed */
4699 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
4701 /* 50Gb link speed */
4702 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
4704 /* 100Gb link speed */
4705 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
4707 /* 10Mb link speed (Half-duplex) */
4708 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
4710 /* 10Mb link speed (Full-duplex) */
4711 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
4714 /* This value controls the wirespeed feature. */
4715 /* Wirespeed feature is disabled. */
4716 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
4717 /* Wirespeed feature is enabled. */
4718 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_ON UINT32_C(0x1)
4720 /* This value controls the loopback setting for the PHY. */
4721 /* No loopback is selected. Normal operation. */
4722 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
4724 * The HW will be configured with local loopback
4725 * such that host data is sent back to the host
4726 * without modification.
4728 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
4730 * The HW will be configured with remote
4731 * loopback such that port logic will send
4732 * packets back out the transmitter that are
4735 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
4736 uint8_t force_pause;
4738 * This value is used to configure the pause that will be used
4742 * When this bit is '1', Generation of tx pause messages is
4743 * supported. Disabled otherwise.
4745 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
4747 * When this bit is '1', Reception of rx pause messages is
4748 * supported. Disabled otherwise.
4750 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
4752 uint32_t preemphasis;
4754 * This value controls the pre-emphasis to be used for the link.
4755 * Driver should not set this value (use enable.preemphasis = 0)
4756 * unless driver is sure of setting. Normally HWRM FW will
4757 * determine proper pre-emphasis.
4759 uint16_t eee_link_speed_mask;
4761 * Setting for link speed mask that is used to advertise speeds
4762 * during autonegotiation when EEE is enabled. This field is
4763 * valid only when EEE is enabled. The speeds specified in this
4764 * field shall be a subset of speeds specified in
4765 * auto_link_speed_mask. If EEE is enabled,then at least one
4766 * speed shall be provided in this mask.
4769 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
4770 /* 100Mb link speed (Full-duplex) */
4771 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
4773 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
4774 /* 1Gb link speed (Full-duplex) */
4775 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
4777 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
4779 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
4780 /* 10Gb link speed */
4781 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4784 uint32_t tx_lpi_timer;
4787 * Reuested setting of TX LPI timer in microseconds. This field
4788 * is valid only when EEE is enabled and TX LPI is enabled.
4790 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
4791 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
4792 } __attribute__((packed));
4794 /* Output (16 bytes) */
4795 struct hwrm_port_phy_cfg_output {
4796 uint16_t error_code;
4798 * Pass/Fail or error type Note: receiver to verify the in
4799 * parameters, and fail the call with an error when appropriate
4802 /* This field returns the type of original request. */
4804 /* This field provides original sequence number of the command. */
4807 * This field is the length of the response in bytes. The last
4808 * byte of the response is a valid flag that will read as '1'
4809 * when the command has been completely written to memory.
4817 * This field is used in Output records to indicate that the
4818 * output is completely written to RAM. This field should be
4819 * read as '1' to indicate that the output has been completely
4820 * written. When writing a command completion or response to an
4821 * internal processor, the order of writes has to be such that
4822 * this field is written last.
4824 } __attribute__((packed));
4826 /* hwrm_port_phy_qcfg */
4827 /* Description: This command queries the PHY configuration for the port. */
4828 /* Input (24 bytes) */
4829 struct hwrm_port_phy_qcfg_input {
4832 * This value indicates what type of request this is. The format
4833 * for the rest of the command is determined by this field.
4837 * This value indicates the what completion ring the request
4838 * will be optionally completed on. If the value is -1, then no
4839 * CR completion will be generated. Any other value must be a
4840 * valid CR ring_id value for this function.
4843 /* This value indicates the command sequence number. */
4846 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4847 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4852 * This is the host address where the response will be written
4853 * when the request is complete. This area must be 16B aligned
4854 * and must be cleared to zero before the request is made.
4857 /* Port ID of port that is to be queried. */
4858 uint16_t unused_0[3];
4859 } __attribute__((packed));
4861 /* Output (96 bytes) */
4862 struct hwrm_port_phy_qcfg_output {
4863 uint16_t error_code;
4865 * Pass/Fail or error type Note: receiver to verify the in
4866 * parameters, and fail the call with an error when appropriate
4869 /* This field returns the type of original request. */
4871 /* This field provides original sequence number of the command. */
4874 * This field is the length of the response in bytes. The last
4875 * byte of the response is a valid flag that will read as '1'
4876 * when the command has been completely written to memory.
4879 /* This value indicates the current link status. */
4880 /* There is no link or cable detected. */
4881 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0)
4882 /* There is no link, but a cable has been detected. */
4883 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1)
4884 /* There is a link. */
4885 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2)
4887 uint16_t link_speed;
4888 /* This value indicates the current link speed of the connection. */
4889 /* 100Mb link speed */
4890 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1)
4891 /* 1Gb link speed */
4892 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa)
4893 /* 2Gb link speed */
4894 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14)
4895 /* 2.5Gb link speed */
4896 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19)
4897 /* 10Gb link speed */
4898 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64)
4899 /* 20Mb link speed */
4900 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8)
4901 /* 25Gb link speed */
4902 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa)
4903 /* 40Gb link speed */
4904 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190)
4905 /* 50Gb link speed */
4906 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4)
4907 /* 100Gb link speed */
4908 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8)
4909 /* 10Mb link speed */
4910 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff)
4912 /* This value is indicates the duplex of the current connection. */
4913 /* Half Duplex connection. */
4914 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF UINT32_C(0x0)
4915 /* Full duplex connection. */
4916 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL UINT32_C(0x1)
4919 * This value is used to indicate the current pause
4920 * configuration. When autoneg is enabled, this value represents
4921 * the autoneg results of pause configuration.
4924 * When this bit is '1', Generation of tx pause messages is
4925 * supported. Disabled otherwise.
4927 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
4929 * When this bit is '1', Reception of rx pause messages is
4930 * supported. Disabled otherwise.
4932 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
4933 uint16_t support_speeds;
4935 * The supported speeds for the port. This is a bit mask. For
4936 * each speed that is supported, the corrresponding bit will be
4939 /* 100Mb link speed (Half-duplex) */
4940 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
4941 /* 100Mb link speed (Full-duplex) */
4942 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
4943 /* 1Gb link speed (Half-duplex) */
4944 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
4945 /* 1Gb link speed (Full-duplex) */
4946 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
4947 /* 2Gb link speed */
4948 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
4949 /* 2.5Gb link speed */
4950 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
4951 /* 10Gb link speed */
4952 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
4953 /* 20Gb link speed */
4954 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
4955 /* 25Gb link speed */
4956 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
4957 /* 40Gb link speed */
4958 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
4959 /* 50Gb link speed */
4960 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
4961 /* 100Gb link speed */
4962 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
4963 /* 10Mb link speed (Half-duplex) */
4964 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
4965 /* 10Mb link speed (Full-duplex) */
4966 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
4967 uint16_t force_link_speed;
4969 * Current setting of forced link speed. When the link speed is
4970 * not being forced, this value shall be set to 0.
4972 /* 100Mb link speed */
4973 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4974 /* 1Gb link speed */
4975 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4976 /* 2Gb link speed */
4977 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4978 /* 2.5Gb link speed */
4979 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4980 /* 10Gb link speed */
4981 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4982 /* 20Mb link speed */
4983 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4984 /* 25Gb link speed */
4985 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4986 /* 40Gb link speed */
4987 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
4988 /* 50Gb link speed */
4989 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
4990 /* 100Gb link speed */
4991 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
4992 /* 10Mb link speed */
4993 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
4995 /* Current setting of auto negotiation mode. */
4997 * Disable autoneg or autoneg disabled. No
4998 * speeds are selected.
5000 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0)
5001 /* Select all possible speeds for autoneg mode. */
5002 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
5004 * Select only the auto_link_speed speed for
5005 * autoneg mode. This mode has been DEPRECATED.
5006 * An HWRM client should not use this mode.
5008 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
5010 * Select the auto_link_speed or any speed below
5011 * that speed for autoneg. This mode has been
5012 * DEPRECATED. An HWRM client should not use
5015 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
5017 * Select the speeds based on the corresponding
5018 * link speed mask value that is provided.
5020 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
5023 * Current setting of pause autonegotiation. Move autoneg_pause
5027 * When this bit is '1', Generation of tx pause messages has
5028 * been requested. Disabled otherwise.
5030 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
5032 * When this bit is '1', Reception of rx pause messages has been
5033 * requested. Disabled otherwise.
5035 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
5037 * When set to 1, the advertisement of pause is enabled. # When
5038 * the auto_mode is not set to none and this flag is set to 1,
5039 * then the auto_pause bits on this port are being advertised
5040 * and autoneg pause results are being interpreted. # When the
5041 * auto_mode is not set to none and this flag is set to 0, the
5042 * pause is forced as indicated in force_pause, and also
5043 * advertised as auto_pause bits, but the autoneg results are
5044 * not interpreted since the pause configuration is being
5045 * forced. # When the auto_mode is set to none and this flag is
5046 * set to 1, auto_pause bits should be ignored and should be set
5049 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
5050 uint16_t auto_link_speed;
5052 * Current setting for auto_link_speed. This field is only valid
5053 * when auto_mode is set to "one_speed" or "one_or_below".
5055 /* 100Mb link speed */
5056 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
5057 /* 1Gb link speed */
5058 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
5059 /* 2Gb link speed */
5060 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
5061 /* 2.5Gb link speed */
5062 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
5063 /* 10Gb link speed */
5064 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
5065 /* 20Mb link speed */
5066 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
5067 /* 25Gb link speed */
5068 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
5069 /* 40Gb link speed */
5070 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
5071 /* 50Gb link speed */
5072 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
5073 /* 100Gb link speed */
5074 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
5075 /* 10Mb link speed */
5076 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
5077 uint16_t auto_link_speed_mask;
5079 * Current setting for auto_link_speed_mask that is used to
5080 * advertise speeds during autonegotiation. This field is only
5081 * valid when auto_mode is set to "mask". The speeds specified
5082 * in this field shall be a subset of supported speeds on this
5085 /* 100Mb link speed (Half-duplex) */
5086 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
5088 /* 100Mb link speed (Full-duplex) */
5089 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
5091 /* 1Gb link speed (Half-duplex) */
5092 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
5094 /* 1Gb link speed (Full-duplex) */
5095 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
5096 /* 2Gb link speed */
5097 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
5099 /* 2.5Gb link speed */
5100 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
5102 /* 10Gb link speed */
5103 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
5105 /* 20Gb link speed */
5106 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
5108 /* 25Gb link speed */
5109 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
5111 /* 40Gb link speed */
5112 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
5114 /* 50Gb link speed */
5115 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
5117 /* 100Gb link speed */
5118 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
5120 /* 10Mb link speed (Half-duplex) */
5121 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
5123 /* 10Mb link speed (Full-duplex) */
5124 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
5127 /* Current setting for wirespeed. */
5128 /* Wirespeed feature is disabled. */
5129 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
5130 /* Wirespeed feature is enabled. */
5131 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_ON UINT32_C(0x1)
5133 /* Current setting for loopback. */
5134 /* No loopback is selected. Normal operation. */
5135 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
5137 * The HW will be configured with local loopback
5138 * such that host data is sent back to the host
5139 * without modification.
5141 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
5143 * The HW will be configured with remote
5144 * loopback such that port logic will send
5145 * packets back out the transmitter that are
5148 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
5149 uint8_t force_pause;
5151 * Current setting of forced pause. When the pause configuration
5152 * is not being forced, then this value shall be set to 0.
5155 * When this bit is '1', Generation of tx pause messages is
5156 * supported. Disabled otherwise.
5158 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1)
5160 * When this bit is '1', Reception of rx pause messages is
5161 * supported. Disabled otherwise.
5163 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2)
5164 uint8_t module_status;
5166 * This value indicates the current status of the optics module
5169 /* Module is inserted and accepted */
5170 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
5171 /* Module is rejected and transmit side Laser is disabled. */
5172 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX UINT32_C(0x1)
5173 /* Module mismatch warning. */
5174 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG UINT32_C(0x2)
5175 /* Module is rejected and powered down. */
5176 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
5177 /* Module is not inserted. */
5178 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
5180 /* Module status is not applicable. */
5181 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
5183 uint32_t preemphasis;
5184 /* Current setting for preemphasis. */
5186 /* This field represents the major version of the PHY. */
5188 /* This field represents the minor version of the PHY. */
5190 /* This field represents the build version of the PHY. */
5192 /* This value represents a PHY type. */
5194 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
5196 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
5197 /* BASE-KR4 (Deprecated) */
5198 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
5200 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
5202 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
5203 /* BASE-KR2 (Deprecated) */
5204 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
5206 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
5208 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7)
5210 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8)
5211 /* EEE capable BASE-T */
5212 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
5213 /* SGMII connected external PHY */
5214 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
5215 /* 25G_BASECR_CA_L */
5216 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_L UINT32_C(0xb)
5217 /* 25G_BASECR_CA_S */
5218 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_S UINT32_C(0xc)
5219 /* 25G_BASECR_CA_N */
5220 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_N UINT32_C(0xd)
5222 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASESR UINT32_C(0xe)
5224 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASECR4 UINT32_C(0xf)
5226 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR4 UINT32_C(0x10)
5228 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASELR4 UINT32_C(0x11)
5230 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASEER4 UINT32_C(0x12)
5232 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR10 UINT32_C(0x13)
5234 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASECR4 UINT32_C(0x14)
5236 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASESR4 UINT32_C(0x15)
5238 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASELR4 UINT32_C(0x16)
5240 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASEER4 UINT32_C(0x17)
5241 /* 40G_ACTIVE_CABLE */
5242 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_ACTIVE_CABLE \
5245 /* This value represents a media type. */
5247 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0)
5249 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1)
5250 /* Direct Attached Copper */
5251 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2)
5253 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3)
5254 uint8_t xcvr_pkg_type;
5255 /* This value represents a transceiver type. */
5256 /* PHY and MAC are in the same package */
5257 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
5259 /* PHY and MAC are in different packages */
5260 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
5262 uint8_t eee_config_phy_addr;
5264 * This field represents flags related to EEE configuration.
5265 * These EEE configuration flags are valid only when the
5266 * auto_mode is not set to none (in other words autonegotiation
5269 /* This field represents PHY address. */
5270 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
5271 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
5273 * When set to 1, Energy Efficient Ethernet (EEE) mode is
5274 * enabled. Speeds for autoneg with EEE mode enabled are based
5275 * on eee_link_speed_mask.
5277 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED UINT32_C(0x20)
5279 * This flag is valid only when eee_enabled is set to 1. # If
5280 * eee_enabled is set to 0, then EEE mode is disabled and this
5281 * flag shall be ignored. # If eee_enabled is set to 1 and this
5282 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5283 * is enabled and in use. # If eee_enabled is set to 1 and this
5284 * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
5285 * is enabled but is currently not in use.
5287 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
5289 * This flag is valid only when eee_enabled is set to 1. # If
5290 * eee_enabled is set to 0, then EEE mode is disabled and this
5291 * flag shall be ignored. # If eee_enabled is set to 1 and this
5292 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5293 * is enabled and TX LPI is enabled. # If eee_enabled is set to
5294 * 1 and this flag is set to 0, then Energy Efficient Ethernet
5295 * (EEE) mode is enabled but TX LPI is disabled.
5297 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
5299 * This field represents flags related to EEE configuration.
5300 * These EEE configuration flags are valid only when the
5301 * auto_mode is not set to none (in other words autonegotiation
5304 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
5305 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
5306 uint8_t parallel_detect;
5307 /* Reserved field, set to 0 */
5309 * When set to 1, the parallel detection is used to determine
5310 * the speed of the link partner. Parallel detection is used
5311 * when a autonegotiation capable device is connected to a link
5312 * parter that is not capable of autonegotiation.
5314 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1)
5315 /* Reserved field, set to 0 */
5316 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
5317 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
5318 uint16_t link_partner_adv_speeds;
5320 * The advertised speeds for the port by the link partner. Each
5321 * advertised speed will be set to '1'.
5323 /* 100Mb link speed (Half-duplex) */
5324 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
5326 /* 100Mb link speed (Full-duplex) */
5327 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
5329 /* 1Gb link speed (Half-duplex) */
5330 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
5332 /* 1Gb link speed (Full-duplex) */
5333 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
5335 /* 2Gb link speed */
5336 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
5338 /* 2.5Gb link speed */
5339 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
5341 /* 10Gb link speed */
5342 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
5344 /* 20Gb link speed */
5345 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
5347 /* 25Gb link speed */
5348 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
5350 /* 40Gb link speed */
5351 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
5353 /* 50Gb link speed */
5354 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
5356 /* 100Gb link speed */
5357 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
5359 /* 10Mb link speed (Half-duplex) */
5360 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
5362 /* 10Mb link speed (Full-duplex) */
5363 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
5365 uint8_t link_partner_adv_auto_mode;
5367 * The advertised autoneg for the port by the link partner. This
5368 * field is deprecated and should be set to 0.
5371 * Disable autoneg or autoneg disabled. No
5372 * speeds are selected.
5374 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
5376 /* Select all possible speeds for autoneg mode. */
5378 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \
5381 * Select only the auto_link_speed speed for
5382 * autoneg mode. This mode has been DEPRECATED.
5383 * An HWRM client should not use this mode.
5386 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
5389 * Select the auto_link_speed or any speed below
5390 * that speed for autoneg. This mode has been
5391 * DEPRECATED. An HWRM client should not use
5395 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
5398 * Select the speeds based on the corresponding
5399 * link speed mask value that is provided.
5402 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \
5404 uint8_t link_partner_adv_pause;
5405 /* The advertised pause settings on the port by the link partner. */
5407 * When this bit is '1', Generation of tx pause messages is
5408 * supported. Disabled otherwise.
5410 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
5413 * When this bit is '1', Reception of rx pause messages is
5414 * supported. Disabled otherwise.
5416 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
5418 uint16_t adv_eee_link_speed_mask;
5420 * Current setting for link speed mask that is used to advertise
5421 * speeds during autonegotiation when EEE is enabled. This field
5422 * is valid only when eee_enabled flags is set to 1. The speeds
5423 * specified in this field shall be a subset of speeds specified
5424 * in auto_link_speed_mask.
5427 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5429 /* 100Mb link speed (Full-duplex) */
5430 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
5433 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5435 /* 1Gb link speed (Full-duplex) */
5436 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
5439 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5442 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5444 /* 10Gb link speed */
5445 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
5447 uint16_t link_partner_adv_eee_link_speed_mask;
5449 * Current setting for link speed mask that is advertised by the
5450 * link partner when EEE is enabled. This field is valid only
5451 * when eee_enabled flags is set to 1.
5455 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5457 /* 100Mb link speed (Full-duplex) */
5459 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
5463 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5465 /* 1Gb link speed (Full-duplex) */
5467 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
5471 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5475 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5477 /* 10Gb link speed */
5479 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
5481 uint32_t xcvr_identifier_type_tx_lpi_timer;
5482 /* This value represents transceiver identifier type. */
5484 * Current setting of TX LPI timer in microseconds. This field
5485 * is valid only when_eee_enabled flag is set to 1 and
5486 * tx_lpi_enabled is set to 1.
5488 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
5489 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
5490 /* This value represents transceiver identifier type. */
5491 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
5492 UINT32_C(0xff000000)
5493 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
5495 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
5496 (UINT32_C(0x0) << 24)
5497 /* SFP/SFP+/SFP28 */
5498 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
5499 (UINT32_C(0x3) << 24)
5501 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
5502 (UINT32_C(0xc) << 24)
5504 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
5505 (UINT32_C(0xd) << 24)
5507 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
5508 (UINT32_C(0x11) << 24)
5511 * This value represents the current configuration of Forward
5512 * Error Correction (FEC) on the port.
5515 * When set to 1, then FEC is not supported on this port. If
5516 * this flag is set to 1, then all other FEC configuration flags
5517 * shall be ignored. When set to 0, then FEC is supported as
5518 * indicated by other configuration flags. If no cable is
5519 * attached and the HWRM does not yet know the FEC capability,
5520 * then the HWRM shall set this flag to 1 when reporting FEC
5523 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
5526 * When set to 1, then FEC autonegotiation is supported on this
5527 * port. When set to 0, then FEC autonegotiation is not
5528 * supported on this port.
5530 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED \
5533 * When set to 1, then FEC autonegotiation is enabled on this
5534 * port. When set to 0, then FEC autonegotiation is disabled if
5535 * supported. This flag should be ignored if FEC autonegotiation
5536 * is not supported on this port.
5538 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \
5541 * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
5542 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5543 * not supported on this port.
5545 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \
5548 * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
5549 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5550 * disabled if supported. This flag should be ignored if FEC
5551 * CLAUSE 74 is not supported on this port.
5553 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \
5556 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
5557 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5558 * Solomon) is not supported on this port.
5560 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \
5563 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
5564 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5565 * Solomon) is disabled if supported. This flag should be
5566 * ignored if FEC CLAUSE 91 is not supported on this port.
5568 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED \
5572 char phy_vendor_name[16];
5574 * Up to 16 bytes of null padded ASCII string representing PHY
5575 * vendor. If the string is set to null, then the vendor name is
5578 char phy_vendor_partnumber[16];
5580 * Up to 16 bytes of null padded ASCII string that identifies
5581 * vendor specific part number of the PHY. If the string is set
5582 * to null, then the vendor specific part number is not
5591 * This field is used in Output records to indicate that the
5592 * output is completely written to RAM. This field should be
5593 * read as '1' to indicate that the output has been completely
5594 * written. When writing a command completion or response to an
5595 * internal processor, the order of writes has to be such that
5596 * this field is written last.
5598 } __attribute__((packed));
5600 /* hwrm_port_qstats */
5601 /* Description: This function returns per port Ethernet statistics. */
5602 /* Input (40 bytes) */
5603 struct hwrm_port_qstats_input {
5606 * This value indicates what type of request this is. The format
5607 * for the rest of the command is determined by this field.
5611 * This value indicates the what completion ring the request
5612 * will be optionally completed on. If the value is -1, then no
5613 * CR completion will be generated. Any other value must be a
5614 * valid CR ring_id value for this function.
5617 /* This value indicates the command sequence number. */
5620 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5621 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5626 * This is the host address where the response will be written
5627 * when the request is complete. This area must be 16B aligned
5628 * and must be cleared to zero before the request is made.
5631 /* Port ID of port that is being queried. */
5634 uint8_t unused_2[3];
5636 uint64_t tx_stat_host_addr;
5637 /* This is the host address where Tx port statistics will be stored */
5638 uint64_t rx_stat_host_addr;
5639 /* This is the host address where Rx port statistics will be stored */
5640 } __attribute__((packed));
5642 /* Output (16 bytes) */
5643 struct hwrm_port_qstats_output {
5644 uint16_t error_code;
5646 * Pass/Fail or error type Note: receiver to verify the in
5647 * parameters, and fail the call with an error when appropriate
5650 /* This field returns the type of original request. */
5652 /* This field provides original sequence number of the command. */
5655 * This field is the length of the response in bytes. The last
5656 * byte of the response is a valid flag that will read as '1'
5657 * when the command has been completely written to memory.
5659 uint16_t tx_stat_size;
5660 /* The size of TX port statistics block in bytes. */
5661 uint16_t rx_stat_size;
5662 /* The size of RX port statistics block in bytes. */
5668 * This field is used in Output records to indicate that the
5669 * output is completely written to RAM. This field should be
5670 * read as '1' to indicate that the output has been completely
5671 * written. When writing a command completion or response to an
5672 * internal processor, the order of writes has to be such that
5673 * this field is written last.
5675 } __attribute__((packed));
5677 /* hwrm_port_clr_stats */
5679 * Description: This function clears per port statistics. The HWRM shall not
5680 * allow a VF driver to clear port statistics. The HWRM shall not allow a PF
5681 * driver to clear port statistics in a partitioning mode. The HWRM may allow a
5682 * PF driver to clear port statistics in the non-partitioning mode.
5684 /* Input (24 bytes) */
5685 struct hwrm_port_clr_stats_input {
5688 * This value indicates what type of request this is. The format
5689 * for the rest of the command is determined by this field.
5693 * This value indicates the what completion ring the request
5694 * will be optionally completed on. If the value is -1, then no
5695 * CR completion will be generated. Any other value must be a
5696 * valid CR ring_id value for this function.
5699 /* This value indicates the command sequence number. */
5702 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5703 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5708 * This is the host address where the response will be written
5709 * when the request is complete. This area must be 16B aligned
5710 * and must be cleared to zero before the request is made.
5713 /* Port ID of port that is being queried. */
5714 uint16_t unused_0[3];
5715 } __attribute__((packed));
5717 /* Output (16 bytes) */
5718 struct hwrm_port_clr_stats_output {
5719 uint16_t error_code;
5721 * Pass/Fail or error type Note: receiver to verify the in
5722 * parameters, and fail the call with an error when appropriate
5725 /* This field returns the type of original request. */
5727 /* This field provides original sequence number of the command. */
5730 * This field is the length of the response in bytes. The last
5731 * byte of the response is a valid flag that will read as '1'
5732 * when the command has been completely written to memory.
5740 * This field is used in Output records to indicate that the
5741 * output is completely written to RAM. This field should be
5742 * read as '1' to indicate that the output has been completely
5743 * written. When writing a command completion or response to an
5744 * internal processor, the order of writes has to be such that
5745 * this field is written last.
5747 } __attribute__((packed));
5749 /* hwrm_port_led_cfg */
5751 * Description: This function is used to configure LEDs on a given port. Each
5752 * port has individual set of LEDs associated with it. These LEDs are used for
5753 * speed/link configuration as well as activity indicator configuration. Up to
5754 * three LEDs can be configured, one for activity and two for speeds.
5756 /* Input (64 bytes) */
5757 struct hwrm_port_led_cfg_input {
5760 * This value indicates what type of request this is. The format
5761 * for the rest of the command is determined by this field.
5765 * This value indicates the what completion ring the request
5766 * will be optionally completed on. If the value is -1, then no
5767 * CR completion will be generated. Any other value must be a
5768 * valid CR ring_id value for this function.
5771 /* This value indicates the command sequence number. */
5774 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5775 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5780 * This is the host address where the response will be written
5781 * when the request is complete. This area must be 16B aligned
5782 * and must be cleared to zero before the request is made.
5785 /* This bit must be '1' for the led0_id field to be configured. */
5786 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID UINT32_C(0x1)
5787 /* This bit must be '1' for the led0_state field to be configured. */
5788 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE UINT32_C(0x2)
5789 /* This bit must be '1' for the led0_color field to be configured. */
5790 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_COLOR UINT32_C(0x4)
5792 * This bit must be '1' for the led0_blink_on field to be
5795 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON UINT32_C(0x8)
5797 * This bit must be '1' for the led0_blink_off field to be
5800 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF UINT32_C(0x10)
5802 * This bit must be '1' for the led0_group_id field to be
5805 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID UINT32_C(0x20)
5806 /* This bit must be '1' for the led1_id field to be configured. */
5807 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_ID UINT32_C(0x40)
5808 /* This bit must be '1' for the led1_state field to be configured. */
5809 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_STATE UINT32_C(0x80)
5810 /* This bit must be '1' for the led1_color field to be configured. */
5811 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_COLOR UINT32_C(0x100)
5813 * This bit must be '1' for the led1_blink_on field to be
5816 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_ON UINT32_C(0x200)
5818 * This bit must be '1' for the led1_blink_off field to be
5821 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_OFF UINT32_C(0x400)
5823 * This bit must be '1' for the led1_group_id field to be
5826 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_GROUP_ID UINT32_C(0x800)
5827 /* This bit must be '1' for the led2_id field to be configured. */
5828 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_ID UINT32_C(0x1000)
5829 /* This bit must be '1' for the led2_state field to be configured. */
5830 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_STATE UINT32_C(0x2000)
5831 /* This bit must be '1' for the led2_color field to be configured. */
5832 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_COLOR UINT32_C(0x4000)
5834 * This bit must be '1' for the led2_blink_on field to be
5837 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_ON UINT32_C(0x8000)
5839 * This bit must be '1' for the led2_blink_off field to be
5842 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_OFF UINT32_C(0x10000)
5844 * This bit must be '1' for the led2_group_id field to be
5847 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_GROUP_ID UINT32_C(0x20000)
5848 /* This bit must be '1' for the led3_id field to be configured. */
5849 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_ID UINT32_C(0x40000)
5850 /* This bit must be '1' for the led3_state field to be configured. */
5851 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_STATE UINT32_C(0x80000)
5852 /* This bit must be '1' for the led3_color field to be configured. */
5853 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_COLOR UINT32_C(0x100000)
5855 * This bit must be '1' for the led3_blink_on field to be
5858 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_ON UINT32_C(0x200000)
5860 * This bit must be '1' for the led3_blink_off field to be
5863 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_OFF \
5866 * This bit must be '1' for the led3_group_id field to be
5869 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_GROUP_ID UINT32_C(0x800000)
5871 /* Port ID of port whose LEDs are configured. */
5874 * The number of LEDs that are being configured. Up to 4 LEDs
5875 * can be configured with this command.
5878 /* Reserved field. */
5880 /* An identifier for the LED #0. */
5882 /* The requested state of the LED #0. */
5883 /* Default state of the LED */
5884 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
5886 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_OFF UINT32_C(0x1)
5888 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_ON UINT32_C(0x2)
5890 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINK UINT32_C(0x3)
5891 /* Blink Alternately */
5892 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
5894 /* The requested color of LED #0. */
5896 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
5898 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_AMBER UINT32_C(0x1)
5900 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREEN UINT32_C(0x2)
5901 /* Green or Amber */
5902 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
5904 uint16_t led0_blink_on;
5906 * If the LED #0 state is "blink" or "blinkalt", then this field
5907 * represents the requested time in milliseconds to keep LED on
5910 uint16_t led0_blink_off;
5912 * If the LED #0 state is "blink" or "blinkalt", then this field
5913 * represents the requested time in milliseconds to keep LED off
5916 uint8_t led0_group_id;
5918 * An identifier for the group of LEDs that LED #0 belongs to.
5919 * If set to 0, then the LED #0 shall not be grouped and shall
5920 * be treated as an individual resource. For all other non-zero
5921 * values of this field, LED #0 shall be grouped together with
5922 * the LEDs with the same group ID value.
5925 /* Reserved field. */
5927 /* An identifier for the LED #1. */
5929 /* The requested state of the LED #1. */
5930 /* Default state of the LED */
5931 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
5933 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_OFF UINT32_C(0x1)
5935 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_ON UINT32_C(0x2)
5937 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINK UINT32_C(0x3)
5938 /* Blink Alternately */
5939 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
5941 /* The requested color of LED #1. */
5943 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
5945 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_AMBER UINT32_C(0x1)
5947 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREEN UINT32_C(0x2)
5948 /* Green or Amber */
5949 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
5951 uint16_t led1_blink_on;
5953 * If the LED #1 state is "blink" or "blinkalt", then this field
5954 * represents the requested time in milliseconds to keep LED on
5957 uint16_t led1_blink_off;
5959 * If the LED #1 state is "blink" or "blinkalt", then this field
5960 * represents the requested time in milliseconds to keep LED off
5963 uint8_t led1_group_id;
5965 * An identifier for the group of LEDs that LED #1 belongs to.
5966 * If set to 0, then the LED #1 shall not be grouped and shall
5967 * be treated as an individual resource. For all other non-zero
5968 * values of this field, LED #1 shall be grouped together with
5969 * the LEDs with the same group ID value.
5972 /* Reserved field. */
5974 /* An identifier for the LED #2. */
5976 /* The requested state of the LED #2. */
5977 /* Default state of the LED */
5978 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
5980 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_OFF UINT32_C(0x1)
5982 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_ON UINT32_C(0x2)
5984 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINK UINT32_C(0x3)
5985 /* Blink Alternately */
5986 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
5988 /* The requested color of LED #2. */
5990 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
5992 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_AMBER UINT32_C(0x1)
5994 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREEN UINT32_C(0x2)
5995 /* Green or Amber */
5996 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
5998 uint16_t led2_blink_on;
6000 * If the LED #2 state is "blink" or "blinkalt", then this field
6001 * represents the requested time in milliseconds to keep LED on
6004 uint16_t led2_blink_off;
6006 * If the LED #2 state is "blink" or "blinkalt", then this field
6007 * represents the requested time in milliseconds to keep LED off
6010 uint8_t led2_group_id;
6012 * An identifier for the group of LEDs that LED #2 belongs to.
6013 * If set to 0, then the LED #2 shall not be grouped and shall
6014 * be treated as an individual resource. For all other non-zero
6015 * values of this field, LED #2 shall be grouped together with
6016 * the LEDs with the same group ID value.
6019 /* Reserved field. */
6021 /* An identifier for the LED #3. */
6023 /* The requested state of the LED #3. */
6024 /* Default state of the LED */
6025 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6027 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_OFF UINT32_C(0x1)
6029 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_ON UINT32_C(0x2)
6031 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINK UINT32_C(0x3)
6032 /* Blink Alternately */
6033 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6035 /* The requested color of LED #3. */
6037 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6039 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6041 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6042 /* Green or Amber */
6043 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6045 uint16_t led3_blink_on;
6047 * If the LED #3 state is "blink" or "blinkalt", then this field
6048 * represents the requested time in milliseconds to keep LED on
6051 uint16_t led3_blink_off;
6053 * If the LED #3 state is "blink" or "blinkalt", then this field
6054 * represents the requested time in milliseconds to keep LED off
6057 uint8_t led3_group_id;
6059 * An identifier for the group of LEDs that LED #3 belongs to.
6060 * If set to 0, then the LED #3 shall not be grouped and shall
6061 * be treated as an individual resource. For all other non-zero
6062 * values of this field, LED #3 shall be grouped together with
6063 * the LEDs with the same group ID value.
6066 /* Reserved field. */
6067 } __attribute__((packed));
6069 /* Output (16 bytes) */
6070 struct hwrm_port_led_cfg_output {
6071 uint16_t error_code;
6073 * Pass/Fail or error type Note: receiver to verify the in
6074 * parameters, and fail the call with an error when appropriate
6077 /* This field returns the type of original request. */
6079 /* This field provides original sequence number of the command. */
6082 * This field is the length of the response in bytes. The last
6083 * byte of the response is a valid flag that will read as '1'
6084 * when the command has been completely written to memory.
6092 * This field is used in Output records to indicate that the
6093 * output is completely written to RAM. This field should be
6094 * read as '1' to indicate that the output has been completely
6095 * written. When writing a command completion or response to an
6096 * internal processor, the order of writes has to be such that
6097 * this field is written last.
6099 } __attribute__((packed));
6101 /* hwrm_port_led_qcfg */
6103 * Description: This function is used to query configuration of LEDs on a given
6104 * port. Each port has individual set of LEDs associated with it. These LEDs are
6105 * used for speed/link configuration as well as activity indicator
6106 * configuration. Up to three LEDs can be configured, one for activity and two
6109 /* Input (24 bytes) */
6110 struct hwrm_port_led_qcfg_input {
6113 * This value indicates what type of request this is. The format
6114 * for the rest of the command is determined by this field.
6118 * This value indicates the what completion ring the request
6119 * will be optionally completed on. If the value is -1, then no
6120 * CR completion will be generated. Any other value must be a
6121 * valid CR ring_id value for this function.
6124 /* This value indicates the command sequence number. */
6127 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6128 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6133 * This is the host address where the response will be written
6134 * when the request is complete. This area must be 16B aligned
6135 * and must be cleared to zero before the request is made.
6138 /* Port ID of port whose LED configuration is being queried. */
6139 uint16_t unused_0[3];
6140 } __attribute__((packed));
6142 /* Output (56 bytes) */
6143 struct hwrm_port_led_qcfg_output {
6144 uint16_t error_code;
6146 * Pass/Fail or error type Note: receiver to verify the in
6147 * parameters, and fail the call with an error when appropriate
6150 /* This field returns the type of original request. */
6152 /* This field provides original sequence number of the command. */
6155 * This field is the length of the response in bytes. The last
6156 * byte of the response is a valid flag that will read as '1'
6157 * when the command has been completely written to memory.
6161 * The number of LEDs that are configured on this port. Up to 4
6162 * LEDs can be returned in the response.
6165 /* An identifier for the LED #0. */
6167 /* The type of LED #0. */
6169 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6171 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6173 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6175 /* The current state of the LED #0. */
6176 /* Default state of the LED */
6177 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
6179 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_OFF UINT32_C(0x1)
6181 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_ON UINT32_C(0x2)
6183 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINK UINT32_C(0x3)
6184 /* Blink Alternately */
6185 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
6187 /* The color of LED #0. */
6189 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
6191 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_AMBER UINT32_C(0x1)
6193 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREEN UINT32_C(0x2)
6194 /* Green or Amber */
6195 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
6197 uint16_t led0_blink_on;
6199 * If the LED #0 state is "blink" or "blinkalt", then this field
6200 * represents the requested time in milliseconds to keep LED on
6203 uint16_t led0_blink_off;
6205 * If the LED #0 state is "blink" or "blinkalt", then this field
6206 * represents the requested time in milliseconds to keep LED off
6209 uint8_t led0_group_id;
6211 * An identifier for the group of LEDs that LED #0 belongs to.
6212 * If set to 0, then the LED #0 is not grouped. For all other
6213 * non-zero values of this field, LED #0 is grouped together
6214 * with the LEDs with the same group ID value.
6217 /* An identifier for the LED #1. */
6219 /* The type of LED #1. */
6221 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6223 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6225 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6227 /* The current state of the LED #1. */
6228 /* Default state of the LED */
6229 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
6231 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_OFF UINT32_C(0x1)
6233 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_ON UINT32_C(0x2)
6235 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINK UINT32_C(0x3)
6236 /* Blink Alternately */
6237 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
6239 /* The color of LED #1. */
6241 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
6243 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_AMBER UINT32_C(0x1)
6245 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREEN UINT32_C(0x2)
6246 /* Green or Amber */
6247 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
6249 uint16_t led1_blink_on;
6251 * If the LED #1 state is "blink" or "blinkalt", then this field
6252 * represents the requested time in milliseconds to keep LED on
6255 uint16_t led1_blink_off;
6257 * If the LED #1 state is "blink" or "blinkalt", then this field
6258 * represents the requested time in milliseconds to keep LED off
6261 uint8_t led1_group_id;
6263 * An identifier for the group of LEDs that LED #1 belongs to.
6264 * If set to 0, then the LED #1 is not grouped. For all other
6265 * non-zero values of this field, LED #1 is grouped together
6266 * with the LEDs with the same group ID value.
6269 /* An identifier for the LED #2. */
6271 /* The type of LED #2. */
6273 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6275 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6277 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6279 /* The current state of the LED #2. */
6280 /* Default state of the LED */
6281 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6283 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_OFF UINT32_C(0x1)
6285 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_ON UINT32_C(0x2)
6287 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINK UINT32_C(0x3)
6288 /* Blink Alternately */
6289 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6291 /* The color of LED #2. */
6293 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6295 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6297 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6298 /* Green or Amber */
6299 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6301 uint16_t led2_blink_on;
6303 * If the LED #2 state is "blink" or "blinkalt", then this field
6304 * represents the requested time in milliseconds to keep LED on
6307 uint16_t led2_blink_off;
6309 * If the LED #2 state is "blink" or "blinkalt", then this field
6310 * represents the requested time in milliseconds to keep LED off
6313 uint8_t led2_group_id;
6315 * An identifier for the group of LEDs that LED #2 belongs to.
6316 * If set to 0, then the LED #2 is not grouped. For all other
6317 * non-zero values of this field, LED #2 is grouped together
6318 * with the LEDs with the same group ID value.
6321 /* An identifier for the LED #3. */
6323 /* The type of LED #3. */
6325 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6327 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6329 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6331 /* The current state of the LED #3. */
6332 /* Default state of the LED */
6333 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6335 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_OFF UINT32_C(0x1)
6337 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_ON UINT32_C(0x2)
6339 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINK UINT32_C(0x3)
6340 /* Blink Alternately */
6341 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6343 /* The color of LED #3. */
6345 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6347 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6349 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6350 /* Green or Amber */
6351 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6353 uint16_t led3_blink_on;
6355 * If the LED #3 state is "blink" or "blinkalt", then this field
6356 * represents the requested time in milliseconds to keep LED on
6359 uint16_t led3_blink_off;
6361 * If the LED #3 state is "blink" or "blinkalt", then this field
6362 * represents the requested time in milliseconds to keep LED off
6365 uint8_t led3_group_id;
6367 * An identifier for the group of LEDs that LED #3 belongs to.
6368 * If set to 0, then the LED #3 is not grouped. For all other
6369 * non-zero values of this field, LED #3 is grouped together
6370 * with the LEDs with the same group ID value.
6379 * This field is used in Output records to indicate that the
6380 * output is completely written to RAM. This field should be
6381 * read as '1' to indicate that the output has been completely
6382 * written. When writing a command completion or response to an
6383 * internal processor, the order of writes has to be such that
6384 * this field is written last.
6386 } __attribute__((packed));
6388 /* hwrm_port_led_qcaps */
6390 * Description: This function is used to query capabilities of LEDs on a given
6391 * port. Each port has individual set of LEDs associated with it. These LEDs are
6392 * used for speed/link configuration as well as activity indicator
6395 /* Input (24 bytes) */
6396 struct hwrm_port_led_qcaps_input {
6399 * This value indicates what type of request this is. The format
6400 * for the rest of the command is determined by this field.
6404 * This value indicates the what completion ring the request
6405 * will be optionally completed on. If the value is -1, then no
6406 * CR completion will be generated. Any other value must be a
6407 * valid CR ring_id value for this function.
6410 /* This value indicates the command sequence number. */
6413 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6414 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6419 * This is the host address where the response will be written
6420 * when the request is complete. This area must be 16B aligned
6421 * and must be cleared to zero before the request is made.
6424 /* Port ID of port whose LED configuration is being queried. */
6425 uint16_t unused_0[3];
6426 } __attribute__((packed));
6428 /* Output (48 bytes) */
6429 struct hwrm_port_led_qcaps_output {
6430 uint16_t error_code;
6432 * Pass/Fail or error type Note: receiver to verify the in
6433 * parameters, and fail the call with an error when appropriate
6436 /* This field returns the type of original request. */
6438 /* This field provides original sequence number of the command. */
6441 * This field is the length of the response in bytes. The last
6442 * byte of the response is a valid flag that will read as '1'
6443 * when the command has been completely written to memory.
6447 * The number of LEDs that are configured on this port. Up to 4
6448 * LEDs can be returned in the response.
6450 uint8_t unused_0[3];
6451 /* Reserved for future use. */
6453 /* An identifier for the LED #0. */
6455 /* The type of LED #0. */
6457 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6459 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6461 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6462 uint8_t led0_group_id;
6464 * An identifier for the group of LEDs that LED #0 belongs to.
6465 * If set to 0, then the LED #0 cannot be grouped. For all other
6466 * non-zero values of this field, LED #0 is grouped together
6467 * with the LEDs with the same group ID value.
6470 uint16_t led0_state_caps;
6471 /* The states supported by LED #0. */
6473 * If set to 1, this LED is enabled. If set to 0, this LED is
6476 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ENABLED UINT32_C(0x1)
6478 * If set to 1, off state is supported on this LED. If set to 0,
6479 * off state is not supported on this LED.
6481 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_OFF_SUPPORTED \
6484 * If set to 1, on state is supported on this LED. If set to 0,
6485 * on state is not supported on this LED.
6487 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ON_SUPPORTED \
6490 * If set to 1, blink state is supported on this LED. If set to
6491 * 0, blink state is not supported on this LED.
6493 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_SUPPORTED \
6496 * If set to 1, blink_alt state is supported on this LED. If set
6497 * to 0, blink_alt state is not supported on this LED.
6499 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED \
6501 uint16_t led0_color_caps;
6502 /* The colors supported by LED #0. */
6504 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_RSVD UINT32_C(0x1)
6506 * If set to 1, Amber color is supported on this LED. If set to
6507 * 0, Amber color is not supported on this LED.
6509 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_AMBER_SUPPORTED \
6512 * If set to 1, Green color is supported on this LED. If set to
6513 * 0, Green color is not supported on this LED.
6515 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_GREEN_SUPPORTED \
6518 /* An identifier for the LED #1. */
6520 /* The type of LED #1. */
6522 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6524 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6526 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6527 uint8_t led1_group_id;
6529 * An identifier for the group of LEDs that LED #1 belongs to.
6530 * If set to 0, then the LED #0 cannot be grouped. For all other
6531 * non-zero values of this field, LED #0 is grouped together
6532 * with the LEDs with the same group ID value.
6535 uint16_t led1_state_caps;
6536 /* The states supported by LED #1. */
6538 * If set to 1, this LED is enabled. If set to 0, this LED is
6541 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ENABLED UINT32_C(0x1)
6543 * If set to 1, off state is supported on this LED. If set to 0,
6544 * off state is not supported on this LED.
6546 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_OFF_SUPPORTED \
6549 * If set to 1, on state is supported on this LED. If set to 0,
6550 * on state is not supported on this LED.
6552 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ON_SUPPORTED \
6555 * If set to 1, blink state is supported on this LED. If set to
6556 * 0, blink state is not supported on this LED.
6558 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_SUPPORTED \
6561 * If set to 1, blink_alt state is supported on this LED. If set
6562 * to 0, blink_alt state is not supported on this LED.
6564 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_ALT_SUPPORTED \
6566 uint16_t led1_color_caps;
6567 /* The colors supported by LED #1. */
6569 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_RSVD UINT32_C(0x1)
6571 * If set to 1, Amber color is supported on this LED. If set to
6572 * 0, Amber color is not supported on this LED.
6574 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_AMBER_SUPPORTED \
6577 * If set to 1, Green color is supported on this LED. If set to
6578 * 0, Green color is not supported on this LED.
6580 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_GREEN_SUPPORTED \
6583 /* An identifier for the LED #2. */
6585 /* The type of LED #2. */
6587 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6589 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6591 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6592 uint8_t led2_group_id;
6594 * An identifier for the group of LEDs that LED #0 belongs to.
6595 * If set to 0, then the LED #0 cannot be grouped. For all other
6596 * non-zero values of this field, LED #0 is grouped together
6597 * with the LEDs with the same group ID value.
6600 uint16_t led2_state_caps;
6601 /* The states supported by LED #2. */
6603 * If set to 1, this LED is enabled. If set to 0, this LED is
6606 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ENABLED UINT32_C(0x1)
6608 * If set to 1, off state is supported on this LED. If set to 0,
6609 * off state is not supported on this LED.
6611 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_OFF_SUPPORTED \
6614 * If set to 1, on state is supported on this LED. If set to 0,
6615 * on state is not supported on this LED.
6617 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ON_SUPPORTED \
6620 * If set to 1, blink state is supported on this LED. If set to
6621 * 0, blink state is not supported on this LED.
6623 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_SUPPORTED \
6626 * If set to 1, blink_alt state is supported on this LED. If set
6627 * to 0, blink_alt state is not supported on this LED.
6629 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_ALT_SUPPORTED \
6631 uint16_t led2_color_caps;
6632 /* The colors supported by LED #2. */
6634 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_RSVD UINT32_C(0x1)
6636 * If set to 1, Amber color is supported on this LED. If set to
6637 * 0, Amber color is not supported on this LED.
6639 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_AMBER_SUPPORTED \
6642 * If set to 1, Green color is supported on this LED. If set to
6643 * 0, Green color is not supported on this LED.
6645 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_GREEN_SUPPORTED \
6648 /* An identifier for the LED #3. */
6650 /* The type of LED #3. */
6652 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6654 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6656 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6657 uint8_t led3_group_id;
6659 * An identifier for the group of LEDs that LED #3 belongs to.
6660 * If set to 0, then the LED #0 cannot be grouped. For all other
6661 * non-zero values of this field, LED #0 is grouped together
6662 * with the LEDs with the same group ID value.
6665 uint16_t led3_state_caps;
6666 /* The states supported by LED #3. */
6668 * If set to 1, this LED is enabled. If set to 0, this LED is
6671 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ENABLED UINT32_C(0x1)
6673 * If set to 1, off state is supported on this LED. If set to 0,
6674 * off state is not supported on this LED.
6676 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_OFF_SUPPORTED \
6679 * If set to 1, on state is supported on this LED. If set to 0,
6680 * on state is not supported on this LED.
6682 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ON_SUPPORTED \
6685 * If set to 1, blink state is supported on this LED. If set to
6686 * 0, blink state is not supported on this LED.
6688 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_SUPPORTED \
6691 * If set to 1, blink_alt state is supported on this LED. If set
6692 * to 0, blink_alt state is not supported on this LED.
6694 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_ALT_SUPPORTED \
6696 uint16_t led3_color_caps;
6697 /* The colors supported by LED #3. */
6699 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_RSVD UINT32_C(0x1)
6701 * If set to 1, Amber color is supported on this LED. If set to
6702 * 0, Amber color is not supported on this LED.
6704 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_AMBER_SUPPORTED \
6707 * If set to 1, Green color is supported on this LED. If set to
6708 * 0, Green color is not supported on this LED.
6710 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_GREEN_SUPPORTED \
6717 * This field is used in Output records to indicate that the
6718 * output is completely written to RAM. This field should be
6719 * read as '1' to indicate that the output has been completely
6720 * written. When writing a command completion or response to an
6721 * internal processor, the order of writes has to be such that
6722 * this field is written last.
6724 } __attribute__((packed));
6726 /* hwrm_queue_qportcfg */
6728 * Description: This function is called by a driver to query queue configuration
6729 * of a port. # The HWRM shall at least advertise one queue with lossy service
6730 * profile. # The driver shall use this command to query queue ids before
6731 * configuring or using any queues. # If a service profile is not set for a
6732 * queue, then the driver shall not use that queue without configuring a service
6733 * profile for it. # If the driver is not allowed to configure service profiles,
6734 * then the driver shall only use queues for which service profiles are pre-
6737 /* Input (24 bytes) */
6738 struct hwrm_queue_qportcfg_input {
6741 * This value indicates what type of request this is. The format
6742 * for the rest of the command is determined by this field.
6746 * This value indicates the what completion ring the request
6747 * will be optionally completed on. If the value is -1, then no
6748 * CR completion will be generated. Any other value must be a
6749 * valid CR ring_id value for this function.
6752 /* This value indicates the command sequence number. */
6755 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6756 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6761 * This is the host address where the response will be written
6762 * when the request is complete. This area must be 16B aligned
6763 * and must be cleared to zero before the request is made.
6767 * Enumeration denoting the RX, TX type of the resource. This
6768 * enumeration is used for resources that are similar for both
6769 * TX and RX paths of the chip.
6771 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
6773 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
6775 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
6776 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
6777 QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
6780 * Port ID of port for which the queue configuration is being
6781 * queried. This field is only required when sent by IPC.
6784 } __attribute__((packed));
6786 /* Output (32 bytes) */
6787 struct hwrm_queue_qportcfg_output {
6788 uint16_t error_code;
6790 * Pass/Fail or error type Note: receiver to verify the in
6791 * parameters, and fail the call with an error when appropriate
6794 /* This field returns the type of original request. */
6796 /* This field provides original sequence number of the command. */
6799 * This field is the length of the response in bytes. The last
6800 * byte of the response is a valid flag that will read as '1'
6801 * when the command has been completely written to memory.
6803 uint8_t max_configurable_queues;
6805 * The maximum number of queues that can be configured on this
6806 * port. Valid values range from 1 through 8.
6808 uint8_t max_configurable_lossless_queues;
6810 * The maximum number of lossless queues that can be configured
6811 * on this port. Valid values range from 0 through 8.
6813 uint8_t queue_cfg_allowed;
6815 * Bitmask indicating which queues can be configured by the
6816 * hwrm_queue_cfg command. Each bit represents a specific queue
6817 * where bit 0 represents queue 0 and bit 7 represents queue 7.
6818 * # A value of 0 indicates that the queue is not configurable
6819 * by the hwrm_queue_cfg command. # A value of 1 indicates that
6820 * the queue is configurable. # A hwrm_queue_cfg command shall
6821 * return error when trying to configure a queue not
6824 uint8_t queue_cfg_info;
6825 /* Information about queue configuration. */
6827 * If this flag is set to '1', then the queues are configured
6828 * asymmetrically on TX and RX sides. If this flag is set to
6829 * '0', then the queues are configured symmetrically on TX and
6830 * RX sides. For symmetric configuration, the queue
6831 * configuration including queue ids and service profiles on the
6832 * TX side is the same as the corresponding queue configuration
6835 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG UINT32_C(0x1)
6836 uint8_t queue_pfcenable_cfg_allowed;
6838 * Bitmask indicating which queues can be configured by the
6839 * hwrm_queue_pfcenable_cfg command. Each bit represents a
6840 * specific priority where bit 0 represents priority 0 and bit 7
6841 * represents priority 7. # A value of 0 indicates that the
6842 * priority is not configurable by the hwrm_queue_pfcenable_cfg
6843 * command. # A value of 1 indicates that the priority is
6844 * configurable. # A hwrm_queue_pfcenable_cfg command shall
6845 * return error when trying to configure a priority that is not
6848 uint8_t queue_pri2cos_cfg_allowed;
6850 * Bitmask indicating which queues can be configured by the
6851 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6852 * specific queue where bit 0 represents queue 0 and bit 7
6853 * represents queue 7. # A value of 0 indicates that the queue
6854 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6855 * A value of 1 indicates that the queue is configurable. # A
6856 * hwrm_queue_pri2cos_cfg command shall return error when trying
6857 * to configure a queue that is not configurable.
6859 uint8_t queue_cos2bw_cfg_allowed;
6861 * Bitmask indicating which queues can be configured by the
6862 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6863 * specific queue where bit 0 represents queue 0 and bit 7
6864 * represents queue 7. # A value of 0 indicates that the queue
6865 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6866 * A value of 1 indicates that the queue is configurable. # A
6867 * hwrm_queue_pri2cos_cfg command shall return error when trying
6868 * to configure a queue not configurable.
6872 * ID of CoS Queue 0. FF - Invalid id # This ID can be used on
6873 * any subsequent call to an hwrm command that takes a queue id.
6874 * # IDs must always be queried by this command before any use
6875 * by the driver or software. # Any driver or software should
6876 * not make any assumptions about queue IDs. # A value of 0xff
6877 * indicates that the queue is not available. # Available queues
6878 * may not be in sequential order.
6880 uint8_t queue_id0_service_profile;
6881 /* This value is applicable to CoS queues only. */
6882 /* Lossy (best-effort) */
6883 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
6886 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
6889 * Set to 0xFF... (All Fs) if there is no
6890 * service profile specified
6892 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
6896 * ID of CoS Queue 1. FF - Invalid id # This ID can be used on
6897 * any subsequent call to an hwrm command that takes a queue id.
6898 * # IDs must always be queried by this command before any use
6899 * by the driver or software. # Any driver or software should
6900 * not make any assumptions about queue IDs. # A value of 0xff
6901 * indicates that the queue is not available. # Available queues
6902 * may not be in sequential order.
6904 uint8_t queue_id1_service_profile;
6905 /* This value is applicable to CoS queues only. */
6906 /* Lossy (best-effort) */
6907 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
6910 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
6913 * Set to 0xFF... (All Fs) if there is no
6914 * service profile specified
6916 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
6920 * ID of CoS Queue 2. FF - Invalid id # This ID can be used on
6921 * any subsequent call to an hwrm command that takes a queue id.
6922 * # IDs must always be queried by this command before any use
6923 * by the driver or software. # Any driver or software should
6924 * not make any assumptions about queue IDs. # A value of 0xff
6925 * indicates that the queue is not available. # Available queues
6926 * may not be in sequential order.
6928 uint8_t queue_id2_service_profile;
6929 /* This value is applicable to CoS queues only. */
6930 /* Lossy (best-effort) */
6931 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
6934 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
6937 * Set to 0xFF... (All Fs) if there is no
6938 * service profile specified
6940 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
6944 * ID of CoS Queue 3. FF - Invalid id # This ID can be used on
6945 * any subsequent call to an hwrm command that takes a queue id.
6946 * # IDs must always be queried by this command before any use
6947 * by the driver or software. # Any driver or software should
6948 * not make any assumptions about queue IDs. # A value of 0xff
6949 * indicates that the queue is not available. # Available queues
6950 * may not be in sequential order.
6952 uint8_t queue_id3_service_profile;
6953 /* This value is applicable to CoS queues only. */
6954 /* Lossy (best-effort) */
6955 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
6958 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
6961 * Set to 0xFF... (All Fs) if there is no
6962 * service profile specified
6964 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
6968 * ID of CoS Queue 4. FF - Invalid id # This ID can be used on
6969 * any subsequent call to an hwrm command that takes a queue id.
6970 * # IDs must always be queried by this command before any use
6971 * by the driver or software. # Any driver or software should
6972 * not make any assumptions about queue IDs. # A value of 0xff
6973 * indicates that the queue is not available. # Available queues
6974 * may not be in sequential order.
6976 uint8_t queue_id4_service_profile;
6977 /* This value is applicable to CoS queues only. */
6978 /* Lossy (best-effort) */
6979 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
6982 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
6985 * Set to 0xFF... (All Fs) if there is no
6986 * service profile specified
6988 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
6992 * ID of CoS Queue 5. FF - Invalid id # This ID can be used on
6993 * any subsequent call to an hwrm command that takes a queue id.
6994 * # IDs must always be queried by this command before any use
6995 * by the driver or software. # Any driver or software should
6996 * not make any assumptions about queue IDs. # A value of 0xff
6997 * indicates that the queue is not available. # Available queues
6998 * may not be in sequential order.
7000 uint8_t queue_id5_service_profile;
7001 /* This value is applicable to CoS queues only. */
7002 /* Lossy (best-effort) */
7003 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
7006 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
7009 * Set to 0xFF... (All Fs) if there is no
7010 * service profile specified
7012 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
7016 * ID of CoS Queue 6. FF - Invalid id # This ID can be used on
7017 * any subsequent call to an hwrm command that takes a queue id.
7018 * # IDs must always be queried by this command before any use
7019 * by the driver or software. # Any driver or software should
7020 * not make any assumptions about queue IDs. # A value of 0xff
7021 * indicates that the queue is not available. # Available queues
7022 * may not be in sequential order.
7024 uint8_t queue_id6_service_profile;
7025 /* This value is applicable to CoS queues only. */
7026 /* Lossy (best-effort) */
7027 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
7030 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
7033 * Set to 0xFF... (All Fs) if there is no
7034 * service profile specified
7036 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
7040 * ID of CoS Queue 7. FF - Invalid id # This ID can be used on
7041 * any subsequent call to an hwrm command that takes a queue id.
7042 * # IDs must always be queried by this command before any use
7043 * by the driver or software. # Any driver or software should
7044 * not make any assumptions about queue IDs. # A value of 0xff
7045 * indicates that the queue is not available. # Available queues
7046 * may not be in sequential order.
7048 uint8_t queue_id7_service_profile;
7049 /* This value is applicable to CoS queues only. */
7050 /* Lossy (best-effort) */
7051 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
7054 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
7057 * Set to 0xFF... (All Fs) if there is no
7058 * service profile specified
7060 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
7064 * This field is used in Output records to indicate that the
7065 * output is completely written to RAM. This field should be
7066 * read as '1' to indicate that the output has been completely
7067 * written. When writing a command completion or response to an
7068 * internal processor, the order of writes has to be such that
7069 * this field is written last.
7071 } __attribute__((packed));
7073 /* hwrm_vnic_alloc */
7075 * Description: This VNIC is a resource in the RX side of the chip that is used
7076 * to represent a virtual host "interface". # At the time of VNIC allocation or
7077 * configuration, the function can specify whether it wants the requested VNIC
7078 * to be the default VNIC for the function or not. # If a function requests
7079 * allocation of a VNIC for the first time and a VNIC is successfully allocated
7080 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
7081 * for that function. # The default VNIC shall be used for the default action
7082 * for a partition or function. # For each VNIC allocated on a function, a
7083 * mapping on the RX side to map the allocated VNIC to source virtual interface
7084 * shall be performed by the HWRM. This should be hidden to the function driver
7085 * requesting the VNIC allocation. This enables broadcast/multicast replication
7086 * with source knockout. # If multicast replication with source knockout is
7087 * enabled, then the internal VNIC to SVIF mapping data structures shall be
7088 * programmed at the time of VNIC allocation.
7090 /* Input (24 bytes) */
7091 struct hwrm_vnic_alloc_input {
7094 * This value indicates what type of request this is. The format
7095 * for the rest of the command is determined by this field.
7099 * This value indicates the what completion ring the request
7100 * will be optionally completed on. If the value is -1, then no
7101 * CR completion will be generated. Any other value must be a
7102 * valid CR ring_id value for this function.
7105 /* This value indicates the command sequence number. */
7108 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7109 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7114 * This is the host address where the response will be written
7115 * when the request is complete. This area must be 16B aligned
7116 * and must be cleared to zero before the request is made.
7120 * When this bit is '1', this VNIC is requested to be the
7121 * default VNIC for this function.
7123 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7125 } __attribute__((packed));
7127 /* Output (16 bytes) */
7128 struct hwrm_vnic_alloc_output {
7129 uint16_t error_code;
7131 * Pass/Fail or error type Note: receiver to verify the in
7132 * parameters, and fail the call with an error when appropriate
7135 /* This field returns the type of original request. */
7137 /* This field provides original sequence number of the command. */
7140 * This field is the length of the response in bytes. The last
7141 * byte of the response is a valid flag that will read as '1'
7142 * when the command has been completely written to memory.
7145 /* Logical vnic ID */
7151 * This field is used in Output records to indicate that the
7152 * output is completely written to RAM. This field should be
7153 * read as '1' to indicate that the output has been completely
7154 * written. When writing a command completion or response to an
7155 * internal processor, the order of writes has to be such that
7156 * this field is written last.
7158 } __attribute__((packed));
7160 /* hwrm_vnic_free */
7162 * Description: Free a VNIC resource. Idle any resources associated with the
7163 * VNIC as well as the VNIC. Reset and release all resources associated with the
7166 /* Input (24 bytes) */
7167 struct hwrm_vnic_free_input {
7170 * This value indicates what type of request this is. The format
7171 * for the rest of the command is determined by this field.
7175 * This value indicates the what completion ring the request
7176 * will be optionally completed on. If the value is -1, then no
7177 * CR completion will be generated. Any other value must be a
7178 * valid CR ring_id value for this function.
7181 /* This value indicates the command sequence number. */
7184 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7185 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7190 * This is the host address where the response will be written
7191 * when the request is complete. This area must be 16B aligned
7192 * and must be cleared to zero before the request is made.
7195 /* Logical vnic ID */
7197 } __attribute__((packed));
7199 /* Output (16 bytes) */
7200 struct hwrm_vnic_free_output {
7201 uint16_t error_code;
7203 * Pass/Fail or error type Note: receiver to verify the in
7204 * parameters, and fail the call with an error when appropriate
7207 /* This field returns the type of original request. */
7209 /* This field provides original sequence number of the command. */
7212 * This field is the length of the response in bytes. The last
7213 * byte of the response is a valid flag that will read as '1'
7214 * when the command has been completely written to memory.
7222 * This field is used in Output records to indicate that the
7223 * output is completely written to RAM. This field should be
7224 * read as '1' to indicate that the output has been completely
7225 * written. When writing a command completion or response to an
7226 * internal processor, the order of writes has to be such that
7227 * this field is written last.
7229 } __attribute__((packed));
7232 /* Description: Configure the RX VNIC structure. */
7233 /* Input (40 bytes) */
7234 struct hwrm_vnic_cfg_input {
7237 * This value indicates what type of request this is. The format
7238 * for the rest of the command is determined by this field.
7242 * This value indicates the what completion ring the request
7243 * will be optionally completed on. If the value is -1, then no
7244 * CR completion will be generated. Any other value must be a
7245 * valid CR ring_id value for this function.
7248 /* This value indicates the command sequence number. */
7251 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7252 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7257 * This is the host address where the response will be written
7258 * when the request is complete. This area must be 16B aligned
7259 * and must be cleared to zero before the request is made.
7263 * When this bit is '1', the VNIC is requested to be the default
7264 * VNIC for the function.
7266 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7268 * When this bit is '1', the VNIC is being configured to strip
7269 * VLAN in the RX path. If set to '0', then VLAN stripping is
7270 * disabled on this VNIC.
7272 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7274 * When this bit is '1', the VNIC is being configured to buffer
7275 * receive packets in the hardware until the host posts new
7276 * receive buffers. If set to '0', then bd_stall is being
7277 * configured to be disabled on this VNIC.
7279 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7281 * When this bit is '1', the VNIC is being configured to receive
7282 * both RoCE and non-RoCE traffic. If set to '0', then this VNIC
7283 * is not configured to be operating in dual VNIC mode.
7285 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7287 * When this flag is set to '1', the VNIC is requested to be
7288 * configured to receive only RoCE traffic. If this flag is set
7289 * to '0', then this flag shall be ignored by the HWRM. If
7290 * roce_dual_vnic_mode flag is set to '1', then the HWRM client
7291 * shall not set this flag to '1'.
7293 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7295 * When a VNIC uses one destination ring group for certain
7296 * application (e.g. Receive Flow Steering) where exact match is
7297 * used to direct packets to a VNIC with one destination ring
7298 * group only, there is no need to configure RSS indirection
7299 * table for that VNIC as only one destination ring group is
7300 * used. This flag is used to enable a mode where RSS is enabled
7301 * in the VNIC using a RSS context for computing RSS hash but
7302 * the RSS indirection table is not configured using
7303 * hwrm_vnic_rss_cfg. If this mode is enabled, then the driver
7304 * should not program RSS indirection table for the RSS context
7305 * that is used for computing RSS hash only.
7307 #define HWRM_VNIC_CFG_INPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7310 * This bit must be '1' for the dflt_ring_grp field to be
7313 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
7314 /* This bit must be '1' for the rss_rule field to be configured. */
7315 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
7316 /* This bit must be '1' for the cos_rule field to be configured. */
7317 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
7318 /* This bit must be '1' for the lb_rule field to be configured. */
7319 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
7320 /* This bit must be '1' for the mru field to be configured. */
7321 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
7323 /* Logical vnic ID */
7324 uint16_t dflt_ring_grp;
7326 * Default Completion ring for the VNIC. This ring will be
7327 * chosen if packet does not match any RSS rules and if there is
7332 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7333 * there is no RSS rule.
7337 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7338 * there is no COS rule.
7342 * RSS ID for load balancing rule/table structure. 0xFF... (All
7343 * Fs) if there is no LB rule.
7347 * The maximum receive unit of the vnic. Each vnic is associated
7348 * with a function. The vnic mru value overwrites the mru
7349 * setting of the associated function. The HWRM shall make sure
7350 * that vnic mru does not exceed the mru of the port the
7351 * function is associated with.
7354 } __attribute__((packed));
7356 /* Output (16 bytes) */
7357 struct hwrm_vnic_cfg_output {
7358 uint16_t error_code;
7360 * Pass/Fail or error type Note: receiver to verify the in
7361 * parameters, and fail the call with an error when appropriate
7364 /* This field returns the type of original request. */
7366 /* This field provides original sequence number of the command. */
7369 * This field is the length of the response in bytes. The last
7370 * byte of the response is a valid flag that will read as '1'
7371 * when the command has been completely written to memory.
7379 * This field is used in Output records to indicate that the
7380 * output is completely written to RAM. This field should be
7381 * read as '1' to indicate that the output has been completely
7382 * written. When writing a command completion or response to an
7383 * internal processor, the order of writes has to be such that
7384 * this field is written last.
7386 } __attribute__((packed));
7388 /* hwrm_vnic_qcfg */
7390 * Description: Query the RX VNIC structure. This function can be used by a PF
7391 * driver to query its own VNIC resource or VNIC resource of its child VF. This
7392 * function can also be used by a VF driver to query its own VNIC resource.
7394 /* Input (32 bytes) */
7395 struct hwrm_vnic_qcfg_input {
7398 * This value indicates what type of request this is. The format
7399 * for the rest of the command is determined by this field.
7403 * This value indicates the what completion ring the request
7404 * will be optionally completed on. If the value is -1, then no
7405 * CR completion will be generated. Any other value must be a
7406 * valid CR ring_id value for this function.
7409 /* This value indicates the command sequence number. */
7412 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7413 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7418 * This is the host address where the response will be written
7419 * when the request is complete. This area must be 16B aligned
7420 * and must be cleared to zero before the request is made.
7423 /* This bit must be '1' for the vf_id_valid field to be configured. */
7424 #define HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
7426 /* Logical vnic ID */
7428 /* ID of Virtual Function whose VNIC resource is being queried. */
7429 uint16_t unused_0[3];
7430 } __attribute__((packed));
7432 /* Output (32 bytes) */
7433 struct hwrm_vnic_qcfg_output {
7434 uint16_t error_code;
7436 * Pass/Fail or error type Note: receiver to verify the in
7437 * parameters, and fail the call with an error when appropriate
7440 /* This field returns the type of original request. */
7442 /* This field provides original sequence number of the command. */
7445 * This field is the length of the response in bytes. The last
7446 * byte of the response is a valid flag that will read as '1'
7447 * when the command has been completely written to memory.
7449 uint16_t dflt_ring_grp;
7450 /* Default Completion ring for the VNIC. */
7453 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7454 * there is no RSS rule.
7458 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7459 * there is no COS rule.
7463 * RSS ID for load balancing rule/table structure. 0xFF... (All
7464 * Fs) if there is no LB rule.
7467 /* The maximum receive unit of the vnic. */
7472 * When this bit is '1', the VNIC is the default VNIC for the
7475 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_DEFAULT UINT32_C(0x1)
7477 * When this bit is '1', the VNIC is configured to strip VLAN in
7478 * the RX path. If set to '0', then VLAN stripping is disabled
7481 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7483 * When this bit is '1', the VNIC is configured to buffer
7484 * receive packets in the hardware until the host posts new
7485 * receive buffers. If set to '0', then bd_stall is disabled on
7488 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7490 * When this bit is '1', the VNIC is configured to receive both
7491 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is
7492 * not configured to operate in dual VNIC mode.
7494 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7496 * When this flag is set to '1', the VNIC is configured to
7497 * receive only RoCE traffic. When this flag is set to '0', the
7498 * VNIC is not configured to receive only RoCE traffic. If
7499 * roce_dual_vnic_mode flag and this flag both are set to '1',
7500 * then it is an invalid configuration of the VNIC. The HWRM
7501 * should not allow that type of mis-configuration by HWRM
7504 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7506 * When a VNIC uses one destination ring group for certain
7507 * application (e.g. Receive Flow Steering) where exact match is
7508 * used to direct packets to a VNIC with one destination ring
7509 * group only, there is no need to configure RSS indirection
7510 * table for that VNIC as only one destination ring group is
7511 * used. When this bit is set to '1', then the VNIC is enabled
7512 * in a mode where RSS is enabled in the VNIC using a RSS
7513 * context for computing RSS hash but the RSS indirection table
7514 * is not configured.
7516 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7523 * This field is used in Output records to indicate that the
7524 * output is completely written to RAM. This field should be
7525 * read as '1' to indicate that the output has been completely
7526 * written. When writing a command completion or response to an
7527 * internal processor, the order of writes has to be such that
7528 * this field is written last.
7530 } __attribute__((packed));
7532 /* hwrm_vnic_rss_cfg */
7533 /* Description: This function is used to enable RSS configuration. */
7534 /* Input (48 bytes) */
7535 struct hwrm_vnic_rss_cfg_input {
7538 * This value indicates what type of request this is. The format
7539 * for the rest of the command is determined by this field.
7543 * This value indicates the what completion ring the request
7544 * will be optionally completed on. If the value is -1, then no
7545 * CR completion will be generated. Any other value must be a
7546 * valid CR ring_id value for this function.
7549 /* This value indicates the command sequence number. */
7552 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7553 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7558 * This is the host address where the response will be written
7559 * when the request is complete. This area must be 16B aligned
7560 * and must be cleared to zero before the request is made.
7564 * When this bit is '1', the RSS hash shall be computed over
7565 * source and destination IPv4 addresses of IPv4 packets.
7567 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
7569 * When this bit is '1', the RSS hash shall be computed over
7570 * source/destination IPv4 addresses and source/destination
7571 * ports of TCP/IPv4 packets.
7573 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
7575 * When this bit is '1', the RSS hash shall be computed over
7576 * source/destination IPv4 addresses and source/destination
7577 * ports of UDP/IPv4 packets.
7579 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
7581 * When this bit is '1', the RSS hash shall be computed over
7582 * source and destination IPv4 addresses of IPv6 packets.
7584 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
7586 * When this bit is '1', the RSS hash shall be computed over
7587 * source/destination IPv6 addresses and source/destination
7588 * ports of TCP/IPv6 packets.
7590 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
7592 * When this bit is '1', the RSS hash shall be computed over
7593 * source/destination IPv6 addresses and source/destination
7594 * ports of UDP/IPv6 packets.
7596 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
7598 uint64_t ring_grp_tbl_addr;
7599 /* This is the address for rss ring group table */
7600 uint64_t hash_key_tbl_addr;
7601 /* This is the address for rss hash key table */
7602 uint16_t rss_ctx_idx;
7603 /* Index to the rss indirection table. */
7604 uint16_t unused_1[3];
7605 } __attribute__((packed));
7607 /* Output (16 bytes) */
7608 struct hwrm_vnic_rss_cfg_output {
7609 uint16_t error_code;
7611 * Pass/Fail or error type Note: receiver to verify the in
7612 * parameters, and fail the call with an error when appropriate
7615 /* This field returns the type of original request. */
7617 /* This field provides original sequence number of the command. */
7620 * This field is the length of the response in bytes. The last
7621 * byte of the response is a valid flag that will read as '1'
7622 * when the command has been completely written to memory.
7630 * This field is used in Output records to indicate that the
7631 * output is completely written to RAM. This field should be
7632 * read as '1' to indicate that the output has been completely
7633 * written. When writing a command completion or response to an
7634 * internal processor, the order of writes has to be such that
7635 * this field is written last.
7637 } __attribute__((packed));
7639 /* hwrm_vnic_plcmodes_cfg */
7641 * Description: This function can be used to set placement mode configuration of
7644 /* Input (40 bytes) */
7646 struct hwrm_vnic_plcmodes_cfg_input {
7649 * This value indicates what type of request this is. The format for the
7650 * rest of the command is determined by this field.
7654 * This value indicates the what completion ring the request will be
7655 * optionally completed on. If the value is -1, then no CR completion
7656 * will be generated. Any other value must be a valid CR ring_id value
7657 * for this function.
7660 /* This value indicates the command sequence number. */
7663 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7664 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7668 * This is the host address where the response will be written when the
7669 * request is complete. This area must be 16B aligned and must be
7670 * cleared to zero before the request is made.
7674 * When this bit is '1', the VNIC shall be configured to use regular
7675 * placement algorithm. By default, the regular placement algorithm
7676 * shall be enabled on the VNIC.
7678 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT \
7681 * When this bit is '1', the VNIC shall be configured use the jumbo
7682 * placement algorithm.
7684 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT \
7687 * When this bit is '1', the VNIC shall be configured to enable Header-
7688 * Data split for IPv4 packets according to the following rules: # If
7689 * the packet is identified as TCP/IPv4, then the packet is split at the
7690 * beginning of the TCP payload. # If the packet is identified as
7691 * UDP/IPv4, then the packet is split at the beginning of UDP payload. #
7692 * If the packet is identified as non-TCP and non-UDP IPv4 packet, then
7693 * the packet is split at the beginning of the upper layer protocol
7694 * header carried in the IPv4 packet.
7696 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
7698 * When this bit is '1', the VNIC shall be configured to enable Header-
7699 * Data split for IPv6 packets according to the following rules: # If
7700 * the packet is identified as TCP/IPv6, then the packet is split at the
7701 * beginning of the TCP payload. # If the packet is identified as
7702 * UDP/IPv6, then the packet is split at the beginning of UDP payload. #
7703 * If the packet is identified as non-TCP and non-UDP IPv6 packet, then
7704 * the packet is split at the beginning of the upper layer protocol
7705 * header carried in the IPv6 packet.
7707 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
7709 * When this bit is '1', the VNIC shall be configured to enable Header-
7710 * Data split for FCoE packets at the beginning of FC payload.
7712 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
7714 * When this bit is '1', the VNIC shall be configured to enable Header-
7715 * Data split for RoCE packets at the beginning of RoCE payload (after
7718 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
7721 * This bit must be '1' for the jumbo_thresh_valid field to be
7724 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID \
7727 * This bit must be '1' for the hds_offset_valid field to be configured.
7729 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_OFFSET_VALID \
7732 * This bit must be '1' for the hds_threshold_valid field to be
7735 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID \
7738 /* Logical vnic ID */
7739 uint16_t jumbo_thresh;
7741 * When jumbo placement algorithm is enabled, this value is used to
7742 * determine the threshold for jumbo placement. Packets with length
7743 * larger than this value will be placed according to the jumbo
7744 * placement algorithm.
7746 uint16_t hds_offset;
7748 * This value is used to determine the offset into packet buffer where
7749 * the split data (payload) will be placed according to one of of HDS
7750 * placement algorithm. The lengths of packet buffers provided for split
7751 * data shall be larger than this value.
7753 uint16_t hds_threshold;
7755 * When one of the HDS placement algorithm is enabled, this value is
7756 * used to determine the threshold for HDS placement. Packets with
7757 * length larger than this value will be placed according to the HDS
7758 * placement algorithm. This value shall be in multiple of 4 bytes.
7760 uint16_t unused_0[3];
7761 } __attribute__((packed));
7763 /* Output (16 bytes) */
7765 struct hwrm_vnic_plcmodes_cfg_output {
7766 uint16_t error_code;
7768 * Pass/Fail or error type Note: receiver to verify the in parameters,
7769 * and fail the call with an error when appropriate
7772 /* This field returns the type of original request. */
7774 /* This field provides original sequence number of the command. */
7777 * This field is the length of the response in bytes. The last byte of
7778 * the response is a valid flag that will read as '1' when the command
7779 * has been completely written to memory.
7787 * This field is used in Output records to indicate that the output is
7788 * completely written to RAM. This field should be read as '1' to
7789 * indicate that the output has been completely written. When writing a
7790 * command completion or response to an internal processor, the order of
7791 * writes has to be such that this field is written last.
7793 } __attribute__((packed));
7795 /* hwrm_vnic_plcmodes_qcfg */
7797 * Description: This function can be used to query placement mode configuration
7800 /* Input (24 bytes) */
7802 struct hwrm_vnic_plcmodes_qcfg_input {
7805 * This value indicates what type of request this is. The format for the
7806 * rest of the command is determined by this field.
7810 * This value indicates the what completion ring the request will be
7811 * optionally completed on. If the value is -1, then no CR completion
7812 * will be generated. Any other value must be a valid CR ring_id value
7813 * for this function.
7816 /* This value indicates the command sequence number. */
7819 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7820 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7824 * This is the host address where the response will be written when the
7825 * request is complete. This area must be 16B aligned and must be
7826 * cleared to zero before the request is made.
7829 /* Logical vnic ID */
7831 } __attribute__((packed));
7833 /* Output (24 bytes) */
7835 struct hwrm_vnic_plcmodes_qcfg_output {
7836 uint16_t error_code;
7838 * Pass/Fail or error type Note: receiver to verify the in parameters,
7839 * and fail the call with an error when appropriate
7842 /* This field returns the type of original request. */
7844 /* This field provides original sequence number of the command. */
7847 * This field is the length of the response in bytes. The last byte of
7848 * the response is a valid flag that will read as '1' when the command
7849 * has been completely written to memory.
7853 * When this bit is '1', the VNIC is configured to use regular placement
7856 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_REGULAR_PLACEMENT \
7859 * When this bit is '1', the VNIC is configured to use the jumbo
7860 * placement algorithm.
7862 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_JUMBO_PLACEMENT \
7865 * When this bit is '1', the VNIC is configured to enable Header-Data
7866 * split for IPv4 packets.
7868 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
7870 * When this bit is '1', the VNIC is configured to enable Header-Data
7871 * split for IPv6 packets.
7873 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
7875 * When this bit is '1', the VNIC is configured to enable Header-Data
7876 * split for FCoE packets.
7878 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
7880 * When this bit is '1', the VNIC is configured to enable Header-Data
7881 * split for RoCE packets.
7883 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
7885 * When this bit is '1', the VNIC is configured to be the default VNIC
7886 * of the requesting function.
7888 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_DFLT_VNIC UINT32_C(0x40)
7889 uint16_t jumbo_thresh;
7891 * When jumbo placement algorithm is enabled, this value is used to
7892 * determine the threshold for jumbo placement. Packets with length
7893 * larger than this value will be placed according to the jumbo
7894 * placement algorithm.
7896 uint16_t hds_offset;
7898 * This value is used to determine the offset into packet buffer where
7899 * the split data (payload) will be placed according to one of of HDS
7900 * placement algorithm. The lengths of packet buffers provided for split
7901 * data shall be larger than this value.
7903 uint16_t hds_threshold;
7905 * When one of the HDS placement algorithm is enabled, this value is
7906 * used to determine the threshold for HDS placement. Packets with
7907 * length larger than this value will be placed according to the HDS
7908 * placement algorithm. This value shall be in multiple of 4 bytes.
7917 * This field is used in Output records to indicate that the output is
7918 * completely written to RAM. This field should be read as '1' to
7919 * indicate that the output has been completely written. When writing a
7920 * command completion or response to an internal processor, the order of
7921 * writes has to be such that this field is written last.
7923 } __attribute__((packed));
7925 /* hwrm_vnic_rss_cos_lb_ctx_alloc */
7926 /* Description: This function is used to allocate COS/Load Balance context. */
7927 /* Input (16 bytes) */
7928 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
7931 * This value indicates what type of request this is. The format
7932 * for the rest of the command is determined by this field.
7936 * This value indicates the what completion ring the request
7937 * will be optionally completed on. If the value is -1, then no
7938 * CR completion will be generated. Any other value must be a
7939 * valid CR ring_id value for this function.
7942 /* This value indicates the command sequence number. */
7945 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7946 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7951 * This is the host address where the response will be written
7952 * when the request is complete. This area must be 16B aligned
7953 * and must be cleared to zero before the request is made.
7955 } __attribute__((packed));
7957 /* Output (16 bytes) */
7958 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
7959 uint16_t error_code;
7961 * Pass/Fail or error type Note: receiver to verify the in
7962 * parameters, and fail the call with an error when appropriate
7965 /* This field returns the type of original request. */
7967 /* This field provides original sequence number of the command. */
7970 * This field is the length of the response in bytes. The last
7971 * byte of the response is a valid flag that will read as '1'
7972 * when the command has been completely written to memory.
7974 uint16_t rss_cos_lb_ctx_id;
7975 /* rss_cos_lb_ctx_id is 16 b */
7983 * This field is used in Output records to indicate that the
7984 * output is completely written to RAM. This field should be
7985 * read as '1' to indicate that the output has been completely
7986 * written. When writing a command completion or response to an
7987 * internal processor, the order of writes has to be such that
7988 * this field is written last.
7990 } __attribute__((packed));
7992 /* hwrm_vnic_rss_cos_lb_ctx_free */
7993 /* Description: This function can be used to free COS/Load Balance context. */
7994 /* Input (24 bytes) */
7995 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
7998 * This value indicates what type of request this is. The format
7999 * for the rest of the command is determined by this field.
8003 * This value indicates the what completion ring the request
8004 * will be optionally completed on. If the value is -1, then no
8005 * CR completion will be generated. Any other value must be a
8006 * valid CR ring_id value for this function.
8009 /* This value indicates the command sequence number. */
8012 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8013 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8018 * This is the host address where the response will be written
8019 * when the request is complete. This area must be 16B aligned
8020 * and must be cleared to zero before the request is made.
8022 uint16_t rss_cos_lb_ctx_id;
8023 /* rss_cos_lb_ctx_id is 16 b */
8024 uint16_t unused_0[3];
8025 } __attribute__((packed));
8027 /* Output (16 bytes) */
8028 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
8029 uint16_t error_code;
8031 * Pass/Fail or error type Note: receiver to verify the in
8032 * parameters, and fail the call with an error when appropriate
8035 /* This field returns the type of original request. */
8037 /* This field provides original sequence number of the command. */
8040 * This field is the length of the response in bytes. The last
8041 * byte of the response is a valid flag that will read as '1'
8042 * when the command has been completely written to memory.
8050 * This field is used in Output records to indicate that the
8051 * output is completely written to RAM. This field should be
8052 * read as '1' to indicate that the output has been completely
8053 * written. When writing a command completion or response to an
8054 * internal processor, the order of writes has to be such that
8055 * this field is written last.
8057 } __attribute__((packed));
8059 /* hwrm_vnic_tpa_cfg */
8060 /* Description: This function is used to enable/configure TPA on the VNIC. */
8061 /* Input (40 bytes) */
8062 struct hwrm_vnic_tpa_cfg_input {
8065 * This value indicates what type of request this is. The format
8066 * for the rest of the command is determined by this field.
8070 * This value indicates the what completion ring the request
8071 * will be optionally completed on. If the value is -1, then no
8072 * CR completion will be generated. Any other value must be a
8073 * valid CR ring_id value for this function.
8076 /* This value indicates the command sequence number. */
8079 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8080 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8085 * This is the host address where the response will be written
8086 * when the request is complete. This area must be 16B aligned
8087 * and must be cleared to zero before the request is made.
8091 * When this bit is '1', the VNIC shall be configured to perform
8092 * transparent packet aggregation (TPA) of non-tunneled TCP
8095 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA UINT32_C(0x1)
8097 * When this bit is '1', the VNIC shall be configured to perform
8098 * transparent packet aggregation (TPA) of tunneled TCP packets.
8100 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_ENCAP_TPA UINT32_C(0x2)
8102 * When this bit is '1', the VNIC shall be configured to perform
8103 * transparent packet aggregation (TPA) according to Windows
8104 * Receive Segment Coalescing (RSC) rules.
8106 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_RSC_WND_UPDATE UINT32_C(0x4)
8108 * When this bit is '1', the VNIC shall be configured to perform
8109 * transparent packet aggregation (TPA) according to Linux
8110 * Generic Receive Offload (GRO) rules.
8112 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO UINT32_C(0x8)
8114 * When this bit is '1', the VNIC shall be configured to perform
8115 * transparent packet aggregation (TPA) for TCP packets with IP
8116 * ECN set to non-zero.
8118 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN UINT32_C(0x10)
8120 * When this bit is '1', the VNIC shall be configured to perform
8121 * transparent packet aggregation (TPA) for GRE tunneled TCP
8122 * packets only if all packets have the same GRE sequence.
8124 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ \
8127 * When this bit is '1' and the GRO mode is enabled, the VNIC
8128 * shall be configured to perform transparent packet aggregation
8129 * (TPA) for TCP/IPv4 packets with consecutively increasing
8130 * IPIDs. In other words, the last packet that is being
8131 * aggregated to an already existing aggregation context shall
8132 * have IPID 1 more than the IPID of the last packet that was
8133 * aggregated in that aggregation context.
8135 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_IPID_CHECK UINT32_C(0x40)
8137 * When this bit is '1' and the GRO mode is enabled, the VNIC
8138 * shall be configured to perform transparent packet aggregation
8139 * (TPA) for TCP packets with the same TTL (IPv4) or Hop limit
8142 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK UINT32_C(0x80)
8144 /* This bit must be '1' for the max_agg_segs field to be configured. */
8145 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS UINT32_C(0x1)
8146 /* This bit must be '1' for the max_aggs field to be configured. */
8147 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS UINT32_C(0x2)
8149 * This bit must be '1' for the max_agg_timer field to be
8152 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER UINT32_C(0x4)
8153 /* This bit must be '1' for the min_agg_len field to be configured. */
8154 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN UINT32_C(0x8)
8156 /* Logical vnic ID */
8157 uint16_t max_agg_segs;
8159 * This is the maximum number of TCP segments that can be
8160 * aggregated (unit is Log2). Max value is 31.
8163 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_1 UINT32_C(0x0)
8165 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_2 UINT32_C(0x1)
8167 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_4 UINT32_C(0x2)
8169 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_8 UINT32_C(0x3)
8170 /* Any segment size larger than this is not valid */
8171 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX UINT32_C(0x1f)
8174 * This is the maximum number of aggregations this VNIC is
8175 * allowed (unit is Log2). Max value is 7
8178 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_1 UINT32_C(0x0)
8179 /* 2 aggregations */
8180 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_2 UINT32_C(0x1)
8181 /* 4 aggregations */
8182 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_4 UINT32_C(0x2)
8183 /* 8 aggregations */
8184 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_8 UINT32_C(0x3)
8185 /* 16 aggregations */
8186 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_16 UINT32_C(0x4)
8187 /* Any aggregation size larger than this is not valid */
8188 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX UINT32_C(0x7)
8191 uint32_t max_agg_timer;
8193 * This is the maximum amount of time allowed for an aggregation
8194 * context to complete after it was initiated.
8196 uint32_t min_agg_len;
8198 * This is the minimum amount of payload length required to
8199 * start an aggregation context.
8201 } __attribute__((packed));
8203 /* Output (16 bytes) */
8204 struct hwrm_vnic_tpa_cfg_output {
8205 uint16_t error_code;
8207 * Pass/Fail or error type Note: receiver to verify the in
8208 * parameters, and fail the call with an error when appropriate
8211 /* This field returns the type of original request. */
8213 /* This field provides original sequence number of the command. */
8216 * This field is the length of the response in bytes. The last
8217 * byte of the response is a valid flag that will read as '1'
8218 * when the command has been completely written to memory.
8226 * This field is used in Output records to indicate that the
8227 * output is completely written to RAM. This field should be
8228 * read as '1' to indicate that the output has been completely
8229 * written. When writing a command completion or response to an
8230 * internal processor, the order of writes has to be such that
8231 * this field is written last.
8233 } __attribute__((packed));
8235 /* hwrm_ring_alloc */
8237 * Description: This command allocates and does basic preparation for a ring.
8239 /* Input (80 bytes) */
8240 struct hwrm_ring_alloc_input {
8243 * This value indicates what type of request this is. The format
8244 * for the rest of the command is determined by this field.
8248 * This value indicates the what completion ring the request
8249 * will be optionally completed on. If the value is -1, then no
8250 * CR completion will be generated. Any other value must be a
8251 * valid CR ring_id value for this function.
8254 /* This value indicates the command sequence number. */
8257 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8258 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8263 * This is the host address where the response will be written
8264 * when the request is complete. This area must be 16B aligned
8265 * and must be cleared to zero before the request is made.
8268 /* This bit must be '1' for the Reserved1 field to be configured. */
8269 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
8270 /* This bit must be '1' for the ring_arb_cfg field to be configured. */
8271 #define HWRM_RING_ALLOC_INPUT_ENABLES_RING_ARB_CFG UINT32_C(0x2)
8272 /* This bit must be '1' for the Reserved3 field to be configured. */
8273 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
8275 * This bit must be '1' for the stat_ctx_id_valid field to be
8278 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
8279 /* This bit must be '1' for the Reserved4 field to be configured. */
8280 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
8281 /* This bit must be '1' for the max_bw_valid field to be configured. */
8282 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
8285 /* L2 Completion Ring (CR) */
8286 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8288 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1)
8290 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2)
8291 /* RoCE Notification Completion Ring (ROCE_CR) */
8292 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8295 uint64_t page_tbl_addr;
8296 /* This value is a pointer to the page table for the Ring. */
8298 /* First Byte Offset of the first entry in the first page. */
8301 * Actual page size in 2^page_size. The supported range is
8302 * increments in powers of 2 from 16 bytes to 1GB. - 4 = 16 B
8303 * Page size is 16 B. - 12 = 4 KB Page size is 4 KB. - 13 = 8 KB
8304 * Page size is 8 KB. - 16 = 64 KB Page size is 64 KB. - 21 = 2
8305 * MB Page size is 2 MB. - 22 = 4 MB Page size is 4 MB. - 30 = 1
8306 * GB Page size is 1 GB.
8308 uint8_t page_tbl_depth;
8310 * This value indicates the depth of page table. For this
8311 * version of the specification, value other than 0 or 1 shall
8312 * be considered as an invalid value. When the page_tbl_depth =
8313 * 0, then it is treated as a special case with the following.
8314 * 1. FBO and page size fields are not valid. 2. page_tbl_addr
8315 * is the physical address of the first element of the ring.
8321 * Number of 16B units in the ring. Minimum size for a ring is
8324 uint16_t logical_id;
8326 * Logical ring number for the ring to be allocated. This value
8327 * determines the position in the doorbell area where the update
8328 * to the ring will be made. For completion rings, this value is
8329 * also the MSI-X vector number for the function the completion
8330 * ring is associated with.
8332 uint16_t cmpl_ring_id;
8334 * This field is used only when ring_type is a TX ring. This
8335 * value indicates what completion ring the TX ring is
8340 * This field is used only when ring_type is a TX ring. This
8341 * value indicates what CoS queue the TX ring is associated
8347 /* This field is reserved for the future use. It shall be set to 0. */
8348 uint16_t ring_arb_cfg;
8350 * This field is used only when ring_type is a TX ring. This
8351 * field is used to configure arbitration related parameters for
8354 /* Arbitration policy used for the ring. */
8355 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK UINT32_C(0xf)
8356 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SFT 0
8358 * Use strict priority for the TX ring. Priority
8359 * value is specified in arb_policy_param
8361 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \
8362 (UINT32_C(0x1) << 0)
8364 * Use weighted fair queue arbitration for the
8365 * TX ring. Weight is specified in
8368 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \
8369 (UINT32_C(0x2) << 0)
8370 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \
8371 RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ
8372 /* Reserved field. */
8373 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_MASK UINT32_C(0xf0)
8374 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_SFT 4
8376 * Arbitration policy specific parameter. # For strict priority
8377 * arbitration policy, this field represents a priority value.
8378 * If set to 0, then the priority is not specified and the HWRM
8379 * is allowed to select any priority for this TX ring. # For
8380 * weighted fair queue arbitration policy, this field represents
8381 * a weight value. If set to 0, then the weight is not specified
8382 * and the HWRM is allowed to select any weight for this TX
8385 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_MASK \
8387 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8
8391 /* This field is reserved for the future use. It shall be set to 0. */
8392 uint32_t stat_ctx_id;
8394 * This field is used only when ring_type is a TX ring. This
8395 * input indicates what statistics context this ring should be
8399 /* This field is reserved for the future use. It shall be set to 0. */
8402 * This field is used only when ring_type is a TX ring to
8403 * specify maximum BW allocated to the TX ring. The HWRM will
8404 * translate this value into byte counter and time interval used
8405 * for this ring inside the device.
8407 /* The bandwidth value. */
8408 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
8409 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_SFT 0
8410 /* The granularity of the value (bits or bytes). */
8411 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
8412 /* Value is in bits. */
8413 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
8414 /* Value is in bytes. */
8415 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
8416 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_LAST \
8417 RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES
8418 /* bw_value_unit is 3 b */
8419 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
8420 UINT32_C(0xe0000000)
8421 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
8422 /* Value is in Mb or MB (base 10). */
8423 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
8424 (UINT32_C(0x0) << 29)
8425 /* Value is in Kb or KB (base 10). */
8426 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
8427 (UINT32_C(0x2) << 29)
8428 /* Value is in bits or bytes. */
8429 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
8430 (UINT32_C(0x4) << 29)
8431 /* Value is in Gb or GB (base 10). */
8432 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
8433 (UINT32_C(0x6) << 29)
8434 /* Value is in 1/100th of a percentage of total bandwidth. */
8435 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
8436 (UINT32_C(0x1) << 29)
8438 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
8439 (UINT32_C(0x7) << 29)
8440 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
8441 RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
8444 * This field is used only when ring_type is a Completion ring.
8445 * This value indicates what interrupt mode should be used on
8446 * this completion ring. Note: In the legacy interrupt mode, no
8447 * more than 16 completion rings are allowed.
8450 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY UINT32_C(0x0)
8452 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD UINT32_C(0x1)
8454 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX UINT32_C(0x2)
8455 /* No Interrupt - Polled mode */
8456 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL UINT32_C(0x3)
8457 uint8_t unused_8[3];
8458 } __attribute__((packed));
8460 /* Output (16 bytes) */
8461 struct hwrm_ring_alloc_output {
8462 uint16_t error_code;
8464 * Pass/Fail or error type Note: receiver to verify the in
8465 * parameters, and fail the call with an error when appropriate
8468 /* This field returns the type of original request. */
8470 /* This field provides original sequence number of the command. */
8473 * This field is the length of the response in bytes. The last
8474 * byte of the response is a valid flag that will read as '1'
8475 * when the command has been completely written to memory.
8479 * Physical number of ring allocated. This value shall be unique
8482 uint16_t logical_ring_id;
8483 /* Logical number of ring allocated. */
8489 * This field is used in Output records to indicate that the
8490 * output is completely written to RAM. This field should be
8491 * read as '1' to indicate that the output has been completely
8492 * written. When writing a command completion or response to an
8493 * internal processor, the order of writes has to be such that
8494 * this field is written last.
8496 } __attribute__((packed));
8498 /* hwrm_ring_free */
8500 * Description: This command is used to free a ring and associated resources.
8501 * With QoS and DCBx agents, it is possible the traffic classes will be moved
8502 * from one CoS queue to another. When this occurs, the driver shall call
8503 * 'hwrm_ring_free' to free the allocated rings and then call 'hwrm_ring_alloc'
8504 * to re-allocate each ring and assign it to a new CoS queue. hwrm_ring_free
8505 * shall be called on a ring only after it has been idle for 500ms or more and
8506 * no frames have been posted to the ring during this time. All frames queued
8507 * for transmission shall be completed and at least 500ms time elapsed from the
8508 * last completion before calling this command.
8510 /* Input (24 bytes) */
8511 struct hwrm_ring_free_input {
8514 * This value indicates what type of request this is. The format
8515 * for the rest of the command is determined by this field.
8519 * This value indicates the what completion ring the request
8520 * will be optionally completed on. If the value is -1, then no
8521 * CR completion will be generated. Any other value must be a
8522 * valid CR ring_id value for this function.
8525 /* This value indicates the command sequence number. */
8528 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8529 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8534 * This is the host address where the response will be written
8535 * when the request is complete. This area must be 16B aligned
8536 * and must be cleared to zero before the request is made.
8540 /* L2 Completion Ring (CR) */
8541 #define HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8543 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1)
8545 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2)
8546 /* RoCE Notification Completion Ring (ROCE_CR) */
8547 #define HWRM_RING_FREE_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8550 /* Physical number of ring allocated. */
8552 } __attribute__((packed));
8554 /* Output (16 bytes) */
8555 struct hwrm_ring_free_output {
8556 uint16_t error_code;
8558 * Pass/Fail or error type Note: receiver to verify the in
8559 * parameters, and fail the call with an error when appropriate
8562 /* This field returns the type of original request. */
8564 /* This field provides original sequence number of the command. */
8567 * This field is the length of the response in bytes. The last
8568 * byte of the response is a valid flag that will read as '1'
8569 * when the command has been completely written to memory.
8577 * This field is used in Output records to indicate that the
8578 * output is completely written to RAM. This field should be
8579 * read as '1' to indicate that the output has been completely
8580 * written. When writing a command completion or response to an
8581 * internal processor, the order of writes has to be such that
8582 * this field is written last.
8584 } __attribute__((packed));
8586 /* hwrm_ring_grp_alloc */
8588 * Description: This API allocates and does basic preparation for a ring group.
8590 /* Input (24 bytes) */
8591 struct hwrm_ring_grp_alloc_input {
8594 * This value indicates what type of request this is. The format
8595 * for the rest of the command is determined by this field.
8599 * This value indicates the what completion ring the request
8600 * will be optionally completed on. If the value is -1, then no
8601 * CR completion will be generated. Any other value must be a
8602 * valid CR ring_id value for this function.
8605 /* This value indicates the command sequence number. */
8608 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8609 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8614 * This is the host address where the response will be written
8615 * when the request is complete. This area must be 16B aligned
8616 * and must be cleared to zero before the request is made.
8619 /* This value identifies the CR associated with the ring group. */
8621 /* This value identifies the main RR associated with the ring group. */
8624 * This value identifies the aggregation RR associated with the
8625 * ring group. If this value is 0xFF... (All Fs), then no
8626 * Aggregation ring will be set.
8630 * This value identifies the statistics context associated with
8633 } __attribute__((packed));
8635 /* Output (16 bytes) */
8636 struct hwrm_ring_grp_alloc_output {
8637 uint16_t error_code;
8639 * Pass/Fail or error type Note: receiver to verify the in
8640 * parameters, and fail the call with an error when appropriate
8643 /* This field returns the type of original request. */
8645 /* This field provides original sequence number of the command. */
8648 * This field is the length of the response in bytes. The last
8649 * byte of the response is a valid flag that will read as '1'
8650 * when the command has been completely written to memory.
8652 uint32_t ring_group_id;
8654 * This is the ring group ID value. Use this value to program
8655 * the default ring group for the VNIC or as table entries in an
8663 * This field is used in Output records to indicate that the
8664 * output is completely written to RAM. This field should be
8665 * read as '1' to indicate that the output has been completely
8666 * written. When writing a command completion or response to an
8667 * internal processor, the order of writes has to be such that
8668 * this field is written last.
8670 } __attribute__((packed));
8672 /* hwrm_ring_grp_free */
8674 * Description: This API frees a ring group and associated resources. # If a
8675 * ring in the ring group is reset or free, then the associated rings in the
8676 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
8677 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
8678 * a part of executing this command, the HWRM shall reset all associated ring
8681 /* Input (24 bytes) */
8682 struct hwrm_ring_grp_free_input {
8685 * This value indicates what type of request this is. The format
8686 * for the rest of the command is determined by this field.
8690 * This value indicates the what completion ring the request
8691 * will be optionally completed on. If the value is -1, then no
8692 * CR completion will be generated. Any other value must be a
8693 * valid CR ring_id value for this function.
8696 /* This value indicates the command sequence number. */
8699 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8700 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8705 * This is the host address where the response will be written
8706 * when the request is complete. This area must be 16B aligned
8707 * and must be cleared to zero before the request is made.
8709 uint32_t ring_group_id;
8710 /* This is the ring group ID value. */
8712 } __attribute__((packed));
8714 /* Output (16 bytes) */
8715 struct hwrm_ring_grp_free_output {
8716 uint16_t error_code;
8718 * Pass/Fail or error type Note: receiver to verify the in
8719 * parameters, and fail the call with an error when appropriate
8722 /* This field returns the type of original request. */
8724 /* This field provides original sequence number of the command. */
8727 * This field is the length of the response in bytes. The last
8728 * byte of the response is a valid flag that will read as '1'
8729 * when the command has been completely written to memory.
8737 * This field is used in Output records to indicate that the
8738 * output is completely written to RAM. This field should be
8739 * read as '1' to indicate that the output has been completely
8740 * written. When writing a command completion or response to an
8741 * internal processor, the order of writes has to be such that
8742 * this field is written last.
8744 } __attribute__((packed));
8746 /* hwrm_cfa_l2_filter_alloc */
8748 * Description: An L2 filter is a filter resource that is used to identify a
8749 * vnic or ring for a packet based on layer 2 fields. Layer 2 fields for
8750 * encapsulated packets include both outer L2 header and/or inner l2 header of
8751 * encapsulated packet. The L2 filter resource covers the following OS specific
8752 * L2 filters. Linux/FreeBSD (per function): # Broadcast enable/disable # List
8753 * of individual multicast filters # All multicast enable/disable filter #
8754 * Unicast filters # Promiscuous mode VMware: # Broadcast enable/disable (per
8755 * physical function) # All multicast enable/disable (per function) # Unicast
8756 * filters per ring or vnic # Promiscuous mode per PF Windows: # Broadcast
8757 * enable/disable (per physical function) # List of individual multicast filters
8758 * (Driver needs to advertise the maximum number of filters supported) # All
8759 * multicast enable/disable per physical function # Unicast filters per vnic #
8760 * Promiscuous mode per PF Implementation notes on the use of VNIC in this
8761 * command: # By default, these filters belong to default vnic for the function.
8762 * # Once these filters are set up, only destination VNIC can be modified. # If
8763 * the destination VNIC is not specified in this command, then the HWRM shall
8764 * only create an l2 context id. HWRM Implementation notes for multicast
8765 * filters: # The hwrm_filter_alloc command can be used to set up multicast
8766 * filters (perfect match or partial match). Each individual function driver can
8767 * set up multicast filters independently. # The HWRM needs to keep track of
8768 * multicast filters set up by function drivers and maintain multicast group
8769 * replication records to enable a subset of functions to receive traffic for a
8770 * specific multicast address. # When a specific multicast filter cannot be set,
8771 * the HWRM shall return an error. In this error case, the driver should fall
8772 * back to using one general filter (rather than specific) for all multicast
8773 * traffic. # When the SR-IOV is enabled, the HWRM needs to additionally track
8774 * source knockout per multicast group record. Examples of setting unicast
8775 * filters: For a unicast MAC based filter, one can use a combination of the
8776 * fields and masks provided in this command to set up the filter. Below are
8777 * some examples: # MAC + no VLAN filter: This filter is used to identify
8778 * traffic that does not contain any VLAN tags and matches destination (or
8779 * source) MAC address. This filter can be set up by setting only l2_addr field
8780 * to be a valid field. All other fields are not valid. The following value is
8781 * set for l2_addr. l2_addr = MAC # MAC + Any VLAN filter: This filter is used
8782 * to identify traffic that carries single VLAN tag and matches (destination or
8783 * source) MAC address. This filter can be set up by setting only l2_addr and
8784 * l2_ovlan_mask fields to be valid fields. All other fields are not valid. The
8785 * following values are set for those two valid fields. l2_addr = MAC,
8786 * l2_ovlan_mask = 0xFFFF # MAC + no VLAN or VLAN ID=0: This filter is used to
8787 * identify untagged traffic that does not contain any VLAN tags or a VLAN tag
8788 * with VLAN ID = 0 and matches destination (or source) MAC address. This filter
8789 * can be set up by setting only l2_addr and l2_ovlan fields to be valid fields.
8790 * All other fields are not valid. The following value are set for l2_addr and
8791 * l2_ovlan. l2_addr = MAC, l2_ovlan = 0x0 # MAC + no VLAN or any VLAN: This
8792 * filter is used to identify traffic that contains zero or 1 VLAN tag and
8793 * matches destination (or source) MAC address. This filter can be set up by
8794 * setting only l2_addr, l2_ovlan, and l2_mask fields to be valid fields. All
8795 * other fields are not valid. The following value are set for l2_addr,
8796 * l2_ovlan, and l2_mask fields. l2_addr = MAC, l2_ovlan = 0x0, l2_ovlan_mask =
8797 * 0xFFFF # MAC + VLAN ID filter: This filter can be set up by setting only
8798 * l2_addr, l2_ovlan, and l2_ovlan_mask fields to be valid fields. All other
8799 * fields are not valid. The following values are set for those three valid
8800 * fields. l2_addr = MAC, l2_ovlan = VLAN ID, l2_ovlan_mask = 0xF000
8802 /* Input (96 bytes) */
8803 struct hwrm_cfa_l2_filter_alloc_input {
8806 * This value indicates what type of request this is. The format
8807 * for the rest of the command is determined by this field.
8811 * This value indicates the what completion ring the request
8812 * will be optionally completed on. If the value is -1, then no
8813 * CR completion will be generated. Any other value must be a
8814 * valid CR ring_id value for this function.
8817 /* This value indicates the command sequence number. */
8820 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8821 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8826 * This is the host address where the response will be written
8827 * when the request is complete. This area must be 16B aligned
8828 * and must be cleared to zero before the request is made.
8832 * Enumeration denoting the RX, TX type of the resource. This
8833 * enumeration is used for resources that are similar for both
8834 * TX and RX paths of the chip.
8836 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
8838 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
8839 (UINT32_C(0x0) << 0)
8841 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
8842 (UINT32_C(0x1) << 0)
8843 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
8844 CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
8846 * Setting of this flag indicates the applicability to the
8849 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x2)
8851 * Setting of this flag indicates drop action. If this flag is
8852 * not set, then it should be considered accept action.
8854 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x4)
8856 * If this flag is set, all t_l2_* fields are invalid and they
8857 * should not be specified. If this flag is set, then l2_*
8858 * fields refer to fields of outermost L2 header.
8860 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
8862 /* This bit must be '1' for the l2_addr field to be configured. */
8863 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
8864 /* This bit must be '1' for the l2_addr_mask field to be configured. */
8865 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
8867 /* This bit must be '1' for the l2_ovlan field to be configured. */
8868 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4)
8870 * This bit must be '1' for the l2_ovlan_mask field to be
8873 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
8875 /* This bit must be '1' for the l2_ivlan field to be configured. */
8876 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10)
8878 * This bit must be '1' for the l2_ivlan_mask field to be
8881 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
8883 /* This bit must be '1' for the t_l2_addr field to be configured. */
8884 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40)
8886 * This bit must be '1' for the t_l2_addr_mask field to be
8889 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
8891 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
8892 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
8895 * This bit must be '1' for the t_l2_ovlan_mask field to be
8898 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
8900 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
8901 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
8904 * This bit must be '1' for the t_l2_ivlan_mask field to be
8907 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
8909 /* This bit must be '1' for the src_type field to be configured. */
8910 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000)
8911 /* This bit must be '1' for the src_id field to be configured. */
8912 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
8913 /* This bit must be '1' for the tunnel_type field to be configured. */
8914 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
8916 /* This bit must be '1' for the dst_id field to be configured. */
8917 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
8919 * This bit must be '1' for the mirror_vnic_id field to be
8922 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
8926 * This value sets the match value for the L2 MAC address.
8927 * Destination MAC address for RX path. Source MAC address for
8932 uint8_t l2_addr_mask[6];
8934 * This value sets the mask value for the L2 address. A value of
8935 * 0 will mask the corresponding bit from compare.
8938 /* This value sets VLAN ID value for outer VLAN. */
8939 uint16_t l2_ovlan_mask;
8941 * This value sets the mask value for the ovlan id. A value of 0
8942 * will mask the corresponding bit from compare.
8945 /* This value sets VLAN ID value for inner VLAN. */
8946 uint16_t l2_ivlan_mask;
8948 * This value sets the mask value for the ivlan id. A value of 0
8949 * will mask the corresponding bit from compare.
8953 uint8_t t_l2_addr[6];
8955 * This value sets the match value for the tunnel L2 MAC
8956 * address. Destination MAC address for RX path. Source MAC
8957 * address for TX path.
8961 uint8_t t_l2_addr_mask[6];
8963 * This value sets the mask value for the tunnel L2 address. A
8964 * value of 0 will mask the corresponding bit from compare.
8966 uint16_t t_l2_ovlan;
8967 /* This value sets VLAN ID value for tunnel outer VLAN. */
8968 uint16_t t_l2_ovlan_mask;
8970 * This value sets the mask value for the tunnel ovlan id. A
8971 * value of 0 will mask the corresponding bit from compare.
8973 uint16_t t_l2_ivlan;
8974 /* This value sets VLAN ID value for tunnel inner VLAN. */
8975 uint16_t t_l2_ivlan_mask;
8977 * This value sets the mask value for the tunnel ivlan id. A
8978 * value of 0 will mask the corresponding bit from compare.
8981 /* This value identifies the type of source of the packet. */
8983 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT UINT32_C(0x0)
8984 /* Physical function */
8985 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF UINT32_C(0x1)
8986 /* Virtual function */
8987 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF UINT32_C(0x2)
8988 /* Virtual NIC of a function */
8989 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC UINT32_C(0x3)
8990 /* Embedded processor for CFA management */
8991 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG UINT32_C(0x4)
8992 /* Embedded processor for OOB management */
8993 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE UINT32_C(0x5)
8994 /* Embedded processor for RoCE */
8995 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO UINT32_C(0x6)
8996 /* Embedded processor for network proxy functions */
8997 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG UINT32_C(0x7)
9001 * This value is the id of the source. For a network port, it
9002 * represents port_id. For a physical function, it represents
9003 * fid. For a virtual function, it represents vf_id. For a vnic,
9004 * it represents vnic_id. For embedded processors, this id is
9005 * not valid. Notes: 1. The function ID is implied if it src_id
9006 * is not provided for a src_type that is either
9008 uint8_t tunnel_type;
9011 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
9013 /* Virtual eXtensible Local Area Network (VXLAN) */
9014 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
9017 * Network Virtualization Generic Routing
9018 * Encapsulation (NVGRE)
9020 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
9023 * Generic Routing Encapsulation (GRE) inside
9026 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
9028 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
9029 /* Generic Network Virtualization Encapsulation (Geneve) */
9030 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
9031 /* Multi-Protocol Lable Switching (MPLS) */
9032 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
9033 /* Stateless Transport Tunnel (STT) */
9034 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
9036 * Generic Routing Encapsulation (GRE) inside IP
9039 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
9040 /* Any tunneled traffic */
9041 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
9046 * If set, this value shall represent the Logical VNIC ID of the
9047 * destination VNIC for the RX path and network port id of the
9048 * destination port for the TX path.
9050 uint16_t mirror_vnic_id;
9051 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
9054 * This hint is provided to help in placing the filter in the
9058 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
9060 /* Above the given filter */
9061 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
9063 /* Below the given filter */
9064 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
9066 /* As high as possible */
9067 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3)
9068 /* As low as possible */
9069 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN UINT32_C(0x4)
9072 uint64_t l2_filter_id_hint;
9074 * This is the ID of the filter that goes along with the
9075 * pri_hint. This field is valid only for the following values.
9076 * 1 - Above the given filter 2 - Below the given filter
9078 } __attribute__((packed));
9080 /* Output (24 bytes) */
9081 struct hwrm_cfa_l2_filter_alloc_output {
9082 uint16_t error_code;
9084 * Pass/Fail or error type Note: receiver to verify the in
9085 * parameters, and fail the call with an error when appropriate
9088 /* This field returns the type of original request. */
9090 /* This field provides original sequence number of the command. */
9093 * This field is the length of the response in bytes. The last
9094 * byte of the response is a valid flag that will read as '1'
9095 * when the command has been completely written to memory.
9097 uint64_t l2_filter_id;
9099 * This value identifies a set of CFA data structures used for
9104 * This is the ID of the flow associated with this filter. This
9105 * value shall be used to match and associate the flow
9106 * identifier returned in completion records. A value of
9107 * 0xFFFFFFFF shall indicate no flow id.
9114 * This field is used in Output records to indicate that the
9115 * output is completely written to RAM. This field should be
9116 * read as '1' to indicate that the output has been completely
9117 * written. When writing a command completion or response to an
9118 * internal processor, the order of writes has to be such that
9119 * this field is written last.
9121 } __attribute__((packed));
9123 /* hwrm_cfa_l2_filter_free */
9125 * Description: Free a L2 filter. The HWRM shall free all associated filter
9126 * resources with the L2 filter.
9128 /* Input (24 bytes) */
9129 struct hwrm_cfa_l2_filter_free_input {
9132 * This value indicates what type of request this is. The format
9133 * for the rest of the command is determined by this field.
9137 * This value indicates the what completion ring the request
9138 * will be optionally completed on. If the value is -1, then no
9139 * CR completion will be generated. Any other value must be a
9140 * valid CR ring_id value for this function.
9143 /* This value indicates the command sequence number. */
9146 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9147 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9152 * This is the host address where the response will be written
9153 * when the request is complete. This area must be 16B aligned
9154 * and must be cleared to zero before the request is made.
9156 uint64_t l2_filter_id;
9158 * This value identifies a set of CFA data structures used for
9161 } __attribute__((packed));
9163 /* Output (16 bytes) */
9164 struct hwrm_cfa_l2_filter_free_output {
9165 uint16_t error_code;
9167 * Pass/Fail or error type Note: receiver to verify the in
9168 * parameters, and fail the call with an error when appropriate
9171 /* This field returns the type of original request. */
9173 /* This field provides original sequence number of the command. */
9176 * This field is the length of the response in bytes. The last
9177 * byte of the response is a valid flag that will read as '1'
9178 * when the command has been completely written to memory.
9186 * This field is used in Output records to indicate that the
9187 * output is completely written to RAM. This field should be
9188 * read as '1' to indicate that the output has been completely
9189 * written. When writing a command completion or response to an
9190 * internal processor, the order of writes has to be such that
9191 * this field is written last.
9193 } __attribute__((packed));
9195 /* hwrm_cfa_l2_filter_cfg */
9196 /* Description: Change the configuration of an existing L2 filter */
9197 /* Input (40 bytes) */
9198 struct hwrm_cfa_l2_filter_cfg_input {
9201 * This value indicates what type of request this is. The format
9202 * for the rest of the command is determined by this field.
9206 * This value indicates the what completion ring the request
9207 * will be optionally completed on. If the value is -1, then no
9208 * CR completion will be generated. Any other value must be a
9209 * valid CR ring_id value for this function.
9212 /* This value indicates the command sequence number. */
9215 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9216 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9221 * This is the host address where the response will be written
9222 * when the request is complete. This area must be 16B aligned
9223 * and must be cleared to zero before the request is made.
9227 * Enumeration denoting the RX, TX type of the resource. This
9228 * enumeration is used for resources that are similar for both
9229 * TX and RX paths of the chip.
9231 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9233 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX \
9234 (UINT32_C(0x0) << 0)
9236 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX \
9237 (UINT32_C(0x1) << 0)
9238 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \
9239 CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX
9241 * Setting of this flag indicates drop action. If this flag is
9242 * not set, then it should be considered accept action.
9244 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_DROP UINT32_C(0x2)
9246 /* This bit must be '1' for the dst_id field to be configured. */
9247 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_DST_ID UINT32_C(0x1)
9249 * This bit must be '1' for the new_mirror_vnic_id field to be
9252 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
9254 uint64_t l2_filter_id;
9256 * This value identifies a set of CFA data structures used for
9261 * If set, this value shall represent the Logical VNIC ID of the
9262 * destination VNIC for the RX path and network port id of the
9263 * destination port for the TX path.
9265 uint32_t new_mirror_vnic_id;
9266 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
9267 } __attribute__((packed));
9269 /* Output (16 bytes) */
9270 struct hwrm_cfa_l2_filter_cfg_output {
9271 uint16_t error_code;
9273 * Pass/Fail or error type Note: receiver to verify the in
9274 * parameters, and fail the call with an error when appropriate
9277 /* This field returns the type of original request. */
9279 /* This field provides original sequence number of the command. */
9282 * This field is the length of the response in bytes. The last
9283 * byte of the response is a valid flag that will read as '1'
9284 * when the command has been completely written to memory.
9292 * This field is used in Output records to indicate that the
9293 * output is completely written to RAM. This field should be
9294 * read as '1' to indicate that the output has been completely
9295 * written. When writing a command completion or response to an
9296 * internal processor, the order of writes has to be such that
9297 * this field is written last.
9299 } __attribute__((packed));
9301 /* hwrm_cfa_l2_set_rx_mask */
9302 /* Description: This command will set rx mask of the function. */
9303 /* Input (56 bytes) */
9304 struct hwrm_cfa_l2_set_rx_mask_input {
9307 * This value indicates what type of request this is. The format
9308 * for the rest of the command is determined by this field.
9312 * This value indicates the what completion ring the request
9313 * will be optionally completed on. If the value is -1, then no
9314 * CR completion will be generated. Any other value must be a
9315 * valid CR ring_id value for this function.
9318 /* This value indicates the command sequence number. */
9321 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9322 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9327 * This is the host address where the response will be written
9328 * when the request is complete. This area must be 16B aligned
9329 * and must be cleared to zero before the request is made.
9334 /* Reserved for future use. */
9335 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
9337 * When this bit is '1', the function is requested to accept
9338 * multi-cast packets specified by the multicast addr table.
9340 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
9342 * When this bit is '1', the function is requested to accept all
9343 * multi-cast packets.
9345 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
9347 * When this bit is '1', the function is requested to accept
9348 * broadcast packets.
9350 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
9352 * When this bit is '1', the function is requested to be put in
9353 * the promiscuous mode. The HWRM should accept any function to
9354 * set up promiscuous mode. The HWRM shall follow the semantics
9355 * below for the promiscuous mode support. # When partitioning
9356 * is not enabled on a port (i.e. single PF on the port), then
9357 * the PF shall be allowed to be in the promiscuous mode. When
9358 * the PF is in the promiscuous mode, then it shall receive all
9359 * host bound traffic on that port. # When partitioning is
9360 * enabled on a port (i.e. multiple PFs per port) and a PF on
9361 * that port is in the promiscuous mode, then the PF receives
9362 * all traffic within that partition as identified by a unique
9363 * identifier for the PF (e.g. S-Tag). If a unique outer VLAN
9364 * for the PF is specified, then the setting of promiscuous mode
9365 * on that PF shall result in the PF receiving all host bound
9366 * traffic with matching outer VLAN. # A VF shall can be set in
9367 * the promiscuous mode. In the promiscuous mode, the VF does
9368 * not receive any traffic unless a unique outer VLAN for the VF
9369 * is specified. If a unique outer VLAN for the VF is specified,
9370 * then the setting of promiscuous mode on that VF shall result
9371 * in the VF receiving all host bound traffic with the matching
9372 * outer VLAN. # The HWRM shall allow the setting of promiscuous
9373 * mode on a function independently from the promiscuous mode
9374 * settings on other functions.
9376 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
9378 * If this flag is set, the corresponding RX filters shall be
9379 * set up to cover multicast/broadcast filters for the outermost
9380 * Layer 2 destination MAC address field.
9382 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
9384 * If this flag is set, the corresponding RX filters shall be
9385 * set up to cover multicast/broadcast filters for the VLAN-
9386 * tagged packets that match the TPID and VID fields of VLAN
9387 * tags in the VLAN tag table specified in this command.
9389 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY UINT32_C(0x40)
9391 * If this flag is set, the corresponding RX filters shall be
9392 * set up to cover multicast/broadcast filters for non-VLAN
9393 * tagged packets and VLAN-tagged packets that match the TPID
9394 * and VID fields of VLAN tags in the VLAN tag table specified
9397 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN UINT32_C(0x80)
9399 * If this flag is set, the corresponding RX filters shall be
9400 * set up to cover multicast/broadcast filters for non-VLAN
9401 * tagged packets and VLAN-tagged packets matching any VLAN tag.
9402 * If this flag is set, then the HWRM shall ignore VLAN tags
9403 * specified in vlan_tag_tbl. If none of vlanonly, vlan_nonvlan,
9404 * and anyvlan_nonvlan flags is set, then the HWRM shall ignore
9405 * VLAN tags specified in vlan_tag_tbl. The HWRM client shall
9406 * set at most one flag out of vlanonly, vlan_nonvlan, and
9409 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN \
9411 uint64_t mc_tbl_addr;
9412 /* This is the address for mcast address tbl. */
9413 uint32_t num_mc_entries;
9415 * This value indicates how many entries in mc_tbl are valid.
9416 * Each entry is 6 bytes.
9419 uint64_t vlan_tag_tbl_addr;
9421 * This is the address for VLAN tag table. Each VLAN entry in
9422 * the table is 4 bytes of a VLAN tag including TPID, PCP, DEI,
9423 * and VID fields in network byte order.
9425 uint32_t num_vlan_tags;
9427 * This value indicates how many entries in vlan_tag_tbl are
9428 * valid. Each entry is 4 bytes.
9431 } __attribute__((packed));
9433 /* Output (16 bytes) */
9434 struct hwrm_cfa_l2_set_rx_mask_output {
9435 uint16_t error_code;
9437 * Pass/Fail or error type Note: receiver to verify the in
9438 * parameters, and fail the call with an error when appropriate
9441 /* This field returns the type of original request. */
9443 /* This field provides original sequence number of the command. */
9446 * This field is the length of the response in bytes. The last
9447 * byte of the response is a valid flag that will read as '1'
9448 * when the command has been completely written to memory.
9456 * This field is used in Output records to indicate that the
9457 * output is completely written to RAM. This field should be
9458 * read as '1' to indicate that the output has been completely
9459 * written. When writing a command completion or response to an
9460 * internal processor, the order of writes has to be such that
9461 * this field is written last.
9463 } __attribute__((packed));
9465 /* hwrm_tunnel_dst_port_query */
9467 * Description: This function is called by a driver to query tunnel type
9468 * specific destination port configuration.
9470 /* Input (24 bytes) */
9471 struct hwrm_tunnel_dst_port_query_input {
9474 * This value indicates what type of request this is. The format
9475 * for the rest of the command is determined by this field.
9479 * This value indicates the what completion ring the request
9480 * will be optionally completed on. If the value is -1, then no
9481 * CR completion will be generated. Any other value must be a
9482 * valid CR ring_id value for this function.
9485 /* This value indicates the command sequence number. */
9488 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9489 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9494 * This is the host address where the response will be written
9495 * when the request is complete. This area must be 16B aligned
9496 * and must be cleared to zero before the request is made.
9498 uint8_t tunnel_type;
9500 /* Virtual eXtensible Local Area Network (VXLAN) */
9501 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN \
9503 /* Generic Network Virtualization Encapsulation (Geneve) */
9504 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_GENEVE \
9506 uint8_t unused_0[7];
9507 } __attribute__((packed));
9509 /* Output (16 bytes) */
9510 struct hwrm_tunnel_dst_port_query_output {
9511 uint16_t error_code;
9513 * Pass/Fail or error type Note: receiver to verify the in
9514 * parameters, and fail the call with an error when appropriate
9517 /* This field returns the type of original request. */
9519 /* This field provides original sequence number of the command. */
9522 * This field is the length of the response in bytes. The last
9523 * byte of the response is a valid flag that will read as '1'
9524 * when the command has been completely written to memory.
9526 uint16_t tunnel_dst_port_id;
9528 * This field represents the identifier of L4 destination port
9529 * used for the given tunnel type. This field is valid for
9530 * specific tunnel types that use layer 4 (e.g. UDP) transports
9533 uint16_t tunnel_dst_port_val;
9535 * This field represents the value of L4 destination port
9536 * identified by tunnel_dst_port_id. This field is valid for
9537 * specific tunnel types that use layer 4 (e.g. UDP) transports
9538 * for tunneling. This field is in network byte order. A value
9539 * of 0 means that the destination port is not configured.
9546 * This field is used in Output records to indicate that the
9547 * output is completely written to RAM. This field should be
9548 * read as '1' to indicate that the output has been completely
9549 * written. When writing a command completion or response to an
9550 * internal processor, the order of writes has to be such that
9551 * this field is written last.
9553 } __attribute__((packed));
9555 /* hwrm_tunnel_dst_port_alloc */
9557 * Description: This function is called by a driver to allocate l4 destination
9558 * port for a specific tunnel type. The destination port value is provided in
9559 * the input. If the HWRM supports only one global destination port for a tunnel
9560 * type, then the HWRM shall keep track of its usage as described below. # The
9561 * first caller that allocates a destination port shall always succeed and the
9562 * HWRM shall save the destination port configuration for that tunnel type and
9563 * increment the usage count to 1. # Subsequent callers allocating the same
9564 * destination port for that tunnel type shall succeed and the HWRM shall
9565 * increment the usage count for that port for each subsequent caller that
9566 * succeeds. # Any subsequent caller trying to allocate a different destination
9567 * port for that tunnel type shall fail until the usage count for the original
9568 * destination port goes to zero. # A caller that frees a port will cause the
9569 * usage count for that port to decrement.
9571 /* Input (24 bytes) */
9572 struct hwrm_tunnel_dst_port_alloc_input {
9575 * This value indicates what type of request this is. The format
9576 * for the rest of the command is determined by this field.
9580 * This value indicates the what completion ring the request
9581 * will be optionally completed on. If the value is -1, then no
9582 * CR completion will be generated. Any other value must be a
9583 * valid CR ring_id value for this function.
9586 /* This value indicates the command sequence number. */
9589 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9590 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9595 * This is the host address where the response will be written
9596 * when the request is complete. This area must be 16B aligned
9597 * and must be cleared to zero before the request is made.
9599 uint8_t tunnel_type;
9601 /* Virtual eXtensible Local Area Network (VXLAN) */
9602 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
9603 /* Generic Network Virtualization Encapsulation (Geneve) */
9604 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
9607 uint16_t tunnel_dst_port_val;
9609 * This field represents the value of L4 destination port used
9610 * for the given tunnel type. This field is valid for specific
9611 * tunnel types that use layer 4 (e.g. UDP) transports for
9612 * tunneling. This field is in network byte order. A value of 0
9613 * shall fail the command.
9616 } __attribute__((packed));
9618 /* Output (16 bytes) */
9619 struct hwrm_tunnel_dst_port_alloc_output {
9620 uint16_t error_code;
9622 * Pass/Fail or error type Note: receiver to verify the in
9623 * parameters, and fail the call with an error when appropriate
9626 /* This field returns the type of original request. */
9628 /* This field provides original sequence number of the command. */
9631 * This field is the length of the response in bytes. The last
9632 * byte of the response is a valid flag that will read as '1'
9633 * when the command has been completely written to memory.
9635 uint16_t tunnel_dst_port_id;
9637 * Identifier of a tunnel L4 destination port value. Only
9638 * applies to tunnel types that has l4 destination port
9648 * This field is used in Output records to indicate that the
9649 * output is completely written to RAM. This field should be
9650 * read as '1' to indicate that the output has been completely
9651 * written. When writing a command completion or response to an
9652 * internal processor, the order of writes has to be such that
9653 * this field is written last.
9655 } __attribute__((packed));
9657 /* hwrm_tunnel_dst_port_free */
9659 * Description: This function is called by a driver to free l4 destination port
9660 * for a specific tunnel type.
9662 /* Input (24 bytes) */
9663 struct hwrm_tunnel_dst_port_free_input {
9666 * This value indicates what type of request this is. The format
9667 * for the rest of the command is determined by this field.
9671 * This value indicates the what completion ring the request
9672 * will be optionally completed on. If the value is -1, then no
9673 * CR completion will be generated. Any other value must be a
9674 * valid CR ring_id value for this function.
9677 /* This value indicates the command sequence number. */
9680 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9681 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9686 * This is the host address where the response will be written
9687 * when the request is complete. This area must be 16B aligned
9688 * and must be cleared to zero before the request is made.
9690 uint8_t tunnel_type;
9692 /* Virtual eXtensible Local Area Network (VXLAN) */
9693 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
9694 /* Generic Network Virtualization Encapsulation (Geneve) */
9695 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
9697 uint16_t tunnel_dst_port_id;
9699 * Identifier of a tunnel L4 destination port value. Only
9700 * applies to tunnel types that has l4 destination port
9704 } __attribute__((packed));
9706 /* Output (16 bytes) */
9707 struct hwrm_tunnel_dst_port_free_output {
9708 uint16_t error_code;
9710 * Pass/Fail or error type Note: receiver to verify the in
9711 * parameters, and fail the call with an error when appropriate
9714 /* This field returns the type of original request. */
9716 /* This field provides original sequence number of the command. */
9719 * This field is the length of the response in bytes. The last
9720 * byte of the response is a valid flag that will read as '1'
9721 * when the command has been completely written to memory.
9729 * This field is used in Output records to indicate that the
9730 * output is completely written to RAM. This field should be
9731 * read as '1' to indicate that the output has been completely
9732 * written. When writing a command completion or response to an
9733 * internal processor, the order of writes has to be such that
9734 * this field is written last.
9736 } __attribute__((packed));
9738 /* hwrm_stat_ctx_alloc */
9740 * Description: This command allocates and does basic preparation for a stat
9743 /* Input (32 bytes) */
9744 struct hwrm_stat_ctx_alloc_input {
9747 * This value indicates what type of request this is. The format
9748 * for the rest of the command is determined by this field.
9752 * This value indicates the what completion ring the request
9753 * will be optionally completed on. If the value is -1, then no
9754 * CR completion will be generated. Any other value must be a
9755 * valid CR ring_id value for this function.
9758 /* This value indicates the command sequence number. */
9761 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9762 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9767 * This is the host address where the response will be written
9768 * when the request is complete. This area must be 16B aligned
9769 * and must be cleared to zero before the request is made.
9771 uint64_t stats_dma_addr;
9772 /* This is the address for statistic block. */
9773 uint32_t update_period_ms;
9775 * The statistic block update period in ms. e.g. 250ms, 500ms,
9776 * 750ms, 1000ms. If update_period_ms is 0, then the stats
9777 * update shall be never done and the DMA address shall not be
9778 * used. In this case, the stat block can only be read by
9779 * hwrm_stat_ctx_query command.
9781 uint8_t stat_ctx_flags;
9783 * This field is used to specify statistics context specific
9784 * configuration flags.
9787 * When this bit is set to '1', the statistics context shall be
9788 * allocated for RoCE traffic only. In this case, traffic other
9789 * than offloaded RoCE traffic shall not be included in this
9790 * statistic context. When this bit is set to '0', the
9791 * statistics context shall be used for the network traffic
9792 * other than offloaded RoCE traffic.
9794 #define HWRM_STAT_CTX_ALLOC_INPUT_STAT_CTX_FLAGS_ROCE UINT32_C(0x1)
9795 uint8_t unused_0[3];
9796 } __attribute__((packed));
9798 /* Output (16 bytes) */
9799 struct hwrm_stat_ctx_alloc_output {
9800 uint16_t error_code;
9802 * Pass/Fail or error type Note: receiver to verify the in
9803 * parameters, and fail the call with an error when appropriate
9806 /* This field returns the type of original request. */
9808 /* This field provides original sequence number of the command. */
9811 * This field is the length of the response in bytes. The last
9812 * byte of the response is a valid flag that will read as '1'
9813 * when the command has been completely written to memory.
9815 uint32_t stat_ctx_id;
9816 /* This is the statistics context ID value. */
9822 * This field is used in Output records to indicate that the
9823 * output is completely written to RAM. This field should be
9824 * read as '1' to indicate that the output has been completely
9825 * written. When writing a command completion or response to an
9826 * internal processor, the order of writes has to be such that
9827 * this field is written last.
9829 } __attribute__((packed));
9831 /* hwrm_stat_ctx_free */
9832 /* Description: This command is used to free a stat context. */
9833 /* Input (24 bytes) */
9834 struct hwrm_stat_ctx_free_input {
9837 * This value indicates what type of request this is. The format
9838 * for the rest of the command is determined by this field.
9842 * This value indicates the what completion ring the request
9843 * will be optionally completed on. If the value is -1, then no
9844 * CR completion will be generated. Any other value must be a
9845 * valid CR ring_id value for this function.
9848 /* This value indicates the command sequence number. */
9851 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9852 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9857 * This is the host address where the response will be written
9858 * when the request is complete. This area must be 16B aligned
9859 * and must be cleared to zero before the request is made.
9861 uint32_t stat_ctx_id;
9862 /* ID of the statistics context that is being queried. */
9864 } __attribute__((packed));
9866 /* Output (16 bytes) */
9867 struct hwrm_stat_ctx_free_output {
9868 uint16_t error_code;
9870 * Pass/Fail or error type Note: receiver to verify the in
9871 * parameters, and fail the call with an error when appropriate
9874 /* This field returns the type of original request. */
9876 /* This field provides original sequence number of the command. */
9879 * This field is the length of the response in bytes. The last
9880 * byte of the response is a valid flag that will read as '1'
9881 * when the command has been completely written to memory.
9883 uint32_t stat_ctx_id;
9884 /* This is the statistics context ID value. */
9890 * This field is used in Output records to indicate that the
9891 * output is completely written to RAM. This field should be
9892 * read as '1' to indicate that the output has been completely
9893 * written. When writing a command completion or response to an
9894 * internal processor, the order of writes has to be such that
9895 * this field is written last.
9897 } __attribute__((packed));
9899 /* hwrm_stat_ctx_clr_stats */
9900 /* Description: This command clears statistics of a context. */
9901 /* Input (24 bytes) */
9902 struct hwrm_stat_ctx_clr_stats_input {
9905 * This value indicates what type of request this is. The format
9906 * for the rest of the command is determined by this field.
9910 * This value indicates the what completion ring the request
9911 * will be optionally completed on. If the value is -1, then no
9912 * CR completion will be generated. Any other value must be a
9913 * valid CR ring_id value for this function.
9916 /* This value indicates the command sequence number. */
9919 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9920 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9925 * This is the host address where the response will be written
9926 * when the request is complete. This area must be 16B aligned
9927 * and must be cleared to zero before the request is made.
9929 uint32_t stat_ctx_id;
9930 /* ID of the statistics context that is being queried. */
9932 } __attribute__((packed));
9934 /* Output (16 bytes) */
9935 struct hwrm_stat_ctx_clr_stats_output {
9936 uint16_t error_code;
9938 * Pass/Fail or error type Note: receiver to verify the in
9939 * parameters, and fail the call with an error when appropriate
9942 /* This field returns the type of original request. */
9944 /* This field provides original sequence number of the command. */
9947 * This field is the length of the response in bytes. The last
9948 * byte of the response is a valid flag that will read as '1'
9949 * when the command has been completely written to memory.
9957 * This field is used in Output records to indicate that the
9958 * output is completely written to RAM. This field should be
9959 * read as '1' to indicate that the output has been completely
9960 * written. When writing a command completion or response to an
9961 * internal processor, the order of writes has to be such that
9962 * this field is written last.
9964 } __attribute__((packed));
9966 /* hwrm_stat_ctx_query */
9967 /* Description: This command returns statistics of a context. */
9968 /* Input (24 bytes) */
9970 struct hwrm_stat_ctx_query_input {
9973 * This value indicates what type of request this is. The format for the
9974 * rest of the command is determined by this field.
9978 * This value indicates the what completion ring the request will be
9979 * optionally completed on. If the value is -1, then no CR completion
9980 * will be generated. Any other value must be a valid CR ring_id value
9981 * for this function.
9984 /* This value indicates the command sequence number. */
9987 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9988 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9992 * This is the host address where the response will be written when the
9993 * request is complete. This area must be 16B aligned and must be
9994 * cleared to zero before the request is made.
9996 uint32_t stat_ctx_id;
9997 /* ID of the statistics context that is being queried. */
9999 } __attribute__((packed));
10001 /* Output (176 bytes) */
10003 struct hwrm_stat_ctx_query_output {
10004 uint16_t error_code;
10006 * Pass/Fail or error type Note: receiver to verify the in parameters,
10007 * and fail the call with an error when appropriate
10010 /* This field returns the type of original request. */
10012 /* This field provides original sequence number of the command. */
10015 * This field is the length of the response in bytes. The last byte of
10016 * the response is a valid flag that will read as '1' when the command
10017 * has been completely written to memory.
10019 uint64_t tx_ucast_pkts;
10020 /* Number of transmitted unicast packets */
10021 uint64_t tx_mcast_pkts;
10022 /* Number of transmitted multicast packets */
10023 uint64_t tx_bcast_pkts;
10024 /* Number of transmitted broadcast packets */
10025 uint64_t tx_err_pkts;
10026 /* Number of transmitted packets with error */
10027 uint64_t tx_drop_pkts;
10028 /* Number of dropped packets on transmit path */
10029 uint64_t tx_ucast_bytes;
10030 /* Number of transmitted bytes for unicast traffic */
10031 uint64_t tx_mcast_bytes;
10032 /* Number of transmitted bytes for multicast traffic */
10033 uint64_t tx_bcast_bytes;
10034 /* Number of transmitted bytes for broadcast traffic */
10035 uint64_t rx_ucast_pkts;
10036 /* Number of received unicast packets */
10037 uint64_t rx_mcast_pkts;
10038 /* Number of received multicast packets */
10039 uint64_t rx_bcast_pkts;
10040 /* Number of received broadcast packets */
10041 uint64_t rx_err_pkts;
10042 /* Number of received packets with error */
10043 uint64_t rx_drop_pkts;
10044 /* Number of dropped packets on received path */
10045 uint64_t rx_ucast_bytes;
10046 /* Number of received bytes for unicast traffic */
10047 uint64_t rx_mcast_bytes;
10048 /* Number of received bytes for multicast traffic */
10049 uint64_t rx_bcast_bytes;
10050 /* Number of received bytes for broadcast traffic */
10051 uint64_t rx_agg_pkts;
10052 /* Number of aggregated unicast packets */
10053 uint64_t rx_agg_bytes;
10054 /* Number of aggregated unicast bytes */
10055 uint64_t rx_agg_events;
10056 /* Number of aggregation events */
10057 uint64_t rx_agg_aborts;
10058 /* Number of aborted aggregations */
10065 * This field is used in Output records to indicate that the output is
10066 * completely written to RAM. This field should be read as '1' to
10067 * indicate that the output has been completely written. When writing a
10068 * command completion or response to an internal processor, the order of
10069 * writes has to be such that this field is written last.
10071 } __attribute__((packed));
10073 /* hwrm_exec_fwd_resp */
10075 * Description: This command is used to send an encapsulated request to the
10076 * HWRM. This command instructs the HWRM to execute the request and forward the
10077 * response of the encapsulated request to the location specified in the
10078 * original request that is encapsulated. The target id of this command shall be
10079 * set to 0xFFFF (HWRM). The response location in this command shall be used to
10080 * acknowledge the receipt of the encapsulated request and forwarding of the
10083 /* Input (128 bytes) */
10084 struct hwrm_exec_fwd_resp_input {
10087 * This value indicates what type of request this is. The format
10088 * for the rest of the command is determined by this field.
10090 uint16_t cmpl_ring;
10092 * This value indicates the what completion ring the request
10093 * will be optionally completed on. If the value is -1, then no
10094 * CR completion will be generated. Any other value must be a
10095 * valid CR ring_id value for this function.
10098 /* This value indicates the command sequence number. */
10099 uint16_t target_id;
10101 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10102 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10105 uint64_t resp_addr;
10107 * This is the host address where the response will be written
10108 * when the request is complete. This area must be 16B aligned
10109 * and must be cleared to zero before the request is made.
10111 uint32_t encap_request[26];
10113 * This is an encapsulated request. This request should be
10114 * executed by the HWRM and the response should be provided in
10115 * the response buffer inside the encapsulated request.
10117 uint16_t encap_resp_target_id;
10119 * This value indicates the target id of the response to the
10120 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
10121 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
10124 uint16_t unused_0[3];
10125 } __attribute__((packed));
10127 /* Output (16 bytes) */
10128 struct hwrm_exec_fwd_resp_output {
10129 uint16_t error_code;
10131 * Pass/Fail or error type Note: receiver to verify the in
10132 * parameters, and fail the call with an error when appropriate
10135 /* This field returns the type of original request. */
10137 /* This field provides original sequence number of the command. */
10140 * This field is the length of the response in bytes. The last
10141 * byte of the response is a valid flag that will read as '1'
10142 * when the command has been completely written to memory.
10150 * This field is used in Output records to indicate that the
10151 * output is completely written to RAM. This field should be
10152 * read as '1' to indicate that the output has been completely
10153 * written. When writing a command completion or response to an
10154 * internal processor, the order of writes has to be such that
10155 * this field is written last.
10157 } __attribute__((packed));
10159 /* hwrm_reject_fwd_resp */
10161 * Description: This command is used to send an encapsulated request to the
10162 * HWRM. This command instructs the HWRM to reject the request and forward the
10163 * error response of the encapsulated request to the location specified in the
10164 * original request that is encapsulated. The target id of this command shall be
10165 * set to 0xFFFF (HWRM). The response location in this command shall be used to
10166 * acknowledge the receipt of the encapsulated request and forwarding of the
10169 /* Input (128 bytes) */
10170 struct hwrm_reject_fwd_resp_input {
10173 * This value indicates what type of request this is. The format
10174 * for the rest of the command is determined by this field.
10176 uint16_t cmpl_ring;
10178 * This value indicates the what completion ring the request
10179 * will be optionally completed on. If the value is -1, then no
10180 * CR completion will be generated. Any other value must be a
10181 * valid CR ring_id value for this function.
10184 /* This value indicates the command sequence number. */
10185 uint16_t target_id;
10187 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10188 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10191 uint64_t resp_addr;
10193 * This is the host address where the response will be written
10194 * when the request is complete. This area must be 16B aligned
10195 * and must be cleared to zero before the request is made.
10197 uint32_t encap_request[26];
10199 * This is an encapsulated request. This request should be
10200 * rejected by the HWRM and the error response should be
10201 * provided in the response buffer inside the encapsulated
10204 uint16_t encap_resp_target_id;
10206 * This value indicates the target id of the response to the
10207 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
10208 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
10211 uint16_t unused_0[3];
10212 } __attribute__((packed));
10214 /* Output (16 bytes) */
10215 struct hwrm_reject_fwd_resp_output {
10216 uint16_t error_code;
10218 * Pass/Fail or error type Note: receiver to verify the in
10219 * parameters, and fail the call with an error when appropriate
10222 /* This field returns the type of original request. */
10224 /* This field provides original sequence number of the command. */
10227 * This field is the length of the response in bytes. The last
10228 * byte of the response is a valid flag that will read as '1'
10229 * when the command has been completely written to memory.
10237 * This field is used in Output records to indicate that the
10238 * output is completely written to RAM. This field should be
10239 * read as '1' to indicate that the output has been completely
10240 * written. When writing a command completion or response to an
10241 * internal processor, the order of writes has to be such that
10242 * this field is written last.
10244 } __attribute__((packed));
10246 /* Hardware Resource Manager Specification */
10247 /* Description: This structure is used to specify port description. */
10249 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
10250 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
10251 * processors inside the chip. This firmware service is vital part of the chip.
10252 * The chip can not be used by a driver or HWRM client without the HWRM.
10254 /* Input (16 bytes) */
10258 * This value indicates what type of request this is. The format
10259 * for the rest of the command is determined by this field.
10261 uint16_t cmpl_ring;
10263 * This value indicates the what completion ring the request
10264 * will be optionally completed on. If the value is -1, then no
10265 * CR completion will be generated. Any other value must be a
10266 * valid CR ring_id value for this function.
10269 /* This value indicates the command sequence number. */
10270 uint16_t target_id;
10272 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10273 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10276 uint64_t resp_addr;
10278 * This is the host address where the response will be written
10279 * when the request is complete. This area must be 16B aligned
10280 * and must be cleared to zero before the request is made.
10282 } __attribute__((packed));
10284 /* Output (8 bytes) */
10286 uint16_t error_code;
10288 * Pass/Fail or error type Note: receiver to verify the in
10289 * parameters, and fail the call with an error when appropriate
10292 /* This field returns the type of original request. */
10294 /* This field provides original sequence number of the command. */
10297 * This field is the length of the response in bytes. The last
10298 * byte of the response is a valid flag that will read as '1'
10299 * when the command has been completely written to memory.
10301 } __attribute__((packed));
10303 #define HWRM_GET_HWRM_ERROR_CODE(arg) \
10305 typeof(arg) x = (arg); \
10306 ((x) == 0xf ? "HWRM_ERROR" : \
10307 ((x) == 0xffff ? "CMD_NOT_SUPPORTED" : \
10308 ((x) == 0xfffe ? "UNKNOWN_ERR" : \
10309 ((x) == 0x4 ? "RESOURCE_ALLOC_ERROR" : \
10310 ((x) == 0x5 ? "INVALID_FLAGS" : \
10311 ((x) == 0x6 ? "INVALID_ENABLES" : \
10312 ((x) == 0x0 ? "SUCCESS" : \
10313 ((x) == 0x1 ? "FAIL" : \
10314 ((x) == 0x2 ? "INVALID_PARAMS" : \
10315 ((x) == 0x3 ? "RESOURCE_ACCESS_DENIED" : \
10316 "Unknown error_code")))))))))) \
10319 /* Return Codes (8 bytes) */
10321 uint16_t error_code;
10322 /* These are numbers assigned to return/error codes. */
10323 /* Request was successfully executed by the HWRM. */
10324 #define HWRM_ERR_CODE_SUCCESS (UINT32_C(0x0))
10325 /* THe HWRM failed to execute the request. */
10326 #define HWRM_ERR_CODE_FAIL (UINT32_C(0x1))
10328 * The request contains invalid argument(s) or
10329 * input parameters.
10331 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
10333 * The requester is not allowed to access the
10334 * requested resource. This error code shall be
10335 * provided in a response to a request to query
10336 * or modify an existing resource that is not
10337 * accessible by the requester.
10339 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
10341 * The HWRM is unable to allocate the requested
10342 * resource. This code only applies to requests
10343 * for HWRM resource allocations.
10345 #define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR (UINT32_C(0x4))
10346 /* Invalid combination of flags is specified in the request. */
10347 #define HWRM_ERR_CODE_INVALID_FLAGS (UINT32_C(0x5))
10349 * Invalid combination of enables fields is
10350 * specified in the request.
10352 #define HWRM_ERR_CODE_INVALID_ENABLES (UINT32_C(0x6))
10354 * Generic HWRM execution error that represents
10355 * an internal error.
10357 #define HWRM_ERR_CODE_HWRM_ERROR (UINT32_C(0xf))
10358 /* Unknown error */
10359 #define HWRM_ERR_CODE_UNKNOWN_ERR (UINT32_C(0xfffe))
10360 /* Unsupported or invalid command */
10361 #define HWRM_ERR_CODE_CMD_NOT_SUPPORTED (UINT32_C(0xffff))
10362 uint16_t unused_0[3];
10363 } __attribute__((packed));
10365 /* Output (16 bytes) */
10366 struct hwrm_err_output {
10367 uint16_t error_code;
10369 * Pass/Fail or error type Note: receiver to verify the in
10370 * parameters, and fail the call with an error when appropriate
10373 /* This field returns the type of original request. */
10375 /* This field provides original sequence number of the command. */
10378 * This field is the length of the response in bytes. The last
10379 * byte of the response is a valid flag that will read as '1'
10380 * when the command has been completely written to memory.
10383 /* debug info for this error response. */
10385 /* debug info for this error response. */
10388 * In the case of an error response, command specific error code
10389 * is returned in this field.
10393 * This field is used in Output records to indicate that the
10394 * output is completely written to RAM. This field should be
10395 * read as '1' to indicate that the output has been completely
10396 * written. When writing a command completion or response to an
10397 * internal processor, the order of writes has to be such that
10398 * this field is written last.
10400 } __attribute__((packed));
10402 /* Port Tx Statistics Formats (408 bytes) */
10403 struct tx_port_stats {
10404 uint64_t tx_64b_frames;
10405 /* Total Number of 64 Bytes frames transmitted */
10406 uint64_t tx_65b_127b_frames;
10407 /* Total Number of 65-127 Bytes frames transmitted */
10408 uint64_t tx_128b_255b_frames;
10409 /* Total Number of 128-255 Bytes frames transmitted */
10410 uint64_t tx_256b_511b_frames;
10411 /* Total Number of 256-511 Bytes frames transmitted */
10412 uint64_t tx_512b_1023b_frames;
10413 /* Total Number of 512-1023 Bytes frames transmitted */
10414 uint64_t tx_1024b_1518_frames;
10415 /* Total Number of 1024-1518 Bytes frames transmitted */
10416 uint64_t tx_good_vlan_frames;
10418 * Total Number of each good VLAN (exludes FCS errors) frame
10419 * transmitted which is 1519 to 1522 bytes in length inclusive
10420 * (excluding framing bits but including FCS bytes).
10422 uint64_t tx_1519b_2047_frames;
10423 /* Total Number of 1519-2047 Bytes frames transmitted */
10424 uint64_t tx_2048b_4095b_frames;
10425 /* Total Number of 2048-4095 Bytes frames transmitted */
10426 uint64_t tx_4096b_9216b_frames;
10427 /* Total Number of 4096-9216 Bytes frames transmitted */
10428 uint64_t tx_9217b_16383b_frames;
10429 /* Total Number of 9217-16383 Bytes frames transmitted */
10430 uint64_t tx_good_frames;
10431 /* Total Number of good frames transmitted */
10432 uint64_t tx_total_frames;
10433 /* Total Number of frames transmitted */
10434 uint64_t tx_ucast_frames;
10435 /* Total number of unicast frames transmitted */
10436 uint64_t tx_mcast_frames;
10437 /* Total number of multicast frames transmitted */
10438 uint64_t tx_bcast_frames;
10439 /* Total number of broadcast frames transmitted */
10440 uint64_t tx_pause_frames;
10441 /* Total number of PAUSE control frames transmitted */
10442 uint64_t tx_pfc_frames;
10443 /* Total number of PFC/per-priority PAUSE control frames transmitted */
10444 uint64_t tx_jabber_frames;
10445 /* Total number of jabber frames transmitted */
10446 uint64_t tx_fcs_err_frames;
10447 /* Total number of frames transmitted with FCS error */
10448 uint64_t tx_control_frames;
10449 /* Total number of control frames transmitted */
10450 uint64_t tx_oversz_frames;
10451 /* Total number of over-sized frames transmitted */
10452 uint64_t tx_single_dfrl_frames;
10453 /* Total number of frames with single deferral */
10454 uint64_t tx_multi_dfrl_frames;
10455 /* Total number of frames with multiple deferrals */
10456 uint64_t tx_single_coll_frames;
10457 /* Total number of frames with single collision */
10458 uint64_t tx_multi_coll_frames;
10459 /* Total number of frames with multiple collisions */
10460 uint64_t tx_late_coll_frames;
10461 /* Total number of frames with late collisions */
10462 uint64_t tx_excessive_coll_frames;
10463 /* Total number of frames with excessive collisions */
10464 uint64_t tx_frag_frames;
10465 /* Total number of fragmented frames transmitted */
10467 /* Total number of transmit errors */
10468 uint64_t tx_tagged_frames;
10469 /* Total number of single VLAN tagged frames transmitted */
10470 uint64_t tx_dbl_tagged_frames;
10471 /* Total number of double VLAN tagged frames transmitted */
10472 uint64_t tx_runt_frames;
10473 /* Total number of runt frames transmitted */
10474 uint64_t tx_fifo_underruns;
10475 /* Total number of TX FIFO under runs */
10476 uint64_t tx_pfc_ena_frames_pri0;
10478 * Total number of PFC frames with PFC enabled bit for Pri 0
10481 uint64_t tx_pfc_ena_frames_pri1;
10483 * Total number of PFC frames with PFC enabled bit for Pri 1
10486 uint64_t tx_pfc_ena_frames_pri2;
10488 * Total number of PFC frames with PFC enabled bit for Pri 2
10491 uint64_t tx_pfc_ena_frames_pri3;
10493 * Total number of PFC frames with PFC enabled bit for Pri 3
10496 uint64_t tx_pfc_ena_frames_pri4;
10498 * Total number of PFC frames with PFC enabled bit for Pri 4
10501 uint64_t tx_pfc_ena_frames_pri5;
10503 * Total number of PFC frames with PFC enabled bit for Pri 5
10506 uint64_t tx_pfc_ena_frames_pri6;
10508 * Total number of PFC frames with PFC enabled bit for Pri 6
10511 uint64_t tx_pfc_ena_frames_pri7;
10513 * Total number of PFC frames with PFC enabled bit for Pri 7
10516 uint64_t tx_eee_lpi_events;
10517 /* Total number of EEE LPI Events on TX */
10518 uint64_t tx_eee_lpi_duration;
10519 /* EEE LPI Duration Counter on TX */
10520 uint64_t tx_llfc_logical_msgs;
10522 * Total number of Link Level Flow Control (LLFC) messages
10525 uint64_t tx_hcfc_msgs;
10526 /* Total number of HCFC messages transmitted */
10527 uint64_t tx_total_collisions;
10528 /* Total number of TX collisions */
10530 /* Total number of transmitted bytes */
10531 uint64_t tx_xthol_frames;
10532 /* Total number of end-to-end HOL frames */
10533 uint64_t tx_stat_discard;
10534 /* Total Tx Drops per Port reported by STATS block */
10535 uint64_t tx_stat_error;
10536 /* Total Tx Error Drops per Port reported by STATS block */
10537 } __attribute__((packed));
10539 /* Port Rx Statistics Formats (528 bytes) */
10540 struct rx_port_stats {
10541 uint64_t rx_64b_frames;
10542 /* Total Number of 64 Bytes frames received */
10543 uint64_t rx_65b_127b_frames;
10544 /* Total Number of 65-127 Bytes frames received */
10545 uint64_t rx_128b_255b_frames;
10546 /* Total Number of 128-255 Bytes frames received */
10547 uint64_t rx_256b_511b_frames;
10548 /* Total Number of 256-511 Bytes frames received */
10549 uint64_t rx_512b_1023b_frames;
10550 /* Total Number of 512-1023 Bytes frames received */
10551 uint64_t rx_1024b_1518_frames;
10552 /* Total Number of 1024-1518 Bytes frames received */
10553 uint64_t rx_good_vlan_frames;
10555 * Total Number of each good VLAN (exludes FCS errors) frame
10556 * received which is 1519 to 1522 bytes in length inclusive
10557 * (excluding framing bits but including FCS bytes).
10559 uint64_t rx_1519b_2047b_frames;
10560 /* Total Number of 1519-2047 Bytes frames received */
10561 uint64_t rx_2048b_4095b_frames;
10562 /* Total Number of 2048-4095 Bytes frames received */
10563 uint64_t rx_4096b_9216b_frames;
10564 /* Total Number of 4096-9216 Bytes frames received */
10565 uint64_t rx_9217b_16383b_frames;
10566 /* Total Number of 9217-16383 Bytes frames received */
10567 uint64_t rx_total_frames;
10568 /* Total number of frames received */
10569 uint64_t rx_ucast_frames;
10570 /* Total number of unicast frames received */
10571 uint64_t rx_mcast_frames;
10572 /* Total number of multicast frames received */
10573 uint64_t rx_bcast_frames;
10574 /* Total number of broadcast frames received */
10575 uint64_t rx_fcs_err_frames;
10576 /* Total number of received frames with FCS error */
10577 uint64_t rx_ctrl_frames;
10578 /* Total number of control frames received */
10579 uint64_t rx_pause_frames;
10580 /* Total number of PAUSE frames received */
10581 uint64_t rx_pfc_frames;
10582 /* Total number of PFC frames received */
10583 uint64_t rx_unsupported_opcode_frames;
10584 /* Total number of frames received with an unsupported opcode */
10585 uint64_t rx_unsupported_da_pausepfc_frames;
10587 * Total number of frames received with an unsupported DA for
10590 uint64_t rx_wrong_sa_frames;
10591 /* Total number of frames received with an unsupported SA */
10592 uint64_t rx_align_err_frames;
10593 /* Total number of received packets with alignment error */
10594 uint64_t rx_oor_len_frames;
10595 /* Total number of received frames with out-of-range length */
10596 uint64_t rx_code_err_frames;
10597 /* Total number of received frames with error termination */
10598 uint64_t rx_false_carrier_frames;
10600 * Total number of received frames with a false carrier is
10601 * detected during idle, as defined by RX_ER samples active and
10602 * RXD is 0xE. The event is reported along with the statistics
10603 * generated on the next received frame. Only one false carrier
10604 * condition can be detected and logged between frames. Carrier
10605 * event, valid for 10M/100M speed modes only.
10607 uint64_t rx_ovrsz_frames;
10608 /* Total number of over-sized frames received */
10609 uint64_t rx_jbr_frames;
10610 /* Total number of jabber packets received */
10611 uint64_t rx_mtu_err_frames;
10612 /* Total number of received frames with MTU error */
10613 uint64_t rx_match_crc_frames;
10614 /* Total number of received frames with CRC match */
10615 uint64_t rx_promiscuous_frames;
10616 /* Total number of frames received promiscuously */
10617 uint64_t rx_tagged_frames;
10618 /* Total number of received frames with one or two VLAN tags */
10619 uint64_t rx_double_tagged_frames;
10620 /* Total number of received frames with two VLAN tags */
10621 uint64_t rx_trunc_frames;
10622 /* Total number of truncated frames received */
10623 uint64_t rx_good_frames;
10624 /* Total number of good frames (without errors) received */
10625 uint64_t rx_pfc_xon2xoff_frames_pri0;
10627 * Total number of received PFC frames with transition from XON
10630 uint64_t rx_pfc_xon2xoff_frames_pri1;
10632 * Total number of received PFC frames with transition from XON
10635 uint64_t rx_pfc_xon2xoff_frames_pri2;
10637 * Total number of received PFC frames with transition from XON
10640 uint64_t rx_pfc_xon2xoff_frames_pri3;
10642 * Total number of received PFC frames with transition from XON
10645 uint64_t rx_pfc_xon2xoff_frames_pri4;
10647 * Total number of received PFC frames with transition from XON
10650 uint64_t rx_pfc_xon2xoff_frames_pri5;
10652 * Total number of received PFC frames with transition from XON
10655 uint64_t rx_pfc_xon2xoff_frames_pri6;
10657 * Total number of received PFC frames with transition from XON
10660 uint64_t rx_pfc_xon2xoff_frames_pri7;
10662 * Total number of received PFC frames with transition from XON
10665 uint64_t rx_pfc_ena_frames_pri0;
10667 * Total number of received PFC frames with PFC enabled bit for
10670 uint64_t rx_pfc_ena_frames_pri1;
10672 * Total number of received PFC frames with PFC enabled bit for
10675 uint64_t rx_pfc_ena_frames_pri2;
10677 * Total number of received PFC frames with PFC enabled bit for
10680 uint64_t rx_pfc_ena_frames_pri3;
10682 * Total number of received PFC frames with PFC enabled bit for
10685 uint64_t rx_pfc_ena_frames_pri4;
10687 * Total number of received PFC frames with PFC enabled bit for
10690 uint64_t rx_pfc_ena_frames_pri5;
10692 * Total number of received PFC frames with PFC enabled bit for
10695 uint64_t rx_pfc_ena_frames_pri6;
10697 * Total number of received PFC frames with PFC enabled bit for
10700 uint64_t rx_pfc_ena_frames_pri7;
10702 * Total number of received PFC frames with PFC enabled bit for
10705 uint64_t rx_sch_crc_err_frames;
10706 /* Total Number of frames received with SCH CRC error */
10707 uint64_t rx_undrsz_frames;
10708 /* Total Number of under-sized frames received */
10709 uint64_t rx_frag_frames;
10710 /* Total Number of fragmented frames received */
10711 uint64_t rx_eee_lpi_events;
10712 /* Total number of RX EEE LPI Events */
10713 uint64_t rx_eee_lpi_duration;
10714 /* EEE LPI Duration Counter on RX */
10715 uint64_t rx_llfc_physical_msgs;
10717 * Total number of physical type Link Level Flow Control (LLFC)
10718 * messages received
10720 uint64_t rx_llfc_logical_msgs;
10722 * Total number of logical type Link Level Flow Control (LLFC)
10723 * messages received
10725 uint64_t rx_llfc_msgs_with_crc_err;
10727 * Total number of logical type Link Level Flow Control (LLFC)
10728 * messages received with CRC error
10730 uint64_t rx_hcfc_msgs;
10731 /* Total number of HCFC messages received */
10732 uint64_t rx_hcfc_msgs_with_crc_err;
10733 /* Total number of HCFC messages received with CRC error */
10735 /* Total number of received bytes */
10736 uint64_t rx_runt_bytes;
10737 /* Total number of bytes received in runt frames */
10738 uint64_t rx_runt_frames;
10739 /* Total number of runt frames received */
10740 uint64_t rx_stat_discard;
10741 /* Total Rx Discards per Port reported by STATS block */
10742 uint64_t rx_stat_err;
10743 /* Total Rx Error Drops per Port reported by STATS block */
10744 } __attribute__((packed));
10746 /* Periodic Statistics Context DMA to host (160 bytes) */
10748 * per-context HW statistics -- chip view
10751 struct ctx_hw_stats64 {
10752 uint64_t rx_ucast_pkts;
10753 uint64_t rx_mcast_pkts;
10754 uint64_t rx_bcast_pkts;
10755 uint64_t rx_drop_pkts;
10756 uint64_t rx_discard_pkts;
10757 uint64_t rx_ucast_bytes;
10758 uint64_t rx_mcast_bytes;
10759 uint64_t rx_bcast_bytes;
10761 uint64_t tx_ucast_pkts;
10762 uint64_t tx_mcast_pkts;
10763 uint64_t tx_bcast_pkts;
10764 uint64_t tx_drop_pkts;
10765 uint64_t tx_discard_pkts;
10766 uint64_t tx_ucast_bytes;
10767 uint64_t tx_mcast_bytes;
10768 uint64_t tx_bcast_bytes;
10771 uint64_t tpa_bytes;
10772 uint64_t tpa_events;
10773 uint64_t tpa_aborts;
10774 } __attribute__((packed));
10776 #endif /* _HSI_STRUCT_DEF_DPDK_ */