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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
89 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
90 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
91 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
92 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
93 #define HWRM_VNIC_FREE (UINT32_C(0x41))
94 #define HWRM_VNIC_CFG (UINT32_C(0x42))
95 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
96 #define HWRM_RING_ALLOC (UINT32_C(0x50))
97 #define HWRM_RING_FREE (UINT32_C(0x51))
98 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
99 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
100 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
101 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
102 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
103 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
104 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
105 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
106 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
109 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
110 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
112 /* Short TX BD (16 bytes) */
115 * All bits in this field must be valid on the first BD of a packet.
116 * Only the packet_end bit must be valid for the remaining BDs of a
119 /* This value identifies the type of buffer descriptor. */
120 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
121 #define TX_BD_SHORT_TYPE_SFT 0
123 * Indicates that this BD is 16B long and is used for normal L2
124 * packet transmission.
126 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
128 * If set to 1, the packet ends with the data in the buffer pointed to
129 * by this descriptor. This flag must be valid on every BD.
131 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
133 * If set to 1, the device will not generate a completion for this
134 * transmit packet unless there is an error in it's processing. If this
135 * bit is set to 0, then the packet will be completed normally. This bit
136 * must be valid only on the first BD of a packet.
138 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
140 * This value indicates how many 16B BD locations are consumed in the
141 * ring by this packet. A value of 1 indicates that this BD is the only
142 * BD (and that the it is a short BD). A value of 3 indicates either 3
143 * short BDs or 1 long BD and one short BD in the packet. A value of 0
144 * indicates that there are 32 BD locations in the packet (the maximum).
145 * This field is valid only on the first BD of a packet.
147 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
148 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
150 * This value is a hint for the length of the entire packet. It is used
151 * by the chip to optimize internal processing. The packet will be
152 * dropped if the hint is too short. This field is valid only on the
153 * first BD of a packet.
155 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
156 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
157 /* indicates packet length < 512B */
158 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
159 /* indicates 512 <= packet length < 1KB */
160 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
161 /* indicates 1KB <= packet length < 2KB */
162 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
163 /* indicates packet length >= 2KB */
164 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
165 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
167 * If set to 1, the device immediately updates the Send Consumer Index
168 * after the buffer associated with this descriptor has been transferred
169 * via DMA to NIC memory from host memory. An interrupt may or may not
170 * be generated according to the state of the interrupt avoidance
171 * mechanisms. If this bit is set to 0, then the Consumer Index is only
172 * updated as soon as one of the host interrupt coalescing conditions
173 * has been met. This bit must be valid on the first BD of a packet.
175 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
177 * All bits in this field must be valid on the first BD of a packet.
178 * Only the packet_end bit must be valid for the remaining BDs of a
181 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
182 #define TX_BD_SHORT_FLAGS_SFT 6
186 * This is the length of the host physical buffer this BD describes in
187 * bytes. This field must be valid on all BDs of a packet.
191 * The opaque data field is pass through to the completion and can be
192 * used for any data that the driver wants to associate with the
193 * transmit BD. This field must be valid on the first BD of a packet.
198 * This is the host physical address for the portion of the packet
199 * described by this TX BD. This value must be valid on all BDs of a
203 } __attribute__((packed));
205 /* Long TX BD (32 bytes split to 2 16-byte struct) */
208 * All bits in this field must be valid on the first BD of a packet.
209 * Only the packet_end bit must be valid for the remaining BDs of a
212 /* This value identifies the type of buffer descriptor. */
213 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
214 #define TX_BD_LONG_TYPE_SFT 0
216 * Indicates that this BD is 32B long and is used for normal L2
217 * packet transmission.
219 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
221 * If set to 1, the packet ends with the data in the buffer pointed to
222 * by this descriptor. This flag must be valid on every BD.
224 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
226 * If set to 1, the device will not generate a completion for this
227 * transmit packet unless there is an error in it's processing. If this
228 * bit is set to 0, then the packet will be completed normally. This bit
229 * must be valid only on the first BD of a packet.
231 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
233 * This value indicates how many 16B BD locations are consumed in the
234 * ring by this packet. A value of 1 indicates that this BD is the only
235 * BD (and that the it is a short BD). A value of 3 indicates either 3
236 * short BDs or 1 long BD and one short BD in the packet. A value of 0
237 * indicates that there are 32 BD locations in the packet (the maximum).
238 * This field is valid only on the first BD of a packet.
240 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
241 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
243 * This value is a hint for the length of the entire packet. It is used
244 * by the chip to optimize internal processing. The packet will be
245 * dropped if the hint is too short. This field is valid only on the
246 * first BD of a packet.
248 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
249 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
250 /* indicates packet length < 512B */
251 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
252 /* indicates 512 <= packet length < 1KB */
253 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
254 /* indicates 1KB <= packet length < 2KB */
255 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
256 /* indicates packet length >= 2KB */
257 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
258 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
260 * If set to 1, the device immediately updates the Send Consumer Index
261 * after the buffer associated with this descriptor has been transferred
262 * via DMA to NIC memory from host memory. An interrupt may or may not
263 * be generated according to the state of the interrupt avoidance
264 * mechanisms. If this bit is set to 0, then the Consumer Index is only
265 * updated as soon as one of the host interrupt coalescing conditions
266 * has been met. This bit must be valid on the first BD of a packet.
268 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
270 * All bits in this field must be valid on the first BD of a packet.
271 * Only the packet_end bit must be valid for the remaining BDs of a
274 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
275 #define TX_BD_LONG_FLAGS_SFT 6
279 * This is the length of the host physical buffer this BD describes in
280 * bytes. This field must be valid on all BDs of a packet.
285 * The opaque data field is pass through to the completion and can be
286 * used for any data that the driver wants to associate with the
287 * transmit BD. This field must be valid on the first BD of a packet.
292 * This is the host physical address for the portion of the packet
293 * described by this TX BD. This value must be valid on all BDs of a
297 } __attribute__((packed));
299 /* last 16 bytes of Long TX BD */
301 struct tx_bd_long_hi {
303 * All bits in this field must be valid on the first BD of a packet.
304 * Their value on other BDs of the packet will be ignored.
307 * If set to 1, the controller replaces the TCP/UPD checksum fields of
308 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
309 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
310 * checksum for the packet associated with this descriptor. This bit
311 * must be valid on the first BD of a packet.
313 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
315 * If set to 1, the controller replaces the IP checksum of the normal
316 * packets, or the inner IP checksum of the encapsulated packets with
317 * the hardware calculated IP checksum for the packet associated with
318 * this descriptor. This bit must be valid on the first BD of a packet.
320 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
322 * If set to 1, the controller will not append an Ethernet CRC to the
323 * end of the frame. This bit must be valid on the first BD of a packet.
324 * Packet must be 64B or longer when this flag is set. It is not useful
325 * to use this bit with any form of TX offload such as CSO or LSO. The
326 * intent is that the packet from the host already has a valid Ethernet
329 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
331 * If set to 1, the device will record the time at which the packet was
332 * actually transmitted at the TX MAC. This bit must be valid on the
333 * first BD of a packet.
335 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
337 * If set to 1, The controller replaces the tunnel IP checksum field
338 * with hardware calculated IP checksum for the IP header of the packet
339 * associated with this descriptor. In case of VXLAN, the controller
340 * also replaces the outer header UDP checksum with hardware calculated
341 * UDP checksum for the packet associated with this descriptor.
343 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
345 * If set to 1, the device will treat this packet with LSO(Large Send
346 * Offload) processing for both normal or encapsulated packets, which is
347 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
348 * fields must be valid. The driver doesn't need to set t_ip_chksum,
349 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
350 * the appropriate checksum fields for segmented packets. When this bit
351 * is 1, the hdr_size and mss fields must be valid.
353 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
355 * If set to zero when LSO is '1', then the IPID will be treated as a
356 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
357 * set to one when LSO is '1', then the IPID will be treated as a 15b
358 * number and will be wrapped if it exceeds a value 0f 0x7fff.
360 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
362 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
363 * will not be modified during LSO operations. If set to one when LSO is
364 * '1', then the IPID of the tunnel IP header will be incremented for
365 * each subsequent segment of an LSO operation.
367 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
369 * If set to '1', then the RoCE ICRC will be appended to the packet.
370 * Packet must be a valid RoCE format packet.
372 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
374 * If set to '1', then the FCoE CRC will be appended to the packet.
375 * Packet must be a valid FCoE format packet.
377 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
381 * When LSO is '1', this field must contain the offset of the TCP
382 * payload from the beginning of the packet in as 16b words. In case of
383 * encapsulated/tunneling packet, this field contains the offset of the
384 * inner TCP payload from beginning of the packet as 16-bit words. This
385 * value must be valid on the first BD of a packet.
387 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
388 #define TX_BD_LONG_HDR_SIZE_SFT 0
392 * This is the MSS value that will be used to do the LSO processing. The
393 * value is the length in bytes of the TCP payload for each segment
394 * generated by the LSO operation. This value must be valid on the first
397 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
398 #define TX_BD_LONG_MSS_SFT 0
404 * This value selects a CFA action to perform on the packet. Set this
405 * value to zero if no CFA action is desired. This value must be valid
406 * on the first BD of a packet.
411 * This value is action meta-data that defines CFA edit operations that
412 * are done in addition to any action editing.
414 /* When key=1, This is the VLAN tag VID value. */
415 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
416 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
417 /* When key=1, This is the VLAN tag DE value. */
418 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
419 /* When key=1, This is the VLAN tag PRI value. */
420 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
421 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
422 /* When key=1, This is the VLAN tag TPID select value. */
423 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
424 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
426 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
428 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
430 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
432 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
434 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
435 /* Value programmed in CFA VLANTPID register. */
436 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
437 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
438 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
439 /* When key=1, This is the VLAN tag TPID select value. */
440 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
441 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
443 * This field identifies the type of edit to be performed on the packet.
444 * This value must be valid on the first BD of a packet.
446 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
447 #define TX_BD_LONG_CFA_META_KEY_SFT 28
449 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
451 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
452 * - PRI/DE value. - meta[11:0] - VID value.
454 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
455 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
457 } __attribute__((packed));
459 /* RX Producer Packet BD (16 bytes) */
460 struct rx_prod_pkt_bd {
461 /* This value identifies the type of buffer descriptor. */
462 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
463 #define RX_PROD_PKT_BD_TYPE_SFT 0
465 * Indicates that this BD is 16B long and is an RX Producer (ie.
466 * empty) buffer descriptor.
468 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
470 * If set to 1, the packet will be placed at the address plus 2B. The 2
471 * Bytes of padding will be written as zero.
474 * This is intended to be used when the host buffer is cache-line
475 * aligned to produce packets that are easy to parse in host memory
476 * while still allowing writes to be cache line aligned.
478 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
480 * If set to 1, the packet write will be padded out to the nearest
481 * cache-line with zero value padding.
484 * If receive buffers start/end on cache-line boundaries, this feature
485 * will ensure that all data writes on the PCI bus start/end on cache
488 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
490 * This value is the number of additional buffers in the ring that
491 * describe the buffer space to be consumed for the this packet. If the
492 * value is zero, then the packet must fit within the space described by
493 * this BD. If this value is 1 or more, it indicates how many additional
494 * "buffer" BDs are in the ring immediately following this BD to be used
495 * for the same network packet. Even if the packet to be placed does not
496 * need all the additional buffers, they will be consumed anyway.
498 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
499 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
500 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
501 #define RX_PROD_PKT_BD_FLAGS_SFT 6
505 * This is the length in Bytes of the host physical buffer where data
506 * for the packet may be placed in host memory.
509 * While this is a Byte resolution value, it is often advantageous to
510 * ensure that the buffers provided end on a host cache line.
515 * The opaque data field is pass through to the completion and can be
516 * used for any data that the driver wants to associate with this
517 * receive buffer set.
522 * This is the host physical address where data for the packet may by
523 * placed in host memory.
526 * While this is a Byte resolution value, it is often advantageous to
527 * ensure that the buffers provide start on a host cache line.
530 } __attribute__((packed));
532 /* Completion Ring Structures */
533 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
534 /* Base Completion Record (16 bytes) */
538 * This field indicates the exact type of the completion. By convention,
539 * the LSB identifies the length of the record in 16B units. Even values
540 * indicate 16B records. Odd values indicate 32B records.
542 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
543 #define CMPL_BASE_TYPE_SFT 0
544 /* TX L2 completion: Completion of TX packet. Length = 16B */
545 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
547 * RX L2 completion: Completion of and L2 RX packet.
550 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
552 * RX Aggregation Buffer completion : Completion of an L2
553 * aggregation buffer in support of TPA, HDS, or Jumbo packet
554 * completion. Length = 16B
556 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
558 * RX L2 TPA Start Completion: Completion at the beginning of a
559 * TPA operation. Length = 32B
561 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
563 * RX L2 TPA End Completion: Completion at the end of a TPA
564 * operation. Length = 32B
566 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
568 * Statistics Ejection Completion: Completion of statistics data
569 * ejection buffer. Length = 16B
571 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
572 /* HWRM Command Completion: Completion of an HWRM command. */
573 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
574 /* Forwarded HWRM Request */
575 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
576 /* Forwarded HWRM Response */
577 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
578 /* HWRM Asynchronous Event Information */
579 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
580 /* CQ Notification */
581 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
582 /* SRQ Threshold Event */
583 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
584 /* DBQ Threshold Event */
585 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
586 /* QP Async Notification */
587 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
588 /* Function Async Notification */
589 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
596 * This value is written by the NIC such that it will be different for
597 * each pass through the completion queue. The even passes will write 1.
598 * The odd passes will write 0.
600 #define CMPL_BASE_V UINT32_C(0x1)
602 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
603 #define CMPL_BASE_INFO3_SFT 1
607 } __attribute__((packed));
609 /* TX Completion Record (16 bytes) */
612 * This field indicates the exact type of the completion. By convention,
613 * the LSB identifies the length of the record in 16B units. Even values
614 * indicate 16B records. Odd values indicate 32B records.
616 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
617 #define TX_CMPL_TYPE_SFT 0
618 /* TX L2 completion: Completion of TX packet. Length = 16B */
619 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
621 * When this bit is '1', it indicates a packet that has an error of some
622 * type. Type of error is indicated in error_flags.
624 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
626 * When this bit is '1', it indicates that the packet completed was
627 * transmitted using the push acceleration data provided by the driver.
628 * When this bit is '0', it indicates that the packet had not push
629 * acceleration data written or was executed as a normal packet even
630 * though push data was provided.
632 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
633 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
634 #define TX_CMPL_FLAGS_SFT 6
640 * This is a copy of the opaque field from the first TX BD of this
641 * transmitted packet.
646 * This value is written by the NIC such that it will be different for
647 * each pass through the completion queue. The even passes will write 1.
648 * The odd passes will write 0.
650 #define TX_CMPL_V UINT32_C(0x1)
652 * This error indicates that there was some sort of problem with the BDs
655 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
656 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
658 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
659 /* Bad Format: BDs were not formatted correctly. */
660 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
661 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
662 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
664 * When this bit is '1', it indicates that the length of the packet was
665 * zero. No packet was transmitted.
667 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
669 * When this bit is '1', it indicates that the packet was longer than
670 * the programmed limit in TDI. No packet was transmitted.
672 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
674 * When this bit is '1', it indicates that one or more of the BDs
675 * associated with this packet generated a PCI error. This probably
676 * means the address was not valid.
678 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
680 * When this bit is '1', it indicates that the packet was longer than
681 * indicated by the hint. No packet was transmitted.
683 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
685 * When this bit is '1', it indicates that the packet was dropped due to
686 * Poison TLP error on one or more of the TLPs in the PXP completion.
688 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
689 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
690 #define TX_CMPL_ERRORS_SFT 1
695 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
697 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
700 * This field indicates the exact type of the completion. By convention,
701 * the LSB identifies the length of the record in 16B units. Even values
702 * indicate 16B records. Odd values indicate 32B records.
704 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
705 #define RX_PKT_CMPL_TYPE_SFT 0
707 * RX L2 completion: Completion of and L2 RX packet.
710 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
712 * When this bit is '1', it indicates a packet that has an error of some
713 * type. Type of error is indicated in error_flags.
715 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
716 /* This field indicates how the packet was placed in the buffer. */
717 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
718 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
719 /* Normal: Packet was placed using normal algorithm. */
720 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
721 /* Jumbo: Packet was placed using jumbo algorithm. */
722 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
724 * Header/Data Separation: Packet was placed using Header/Data
725 * separation algorithm. The separation location is indicated by
728 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
729 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
730 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
731 /* This bit is '1' if the RSS field in this completion is valid. */
732 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
734 * This value indicates what the inner packet determined for the packet
737 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
738 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
739 /* Not Known: Indicates that the packet type was not known. */
740 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
742 * IP Packet: Indicates that the packet was an IP packet, but
743 * further classification was not possible.
745 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
747 * TCP Packet: Indicates that the packet was IP and TCP. This
748 * indicates that the payload_offset field is valid.
750 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
752 * UDP Packet: Indicates that the packet was IP and UDP. This
753 * indicates that the payload_offset field is valid.
755 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
757 * FCoE Packet: Indicates that the packet was recognized as a
758 * FCoE. This also indicates that the payload_offset field is
761 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
763 * RoCE Packet: Indicates that the packet was recognized as a
764 * RoCE. This also indicates that the payload_offset field is
767 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
769 * ICMP Packet: Indicates that the packet was recognized as
770 * ICMP. This indicates that the payload_offset field is valid.
772 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
774 * PtP packet wo/timestamp: Indicates that the packet was
775 * recognized as a PtP packet.
777 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
778 (UINT32_C(0x8) << 12)
780 * PtP packet w/timestamp: Indicates that the packet was
781 * recognized as a PtP packet and that a timestamp was taken for
784 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
785 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
786 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
787 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
788 #define RX_PKT_CMPL_FLAGS_SFT 6
792 * This is the length of the data for the packet stored in the buffer(s)
793 * identified by the opaque value. This includes the packet BD and any
794 * associated buffer BDs. This does not include the the length of any
795 * data places in aggregation BDs.
800 * This is a copy of the opaque field from the RX BD this completion
806 * This value is written by the NIC such that it will be different for
807 * each pass through the completion queue. The even passes will write 1.
808 * The odd passes will write 0.
810 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
812 * This value is the number of aggregation buffers that follow this
813 * entry in the completion ring that are a part of this packet. If the
814 * value is zero, then the packet is completely contained in the buffer
815 * space provided for the packet in the RX ring.
817 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
818 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
822 * This is the RSS hash type for the packet. The value is packed
823 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
825 uint8_t rss_hash_type;
828 * This value indicates the offset from the beginning of the packet
829 * where the inner payload starts. This value is valid for TCP, UDP,
830 * FCoE, and RoCE packets.
832 uint8_t payload_offset;
837 * This value is the RSS hash value calculated for the packet based on
838 * the mode bits and key value in the VNIC.
841 } __attribute__((packed));
843 /* last 16 bytes of RX Packet Completion Record */
844 struct rx_pkt_cmpl_hi {
846 * This indicates that the ip checksum was calculated for the inner
847 * packet and that the ip_cs_error field indicates if there was an
850 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
852 * This indicates that the TCP, UDP or ICMP checksum was calculated for
853 * the inner packet and that the l4_cs_error field indicates if there
856 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
858 * This indicates that the ip checksum was calculated for the tunnel
859 * header and that the t_ip_cs_error field indicates if there was an
862 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
864 * This indicates that the UDP checksum was calculated for the tunnel
865 * packet and that the t_l4_cs_error field indicates if there was an
868 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
869 /* This value indicates what format the metadata field is. */
870 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
871 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
872 /* No metadata informtaion. Value is zero. */
873 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
875 * The metadata field contains the VLAN tag and TPID value. -
876 * metadata[11:0] contains the vlan VID value. - metadata[12]
877 * contains the vlan DE value. - metadata[15:13] contains the
878 * vlan PRI value. - metadata[31:16] contains the vlan TPID
881 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
882 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
883 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
885 * This field indicates the IP type for the inner-most IP header. A
886 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
887 * value is only valid if itype indicates a packet with an IP header.
889 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
893 * This is data from the CFA block as indicated by the meta_format
896 /* When meta_format=1, this value is the VLAN VID. */
897 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
898 #define RX_PKT_CMPL_METADATA_VID_SFT 0
899 /* When meta_format=1, this value is the VLAN DE. */
900 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
901 /* When meta_format=1, this value is the VLAN PRI. */
902 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
903 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
904 /* When meta_format=1, this value is the VLAN TPID. */
905 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
906 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
910 * This value is written by the NIC such that it will be different for
911 * each pass through the completion queue. The even passes will write 1.
912 * The odd passes will write 0.
914 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
916 * This error indicates that there was some sort of problem with the BDs
917 * for the packet that was found after part of the packet was already
918 * placed. The packet should be treated as invalid.
920 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
921 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
922 /* No buffer error */
923 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
926 * Did Not Fit: Packet did not fit into packet buffer provided.
927 * For regular placement, this means the packet did not fit in
928 * the buffer provided. For HDS and jumbo placement, this means
929 * that the packet could not be placed into 7 physical buffers
932 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
935 * Not On Chip: All BDs needed for the packet were not on-chip
936 * when the packet arrived.
938 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
940 /* Bad Format: BDs were not formatted correctly. */
941 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
943 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
944 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
945 /* This indicates that there was an error in the IP header checksum. */
946 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
948 * This indicates that there was an error in the TCP, UDP or ICMP
951 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
953 * This indicates that there was an error in the tunnel IP header
956 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
957 /* This indicates that there was an error in the tunnel UDP checksum. */
958 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
960 * This indicates that there was a CRC error on either an FCoE or RoCE
961 * packet. The itype indicates the packet type.
963 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
965 * This indicates that there was an error in the tunnel portion of the
966 * packet when this field is non-zero.
968 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
969 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
971 * No additional error occurred on the tunnel portion of the
972 * packet of the packet does not have a tunnel.
974 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
976 * Indicates that IP header version does not match expectation
977 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
979 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
982 * Indicates that header length is out of range in the tunnel
983 * header. Valid for IPv4.
985 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
988 * Indicates that the physical packet is shorter than that
989 * claimed by the PPPoE header length for a tunnel PPPoE packet.
991 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
994 * Indicates that physical packet is shorter than that claimed
995 * by the tunnel l3 header length. Valid for IPv4, or IPv6
996 * tunnel packet packets.
998 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1001 * Indicates that the physical packet is shorter than that
1002 * claimed by the tunnel UDP header length for a tunnel UDP
1003 * packet that is not fragmented.
1005 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1006 (UINT32_C(0x5) << 9)
1008 * indicates that the IPv4 TTL or IPv6 hop limit check have
1009 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1012 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1013 (UINT32_C(0x6) << 9)
1014 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1015 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1017 * This indicates that there was an error in the inner portion of the
1018 * packet when this field is non-zero.
1020 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1021 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1023 * No additional error occurred on the tunnel portion of the
1024 * packet of the packet does not have a tunnel.
1026 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1028 * Indicates that IP header version does not match expectation
1029 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1030 * VFT was parsed on FCoE packet.
1032 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1033 (UINT32_C(0x1) << 12)
1035 * indicates that header length is out of range. Valid for IPv4
1038 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1039 (UINT32_C(0x2) << 12)
1041 * indicates that the IPv4 TTL or IPv6 hop limit check have
1042 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1044 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1046 * Indicates that physical packet is shorter than that claimed
1047 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1050 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1051 (UINT32_C(0x4) << 12)
1053 * Indicates that the physical packet is shorter than that
1054 * claimed by the UDP header length for a UDP packet that is not
1057 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1058 (UINT32_C(0x5) << 12)
1060 * Indicates that TCP header length > IP payload. Valid for TCP
1063 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1064 (UINT32_C(0x6) << 12)
1065 /* Indicates that TCP header length < 5. Valid for TCP. */
1066 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1067 (UINT32_C(0x7) << 12)
1069 * Indicates that TCP option headers result in a TCP header size
1070 * that does not match data offset in TCP header. Valid for TCP.
1072 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1073 (UINT32_C(0x8) << 12)
1074 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1075 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1076 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1077 #define RX_PKT_CMPL_ERRORS_SFT 1
1081 * This field identifies the CFA action rule that was used for this
1087 * This value holds the reordering sequence number for the packet. If
1088 * the reordering sequence is not valid, then this value is zero. The
1089 * reordering domain for the packet is in the bottom 8 to 10b of the
1090 * rss_hash value. The bottom 20b of this value contain the ordering
1091 * domain value for the packet.
1093 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1094 #define RX_PKT_CMPL_REORDER_SFT 0
1096 } __attribute__((packed));
1098 /* HWRM Forwarded Request (16 bytes) */
1099 struct hwrm_fwd_req_cmpl {
1100 /* Length of forwarded request in bytes. */
1102 * This field indicates the exact type of the completion. By convention,
1103 * the LSB identifies the length of the record in 16B units. Even values
1104 * indicate 16B records. Odd values indicate 32B records.
1106 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1107 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1108 /* Forwarded HWRM Request */
1109 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1110 /* Length of forwarded request in bytes. */
1111 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1112 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1113 uint16_t req_len_type;
1116 * Source ID of this request. Typically used in forwarding requests and
1117 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1118 * Reserved for internal processors 0xFFFF - HWRM
1124 /* Address of forwarded request. */
1126 * This value is written by the NIC such that it will be different for
1127 * each pass through the completion queue. The even passes will write 1.
1128 * The odd passes will write 0.
1130 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1131 /* Address of forwarded request. */
1132 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1133 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1134 uint64_t req_buf_addr_v;
1135 } __attribute__((packed));
1137 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1138 struct hwrm_async_event_cmpl {
1140 * This field indicates the exact type of the completion. By convention,
1141 * the LSB identifies the length of the record in 16B units. Even values
1142 * indicate 16B records. Odd values indicate 32B records.
1144 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1145 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1146 /* HWRM Asynchronous Event Information */
1147 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1148 (UINT32_C(0x2e) << 0)
1151 /* Identifiers of events. */
1152 /* Link status changed */
1153 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1154 (UINT32_C(0x0) << 0)
1155 /* Link MTU changed */
1156 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1157 (UINT32_C(0x1) << 0)
1158 /* Link speed changed */
1159 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1160 (UINT32_C(0x2) << 0)
1161 /* DCB Configuration changed */
1162 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1163 (UINT32_C(0x3) << 0)
1164 /* Port connection not allowed */
1165 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1166 (UINT32_C(0x4) << 0)
1167 /* Link speed configuration was not allowed */
1168 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1169 (UINT32_C(0x5) << 0)
1170 /* Function driver unloaded */
1171 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1172 (UINT32_C(0x10) << 0)
1173 /* Function driver loaded */
1174 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1175 (UINT32_C(0x11) << 0)
1176 /* PF driver unloaded */
1177 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1178 (UINT32_C(0x20) << 0)
1179 /* PF driver loaded */
1180 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1181 (UINT32_C(0x21) << 0)
1182 /* VF Function Level Reset (FLR) */
1183 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1184 /* VF MAC Address Change */
1185 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1186 (UINT32_C(0x31) << 0)
1187 /* PF-VF communication channel status change. */
1188 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1189 (UINT32_C(0x32) << 0)
1191 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1192 (UINT32_C(0xff) << 0)
1195 /* Event specific data */
1196 uint32_t event_data2;
1200 * This value is written by the NIC such that it will be different for
1201 * each pass through the completion queue. The even passes will write 1.
1202 * The odd passes will write 0.
1204 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1206 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1207 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1210 /* 8-lsb timestamp from POR (100-msec resolution) */
1211 uint8_t timestamp_lo;
1213 /* 16-lsb timestamp from POR (100-msec resolution) */
1214 uint16_t timestamp_hi;
1216 /* Event specific data */
1217 uint32_t event_data1;
1218 } __attribute__((packed));
1221 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1222 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1223 * processors inside the chip. This firmware is vital part of the chip's
1224 * hardware. The chip can not be used by driver without it.
1227 /* Input (16 bytes) */
1230 * This value indicates what type of request this is. The format for the
1231 * rest of the command is determined by this field.
1236 * This value indicates the what completion ring the request will be
1237 * optionally completed on. If the value is -1, then no CR completion
1238 * will be generated. Any other value must be a valid CR ring_id value
1239 * for this function.
1243 /* This value indicates the command sequence number. */
1247 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1248 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1253 * This is the host address where the response will be written when the
1254 * request is complete. This area must be 16B aligned and must be
1255 * cleared to zero before the request is made.
1258 } __attribute__((packed));
1260 /* Output (8 bytes) */
1263 * Pass/Fail or error type Note: receiver to verify the in parameters,
1264 * and fail the call with an error when appropriate
1266 uint16_t error_code;
1268 /* This field returns the type of original request. */
1271 /* This field provides original sequence number of the command. */
1275 * This field is the length of the response in bytes. The last byte of
1276 * the response is a valid flag that will read as '1' when the command
1277 * has been completely written to memory.
1280 } __attribute__((packed));
1282 /* hwrm_cfa_l2_filter_alloc */
1284 * A filter is used to identify traffic that contains a matching set of
1285 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1286 * other things which then allows the ASIC to direct the incoming traffic
1287 * to an appropriate VNIC or Rx ring.
1290 /* Input (96 bytes) */
1291 struct hwrm_cfa_l2_filter_alloc_input {
1293 * This value indicates what type of request this is. The format for the
1294 * rest of the command is determined by this field.
1299 * This value indicates the what completion ring the request will be
1300 * optionally completed on. If the value is -1, then no CR completion
1301 * will be generated. Any other value must be a valid CR ring_id value
1302 * for this function.
1306 /* This value indicates the command sequence number. */
1310 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1311 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1316 * This is the host address where the response will be written when the
1317 * request is complete. This area must be 16B aligned and must be
1318 * cleared to zero before the request is made.
1323 * Enumeration denoting the RX, TX type of the resource. This
1324 * enumeration is used for resources that are similar for both TX and RX
1325 * paths of the chip.
1327 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1330 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1331 (UINT32_C(0x0) << 0)
1333 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1334 (UINT32_C(0x1) << 0)
1335 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1336 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1338 * Setting of this flag indicates the applicability to the loopback
1341 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1344 * Setting of this flag indicates drop action. If this flag is not set,
1345 * then it should be considered accept action.
1347 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1350 * If this flag is set, all t_l2_* fields are invalid and they should
1351 * not be specified. If this flag is set, then l2_* fields refer to
1352 * fields of outermost L2 header.
1354 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1358 /* This bit must be '1' for the l2_addr field to be configured. */
1359 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1361 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1362 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1364 /* This bit must be '1' for the l2_ovlan field to be configured. */
1365 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1367 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1368 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1370 /* This bit must be '1' for the l2_ivlan field to be configured. */
1371 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1373 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1374 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1376 /* This bit must be '1' for the t_l2_addr field to be configured. */
1377 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1380 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1382 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1384 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1385 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1388 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1390 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1392 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1393 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1396 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1398 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1400 /* This bit must be '1' for the src_type field to be configured. */
1401 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1403 /* This bit must be '1' for the src_id field to be configured. */
1404 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1406 /* This bit must be '1' for the tunnel_type field to be configured. */
1407 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1409 /* This bit must be '1' for the dst_id field to be configured. */
1410 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1413 * This bit must be '1' for the mirror_vnic_id field to be configured.
1415 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1420 * This value sets the match value for the L2 MAC address. Destination
1421 * MAC address for RX path. Source MAC address for TX path.
1429 * This value sets the mask value for the L2 address. A value of 0 will
1430 * mask the corresponding bit from compare.
1432 uint8_t l2_addr_mask[6];
1434 /* This value sets VLAN ID value for outer VLAN. */
1438 * This value sets the mask value for the ovlan id. A value of 0 will
1439 * mask the corresponding bit from compare.
1441 uint16_t l2_ovlan_mask;
1443 /* This value sets VLAN ID value for inner VLAN. */
1447 * This value sets the mask value for the ivlan id. A value of 0 will
1448 * mask the corresponding bit from compare.
1450 uint16_t l2_ivlan_mask;
1456 * This value sets the match value for the tunnel L2 MAC address.
1457 * Destination MAC address for RX path. Source MAC address for TX path.
1459 uint8_t t_l2_addr[6];
1465 * This value sets the mask value for the tunnel L2 address. A value of
1466 * 0 will mask the corresponding bit from compare.
1468 uint8_t t_l2_addr_mask[6];
1470 /* This value sets VLAN ID value for tunnel outer VLAN. */
1471 uint16_t t_l2_ovlan;
1474 * This value sets the mask value for the tunnel ovlan id. A value of 0
1475 * will mask the corresponding bit from compare.
1477 uint16_t t_l2_ovlan_mask;
1479 /* This value sets VLAN ID value for tunnel inner VLAN. */
1480 uint16_t t_l2_ivlan;
1483 * This value sets the mask value for the tunnel ivlan id. A value of 0
1484 * will mask the corresponding bit from compare.
1486 uint16_t t_l2_ivlan_mask;
1488 /* This value identifies the type of source of the packet. */
1490 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1491 (UINT32_C(0x0) << 0)
1492 /* Physical function */
1493 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1494 (UINT32_C(0x1) << 0)
1495 /* Virtual function */
1496 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1497 (UINT32_C(0x2) << 0)
1498 /* Virtual NIC of a function */
1499 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1500 (UINT32_C(0x3) << 0)
1501 /* Embedded processor for CFA management */
1502 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1503 (UINT32_C(0x4) << 0)
1504 /* Embedded processor for OOB management */
1505 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1506 (UINT32_C(0x5) << 0)
1507 /* Embedded processor for RoCE */
1508 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1509 (UINT32_C(0x6) << 0)
1510 /* Embedded processor for network proxy functions */
1511 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1512 (UINT32_C(0x7) << 0)
1517 * This value is the id of the source. For a network port, it represents
1518 * port_id. For a physical function, it represents fid. For a virtual
1519 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1520 * embedded processors, this id is not valid. Notes: 1. The function ID
1521 * is implied if it src_id is not provided for a src_type that is either
1527 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1528 (UINT32_C(0x0) << 0)
1529 /* Virtual eXtensible Local Area Network (VXLAN) */
1530 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1531 (UINT32_C(0x1) << 0)
1533 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1535 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1536 (UINT32_C(0x2) << 0)
1538 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1540 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1541 (UINT32_C(0x3) << 0)
1543 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1544 (UINT32_C(0x4) << 0)
1545 /* Generic Network Virtualization Encapsulation (Geneve) */
1546 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1547 (UINT32_C(0x5) << 0)
1548 /* Multi-Protocol Lable Switching (MPLS) */
1549 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1550 (UINT32_C(0x6) << 0)
1551 /* Stateless Transport Tunnel (STT) */
1552 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1553 (UINT32_C(0x7) << 0)
1555 * Generic Routing Encapsulation (GRE) inside IP datagram
1558 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1559 (UINT32_C(0x8) << 0)
1560 /* Any tunneled traffic */
1561 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1562 (UINT32_C(0xff) << 0)
1563 uint8_t tunnel_type;
1568 * If set, this value shall represent the Logical VNIC ID of the
1569 * destination VNIC for the RX path and network port id of the
1570 * destination port for the TX path.
1574 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1575 uint16_t mirror_vnic_id;
1578 * This hint is provided to help in placing the filter in the filter
1582 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1583 (UINT32_C(0x0) << 0)
1584 /* Above the given filter */
1585 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1586 (UINT32_C(0x1) << 0)
1587 /* Below the given filter */
1588 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1589 (UINT32_C(0x2) << 0)
1590 /* As high as possible */
1591 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1592 (UINT32_C(0x3) << 0)
1593 /* As low as possible */
1594 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1595 (UINT32_C(0x4) << 0)
1602 * This is the ID of the filter that goes along with the pri_hint. This
1603 * field is valid only for the following values. 1 - Above the given
1604 * filter 2 - Below the given filter
1606 uint64_t l2_filter_id_hint;
1607 } __attribute__((packed));
1609 /* Output (24 bytes) */
1610 struct hwrm_cfa_l2_filter_alloc_output {
1612 * Pass/Fail or error type Note: receiver to verify the in parameters,
1613 * and fail the call with an error when appropriate
1615 uint16_t error_code;
1617 /* This field returns the type of original request. */
1620 /* This field provides original sequence number of the command. */
1624 * This field is the length of the response in bytes. The last byte of
1625 * the response is a valid flag that will read as '1' when the command
1626 * has been completely written to memory.
1631 * This value identifies a set of CFA data structures used for an L2
1634 uint64_t l2_filter_id;
1637 * This is the ID of the flow associated with this filter. This value
1638 * shall be used to match and associate the flow identifier returned in
1639 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1648 * This field is used in Output records to indicate that the output is
1649 * completely written to RAM. This field should be read as '1' to
1650 * indicate that the output has been completely written. When writing a
1651 * command completion or response to an internal processor, the order of
1652 * writes has to be such that this field is written last.
1655 } __attribute__((packed));
1657 /* hwrm_cfa_l2_filter_free */
1659 * Description: Free a L2 filter. The HWRM shall free all associated filter
1660 * resources with the L2 filter.
1663 /* Input (24 bytes) */
1664 struct hwrm_cfa_l2_filter_free_input {
1666 * This value indicates what type of request this is. The format for the
1667 * rest of the command is determined by this field.
1672 * This value indicates the what completion ring the request will be
1673 * optionally completed on. If the value is -1, then no CR completion
1674 * will be generated. Any other value must be a valid CR ring_id value
1675 * for this function.
1679 /* This value indicates the command sequence number. */
1683 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1684 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1689 * This is the host address where the response will be written when the
1690 * request is complete. This area must be 16B aligned and must be
1691 * cleared to zero before the request is made.
1696 * This value identifies a set of CFA data structures used for an L2
1699 uint64_t l2_filter_id;
1700 } __attribute__((packed));
1702 /* Output (16 bytes) */
1703 struct hwrm_cfa_l2_filter_free_output {
1705 * Pass/Fail or error type Note: receiver to verify the in parameters,
1706 * and fail the call with an error when appropriate
1708 uint16_t error_code;
1710 /* This field returns the type of original request. */
1713 /* This field provides original sequence number of the command. */
1717 * This field is the length of the response in bytes. The last byte of
1718 * the response is a valid flag that will read as '1' when the command
1719 * has been completely written to memory.
1729 * This field is used in Output records to indicate that the output is
1730 * completely written to RAM. This field should be read as '1' to
1731 * indicate that the output has been completely written. When writing a
1732 * command completion or response to an internal processor, the order of
1733 * writes has to be such that this field is written last.
1736 } __attribute__((packed));
1738 /* hwrm_cfa_l2_set_rx_mask */
1739 /* Description: This command will set rx mask of the function. */
1741 /* Input (40 bytes) */
1742 struct hwrm_cfa_l2_set_rx_mask_input {
1744 * This value indicates what type of request this is. The format for the
1745 * rest of the command is determined by this field.
1750 * This value indicates the what completion ring the request will be
1751 * optionally completed on. If the value is -1, then no CR completion
1752 * will be generated. Any other value must be a valid CR ring_id value
1753 * for this function.
1757 /* This value indicates the command sequence number. */
1761 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1762 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1767 * This is the host address where the response will be written when the
1768 * request is complete. This area must be 16B aligned and must be
1769 * cleared to zero before the request is made.
1776 /* Reserved for future use. */
1777 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
1779 * When this bit is '1', the function is requested to accept multi-cast
1780 * packets specified by the multicast addr table.
1782 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
1784 * When this bit is '1', the function is requested to accept all multi-
1787 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
1789 * When this bit is '1', the function is requested to accept broadcast
1792 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
1794 * When this bit is '1', the function is requested to be put in the
1795 * promiscuous mode. The HWRM should accept any function to set up
1796 * promiscuous mode. The HWRM shall follow the semantics below for the
1797 * promiscuous mode support. # When partitioning is not enabled on a
1798 * port (i.e. single PF on the port), then the PF shall be allowed to be
1799 * in the promiscuous mode. When the PF is in the promiscuous mode, then
1800 * it shall receive all host bound traffic on that port. # When
1801 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
1802 * PF on that port is in the promiscuous mode, then the PF receives all
1803 * traffic within that partition as identified by a unique identifier
1804 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
1805 * specified, then the setting of promiscuous mode on that PF shall
1806 * result in the PF receiving all host bound traffic with matching outer
1807 * VLAN. # A VF shall can be set in the promiscuous mode. In the
1808 * promiscuous mode, the VF does not receive any traffic unless a unique
1809 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
1810 * is specified, then the setting of promiscuous mode on that VF shall
1811 * result in the VF receiving all host bound traffic with the matching
1812 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
1813 * a function independently from the promiscuous mode settings on other
1816 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
1818 * If this flag is set, the corresponding RX filters shall be set up to
1819 * cover multicast/broadcast filters for the outermost Layer 2
1820 * destination MAC address field.
1822 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
1825 /* This is the address for mcast address tbl. */
1826 uint64_t mc_tbl_addr;
1829 * This value indicates how many entries in mc_tbl are valid. Each entry
1832 uint32_t num_mc_entries;
1835 } __attribute__((packed));
1837 /* Output (16 bytes) */
1838 struct hwrm_cfa_l2_set_rx_mask_output {
1840 * Pass/Fail or error type Note: receiver to verify the in parameters,
1841 * and fail the call with an error when appropriate
1843 uint16_t error_code;
1845 /* This field returns the type of original request. */
1848 /* This field provides original sequence number of the command. */
1852 * This field is the length of the response in bytes. The last byte of
1853 * the response is a valid flag that will read as '1' when the command
1854 * has been completely written to memory.
1864 * This field is used in Output records to indicate that the output is
1865 * completely written to RAM. This field should be read as '1' to
1866 * indicate that the output has been completely written. When writing a
1867 * command completion or response to an internal processor, the order of
1868 * writes has to be such that this field is written last.
1871 } __attribute__((packed));
1873 /* hwrm_exec_fwd_resp */
1875 * Description: This command is used to send an encapsulated request to the
1876 * HWRM. This command instructs the HWRM to execute the request and forward the
1877 * response of the encapsulated request to the location specified in the
1878 * original request that is encapsulated. The target id of this command shall be
1879 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1880 * acknowledge the receipt of the encapsulated request and forwarding of the
1884 /* Input (128 bytes) */
1885 struct hwrm_exec_fwd_resp_input {
1887 * This value indicates what type of request this is. The format for the
1888 * rest of the command is determined by this field.
1893 * This value indicates the what completion ring the request will be
1894 * optionally completed on. If the value is -1, then no CR completion
1895 * will be generated. Any other value must be a valid CR ring_id value
1896 * for this function.
1900 /* This value indicates the command sequence number. */
1904 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1905 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1910 * This is the host address where the response will be written when the
1911 * request is complete. This area must be 16B aligned and must be
1912 * cleared to zero before the request is made.
1917 * This is an encapsulated request. This request should be executed by
1918 * the HWRM and the response should be provided in the response buffer
1919 * inside the encapsulated request.
1921 uint32_t encap_request[26];
1924 * This value indicates the target id of the response to the
1925 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1926 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1928 uint16_t encap_resp_target_id;
1930 uint16_t unused_0[3];
1931 } __attribute__((packed));
1933 /* Output (16 bytes) */
1934 struct hwrm_exec_fwd_resp_output {
1936 * Pass/Fail or error type Note: receiver to verify the in parameters,
1937 * and fail the call with an error when appropriate
1939 uint16_t error_code;
1941 /* This field returns the type of original request. */
1944 /* This field provides original sequence number of the command. */
1948 * This field is the length of the response in bytes. The last byte of
1949 * the response is a valid flag that will read as '1' when the command
1950 * has been completely written to memory.
1960 * This field is used in Output records to indicate that the output is
1961 * completely written to RAM. This field should be read as '1' to
1962 * indicate that the output has been completely written. When writing a
1963 * command completion or response to an internal processor, the order of
1964 * writes has to be such that this field is written last.
1967 } __attribute__((packed));
1969 /* hwrm_func_qcaps */
1971 * Description: This command returns capabilities of a function. The input FID
1972 * value is used to indicate what function is being queried. This allows a
1973 * physical function driver to query virtual functions that are children of the
1974 * physical function. The output FID value is needed to configure Rings and
1975 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1978 /* Input (24 bytes) */
1979 struct hwrm_func_qcaps_input {
1981 * This value indicates what type of request this is. The format for the
1982 * rest of the command is determined by this field.
1987 * This value indicates the what completion ring the request will be
1988 * optionally completed on. If the value is -1, then no CR completion
1989 * will be generated. Any other value must be a valid CR ring_id value
1990 * for this function.
1994 /* This value indicates the command sequence number. */
1998 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1999 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2004 * This is the host address where the response will be written when the
2005 * request is complete. This area must be 16B aligned and must be
2006 * cleared to zero before the request is made.
2011 * Function ID of the function that is being queried. 0xFF... (All Fs)
2012 * if the query is for the requesting function.
2016 uint16_t unused_0[3];
2017 } __attribute__((packed));
2019 /* Output (80 bytes) */
2020 struct hwrm_func_qcaps_output {
2022 * Pass/Fail or error type Note: receiver to verify the in parameters,
2023 * and fail the call with an error when appropriate
2025 uint16_t error_code;
2027 /* This field returns the type of original request. */
2030 /* This field provides original sequence number of the command. */
2034 * This field is the length of the response in bytes. The last byte of
2035 * the response is a valid flag that will read as '1' when the command
2036 * has been completely written to memory.
2041 * FID value. This value is used to identify operations on the PCI bus
2042 * as belonging to a particular PCI function.
2047 * Port ID of port that this function is associated with. Valid only for
2048 * the PF. 0xFF... (All Fs) if this function is not associated with any
2049 * port. 0xFF... (All Fs) if this function is called from a VF.
2053 /* If 1, then Push mode is supported on this function. */
2054 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2056 * If 1, then the global MSI-X auto-masking is enabled for the device.
2058 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2061 * If 1, then the Precision Time Protocol (PTP) processing is supported
2062 * on this function. The HWRM should enable PTP on only a single
2063 * Physical Function (PF) per port.
2065 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2069 * This value is current MAC address configured for this function. A
2070 * value of 00-00-00-00-00-00 indicates no MAC address is currently
2073 uint8_t perm_mac_address[6];
2076 * The maximum number of RSS/COS contexts that can be allocated to the
2079 uint16_t max_rsscos_ctx;
2082 * The maximum number of completion rings that can be allocated to the
2085 uint16_t max_cmpl_rings;
2088 * The maximum number of transmit rings that can be allocated to the
2091 uint16_t max_tx_rings;
2094 * The maximum number of receive rings that can be allocated to the
2097 uint16_t max_rx_rings;
2100 * The maximum number of L2 contexts that can be allocated to the
2103 uint16_t max_l2_ctxs;
2105 /* The maximum number of VNICs that can be allocated to the function. */
2109 * The identifier for the first VF enabled on a PF. This is valid only
2110 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
2111 * called on a PF with SR-IOV disabled or on a VF.
2113 uint16_t first_vf_id;
2116 * The maximum number of VFs that can be allocated to the function. This
2117 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
2118 * command is called on a PF with SR-IOV disabled or on a VF.
2123 * The maximum number of statistic contexts that can be allocated to the
2126 uint16_t max_stat_ctx;
2129 * The maximum number of Encapsulation records that can be offloaded by
2132 uint32_t max_encap_records;
2135 * The maximum number of decapsulation records that can be offloaded by
2138 uint32_t max_decap_records;
2141 * The maximum number of Exact Match (EM) flows that can be offloaded by
2142 * this function on the TX side.
2144 uint32_t max_tx_em_flows;
2147 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2148 * by this function on the TX side.
2150 uint32_t max_tx_wm_flows;
2153 * The maximum number of Exact Match (EM) flows that can be offloaded by
2154 * this function on the RX side.
2156 uint32_t max_rx_em_flows;
2159 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2160 * by this function on the RX side.
2162 uint32_t max_rx_wm_flows;
2165 * The maximum number of multicast filters that can be supported by this
2166 * function on the RX side.
2168 uint32_t max_mcast_filters;
2171 * The maximum value of flow_id that can be supported in completion
2174 uint32_t max_flow_id;
2177 * The maximum number of HW ring groups that can be supported on this
2180 uint32_t max_hw_ring_grps;
2187 * This field is used in Output records to indicate that the output is
2188 * completely written to RAM. This field should be read as '1' to
2189 * indicate that the output has been completely written. When writing a
2190 * command completion or response to an internal processor, the order of
2191 * writes has to be such that this field is written last.
2194 } __attribute__((packed));
2196 /* hwrm_func_reset */
2198 * Description: This command resets a hardware function (PCIe function) and
2199 * frees any resources used by the function. This command shall be initiated by
2200 * the driver after an FLR has occurred to prepare the function for re-use. This
2201 * command may also be initiated by a driver prior to doing it's own
2202 * configuration. This command puts the function into the reset state. In the
2203 * reset state, global and port related features of the chip are not available.
2206 * Note: This command will reset a function that has already been disabled or
2207 * idled. The command returns all the resources owned by the function so a new
2208 * driver may allocate and configure resources normally.
2211 /* Input (24 bytes) */
2212 struct hwrm_func_reset_input {
2214 * This value indicates what type of request this is. The format for the
2215 * rest of the command is determined by this field.
2220 * This value indicates the what completion ring the request will be
2221 * optionally completed on. If the value is -1, then no CR completion
2222 * will be generated. Any other value must be a valid CR ring_id value
2223 * for this function.
2227 /* This value indicates the command sequence number. */
2231 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2232 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2237 * This is the host address where the response will be written when the
2238 * request is complete. This area must be 16B aligned and must be
2239 * cleared to zero before the request is made.
2243 /* This bit must be '1' for the vf_id_valid field to be configured. */
2244 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2249 * The ID of the VF that this PF is trying to reset. Only the parent PF
2250 * shall be allowed to reset a child VF. A parent PF driver shall use
2251 * this field only when a specific child VF is requested to be reset.
2255 /* This value indicates the level of a function reset. */
2257 * Reset the caller function and its children VFs (if any). If
2258 * no children functions exist, then reset the caller function
2261 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2262 (UINT32_C(0x0) << 0)
2263 /* Reset the caller function only */
2264 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2265 (UINT32_C(0x1) << 0)
2267 * Reset all children VFs of the caller function driver if the
2268 * caller is a PF driver. It is an error to specify this level
2269 * by a VF driver. It is an error to specify this level by a PF
2270 * driver with no children VFs.
2272 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2273 (UINT32_C(0x2) << 0)
2275 * Reset a specific VF of the caller function driver if the
2276 * caller is the parent PF driver. It is an error to specify
2277 * this level by a VF driver. It is an error to specify this
2278 * level by a PF driver that is not the parent of the VF that is
2279 * being requested to reset.
2281 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2282 (UINT32_C(0x3) << 0)
2283 uint8_t func_reset_level;
2286 } __attribute__((packed));
2288 /* Output (16 bytes) */
2289 struct hwrm_func_reset_output {
2291 * Pass/Fail or error type Note: receiver to verify the in parameters,
2292 * and fail the call with an error when appropriate
2294 uint16_t error_code;
2296 /* This field returns the type of original request. */
2299 /* This field provides original sequence number of the command. */
2303 * This field is the length of the response in bytes. The last byte of
2304 * the response is a valid flag that will read as '1' when the command
2305 * has been completely written to memory.
2315 * This field is used in Output records to indicate that the output is
2316 * completely written to RAM. This field should be read as '1' to
2317 * indicate that the output has been completely written. When writing a
2318 * command completion or response to an internal processor, the order of
2319 * writes has to be such that this field is written last.
2322 } __attribute__((packed));
2324 /* hwrm_port_phy_cfg */
2326 * Description: This command configures the PHY device for the port. It allows
2327 * setting of the most generic settings for the PHY. The HWRM shall complete
2328 * this command as soon as PHY settings are configured. They may not be applied
2329 * when the command response is provided. A VF driver shall not be allowed to
2330 * configure PHY using this command. In a network partition mode, a PF driver
2331 * shall not be allowed to configure PHY using this command.
2334 /* Input (56 bytes) */
2335 struct hwrm_port_phy_cfg_input {
2337 * This value indicates what type of request this is. The format for the
2338 * rest of the command is determined by this field.
2343 * This value indicates the what completion ring the request will be
2344 * optionally completed on. If the value is -1, then no CR completion
2345 * will be generated. Any other value must be a valid CR ring_id value
2346 * for this function.
2350 /* This value indicates the command sequence number. */
2354 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2355 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2360 * This is the host address where the response will be written when the
2361 * request is complete. This area must be 16B aligned and must be
2362 * cleared to zero before the request is made.
2367 * When this bit is set to '1', the PHY for the port shall be reset. #
2368 * If this bit is set to 1, then the HWRM shall reset the PHY after
2369 * applying PHY configuration changes specified in this command. # In
2370 * order to guarantee that PHY configuration changes specified in this
2371 * command take effect, the HWRM client should set this flag to 1. # If
2372 * this bit is not set to 1, then the HWRM may reset the PHY depending
2373 * on the current PHY configuration and settings specified in this
2376 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2378 * When this bit is set to '1', the link shall be forced to be taken
2379 * down. # When this bit is set to '1", all other command input settings
2380 * related to the link speed shall be ignored. Once the link state is
2381 * forced down, it can be explicitly cleared from that state by setting
2382 * this flag to '0'. # If this flag is set to '0', then the link shall
2383 * be cleared from forced down state if the link is in forced down
2384 * state. There may be conditions (e.g. out-of-band or sideband
2385 * configuration changes for the link) outside the scope of the HWRM
2386 * implementation that may clear forced down link state.
2388 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2390 * When this bit is set to '1', the link shall be forced to the
2391 * force_link_speed value. When this bit is set to '1', the HWRM client
2392 * should not enable any of the auto negotiation related fields
2393 * represented by auto_XXX fields in this command. When this bit is set
2394 * to '1' and the HWRM client has enabled a auto_XXX field in this
2395 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2396 * this bit is set to zero, the link shall be allowed to autoneg.
2398 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2400 * When this bit is set to '1', the auto-negotiation process shall be
2401 * restarted on the link.
2403 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2405 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2406 * requested to be enabled on this link. If EEE is not supported on this
2407 * port, then this flag shall be ignored by the HWRM.
2409 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2411 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2412 * requested to be disabled on this link. If EEE is not supported on
2413 * this port, then this flag shall be ignored by the HWRM.
2415 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2417 * When this bit is set to '1' and EEE is enabled on this link, then TX
2418 * LPI is requested to be enabled on the link. If EEE is not supported
2419 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2420 * disabled on this port, then this flag shall be ignored by the HWRM.
2422 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2425 /* This bit must be '1' for the auto_mode field to be configured. */
2426 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2427 /* This bit must be '1' for the auto_duplex field to be configured. */
2428 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2429 /* This bit must be '1' for the auto_pause field to be configured. */
2430 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2432 * This bit must be '1' for the auto_link_speed field to be configured.
2434 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2436 * This bit must be '1' for the auto_link_speed_mask field to be
2439 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2441 /* This bit must be '1' for the wirespeed field to be configured. */
2442 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2443 /* This bit must be '1' for the lpbk field to be configured. */
2444 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2445 /* This bit must be '1' for the preemphasis field to be configured. */
2446 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2447 /* This bit must be '1' for the force_pause field to be configured. */
2448 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2450 * This bit must be '1' for the eee_link_speed_mask field to be
2453 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2455 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2456 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2459 /* Port ID of port that is to be configured. */
2463 * This is the speed that will be used if the force bit is '1'. If
2464 * unsupported speed is selected, an error will be generated.
2466 /* 100Mb link speed */
2467 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2468 (UINT32_C(0x1) << 0)
2469 /* 1Gb link speed */
2470 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2471 (UINT32_C(0xa) << 0)
2472 /* 2Gb link speed */
2473 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2474 (UINT32_C(0x14) << 0)
2475 /* 2.5Gb link speed */
2476 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2477 (UINT32_C(0x19) << 0)
2478 /* 10Gb link speed */
2479 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2480 (UINT32_C(0x64) << 0)
2481 /* 20Mb link speed */
2482 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2483 (UINT32_C(0xc8) << 0)
2484 /* 25Gb link speed */
2485 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2486 (UINT32_C(0xfa) << 0)
2487 /* 40Gb link speed */
2488 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2489 (UINT32_C(0x190) << 0)
2490 /* 50Gb link speed */
2491 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2492 (UINT32_C(0x1f4) << 0)
2493 /* 100Gb link speed */
2494 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2495 (UINT32_C(0x3e8) << 0)
2496 /* 10Mb link speed */
2497 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2498 (UINT32_C(0xffff) << 0)
2499 uint16_t force_link_speed;
2502 * This value is used to identify what autoneg mode is used when the
2503 * link speed is not being forced.
2506 * Disable autoneg or autoneg disabled. No speeds are selected.
2508 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2509 /* Select all possible speeds for autoneg mode. */
2510 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2511 (UINT32_C(0x1) << 0)
2513 * Select only the auto_link_speed speed for autoneg mode. This
2514 * mode has been DEPRECATED. An HWRM client should not use this
2517 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2518 (UINT32_C(0x2) << 0)
2520 * Select the auto_link_speed or any speed below that speed for
2521 * autoneg. This mode has been DEPRECATED. An HWRM client should
2522 * not use this mode.
2524 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2525 (UINT32_C(0x3) << 0)
2527 * Select the speeds based on the corresponding link speed mask
2528 * value that is provided.
2530 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2531 (UINT32_C(0x4) << 0)
2535 * This is the duplex setting that will be used if the autoneg_mode is
2536 * "one_speed" or "one_or_below".
2538 /* Half Duplex will be requested. */
2539 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2540 (UINT32_C(0x0) << 0)
2541 /* Full duplex will be requested. */
2542 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2543 (UINT32_C(0x1) << 0)
2544 /* Both Half and Full dupex will be requested. */
2545 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2546 (UINT32_C(0x2) << 0)
2547 uint8_t auto_duplex;
2550 * This value is used to configure the pause that will be used for
2551 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2554 * When this bit is '1', Generation of tx pause messages has been
2555 * requested. Disabled otherwise.
2557 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2559 * When this bit is '1', Reception of rx pause messages has been
2560 * requested. Disabled otherwise.
2562 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2564 * When set to 1, the advertisement of pause is enabled. # When the
2565 * auto_mode is not set to none and this flag is set to 1, then the
2566 * auto_pause bits on this port are being advertised and autoneg pause
2567 * results are being interpreted. # When the auto_mode is not set to
2568 * none and this flag is set to 0, the pause is forced as indicated in
2569 * force_pause, and also advertised as auto_pause bits, but the autoneg
2570 * results are not interpreted since the pause configuration is being
2571 * forced. # When the auto_mode is set to none and this flag is set to
2572 * 1, auto_pause bits should be ignored and should be set to 0.
2574 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2580 * This is the speed that will be used if the autoneg_mode is
2581 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2582 * an error will be generated.
2584 /* 100Mb link speed */
2585 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2586 (UINT32_C(0x1) << 0)
2587 /* 1Gb link speed */
2588 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2589 (UINT32_C(0xa) << 0)
2590 /* 2Gb link speed */
2591 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2592 (UINT32_C(0x14) << 0)
2593 /* 2.5Gb link speed */
2594 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2595 (UINT32_C(0x19) << 0)
2596 /* 10Gb link speed */
2597 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2598 (UINT32_C(0x64) << 0)
2599 /* 20Mb link speed */
2600 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2601 (UINT32_C(0xc8) << 0)
2602 /* 25Gb link speed */
2603 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2604 (UINT32_C(0xfa) << 0)
2605 /* 40Gb link speed */
2606 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2607 (UINT32_C(0x190) << 0)
2608 /* 50Gb link speed */
2609 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2610 (UINT32_C(0x1f4) << 0)
2611 /* 100Gb link speed */
2612 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2613 (UINT32_C(0x3e8) << 0)
2614 /* 10Mb link speed */
2615 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2616 (UINT32_C(0xffff) << 0)
2617 uint16_t auto_link_speed;
2620 * This is a mask of link speeds that will be used if autoneg_mode is
2621 * "mask". If unsupported speed is enabled an error will be generated.
2623 /* 100Mb link speed (Half-duplex) */
2624 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2626 /* 100Mb link speed (Full-duplex) */
2627 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2629 /* 1Gb link speed (Half-duplex) */
2630 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2632 /* 1Gb link speed (Full-duplex) */
2633 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2635 /* 2Gb link speed */
2636 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2638 /* 2.5Gb link speed */
2639 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2641 /* 10Gb link speed */
2642 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2644 /* 20Gb link speed */
2645 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2647 /* 25Gb link speed */
2648 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2650 /* 40Gb link speed */
2651 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2653 /* 50Gb link speed */
2654 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2656 /* 100Gb link speed */
2657 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2659 /* 10Mb link speed (Half-duplex) */
2660 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2662 /* 10Mb link speed (Full-duplex) */
2663 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2665 uint16_t auto_link_speed_mask;
2667 /* This value controls the wirespeed feature. */
2668 /* Wirespeed feature is disabled. */
2669 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2670 /* Wirespeed feature is enabled. */
2671 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2674 /* This value controls the loopback setting for the PHY. */
2675 /* No loopback is selected. Normal operation. */
2676 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2678 * The HW will be configured with local loopback such that host
2679 * data is sent back to the host without modification.
2681 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2683 * The HW will be configured with remote loopback such that port
2684 * logic will send packets back out the transmitter that are
2687 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2691 * This value is used to configure the pause that will be used for force
2695 * When this bit is '1', Generation of tx pause messages is supported.
2696 * Disabled otherwise.
2698 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2700 * When this bit is '1', Reception of rx pause messages is supported.
2701 * Disabled otherwise.
2703 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2704 uint8_t force_pause;
2709 * This value controls the pre-emphasis to be used for the link. Driver
2710 * should not set this value (use enable.preemphasis = 0) unless driver
2711 * is sure of setting. Normally HWRM FW will determine proper pre-
2714 uint32_t preemphasis;
2717 * Setting for link speed mask that is used to advertise speeds during
2718 * autonegotiation when EEE is enabled. This field is valid only when
2719 * EEE is enabled. The speeds specified in this field shall be a subset
2720 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2721 * at least one speed shall be provided in this mask.
2724 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2725 /* 100Mb link speed (Full-duplex) */
2726 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2728 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2729 /* 1Gb link speed (Full-duplex) */
2730 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2732 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2735 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2737 /* 10Gb link speed */
2738 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2740 uint16_t eee_link_speed_mask;
2746 * Reuested setting of TX LPI timer in microseconds. This field is valid
2747 * only when EEE is enabled and TX LPI is enabled.
2749 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2751 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2752 uint32_t tx_lpi_timer;
2755 } __attribute__((packed));
2757 /* Output (16 bytes) */
2758 struct hwrm_port_phy_cfg_output {
2760 * Pass/Fail or error type Note: receiver to verify the in parameters,
2761 * and fail the call with an error when appropriate
2763 uint16_t error_code;
2765 /* This field returns the type of original request. */
2768 /* This field provides original sequence number of the command. */
2772 * This field is the length of the response in bytes. The last byte of
2773 * the response is a valid flag that will read as '1' when the command
2774 * has been completely written to memory.
2784 * This field is used in Output records to indicate that the output is
2785 * completely written to RAM. This field should be read as '1' to
2786 * indicate that the output has been completely written. When writing a
2787 * command completion or response to an internal processor, the order of
2788 * writes has to be such that this field is written last.
2791 } __attribute__((packed));
2795 * Description: This function is called by a driver to determine the HWRM
2796 * interface version supported by the HWRM firmware, the version of HWRM
2797 * firmware implementation, the name of HWRM firmware, the versions of other
2798 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2799 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2800 * be considered an invalid version.
2803 /* Input (24 bytes) */
2804 struct hwrm_ver_get_input {
2806 * This value indicates what type of request this is. The format for the
2807 * rest of the command is determined by this field.
2812 * This value indicates the what completion ring the request will be
2813 * optionally completed on. If the value is -1, then no CR completion
2814 * will be generated. Any other value must be a valid CR ring_id value
2815 * for this function.
2819 /* This value indicates the command sequence number. */
2823 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2824 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2829 * This is the host address where the response will be written when the
2830 * request is complete. This area must be 16B aligned and must be
2831 * cleared to zero before the request is made.
2836 * This field represents the major version of HWRM interface
2837 * specification supported by the driver HWRM implementation. The
2838 * interface major version is intended to change only when non backward
2839 * compatible changes are made to the HWRM interface specification.
2841 uint8_t hwrm_intf_maj;
2844 * This field represents the minor version of HWRM interface
2845 * specification supported by the driver HWRM implementation. A change
2846 * in interface minor version is used to reflect significant backward
2847 * compatible modification to HWRM interface specification. This can be
2848 * due to addition or removal of functionality. HWRM interface
2849 * specifications with the same major version but different minor
2850 * versions are compatible.
2852 uint8_t hwrm_intf_min;
2855 * This field represents the update version of HWRM interface
2856 * specification supported by the driver HWRM implementation. The
2857 * interface update version is used to reflect minor changes or bug
2858 * fixes to a released HWRM interface specification.
2860 uint8_t hwrm_intf_upd;
2862 uint8_t unused_0[5];
2863 } __attribute__((packed));
2865 /* Output (128 bytes) */
2866 struct hwrm_ver_get_output {
2868 * Pass/Fail or error type Note: receiver to verify the in parameters,
2869 * and fail the call with an error when appropriate
2871 uint16_t error_code;
2873 /* This field returns the type of original request. */
2876 /* This field provides original sequence number of the command. */
2880 * This field is the length of the response in bytes. The last byte of
2881 * the response is a valid flag that will read as '1' when the command
2882 * has been completely written to memory.
2887 * This field represents the major version of HWRM interface
2888 * specification supported by the HWRM implementation. The interface
2889 * major version is intended to change only when non backward compatible
2890 * changes are made to the HWRM interface specification. A HWRM
2891 * implementation that is compliant with this specification shall
2892 * provide value of 1 in this field.
2894 uint8_t hwrm_intf_maj;
2897 * This field represents the minor version of HWRM interface
2898 * specification supported by the HWRM implementation. A change in
2899 * interface minor version is used to reflect significant backward
2900 * compatible modification to HWRM interface specification. This can be
2901 * due to addition or removal of functionality. HWRM interface
2902 * specifications with the same major version but different minor
2903 * versions are compatible. A HWRM implementation that is compliant with
2904 * this specification shall provide value of 0 in this field.
2906 uint8_t hwrm_intf_min;
2909 * This field represents the update version of HWRM interface
2910 * specification supported by the HWRM implementation. The interface
2911 * update version is used to reflect minor changes or bug fixes to a
2912 * released HWRM interface specification. A HWRM implementation that is
2913 * compliant with this specification shall provide value of 1 in this
2916 uint8_t hwrm_intf_upd;
2918 uint8_t hwrm_intf_rsvd;
2921 * This field represents the major version of HWRM firmware. A change in
2922 * firmware major version represents a major firmware release.
2924 uint8_t hwrm_fw_maj;
2927 * This field represents the minor version of HWRM firmware. A change in
2928 * firmware minor version represents significant firmware functionality
2931 uint8_t hwrm_fw_min;
2934 * This field represents the build version of HWRM firmware. A change in
2935 * firmware build version represents bug fixes to a released firmware.
2937 uint8_t hwrm_fw_bld;
2940 * This field is a reserved field. This field can be used to represent
2941 * firmware branches or customer specific releases tied to a specific
2942 * (major,minor,update) version of the HWRM firmware.
2944 uint8_t hwrm_fw_rsvd;
2947 * This field represents the major version of mgmt firmware. A change in
2948 * major version represents a major release.
2950 uint8_t mgmt_fw_maj;
2953 * This field represents the minor version of mgmt firmware. A change in
2954 * minor version represents significant functionality changes.
2956 uint8_t mgmt_fw_min;
2959 * This field represents the build version of mgmt firmware. A change in
2960 * update version represents bug fixes.
2962 uint8_t mgmt_fw_bld;
2965 * This field is a reserved field. This field can be used to represent
2966 * firmware branches or customer specific releases tied to a specific
2967 * (major,minor,update) version
2969 uint8_t mgmt_fw_rsvd;
2972 * This field represents the major version of network control firmware.
2973 * A change in major version represents a major release.
2975 uint8_t netctrl_fw_maj;
2978 * This field represents the minor version of network control firmware.
2979 * A change in minor version represents significant functionality
2982 uint8_t netctrl_fw_min;
2985 * This field represents the build version of network control firmware.
2986 * A change in update version represents bug fixes.
2988 uint8_t netctrl_fw_bld;
2991 * This field is a reserved field. This field can be used to represent
2992 * firmware branches or customer specific releases tied to a specific
2993 * (major,minor,update) version
2995 uint8_t netctrl_fw_rsvd;
2998 * This field is reserved for future use. The responder should set it to
2999 * 0. The requester should ignore this field.
3004 * This field represents the major version of RoCE firmware. A change in
3005 * major version represents a major release.
3007 uint8_t roce_fw_maj;
3010 * This field represents the minor version of RoCE firmware. A change in
3011 * minor version represents significant functionality changes.
3013 uint8_t roce_fw_min;
3016 * This field represents the build version of RoCE firmware. A change in
3017 * update version represents bug fixes.
3019 uint8_t roce_fw_bld;
3022 * This field is a reserved field. This field can be used to represent
3023 * firmware branches or customer specific releases tied to a specific
3024 * (major,minor,update) version
3026 uint8_t roce_fw_rsvd;
3029 * This field represents the name of HWRM FW (ASCII chars without NULL
3032 char hwrm_fw_name[16];
3035 * This field represents the name of mgmt FW (ASCII chars without NULL
3038 char mgmt_fw_name[16];
3041 * This field represents the name of network control firmware (ASCII
3042 * chars without NULL at the end).
3044 char netctrl_fw_name[16];
3047 * This field is reserved for future use. The responder should set it to
3048 * 0. The requester should ignore this field.
3050 uint32_t reserved2[4];
3053 * This field represents the name of RoCE FW (ASCII chars without NULL
3056 char roce_fw_name[16];
3058 /* This field returns the chip number. */
3061 /* This field returns the revision of chip. */
3064 /* This field returns the chip metal number. */
3067 /* This field returns the bond id of the chip. */
3068 uint8_t chip_bond_id;
3071 * This value indicates the type of platform used for chip
3075 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
3076 (UINT32_C(0x0) << 0)
3077 /* FPGA platform of the chip. */
3078 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
3079 (UINT32_C(0x1) << 0)
3080 /* Palladium platform of the chip. */
3081 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
3082 (UINT32_C(0x2) << 0)
3083 uint8_t chip_platform_type;
3086 * This field returns the maximum value of request window that is
3087 * supported by the HWRM. The request window is mapped into device
3088 * address space using MMIO.
3090 uint16_t max_req_win_len;
3093 * This field returns the maximum value of response buffer in bytes. If
3094 * a request specifies the response buffer length that is greater than
3095 * this value, then the HWRM should fail it. The value of this field
3096 * shall be 4KB or more.
3098 uint16_t max_resp_len;
3101 * This field returns the default request timeout value in milliseconds.
3103 uint16_t def_req_timeout;
3110 * This field is used in Output records to indicate that the output is
3111 * completely written to RAM. This field should be read as '1' to
3112 * indicate that the output has been completely written. When writing a
3113 * command completion or response to an internal processor, the order of
3114 * writes has to be such that this field is written last.
3117 } __attribute__((packed));
3119 /* hwrm_queue_qportcfg */
3121 * Description: This function is called by a driver to query queue configuration
3122 * of a port. # The HWRM shall at least advertise one queue with lossy service
3123 * profile. # The driver shall use this command to query queue ids before
3124 * configuring or using any queues. # If a service profile is not set for a
3125 * queue, then the driver shall not use that queue without configuring a service
3126 * profile for it. # If the driver is not allowed to configure service profiles,
3127 * then the driver shall only use queues for which service profiles are pre-
3131 /* Input (24 bytes) */
3132 struct hwrm_queue_qportcfg_input {
3134 * This value indicates what type of request this is. The format for the
3135 * rest of the command is determined by this field.
3140 * This value indicates the what completion ring the request will be
3141 * optionally completed on. If the value is -1, then no CR completion
3142 * will be generated. Any other value must be a valid CR ring_id value
3143 * for this function.
3147 /* This value indicates the command sequence number. */
3151 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3152 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3157 * This is the host address where the response will be written when the
3158 * request is complete. This area must be 16B aligned and must be
3159 * cleared to zero before the request is made.
3164 * Enumeration denoting the RX, TX type of the resource. This
3165 * enumeration is used for resources that are similar for both TX and RX
3166 * paths of the chip.
3168 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3171 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3172 (UINT32_C(0x0) << 0)
3174 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3175 (UINT32_C(0x1) << 0)
3176 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3177 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3181 * Port ID of port for which the queue configuration is being queried.
3182 * This field is only required when sent by IPC.
3187 } __attribute__((packed));
3189 /* hwrm_ring_alloc */
3191 * Description: This command allocates and does basic preparation for a ring.
3194 /* Input (80 bytes) */
3195 struct hwrm_ring_alloc_input {
3197 * This value indicates what type of request this is. The format for the
3198 * rest of the command is determined by this field.
3203 * This value indicates the what completion ring the request will be
3204 * optionally completed on. If the value is -1, then no CR completion
3205 * will be generated. Any other value must be a valid CR ring_id value
3206 * for this function.
3210 /* This value indicates the command sequence number. */
3214 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3215 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3220 * This is the host address where the response will be written when the
3221 * request is complete. This area must be 16B aligned and must be
3222 * cleared to zero before the request is made.
3226 /* This bit must be '1' for the Reserved1 field to be configured. */
3227 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
3228 /* This bit must be '1' for the Reserved2 field to be configured. */
3229 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
3230 /* This bit must be '1' for the Reserved3 field to be configured. */
3231 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
3233 * This bit must be '1' for the stat_ctx_id_valid field to be
3236 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
3237 /* This bit must be '1' for the Reserved4 field to be configured. */
3238 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
3239 /* This bit must be '1' for the max_bw_valid field to be configured. */
3240 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
3244 /* Completion Ring (CR) */
3245 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
3247 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
3249 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
3255 /* This value is a pointer to the page table for the Ring. */
3256 uint64_t page_tbl_addr;
3258 /* First Byte Offset of the first entry in the first page. */
3262 * Actual page size in 2^page_size. The supported range is increments in
3263 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
3264 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
3265 * Page size is 64 KB. - 22 = 2 MB Page size is 2 MB. - 23 = 4 MB Page
3266 * size is 4 MB. - 31 = 1 GB Page size is 1 GB.
3271 * This value indicates the depth of page table. For this version of the
3272 * specification, value other than 0 or 1 shall be considered as an
3273 * invalid value. When the page_tbl_depth = 0, then it is treated as a
3274 * special case with the following. 1. FBO and page size fields are not
3275 * valid. 2. page_tbl_addr is the physical address of the first element
3278 uint8_t page_tbl_depth;
3284 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
3290 * Logical ring number for the ring to be allocated. This value
3291 * determines the position in the doorbell area where the update to the
3292 * ring will be made. For completion rings, this value is also the MSI-X
3293 * vector number for the function the completion ring is associated
3296 uint16_t logical_id;
3299 * This field is used only when ring_type is a TX ring. This value
3300 * indicates what completion ring the TX ring is associated with.
3302 uint16_t cmpl_ring_id;
3305 * This field is used only when ring_type is a TX ring. This value
3306 * indicates what CoS queue the TX ring is associated with.
3313 /* This field is reserved for the future use. It shall be set to 0. */
3315 /* This field is reserved for the future use. It shall be set to 0. */
3320 /* This field is reserved for the future use. It shall be set to 0. */
3324 * This field is used only when ring_type is a TX ring. This input
3325 * indicates what statistics context this ring should be associated
3328 uint32_t stat_ctx_id;
3330 /* This field is reserved for the future use. It shall be set to 0. */
3334 * This field is used only when ring_type is a TX ring. Maximum BW
3335 * allocated to this TX ring in Mbps. The HWRM will translate this value
3336 * into byte counter and time interval used for this ring inside the
3342 * This field is used only when ring_type is a Completion ring. This
3343 * value indicates what interrupt mode should be used on this completion
3344 * ring. Note: In the legacy interrupt mode, no more than 16 completion
3345 * rings are allowed.
3348 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY (UINT32_C(0x0) << 0)
3350 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD (UINT32_C(0x1) << 0)
3352 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX (UINT32_C(0x2) << 0)
3353 /* No Interrupt - Polled mode */
3354 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL (UINT32_C(0x3) << 0)
3357 uint8_t unused_8[3];
3358 } __attribute__((packed));
3360 /* Output (16 bytes) */
3362 struct hwrm_ring_alloc_output {
3364 * Pass/Fail or error type Note: receiver to verify the in parameters,
3365 * and fail the call with an error when appropriate
3367 uint16_t error_code;
3369 /* This field returns the type of original request. */
3372 /* This field provides original sequence number of the command. */
3376 * This field is the length of the response in bytes. The last byte of
3377 * the response is a valid flag that will read as '1' when the command
3378 * has been completely written to memory.
3382 /* Physical number of ring allocated. */
3385 /* Logical number of ring allocated. */
3386 uint16_t logical_ring_id;
3393 * This field is used in Output records to indicate that the output is
3394 * completely written to RAM. This field should be read as '1' to
3395 * indicate that the output has been completely written. When writing a
3396 * command completion or response to an internal processor, the order of
3397 * writes has to be such that this field is written last.
3400 } __attribute__((packed));
3402 /* hwrm_ring_free */
3404 * Description: This command is used to free a ring and associated resources.
3406 /* Input (24 bytes) */
3408 struct hwrm_ring_free_input {
3410 * This value indicates what type of request this is. The format for the
3411 * rest of the command is determined by this field.
3416 * This value indicates the what completion ring the request will be
3417 * optionally completed on. If the value is -1, then no CR completion
3418 * will be generated. Any other value must be a valid CR ring_id value
3419 * for this function.
3423 /* This value indicates the command sequence number. */
3427 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3428 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3433 * This is the host address where the response will be written when the
3434 * request is complete. This area must be 16B aligned and must be
3435 * cleared to zero before the request is made.
3440 /* Completion Ring (CR) */
3441 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
3443 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
3445 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
3450 /* Physical number of ring allocated. */
3454 } __attribute__((packed));
3456 /* Output (16 bytes) */
3457 struct hwrm_ring_free_output {
3459 * Pass/Fail or error type Note: receiver to verify the in parameters,
3460 * and fail the call with an error when appropriate
3462 uint16_t error_code;
3464 /* This field returns the type of original request. */
3467 /* This field provides original sequence number of the command. */
3471 * This field is the length of the response in bytes. The last byte of
3472 * the response is a valid flag that will read as '1' when the command
3473 * has been completely written to memory.
3483 * This field is used in Output records to indicate that the output is
3484 * completely written to RAM. This field should be read as '1' to
3485 * indicate that the output has been completely written. When writing a
3486 * command completion or response to an internal processor, the order of
3487 * writes has to be such that this field is written last.
3490 } __attribute__((packed));
3492 /* hwrm_stat_ctx_alloc */
3494 * Description: This command allocates and does basic preparation for a stat
3498 /* Input (32 bytes) */
3499 struct hwrm_stat_ctx_alloc_input {
3501 * This value indicates what type of request this is. The format for the
3502 * rest of the command is determined by this field.
3507 * This value indicates the what completion ring the request will be
3508 * optionally completed on. If the value is -1, then no CR completion
3509 * will be generated. Any other value must be a valid CR ring_id value
3510 * for this function.
3514 /* This value indicates the command sequence number. */
3518 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3519 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3524 * This is the host address where the response will be written when the
3525 * request is complete. This area must be 16B aligned and must be
3526 * cleared to zero before the request is made.
3530 /* This is the address for statistic block. */
3531 uint64_t stats_dma_addr;
3534 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
3537 uint32_t update_period_ms;
3540 } __attribute__((packed));
3542 /* Output (16 bytes) */
3543 struct hwrm_stat_ctx_alloc_output {
3545 * Pass/Fail or error type Note: receiver to verify the in parameters,
3546 * and fail the call with an error when appropriate
3548 uint16_t error_code;
3550 /* This field returns the type of original request. */
3553 /* This field provides original sequence number of the command. */
3557 * This field is the length of the response in bytes. The last byte of
3558 * the response is a valid flag that will read as '1' when the command
3559 * has been completely written to memory.
3563 /* This is the statistics context ID value. */
3564 uint32_t stat_ctx_id;
3571 * This field is used in Output records to indicate that the output is
3572 * completely written to RAM. This field should be read as '1' to
3573 * indicate that the output has been completely written. When writing a
3574 * command completion or response to an internal processor, the order of
3575 * writes has to be such that this field is written last.
3578 } __attribute__((packed));
3580 /* hwrm_stat_ctx_clr_stats */
3581 /* Description: This command clears statistics of a context. */
3583 /* Input (24 bytes) */
3584 struct hwrm_stat_ctx_clr_stats_input {
3586 * This value indicates what type of request this is. The format for the
3587 * rest of the command is determined by this field.
3592 * This value indicates the what completion ring the request will be
3593 * optionally completed on. If the value is -1, then no CR completion
3594 * will be generated. Any other value must be a valid CR ring_id value
3595 * for this function.
3599 /* This value indicates the command sequence number. */
3603 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3604 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3609 * This is the host address where the response will be written when the
3610 * request is complete. This area must be 16B aligned and must be
3611 * cleared to zero before the request is made.
3615 /* ID of the statistics context that is being queried. */
3616 uint32_t stat_ctx_id;
3619 } __attribute__((packed));
3621 /* Output (16 bytes) */
3622 struct hwrm_stat_ctx_clr_stats_output {
3624 * Pass/Fail or error type Note: receiver to verify the in parameters,
3625 * and fail the call with an error when appropriate
3627 uint16_t error_code;
3629 /* This field returns the type of original request. */
3632 /* This field provides original sequence number of the command. */
3636 * This field is the length of the response in bytes. The last byte of
3637 * the response is a valid flag that will read as '1' when the command
3638 * has been completely written to memory.
3648 * This field is used in Output records to indicate that the output is
3649 * completely written to RAM. This field should be read as '1' to
3650 * indicate that the output has been completely written. When writing a
3651 * command completion or response to an internal processor, the order of
3652 * writes has to be such that this field is written last.
3655 } __attribute__((packed));
3657 /* hwrm_vnic_alloc */
3659 * Description: This VNIC is a resource in the RX side of the chip that is used
3660 * to represent a virtual host "interface". # At the time of VNIC allocation or
3661 * configuration, the function can specify whether it wants the requested VNIC
3662 * to be the default VNIC for the function or not. # If a function requests
3663 * allocation of a VNIC for the first time and a VNIC is successfully allocated
3664 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
3665 * for that function. # The default VNIC shall be used for the default action
3666 * for a partition or function. # For each VNIC allocated on a function, a
3667 * mapping on the RX side to map the allocated VNIC to source virtual interface
3668 * shall be performed by the HWRM. This should be hidden to the function driver
3669 * requesting the VNIC allocation. This enables broadcast/multicast replication
3670 * with source knockout. # If multicast replication with source knockout is
3671 * enabled, then the internal VNIC to SVIF mapping data structures shall be
3672 * programmed at the time of VNIC allocation.
3675 /* Input (24 bytes) */
3676 struct hwrm_vnic_alloc_input {
3678 * This value indicates what type of request this is. The format for the
3679 * rest of the command is determined by this field.
3684 * This value indicates the what completion ring the request will be
3685 * optionally completed on. If the value is -1, then no CR completion
3686 * will be generated. Any other value must be a valid CR ring_id value
3687 * for this function.
3691 /* This value indicates the command sequence number. */
3695 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3696 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3701 * This is the host address where the response will be written when the
3702 * request is complete. This area must be 16B aligned and must be
3703 * cleared to zero before the request is made.
3708 * When this bit is '1', this VNIC is requested to be the default VNIC
3709 * for this function.
3711 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3715 } __attribute__((packed));
3717 /* Output (16 bytes) */
3718 struct hwrm_vnic_alloc_output {
3720 * Pass/Fail or error type Note: receiver to verify the in parameters,
3721 * and fail the call with an error when appropriate
3723 uint16_t error_code;
3725 /* This field returns the type of original request. */
3728 /* This field provides original sequence number of the command. */
3732 * This field is the length of the response in bytes. The last byte of
3733 * the response is a valid flag that will read as '1' when the command
3734 * has been completely written to memory.
3738 /* Logical vnic ID */
3746 * This field is used in Output records to indicate that the output is
3747 * completely written to RAM. This field should be read as '1' to
3748 * indicate that the output has been completely written. When writing a
3749 * command completion or response to an internal processor, the order of
3750 * writes has to be such that this field is written last.
3753 } __attribute__((packed));
3756 /* Description: Configure the RX VNIC structure. */
3758 /* Input (40 bytes) */
3759 struct hwrm_vnic_cfg_input {
3761 * This value indicates what type of request this is. The format for the
3762 * rest of the command is determined by this field.
3767 * This value indicates the what completion ring the request will be
3768 * optionally completed on. If the value is -1, then no CR completion
3769 * will be generated. Any other value must be a valid CR ring_id value
3770 * for this function.
3774 /* This value indicates the command sequence number. */
3778 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3779 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3784 * This is the host address where the response will be written when the
3785 * request is complete. This area must be 16B aligned and must be
3786 * cleared to zero before the request is made.
3791 * When this bit is '1', the VNIC is requested to be the default VNIC
3794 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3796 * When this bit is '1', the VNIC is being configured to strip VLAN in
3797 * the RX path. If set to '0', then VLAN stripping is disabled on this
3800 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
3802 * When this bit is '1', the VNIC is being configured to buffer receive
3803 * packets in the hardware until the host posts new receive buffers. If
3804 * set to '0', then bd_stall is being configured to be disabled on this
3807 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
3809 * When this bit is '1', the VNIC is being configured to receive both
3810 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
3811 * configured to be operating in dual VNIC mode.
3813 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
3815 * When this flag is set to '1', the VNIC is requested to be configured
3816 * to receive only RoCE traffic. If this flag is set to '0', then this
3817 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
3818 * to '1', then the HWRM client shall not set this flag to '1'.
3820 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
3823 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
3824 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
3825 /* This bit must be '1' for the rss_rule field to be configured. */
3826 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
3827 /* This bit must be '1' for the cos_rule field to be configured. */
3828 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
3829 /* This bit must be '1' for the lb_rule field to be configured. */
3830 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
3831 /* This bit must be '1' for the mru field to be configured. */
3832 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
3835 /* Logical vnic ID */
3839 * Default Completion ring for the VNIC. This ring will be chosen if
3840 * packet does not match any RSS rules and if there is no COS rule.
3842 uint16_t dflt_ring_grp;
3845 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
3851 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
3857 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
3858 * there is no LB rule.
3863 * The maximum receive unit of the vnic. Each vnic is associated with a
3864 * function. The vnic mru value overwrites the mru setting of the
3865 * associated function. The HWRM shall make sure that vnic mru does not
3866 * exceed the mru of the port the function is associated with.
3871 } __attribute__((packed));
3873 /* Output (16 bytes) */
3874 struct hwrm_vnic_cfg_output {
3876 * Pass/Fail or error type Note: receiver to verify the in parameters,
3877 * and fail the call with an error when appropriate
3879 uint16_t error_code;
3881 /* This field returns the type of original request. */
3884 /* This field provides original sequence number of the command. */
3888 * This field is the length of the response in bytes. The last byte of
3889 * the response is a valid flag that will read as '1' when the command
3890 * has been completely written to memory.
3900 * This field is used in Output records to indicate that the output is
3901 * completely written to RAM. This field should be read as '1' to
3902 * indicate that the output has been completely written. When writing a
3903 * command completion or response to an internal processor, the order of
3904 * writes has to be such that this field is written last.
3907 } __attribute__((packed));
3909 /* hwrm_vnic_free */
3911 * Description: Free a VNIC resource. Idle any resources associated with the
3912 * VNIC as well as the VNIC. Reset and release all resources associated with the
3916 /* Input (24 bytes) */
3917 struct hwrm_vnic_free_input {
3919 * This value indicates what type of request this is. The format for the
3920 * rest of the command is determined by this field.
3925 * This value indicates the what completion ring the request will be
3926 * optionally completed on. If the value is -1, then no CR completion
3927 * will be generated. Any other value must be a valid CR ring_id value
3928 * for this function.
3932 /* This value indicates the command sequence number. */
3936 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3937 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3942 * This is the host address where the response will be written when the
3943 * request is complete. This area must be 16B aligned and must be
3944 * cleared to zero before the request is made.
3948 /* Logical vnic ID */
3952 } __attribute__((packed));
3954 /* Output (16 bytes) */
3955 struct hwrm_vnic_free_output {
3957 * Pass/Fail or error type Note: receiver to verify the in parameters,
3958 * and fail the call with an error when appropriate
3960 uint16_t error_code;
3962 /* This field returns the type of original request. */
3965 /* This field provides original sequence number of the command. */
3969 * This field is the length of the response in bytes. The last byte of
3970 * the response is a valid flag that will read as '1' when the command
3971 * has been completely written to memory.
3981 * This field is used in Output records to indicate that the output is
3982 * completely written to RAM. This field should be read as '1' to
3983 * indicate that the output has been completely written. When writing a
3984 * command completion or response to an internal processor, the order of
3985 * writes has to be such that this field is written last.
3988 } __attribute__((packed));
3990 /* hwrm_vnic_rss_cfg */
3991 /* Description: This function is used to enable RSS configuration. */
3993 /* Input (48 bytes) */
3994 struct hwrm_vnic_rss_cfg_input {
3996 * This value indicates what type of request this is. The format for the
3997 * rest of the command is determined by this field.
4002 * This value indicates the what completion ring the request will be
4003 * optionally completed on. If the value is -1, then no CR completion
4004 * will be generated. Any other value must be a valid CR ring_id value
4005 * for this function.
4009 /* This value indicates the command sequence number. */
4013 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4014 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4019 * This is the host address where the response will be written when the
4020 * request is complete. This area must be 16B aligned and must be
4021 * cleared to zero before the request is made.
4026 * When this bit is '1', the RSS hash shall be computed over source and
4027 * destination IPv4 addresses of IPv4 packets.
4029 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
4031 * When this bit is '1', the RSS hash shall be computed over
4032 * source/destination IPv4 addresses and source/destination ports of
4035 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
4037 * When this bit is '1', the RSS hash shall be computed over
4038 * source/destination IPv4 addresses and source/destination ports of
4041 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
4043 * When this bit is '1', the RSS hash shall be computed over source and
4044 * destination IPv4 addresses of IPv6 packets.
4046 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
4048 * When this bit is '1', the RSS hash shall be computed over
4049 * source/destination IPv6 addresses and source/destination ports of
4052 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
4054 * When this bit is '1', the RSS hash shall be computed over
4055 * source/destination IPv6 addresses and source/destination ports of
4058 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
4063 /* This is the address for rss ring group table */
4064 uint64_t ring_grp_tbl_addr;
4066 /* This is the address for rss hash key table */
4067 uint64_t hash_key_tbl_addr;
4069 /* Index to the rss indirection table. */
4070 uint16_t rss_ctx_idx;
4072 uint16_t unused_1[3];
4073 } __attribute__((packed));
4075 /* Output (16 bytes) */
4076 struct hwrm_vnic_rss_cfg_output {
4078 * Pass/Fail or error type Note: receiver to verify the in parameters,
4079 * and fail the call with an error when appropriate
4081 uint16_t error_code;
4083 /* This field returns the type of original request. */
4086 /* This field provides original sequence number of the command. */
4090 * This field is the length of the response in bytes. The last byte of
4091 * the response is a valid flag that will read as '1' when the command
4092 * has been completely written to memory.
4102 * This field is used in Output records to indicate that the output is
4103 * completely written to RAM. This field should be read as '1' to
4104 * indicate that the output has been completely written. When writing a
4105 * command completion or response to an internal processor, the order of
4106 * writes has to be such that this field is written last.
4109 } __attribute__((packed));
4111 /* Input (16 bytes) */
4112 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
4114 * This value indicates what type of request this is. The format for the
4115 * rest of the command is determined by this field.
4120 * This value indicates the what completion ring the request will be
4121 * optionally completed on. If the value is -1, then no CR completion
4122 * will be generated. Any other value must be a valid CR ring_id value
4123 * for this function.
4127 /* This value indicates the command sequence number. */
4131 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4132 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4137 * This is the host address where the response will be written when the
4138 * request is complete. This area must be 16B aligned and must be
4139 * cleared to zero before the request is made.
4142 } __attribute__((packed));
4144 /* Output (16 bytes) */
4146 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
4148 * Pass/Fail or error type Note: receiver to verify the in parameters,
4149 * and fail the call with an error when appropriate
4151 uint16_t error_code;
4153 /* This field returns the type of original request. */
4156 /* This field provides original sequence number of the command. */
4160 * This field is the length of the response in bytes. The last byte of
4161 * the response is a valid flag that will read as '1' when the command
4162 * has been completely written to memory.
4166 /* rss_cos_lb_ctx_id is 16 b */
4167 uint16_t rss_cos_lb_ctx_id;
4176 * This field is used in Output records to indicate that the output is
4177 * completely written to RAM. This field should be read as '1' to
4178 * indicate that the output has been completely written. When writing a
4179 * command completion or response to an internal processor, the order of
4180 * writes has to be such that this field is written last.
4183 } __attribute__((packed));
4185 /* hwrm_vnic_rss_cos_lb_ctx_free */
4186 /* Description: This function can be used to free COS/Load Balance context. */
4187 /* Input (24 bytes) */
4189 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
4191 * This value indicates what type of request this is. The format for the
4192 * rest of the command is determined by this field.
4197 * This value indicates the what completion ring the request will be
4198 * optionally completed on. If the value is -1, then no CR completion
4199 * will be generated. Any other value must be a valid CR ring_id value
4200 * for this function.
4204 /* This value indicates the command sequence number. */
4208 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4209 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4214 * This is the host address where the response will be written when the
4215 * request is complete. This area must be 16B aligned and must be
4216 * cleared to zero before the request is made.
4220 /* rss_cos_lb_ctx_id is 16 b */
4221 uint16_t rss_cos_lb_ctx_id;
4223 uint16_t unused_0[3];
4224 } __attribute__((packed));
4226 /* Output (16 bytes) */
4227 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
4229 * Pass/Fail or error type Note: receiver to verify the in parameters,
4230 * and fail the call with an error when appropriate
4232 uint16_t error_code;
4234 /* This field returns the type of original request. */
4237 /* This field provides original sequence number of the command. */
4241 * This field is the length of the response in bytes. The last byte of
4242 * the response is a valid flag that will read as '1' when the command
4243 * has been completely written to memory.
4253 * This field is used in Output records to indicate that the output is
4254 * completely written to RAM. This field should be read as '1' to
4255 * indicate that the output has been completely written. When writing a
4256 * command completion or response to an internal processor, the order of
4257 * writes has to be such that this field is written last.
4260 } __attribute__((packed));
4262 /* Output (32 bytes) */
4263 struct hwrm_queue_qportcfg_output {
4265 * Pass/Fail or error type Note: receiver to verify the in parameters,
4266 * and fail the call with an error when appropriate
4268 uint16_t error_code;
4270 /* This field returns the type of original request. */
4273 /* This field provides original sequence number of the command. */
4277 * This field is the length of the response in bytes. The last byte of
4278 * the response is a valid flag that will read as '1' when the command
4279 * has been completely written to memory.
4283 /* The maximum number of queues that can be configured. */
4284 uint8_t max_configurable_queues;
4286 /* The maximum number of lossless queues that can be configured. */
4287 uint8_t max_configurable_lossless_queues;
4290 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
4291 * the HWRM shall allow the host SW driver to configure queues using
4294 uint8_t queue_cfg_allowed;
4297 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4298 * the HWRM shall allow the host SW driver to configure queue buffers
4299 * using hwrm_queue_buffers_cfg.
4301 uint8_t queue_buffers_cfg_allowed;
4304 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4305 * the HWRM shall allow the host SW driver to configure PFC using
4306 * hwrm_queue_pfcenable_cfg.
4308 uint8_t queue_pfcenable_cfg_allowed;
4311 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4312 * the HWRM shall allow the host SW driver to configure Priority to CoS
4313 * mapping using hwrm_queue_pri2cos_cfg.
4315 uint8_t queue_pri2cos_cfg_allowed;
4318 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4319 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
4320 * configuration using hwrm_queue_cos2bw_cfg.
4322 uint8_t queue_cos2bw_cfg_allowed;
4324 /* ID of CoS Queue 0. FF - Invalid id */
4327 /* This value is applicable to CoS queues only. */
4328 /* Lossy (best-effort) */
4329 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
4330 (UINT32_C(0x0) << 0)
4332 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
4333 (UINT32_C(0x1) << 0)
4335 * Set to 0xFF... (All Fs) if there is no service profile
4338 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
4339 (UINT32_C(0xff) << 0)
4340 uint8_t queue_id0_service_profile;
4342 /* ID of CoS Queue 1. FF - Invalid id */
4344 /* This value is applicable to CoS queues only. */
4345 /* Lossy (best-effort) */
4346 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
4347 (UINT32_C(0x0) << 0)
4349 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
4350 (UINT32_C(0x1) << 0)
4352 * Set to 0xFF... (All Fs) if there is no service profile
4355 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
4356 (UINT32_C(0xff) << 0)
4357 uint8_t queue_id1_service_profile;
4359 /* ID of CoS Queue 2. FF - Invalid id */
4361 /* This value is applicable to CoS queues only. */
4362 /* Lossy (best-effort) */
4363 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
4364 (UINT32_C(0x0) << 0)
4366 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
4367 (UINT32_C(0x1) << 0)
4369 * Set to 0xFF... (All Fs) if there is no service profile
4372 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
4373 (UINT32_C(0xff) << 0)
4374 uint8_t queue_id2_service_profile;
4376 /* ID of CoS Queue 3. FF - Invalid id */
4379 /* This value is applicable to CoS queues only. */
4380 /* Lossy (best-effort) */
4381 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
4382 (UINT32_C(0x0) << 0)
4384 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
4385 (UINT32_C(0x1) << 0)
4387 * Set to 0xFF... (All Fs) if there is no service profile
4390 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
4391 (UINT32_C(0xff) << 0)
4392 uint8_t queue_id3_service_profile;
4394 /* ID of CoS Queue 4. FF - Invalid id */
4396 /* This value is applicable to CoS queues only. */
4397 /* Lossy (best-effort) */
4398 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
4399 (UINT32_C(0x0) << 0)
4401 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
4402 (UINT32_C(0x1) << 0)
4404 * Set to 0xFF... (All Fs) if there is no service profile
4407 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
4408 (UINT32_C(0xff) << 0)
4409 uint8_t queue_id4_service_profile;
4411 /* ID of CoS Queue 5. FF - Invalid id */
4414 /* This value is applicable to CoS queues only. */
4415 /* Lossy (best-effort) */
4416 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
4417 (UINT32_C(0x0) << 0)
4419 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
4420 (UINT32_C(0x1) << 0)
4422 * Set to 0xFF... (All Fs) if there is no service profile
4425 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
4426 (UINT32_C(0xff) << 0)
4427 uint8_t queue_id5_service_profile;
4429 /* ID of CoS Queue 6. FF - Invalid id */
4430 uint8_t queue_id6_service_profile;
4431 /* This value is applicable to CoS queues only. */
4432 /* Lossy (best-effort) */
4433 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
4434 (UINT32_C(0x0) << 0)
4436 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
4437 (UINT32_C(0x1) << 0)
4439 * Set to 0xFF... (All Fs) if there is no service profile
4442 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
4443 (UINT32_C(0xff) << 0)
4446 /* ID of CoS Queue 7. FF - Invalid id */
4449 /* This value is applicable to CoS queues only. */
4450 /* Lossy (best-effort) */
4451 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
4452 (UINT32_C(0x0) << 0)
4454 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
4455 (UINT32_C(0x1) << 0)
4457 * Set to 0xFF... (All Fs) if there is no service profile
4460 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
4461 (UINT32_C(0xff) << 0)
4462 uint8_t queue_id7_service_profile;
4465 * This field is used in Output records to indicate that the output is
4466 * completely written to RAM. This field should be read as '1' to
4467 * indicate that the output has been completely written. When writing a
4468 * command completion or response to an internal processor, the order of
4469 * writes has to be such that this field is written last.
4472 } __attribute__((packed));
4474 /* hwrm_func_drv_rgtr */
4476 * Description: This command is used by the function driver to register its
4477 * information with the HWRM. A function driver shall implement this command. A
4478 * function driver shall use this command during the driver initialization right
4479 * after the HWRM version discovery and default ring resources allocation.
4482 /* Input (80 bytes) */
4483 struct hwrm_func_drv_rgtr_input {
4485 * This value indicates what type of request this is. The format for the
4486 * rest of the command is determined by this field.
4491 * This value indicates the what completion ring the request will be
4492 * optionally completed on. If the value is -1, then no CR completion
4493 * will be generated. Any other value must be a valid CR ring_id value
4494 * for this function.
4498 /* This value indicates the command sequence number. */
4502 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4503 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4508 * This is the host address where the response will be written when the
4509 * request is complete. This area must be 16B aligned and must be
4510 * cleared to zero before the request is made.
4515 * When this bit is '1', the function driver is requesting all requests
4516 * from its children VF drivers to be forwarded to itself. This flag can
4517 * only be set by the PF driver. If a VF driver sets this flag, it
4518 * should be ignored by the HWRM.
4520 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
4522 * When this bit is '1', the function is requesting none of the requests
4523 * from its children VF drivers to be forwarded to itself. This flag can
4524 * only be set by the PF driver. If a VF driver sets this flag, it
4525 * should be ignored by the HWRM.
4527 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4530 /* This bit must be '1' for the os_type field to be configured. */
4531 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4532 /* This bit must be '1' for the ver field to be configured. */
4533 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4534 /* This bit must be '1' for the timestamp field to be configured. */
4535 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4536 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4537 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
4539 * This bit must be '1' for the async_event_fwd field to be configured.
4541 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
4545 /* This value indicates the type of OS. */
4547 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
4548 (UINT32_C(0x0) << 0)
4549 /* Other OS not listed below. */
4550 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
4551 (UINT32_C(0x1) << 0)
4553 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
4554 (UINT32_C(0xe) << 0)
4556 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
4557 (UINT32_C(0x12) << 0)
4559 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
4560 (UINT32_C(0x1d) << 0)
4562 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
4563 (UINT32_C(0x24) << 0)
4565 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
4566 (UINT32_C(0x2a) << 0)
4567 /* VMware ESXi OS. */
4568 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
4569 (UINT32_C(0x68) << 0)
4570 /* Microsoft Windows 8 64-bit OS. */
4571 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
4572 (UINT32_C(0x73) << 0)
4573 /* Microsoft Windows Server 2012 R2 OS. */
4574 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
4575 (UINT32_C(0x74) << 0)
4578 /* This is the major version of the driver. */
4581 /* This is the minor version of the driver. */
4584 /* This is the update version of the driver. */
4591 * This is a 32-bit timestamp provided by the driver for keep alive. The
4592 * timestamp is in multiples of 1ms.
4599 * This is a 256-bit bit mask provided by the PF driver for letting the
4600 * HWRM know what commands issued by the VF driver to the HWRM should be
4601 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
4602 * Setting Nth bit to 1 indicates that requests from the VF driver with
4603 * req_type equal to N shall be forwarded to the parent PF driver. This
4604 * field is not valid for the VF driver.
4606 uint32_t vf_req_fwd[8];
4609 * This is a 256-bit bit mask provided by the function driver (PF or VF
4610 * driver) to indicate the list of asynchronous event completions to be
4611 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
4612 * by the function driver shall result in the HWRM forwarding
4613 * asynchronous event completion with event_id equal to N. If all bits
4614 * are set to 0 (value of 0), then the HWRM shall not forward any
4615 * asynchronous event completion to this function driver.
4617 uint32_t async_event_fwd[8];
4618 } __attribute__((packed));
4620 /* Output (16 bytes) */
4622 struct hwrm_func_drv_rgtr_output {
4624 * Pass/Fail or error type Note: receiver to verify the in parameters,
4625 * and fail the call with an error when appropriate
4627 uint16_t error_code;
4629 /* This field returns the type of original request. */
4632 /* This field provides original sequence number of the command. */
4636 * This field is the length of the response in bytes. The last byte of
4637 * the response is a valid flag that will read as '1' when the command
4638 * has been completely written to memory.
4648 * This field is used in Output records to indicate that the output is
4649 * completely written to RAM. This field should be read as '1' to
4650 * indicate that the output has been completely written. When writing a
4651 * command completion or response to an internal processor, the order of
4652 * writes has to be such that this field is written last.
4655 } __attribute__((packed));
4657 /* hwrm_func_drv_unrgtr */
4659 * Description: This command is used by the function driver to un register with
4660 * the HWRM. A function driver shall implement this command. A function driver
4661 * shall use this command during the driver unloading.
4663 /* Input (24 bytes) */
4665 struct hwrm_func_drv_unrgtr_input {
4667 * This value indicates what type of request this is. The format for the
4668 * rest of the command is determined by this field.
4673 * This value indicates the what completion ring the request will be
4674 * optionally completed on. If the value is -1, then no CR completion
4675 * will be generated. Any other value must be a valid CR ring_id value
4676 * for this function.
4680 /* This value indicates the command sequence number. */
4684 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4685 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4690 * This is the host address where the response will be written when the
4691 * request is complete. This area must be 16B aligned and must be
4692 * cleared to zero before the request is made.
4697 * When this bit is '1', the function driver is notifying the HWRM to
4698 * prepare for the shutdown.
4700 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4705 } __attribute__((packed));
4707 /* Output (16 bytes) */
4708 struct hwrm_func_drv_unrgtr_output {
4710 * Pass/Fail or error type Note: receiver to verify the in parameters,
4711 * and fail the call with an error when appropriate
4713 uint16_t error_code;
4715 /* This field returns the type of original request. */
4718 /* This field provides original sequence number of the command. */
4722 * This field is the length of the response in bytes. The last byte of
4723 * the response is a valid flag that will read as '1' when the command
4724 * has been completely written to memory.
4734 * This field is used in Output records to indicate that the output is
4735 * completely written to RAM. This field should be read as '1' to
4736 * indicate that the output has been completely written. When writing a
4737 * command completion or response to an internal processor, the order of
4738 * writes has to be such that this field is written last.
4741 } __attribute__((packed));