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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
89 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
90 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
91 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
92 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
93 #define HWRM_VNIC_FREE (UINT32_C(0x41))
94 #define HWRM_VNIC_CFG (UINT32_C(0x42))
95 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
96 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
97 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
98 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
99 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
100 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
101 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
102 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
103 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
106 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
107 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
109 /* Short TX BD (16 bytes) */
112 * All bits in this field must be valid on the first BD of a packet.
113 * Only the packet_end bit must be valid for the remaining BDs of a
116 /* This value identifies the type of buffer descriptor. */
117 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
118 #define TX_BD_SHORT_TYPE_SFT 0
120 * Indicates that this BD is 16B long and is used for normal L2
121 * packet transmission.
123 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
125 * If set to 1, the packet ends with the data in the buffer pointed to
126 * by this descriptor. This flag must be valid on every BD.
128 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
130 * If set to 1, the device will not generate a completion for this
131 * transmit packet unless there is an error in it's processing. If this
132 * bit is set to 0, then the packet will be completed normally. This bit
133 * must be valid only on the first BD of a packet.
135 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
137 * This value indicates how many 16B BD locations are consumed in the
138 * ring by this packet. A value of 1 indicates that this BD is the only
139 * BD (and that the it is a short BD). A value of 3 indicates either 3
140 * short BDs or 1 long BD and one short BD in the packet. A value of 0
141 * indicates that there are 32 BD locations in the packet (the maximum).
142 * This field is valid only on the first BD of a packet.
144 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
145 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
147 * This value is a hint for the length of the entire packet. It is used
148 * by the chip to optimize internal processing. The packet will be
149 * dropped if the hint is too short. This field is valid only on the
150 * first BD of a packet.
152 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
153 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
154 /* indicates packet length < 512B */
155 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
156 /* indicates 512 <= packet length < 1KB */
157 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
158 /* indicates 1KB <= packet length < 2KB */
159 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
160 /* indicates packet length >= 2KB */
161 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
162 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
164 * If set to 1, the device immediately updates the Send Consumer Index
165 * after the buffer associated with this descriptor has been transferred
166 * via DMA to NIC memory from host memory. An interrupt may or may not
167 * be generated according to the state of the interrupt avoidance
168 * mechanisms. If this bit is set to 0, then the Consumer Index is only
169 * updated as soon as one of the host interrupt coalescing conditions
170 * has been met. This bit must be valid on the first BD of a packet.
172 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
174 * All bits in this field must be valid on the first BD of a packet.
175 * Only the packet_end bit must be valid for the remaining BDs of a
178 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
179 #define TX_BD_SHORT_FLAGS_SFT 6
183 * This is the length of the host physical buffer this BD describes in
184 * bytes. This field must be valid on all BDs of a packet.
188 * The opaque data field is pass through to the completion and can be
189 * used for any data that the driver wants to associate with the
190 * transmit BD. This field must be valid on the first BD of a packet.
195 * This is the host physical address for the portion of the packet
196 * described by this TX BD. This value must be valid on all BDs of a
200 } __attribute__((packed));
202 /* Long TX BD (32 bytes split to 2 16-byte struct) */
205 * All bits in this field must be valid on the first BD of a packet.
206 * Only the packet_end bit must be valid for the remaining BDs of a
209 /* This value identifies the type of buffer descriptor. */
210 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
211 #define TX_BD_LONG_TYPE_SFT 0
213 * Indicates that this BD is 32B long and is used for normal L2
214 * packet transmission.
216 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
218 * If set to 1, the packet ends with the data in the buffer pointed to
219 * by this descriptor. This flag must be valid on every BD.
221 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
223 * If set to 1, the device will not generate a completion for this
224 * transmit packet unless there is an error in it's processing. If this
225 * bit is set to 0, then the packet will be completed normally. This bit
226 * must be valid only on the first BD of a packet.
228 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
230 * This value indicates how many 16B BD locations are consumed in the
231 * ring by this packet. A value of 1 indicates that this BD is the only
232 * BD (and that the it is a short BD). A value of 3 indicates either 3
233 * short BDs or 1 long BD and one short BD in the packet. A value of 0
234 * indicates that there are 32 BD locations in the packet (the maximum).
235 * This field is valid only on the first BD of a packet.
237 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
238 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
240 * This value is a hint for the length of the entire packet. It is used
241 * by the chip to optimize internal processing. The packet will be
242 * dropped if the hint is too short. This field is valid only on the
243 * first BD of a packet.
245 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
246 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
247 /* indicates packet length < 512B */
248 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
249 /* indicates 512 <= packet length < 1KB */
250 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
251 /* indicates 1KB <= packet length < 2KB */
252 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
253 /* indicates packet length >= 2KB */
254 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
255 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
257 * If set to 1, the device immediately updates the Send Consumer Index
258 * after the buffer associated with this descriptor has been transferred
259 * via DMA to NIC memory from host memory. An interrupt may or may not
260 * be generated according to the state of the interrupt avoidance
261 * mechanisms. If this bit is set to 0, then the Consumer Index is only
262 * updated as soon as one of the host interrupt coalescing conditions
263 * has been met. This bit must be valid on the first BD of a packet.
265 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
267 * All bits in this field must be valid on the first BD of a packet.
268 * Only the packet_end bit must be valid for the remaining BDs of a
271 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
272 #define TX_BD_LONG_FLAGS_SFT 6
276 * This is the length of the host physical buffer this BD describes in
277 * bytes. This field must be valid on all BDs of a packet.
282 * The opaque data field is pass through to the completion and can be
283 * used for any data that the driver wants to associate with the
284 * transmit BD. This field must be valid on the first BD of a packet.
289 * This is the host physical address for the portion of the packet
290 * described by this TX BD. This value must be valid on all BDs of a
294 } __attribute__((packed));
296 /* last 16 bytes of Long TX BD */
298 struct tx_bd_long_hi {
300 * All bits in this field must be valid on the first BD of a packet.
301 * Their value on other BDs of the packet will be ignored.
304 * If set to 1, the controller replaces the TCP/UPD checksum fields of
305 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
306 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
307 * checksum for the packet associated with this descriptor. This bit
308 * must be valid on the first BD of a packet.
310 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
312 * If set to 1, the controller replaces the IP checksum of the normal
313 * packets, or the inner IP checksum of the encapsulated packets with
314 * the hardware calculated IP checksum for the packet associated with
315 * this descriptor. This bit must be valid on the first BD of a packet.
317 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
319 * If set to 1, the controller will not append an Ethernet CRC to the
320 * end of the frame. This bit must be valid on the first BD of a packet.
321 * Packet must be 64B or longer when this flag is set. It is not useful
322 * to use this bit with any form of TX offload such as CSO or LSO. The
323 * intent is that the packet from the host already has a valid Ethernet
326 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
328 * If set to 1, the device will record the time at which the packet was
329 * actually transmitted at the TX MAC. This bit must be valid on the
330 * first BD of a packet.
332 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
334 * If set to 1, The controller replaces the tunnel IP checksum field
335 * with hardware calculated IP checksum for the IP header of the packet
336 * associated with this descriptor. In case of VXLAN, the controller
337 * also replaces the outer header UDP checksum with hardware calculated
338 * UDP checksum for the packet associated with this descriptor.
340 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
342 * If set to 1, the device will treat this packet with LSO(Large Send
343 * Offload) processing for both normal or encapsulated packets, which is
344 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
345 * fields must be valid. The driver doesn't need to set t_ip_chksum,
346 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
347 * the appropriate checksum fields for segmented packets. When this bit
348 * is 1, the hdr_size and mss fields must be valid.
350 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
352 * If set to zero when LSO is '1', then the IPID will be treated as a
353 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
354 * set to one when LSO is '1', then the IPID will be treated as a 15b
355 * number and will be wrapped if it exceeds a value 0f 0x7fff.
357 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
359 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
360 * will not be modified during LSO operations. If set to one when LSO is
361 * '1', then the IPID of the tunnel IP header will be incremented for
362 * each subsequent segment of an LSO operation.
364 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
366 * If set to '1', then the RoCE ICRC will be appended to the packet.
367 * Packet must be a valid RoCE format packet.
369 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
371 * If set to '1', then the FCoE CRC will be appended to the packet.
372 * Packet must be a valid FCoE format packet.
374 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
378 * When LSO is '1', this field must contain the offset of the TCP
379 * payload from the beginning of the packet in as 16b words. In case of
380 * encapsulated/tunneling packet, this field contains the offset of the
381 * inner TCP payload from beginning of the packet as 16-bit words. This
382 * value must be valid on the first BD of a packet.
384 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
385 #define TX_BD_LONG_HDR_SIZE_SFT 0
389 * This is the MSS value that will be used to do the LSO processing. The
390 * value is the length in bytes of the TCP payload for each segment
391 * generated by the LSO operation. This value must be valid on the first
394 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
395 #define TX_BD_LONG_MSS_SFT 0
401 * This value selects a CFA action to perform on the packet. Set this
402 * value to zero if no CFA action is desired. This value must be valid
403 * on the first BD of a packet.
408 * This value is action meta-data that defines CFA edit operations that
409 * are done in addition to any action editing.
411 /* When key=1, This is the VLAN tag VID value. */
412 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
413 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
414 /* When key=1, This is the VLAN tag DE value. */
415 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
416 /* When key=1, This is the VLAN tag PRI value. */
417 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
418 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
419 /* When key=1, This is the VLAN tag TPID select value. */
420 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
421 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
423 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
425 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
427 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
429 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
431 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
432 /* Value programmed in CFA VLANTPID register. */
433 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
434 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
435 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
436 /* When key=1, This is the VLAN tag TPID select value. */
437 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
438 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
440 * This field identifies the type of edit to be performed on the packet.
441 * This value must be valid on the first BD of a packet.
443 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
444 #define TX_BD_LONG_CFA_META_KEY_SFT 28
446 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
448 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
449 * - PRI/DE value. - meta[11:0] - VID value.
451 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
452 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
454 } __attribute__((packed));
456 /* RX Producer Packet BD (16 bytes) */
457 struct rx_prod_pkt_bd {
458 /* This value identifies the type of buffer descriptor. */
459 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
460 #define RX_PROD_PKT_BD_TYPE_SFT 0
462 * Indicates that this BD is 16B long and is an RX Producer (ie.
463 * empty) buffer descriptor.
465 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
467 * If set to 1, the packet will be placed at the address plus 2B. The 2
468 * Bytes of padding will be written as zero.
471 * This is intended to be used when the host buffer is cache-line
472 * aligned to produce packets that are easy to parse in host memory
473 * while still allowing writes to be cache line aligned.
475 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
477 * If set to 1, the packet write will be padded out to the nearest
478 * cache-line with zero value padding.
481 * If receive buffers start/end on cache-line boundaries, this feature
482 * will ensure that all data writes on the PCI bus start/end on cache
485 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
487 * This value is the number of additional buffers in the ring that
488 * describe the buffer space to be consumed for the this packet. If the
489 * value is zero, then the packet must fit within the space described by
490 * this BD. If this value is 1 or more, it indicates how many additional
491 * "buffer" BDs are in the ring immediately following this BD to be used
492 * for the same network packet. Even if the packet to be placed does not
493 * need all the additional buffers, they will be consumed anyway.
495 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
496 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
497 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
498 #define RX_PROD_PKT_BD_FLAGS_SFT 6
502 * This is the length in Bytes of the host physical buffer where data
503 * for the packet may be placed in host memory.
506 * While this is a Byte resolution value, it is often advantageous to
507 * ensure that the buffers provided end on a host cache line.
512 * The opaque data field is pass through to the completion and can be
513 * used for any data that the driver wants to associate with this
514 * receive buffer set.
519 * This is the host physical address where data for the packet may by
520 * placed in host memory.
523 * While this is a Byte resolution value, it is often advantageous to
524 * ensure that the buffers provide start on a host cache line.
527 } __attribute__((packed));
529 /* Completion Ring Structures */
530 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
531 /* Base Completion Record (16 bytes) */
535 * This field indicates the exact type of the completion. By convention,
536 * the LSB identifies the length of the record in 16B units. Even values
537 * indicate 16B records. Odd values indicate 32B records.
539 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
540 #define CMPL_BASE_TYPE_SFT 0
541 /* TX L2 completion: Completion of TX packet. Length = 16B */
542 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
544 * RX L2 completion: Completion of and L2 RX packet.
547 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
549 * RX Aggregation Buffer completion : Completion of an L2
550 * aggregation buffer in support of TPA, HDS, or Jumbo packet
551 * completion. Length = 16B
553 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
555 * RX L2 TPA Start Completion: Completion at the beginning of a
556 * TPA operation. Length = 32B
558 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
560 * RX L2 TPA End Completion: Completion at the end of a TPA
561 * operation. Length = 32B
563 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
565 * Statistics Ejection Completion: Completion of statistics data
566 * ejection buffer. Length = 16B
568 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
569 /* HWRM Command Completion: Completion of an HWRM command. */
570 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
571 /* Forwarded HWRM Request */
572 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
573 /* Forwarded HWRM Response */
574 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
575 /* HWRM Asynchronous Event Information */
576 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
577 /* CQ Notification */
578 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
579 /* SRQ Threshold Event */
580 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
581 /* DBQ Threshold Event */
582 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
583 /* QP Async Notification */
584 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
585 /* Function Async Notification */
586 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
593 * This value is written by the NIC such that it will be different for
594 * each pass through the completion queue. The even passes will write 1.
595 * The odd passes will write 0.
597 #define CMPL_BASE_V UINT32_C(0x1)
599 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
600 #define CMPL_BASE_INFO3_SFT 1
604 } __attribute__((packed));
606 /* TX Completion Record (16 bytes) */
609 * This field indicates the exact type of the completion. By convention,
610 * the LSB identifies the length of the record in 16B units. Even values
611 * indicate 16B records. Odd values indicate 32B records.
613 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
614 #define TX_CMPL_TYPE_SFT 0
615 /* TX L2 completion: Completion of TX packet. Length = 16B */
616 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
618 * When this bit is '1', it indicates a packet that has an error of some
619 * type. Type of error is indicated in error_flags.
621 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
623 * When this bit is '1', it indicates that the packet completed was
624 * transmitted using the push acceleration data provided by the driver.
625 * When this bit is '0', it indicates that the packet had not push
626 * acceleration data written or was executed as a normal packet even
627 * though push data was provided.
629 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
630 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
631 #define TX_CMPL_FLAGS_SFT 6
637 * This is a copy of the opaque field from the first TX BD of this
638 * transmitted packet.
643 * This value is written by the NIC such that it will be different for
644 * each pass through the completion queue. The even passes will write 1.
645 * The odd passes will write 0.
647 #define TX_CMPL_V UINT32_C(0x1)
649 * This error indicates that there was some sort of problem with the BDs
652 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
653 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
655 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
656 /* Bad Format: BDs were not formatted correctly. */
657 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
658 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
659 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
661 * When this bit is '1', it indicates that the length of the packet was
662 * zero. No packet was transmitted.
664 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
666 * When this bit is '1', it indicates that the packet was longer than
667 * the programmed limit in TDI. No packet was transmitted.
669 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
671 * When this bit is '1', it indicates that one or more of the BDs
672 * associated with this packet generated a PCI error. This probably
673 * means the address was not valid.
675 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
677 * When this bit is '1', it indicates that the packet was longer than
678 * indicated by the hint. No packet was transmitted.
680 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
682 * When this bit is '1', it indicates that the packet was dropped due to
683 * Poison TLP error on one or more of the TLPs in the PXP completion.
685 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
686 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
687 #define TX_CMPL_ERRORS_SFT 1
692 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
694 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
697 * This field indicates the exact type of the completion. By convention,
698 * the LSB identifies the length of the record in 16B units. Even values
699 * indicate 16B records. Odd values indicate 32B records.
701 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
702 #define RX_PKT_CMPL_TYPE_SFT 0
704 * RX L2 completion: Completion of and L2 RX packet.
707 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
709 * When this bit is '1', it indicates a packet that has an error of some
710 * type. Type of error is indicated in error_flags.
712 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
713 /* This field indicates how the packet was placed in the buffer. */
714 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
715 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
716 /* Normal: Packet was placed using normal algorithm. */
717 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
718 /* Jumbo: Packet was placed using jumbo algorithm. */
719 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
721 * Header/Data Separation: Packet was placed using Header/Data
722 * separation algorithm. The separation location is indicated by
725 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
726 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
727 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
728 /* This bit is '1' if the RSS field in this completion is valid. */
729 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
731 * This value indicates what the inner packet determined for the packet
734 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
735 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
736 /* Not Known: Indicates that the packet type was not known. */
737 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
739 * IP Packet: Indicates that the packet was an IP packet, but
740 * further classification was not possible.
742 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
744 * TCP Packet: Indicates that the packet was IP and TCP. This
745 * indicates that the payload_offset field is valid.
747 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
749 * UDP Packet: Indicates that the packet was IP and UDP. This
750 * indicates that the payload_offset field is valid.
752 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
754 * FCoE Packet: Indicates that the packet was recognized as a
755 * FCoE. This also indicates that the payload_offset field is
758 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
760 * RoCE Packet: Indicates that the packet was recognized as a
761 * RoCE. This also indicates that the payload_offset field is
764 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
766 * ICMP Packet: Indicates that the packet was recognized as
767 * ICMP. This indicates that the payload_offset field is valid.
769 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
771 * PtP packet wo/timestamp: Indicates that the packet was
772 * recognized as a PtP packet.
774 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
775 (UINT32_C(0x8) << 12)
777 * PtP packet w/timestamp: Indicates that the packet was
778 * recognized as a PtP packet and that a timestamp was taken for
781 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
782 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
783 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
784 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
785 #define RX_PKT_CMPL_FLAGS_SFT 6
789 * This is the length of the data for the packet stored in the buffer(s)
790 * identified by the opaque value. This includes the packet BD and any
791 * associated buffer BDs. This does not include the the length of any
792 * data places in aggregation BDs.
797 * This is a copy of the opaque field from the RX BD this completion
803 * This value is written by the NIC such that it will be different for
804 * each pass through the completion queue. The even passes will write 1.
805 * The odd passes will write 0.
807 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
809 * This value is the number of aggregation buffers that follow this
810 * entry in the completion ring that are a part of this packet. If the
811 * value is zero, then the packet is completely contained in the buffer
812 * space provided for the packet in the RX ring.
814 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
815 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
819 * This is the RSS hash type for the packet. The value is packed
820 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
822 uint8_t rss_hash_type;
825 * This value indicates the offset from the beginning of the packet
826 * where the inner payload starts. This value is valid for TCP, UDP,
827 * FCoE, and RoCE packets.
829 uint8_t payload_offset;
834 * This value is the RSS hash value calculated for the packet based on
835 * the mode bits and key value in the VNIC.
838 } __attribute__((packed));
840 /* last 16 bytes of RX Packet Completion Record */
841 struct rx_pkt_cmpl_hi {
843 * This indicates that the ip checksum was calculated for the inner
844 * packet and that the ip_cs_error field indicates if there was an
847 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
849 * This indicates that the TCP, UDP or ICMP checksum was calculated for
850 * the inner packet and that the l4_cs_error field indicates if there
853 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
855 * This indicates that the ip checksum was calculated for the tunnel
856 * header and that the t_ip_cs_error field indicates if there was an
859 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
861 * This indicates that the UDP checksum was calculated for the tunnel
862 * packet and that the t_l4_cs_error field indicates if there was an
865 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
866 /* This value indicates what format the metadata field is. */
867 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
868 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
869 /* No metadata informtaion. Value is zero. */
870 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
872 * The metadata field contains the VLAN tag and TPID value. -
873 * metadata[11:0] contains the vlan VID value. - metadata[12]
874 * contains the vlan DE value. - metadata[15:13] contains the
875 * vlan PRI value. - metadata[31:16] contains the vlan TPID
878 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
879 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
880 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
882 * This field indicates the IP type for the inner-most IP header. A
883 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
884 * value is only valid if itype indicates a packet with an IP header.
886 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
890 * This is data from the CFA block as indicated by the meta_format
893 /* When meta_format=1, this value is the VLAN VID. */
894 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
895 #define RX_PKT_CMPL_METADATA_VID_SFT 0
896 /* When meta_format=1, this value is the VLAN DE. */
897 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
898 /* When meta_format=1, this value is the VLAN PRI. */
899 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
900 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
901 /* When meta_format=1, this value is the VLAN TPID. */
902 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
903 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
907 * This value is written by the NIC such that it will be different for
908 * each pass through the completion queue. The even passes will write 1.
909 * The odd passes will write 0.
911 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
913 * This error indicates that there was some sort of problem with the BDs
914 * for the packet that was found after part of the packet was already
915 * placed. The packet should be treated as invalid.
917 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
918 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
919 /* No buffer error */
920 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
923 * Did Not Fit: Packet did not fit into packet buffer provided.
924 * For regular placement, this means the packet did not fit in
925 * the buffer provided. For HDS and jumbo placement, this means
926 * that the packet could not be placed into 7 physical buffers
929 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
932 * Not On Chip: All BDs needed for the packet were not on-chip
933 * when the packet arrived.
935 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
937 /* Bad Format: BDs were not formatted correctly. */
938 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
940 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
941 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
942 /* This indicates that there was an error in the IP header checksum. */
943 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
945 * This indicates that there was an error in the TCP, UDP or ICMP
948 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
950 * This indicates that there was an error in the tunnel IP header
953 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
954 /* This indicates that there was an error in the tunnel UDP checksum. */
955 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
957 * This indicates that there was a CRC error on either an FCoE or RoCE
958 * packet. The itype indicates the packet type.
960 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
962 * This indicates that there was an error in the tunnel portion of the
963 * packet when this field is non-zero.
965 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
966 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
968 * No additional error occurred on the tunnel portion of the
969 * packet of the packet does not have a tunnel.
971 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
973 * Indicates that IP header version does not match expectation
974 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
976 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
979 * Indicates that header length is out of range in the tunnel
980 * header. Valid for IPv4.
982 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
985 * Indicates that the physical packet is shorter than that
986 * claimed by the PPPoE header length for a tunnel PPPoE packet.
988 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
991 * Indicates that physical packet is shorter than that claimed
992 * by the tunnel l3 header length. Valid for IPv4, or IPv6
993 * tunnel packet packets.
995 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
998 * Indicates that the physical packet is shorter than that
999 * claimed by the tunnel UDP header length for a tunnel UDP
1000 * packet that is not fragmented.
1002 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1003 (UINT32_C(0x5) << 9)
1005 * indicates that the IPv4 TTL or IPv6 hop limit check have
1006 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1009 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1010 (UINT32_C(0x6) << 9)
1011 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1012 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1014 * This indicates that there was an error in the inner portion of the
1015 * packet when this field is non-zero.
1017 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1018 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1020 * No additional error occurred on the tunnel portion of the
1021 * packet of the packet does not have a tunnel.
1023 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1025 * Indicates that IP header version does not match expectation
1026 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1027 * VFT was parsed on FCoE packet.
1029 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1030 (UINT32_C(0x1) << 12)
1032 * indicates that header length is out of range. Valid for IPv4
1035 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1036 (UINT32_C(0x2) << 12)
1038 * indicates that the IPv4 TTL or IPv6 hop limit check have
1039 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1041 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1043 * Indicates that physical packet is shorter than that claimed
1044 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1047 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1048 (UINT32_C(0x4) << 12)
1050 * Indicates that the physical packet is shorter than that
1051 * claimed by the UDP header length for a UDP packet that is not
1054 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1055 (UINT32_C(0x5) << 12)
1057 * Indicates that TCP header length > IP payload. Valid for TCP
1060 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1061 (UINT32_C(0x6) << 12)
1062 /* Indicates that TCP header length < 5. Valid for TCP. */
1063 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1064 (UINT32_C(0x7) << 12)
1066 * Indicates that TCP option headers result in a TCP header size
1067 * that does not match data offset in TCP header. Valid for TCP.
1069 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1070 (UINT32_C(0x8) << 12)
1071 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1072 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1073 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1074 #define RX_PKT_CMPL_ERRORS_SFT 1
1078 * This field identifies the CFA action rule that was used for this
1084 * This value holds the reordering sequence number for the packet. If
1085 * the reordering sequence is not valid, then this value is zero. The
1086 * reordering domain for the packet is in the bottom 8 to 10b of the
1087 * rss_hash value. The bottom 20b of this value contain the ordering
1088 * domain value for the packet.
1090 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1091 #define RX_PKT_CMPL_REORDER_SFT 0
1093 } __attribute__((packed));
1095 /* HWRM Forwarded Request (16 bytes) */
1096 struct hwrm_fwd_req_cmpl {
1097 /* Length of forwarded request in bytes. */
1099 * This field indicates the exact type of the completion. By convention,
1100 * the LSB identifies the length of the record in 16B units. Even values
1101 * indicate 16B records. Odd values indicate 32B records.
1103 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1104 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1105 /* Forwarded HWRM Request */
1106 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1107 /* Length of forwarded request in bytes. */
1108 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1109 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1110 uint16_t req_len_type;
1113 * Source ID of this request. Typically used in forwarding requests and
1114 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1115 * Reserved for internal processors 0xFFFF - HWRM
1121 /* Address of forwarded request. */
1123 * This value is written by the NIC such that it will be different for
1124 * each pass through the completion queue. The even passes will write 1.
1125 * The odd passes will write 0.
1127 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1128 /* Address of forwarded request. */
1129 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1130 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1131 uint64_t req_buf_addr_v;
1132 } __attribute__((packed));
1134 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1135 struct hwrm_async_event_cmpl {
1137 * This field indicates the exact type of the completion. By convention,
1138 * the LSB identifies the length of the record in 16B units. Even values
1139 * indicate 16B records. Odd values indicate 32B records.
1141 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1142 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1143 /* HWRM Asynchronous Event Information */
1144 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1145 (UINT32_C(0x2e) << 0)
1148 /* Identifiers of events. */
1149 /* Link status changed */
1150 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1151 (UINT32_C(0x0) << 0)
1152 /* Link MTU changed */
1153 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1154 (UINT32_C(0x1) << 0)
1155 /* Link speed changed */
1156 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1157 (UINT32_C(0x2) << 0)
1158 /* DCB Configuration changed */
1159 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1160 (UINT32_C(0x3) << 0)
1161 /* Port connection not allowed */
1162 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1163 (UINT32_C(0x4) << 0)
1164 /* Link speed configuration was not allowed */
1165 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1166 (UINT32_C(0x5) << 0)
1167 /* Function driver unloaded */
1168 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1169 (UINT32_C(0x10) << 0)
1170 /* Function driver loaded */
1171 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1172 (UINT32_C(0x11) << 0)
1173 /* PF driver unloaded */
1174 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1175 (UINT32_C(0x20) << 0)
1176 /* PF driver loaded */
1177 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1178 (UINT32_C(0x21) << 0)
1179 /* VF Function Level Reset (FLR) */
1180 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1181 /* VF MAC Address Change */
1182 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1183 (UINT32_C(0x31) << 0)
1184 /* PF-VF communication channel status change. */
1185 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1186 (UINT32_C(0x32) << 0)
1188 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1189 (UINT32_C(0xff) << 0)
1192 /* Event specific data */
1193 uint32_t event_data2;
1197 * This value is written by the NIC such that it will be different for
1198 * each pass through the completion queue. The even passes will write 1.
1199 * The odd passes will write 0.
1201 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1203 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1204 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1207 /* 8-lsb timestamp from POR (100-msec resolution) */
1208 uint8_t timestamp_lo;
1210 /* 16-lsb timestamp from POR (100-msec resolution) */
1211 uint16_t timestamp_hi;
1213 /* Event specific data */
1214 uint32_t event_data1;
1215 } __attribute__((packed));
1218 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1219 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1220 * processors inside the chip. This firmware is vital part of the chip's
1221 * hardware. The chip can not be used by driver without it.
1224 /* Input (16 bytes) */
1227 * This value indicates what type of request this is. The format for the
1228 * rest of the command is determined by this field.
1233 * This value indicates the what completion ring the request will be
1234 * optionally completed on. If the value is -1, then no CR completion
1235 * will be generated. Any other value must be a valid CR ring_id value
1236 * for this function.
1240 /* This value indicates the command sequence number. */
1244 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1245 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1250 * This is the host address where the response will be written when the
1251 * request is complete. This area must be 16B aligned and must be
1252 * cleared to zero before the request is made.
1255 } __attribute__((packed));
1257 /* Output (8 bytes) */
1260 * Pass/Fail or error type Note: receiver to verify the in parameters,
1261 * and fail the call with an error when appropriate
1263 uint16_t error_code;
1265 /* This field returns the type of original request. */
1268 /* This field provides original sequence number of the command. */
1272 * This field is the length of the response in bytes. The last byte of
1273 * the response is a valid flag that will read as '1' when the command
1274 * has been completely written to memory.
1277 } __attribute__((packed));
1279 /* hwrm_cfa_l2_filter_alloc */
1281 * A filter is used to identify traffic that contains a matching set of
1282 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1283 * other things which then allows the ASIC to direct the incoming traffic
1284 * to an appropriate VNIC or Rx ring.
1287 /* Input (96 bytes) */
1288 struct hwrm_cfa_l2_filter_alloc_input {
1290 * This value indicates what type of request this is. The format for the
1291 * rest of the command is determined by this field.
1296 * This value indicates the what completion ring the request will be
1297 * optionally completed on. If the value is -1, then no CR completion
1298 * will be generated. Any other value must be a valid CR ring_id value
1299 * for this function.
1303 /* This value indicates the command sequence number. */
1307 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1308 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1313 * This is the host address where the response will be written when the
1314 * request is complete. This area must be 16B aligned and must be
1315 * cleared to zero before the request is made.
1320 * Enumeration denoting the RX, TX type of the resource. This
1321 * enumeration is used for resources that are similar for both TX and RX
1322 * paths of the chip.
1324 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1327 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1328 (UINT32_C(0x0) << 0)
1330 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1331 (UINT32_C(0x1) << 0)
1332 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1333 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1335 * Setting of this flag indicates the applicability to the loopback
1338 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1341 * Setting of this flag indicates drop action. If this flag is not set,
1342 * then it should be considered accept action.
1344 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1347 * If this flag is set, all t_l2_* fields are invalid and they should
1348 * not be specified. If this flag is set, then l2_* fields refer to
1349 * fields of outermost L2 header.
1351 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1355 /* This bit must be '1' for the l2_addr field to be configured. */
1356 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1358 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1359 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1361 /* This bit must be '1' for the l2_ovlan field to be configured. */
1362 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1364 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1365 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1367 /* This bit must be '1' for the l2_ivlan field to be configured. */
1368 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1370 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1371 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1373 /* This bit must be '1' for the t_l2_addr field to be configured. */
1374 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1377 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1379 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1381 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1382 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1385 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1387 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1389 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1390 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1393 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1395 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1397 /* This bit must be '1' for the src_type field to be configured. */
1398 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1400 /* This bit must be '1' for the src_id field to be configured. */
1401 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1403 /* This bit must be '1' for the tunnel_type field to be configured. */
1404 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1406 /* This bit must be '1' for the dst_id field to be configured. */
1407 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1410 * This bit must be '1' for the mirror_vnic_id field to be configured.
1412 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1417 * This value sets the match value for the L2 MAC address. Destination
1418 * MAC address for RX path. Source MAC address for TX path.
1426 * This value sets the mask value for the L2 address. A value of 0 will
1427 * mask the corresponding bit from compare.
1429 uint8_t l2_addr_mask[6];
1431 /* This value sets VLAN ID value for outer VLAN. */
1435 * This value sets the mask value for the ovlan id. A value of 0 will
1436 * mask the corresponding bit from compare.
1438 uint16_t l2_ovlan_mask;
1440 /* This value sets VLAN ID value for inner VLAN. */
1444 * This value sets the mask value for the ivlan id. A value of 0 will
1445 * mask the corresponding bit from compare.
1447 uint16_t l2_ivlan_mask;
1453 * This value sets the match value for the tunnel L2 MAC address.
1454 * Destination MAC address for RX path. Source MAC address for TX path.
1456 uint8_t t_l2_addr[6];
1462 * This value sets the mask value for the tunnel L2 address. A value of
1463 * 0 will mask the corresponding bit from compare.
1465 uint8_t t_l2_addr_mask[6];
1467 /* This value sets VLAN ID value for tunnel outer VLAN. */
1468 uint16_t t_l2_ovlan;
1471 * This value sets the mask value for the tunnel ovlan id. A value of 0
1472 * will mask the corresponding bit from compare.
1474 uint16_t t_l2_ovlan_mask;
1476 /* This value sets VLAN ID value for tunnel inner VLAN. */
1477 uint16_t t_l2_ivlan;
1480 * This value sets the mask value for the tunnel ivlan id. A value of 0
1481 * will mask the corresponding bit from compare.
1483 uint16_t t_l2_ivlan_mask;
1485 /* This value identifies the type of source of the packet. */
1487 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1488 (UINT32_C(0x0) << 0)
1489 /* Physical function */
1490 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1491 (UINT32_C(0x1) << 0)
1492 /* Virtual function */
1493 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1494 (UINT32_C(0x2) << 0)
1495 /* Virtual NIC of a function */
1496 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1497 (UINT32_C(0x3) << 0)
1498 /* Embedded processor for CFA management */
1499 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1500 (UINT32_C(0x4) << 0)
1501 /* Embedded processor for OOB management */
1502 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1503 (UINT32_C(0x5) << 0)
1504 /* Embedded processor for RoCE */
1505 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1506 (UINT32_C(0x6) << 0)
1507 /* Embedded processor for network proxy functions */
1508 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1509 (UINT32_C(0x7) << 0)
1514 * This value is the id of the source. For a network port, it represents
1515 * port_id. For a physical function, it represents fid. For a virtual
1516 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1517 * embedded processors, this id is not valid. Notes: 1. The function ID
1518 * is implied if it src_id is not provided for a src_type that is either
1524 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1525 (UINT32_C(0x0) << 0)
1526 /* Virtual eXtensible Local Area Network (VXLAN) */
1527 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1528 (UINT32_C(0x1) << 0)
1530 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1532 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1533 (UINT32_C(0x2) << 0)
1535 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1537 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1538 (UINT32_C(0x3) << 0)
1540 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1541 (UINT32_C(0x4) << 0)
1542 /* Generic Network Virtualization Encapsulation (Geneve) */
1543 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1544 (UINT32_C(0x5) << 0)
1545 /* Multi-Protocol Lable Switching (MPLS) */
1546 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1547 (UINT32_C(0x6) << 0)
1548 /* Stateless Transport Tunnel (STT) */
1549 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1550 (UINT32_C(0x7) << 0)
1552 * Generic Routing Encapsulation (GRE) inside IP datagram
1555 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1556 (UINT32_C(0x8) << 0)
1557 /* Any tunneled traffic */
1558 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1559 (UINT32_C(0xff) << 0)
1560 uint8_t tunnel_type;
1565 * If set, this value shall represent the Logical VNIC ID of the
1566 * destination VNIC for the RX path and network port id of the
1567 * destination port for the TX path.
1571 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1572 uint16_t mirror_vnic_id;
1575 * This hint is provided to help in placing the filter in the filter
1579 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1580 (UINT32_C(0x0) << 0)
1581 /* Above the given filter */
1582 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1583 (UINT32_C(0x1) << 0)
1584 /* Below the given filter */
1585 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1586 (UINT32_C(0x2) << 0)
1587 /* As high as possible */
1588 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1589 (UINT32_C(0x3) << 0)
1590 /* As low as possible */
1591 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1592 (UINT32_C(0x4) << 0)
1599 * This is the ID of the filter that goes along with the pri_hint. This
1600 * field is valid only for the following values. 1 - Above the given
1601 * filter 2 - Below the given filter
1603 uint64_t l2_filter_id_hint;
1604 } __attribute__((packed));
1606 /* Output (24 bytes) */
1607 struct hwrm_cfa_l2_filter_alloc_output {
1609 * Pass/Fail or error type Note: receiver to verify the in parameters,
1610 * and fail the call with an error when appropriate
1612 uint16_t error_code;
1614 /* This field returns the type of original request. */
1617 /* This field provides original sequence number of the command. */
1621 * This field is the length of the response in bytes. The last byte of
1622 * the response is a valid flag that will read as '1' when the command
1623 * has been completely written to memory.
1628 * This value identifies a set of CFA data structures used for an L2
1631 uint64_t l2_filter_id;
1634 * This is the ID of the flow associated with this filter. This value
1635 * shall be used to match and associate the flow identifier returned in
1636 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1645 * This field is used in Output records to indicate that the output is
1646 * completely written to RAM. This field should be read as '1' to
1647 * indicate that the output has been completely written. When writing a
1648 * command completion or response to an internal processor, the order of
1649 * writes has to be such that this field is written last.
1652 } __attribute__((packed));
1654 /* hwrm_cfa_l2_filter_free */
1656 * Description: Free a L2 filter. The HWRM shall free all associated filter
1657 * resources with the L2 filter.
1660 /* Input (24 bytes) */
1661 struct hwrm_cfa_l2_filter_free_input {
1663 * This value indicates what type of request this is. The format for the
1664 * rest of the command is determined by this field.
1669 * This value indicates the what completion ring the request will be
1670 * optionally completed on. If the value is -1, then no CR completion
1671 * will be generated. Any other value must be a valid CR ring_id value
1672 * for this function.
1676 /* This value indicates the command sequence number. */
1680 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1681 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1686 * This is the host address where the response will be written when the
1687 * request is complete. This area must be 16B aligned and must be
1688 * cleared to zero before the request is made.
1693 * This value identifies a set of CFA data structures used for an L2
1696 uint64_t l2_filter_id;
1697 } __attribute__((packed));
1699 /* Output (16 bytes) */
1700 struct hwrm_cfa_l2_filter_free_output {
1702 * Pass/Fail or error type Note: receiver to verify the in parameters,
1703 * and fail the call with an error when appropriate
1705 uint16_t error_code;
1707 /* This field returns the type of original request. */
1710 /* This field provides original sequence number of the command. */
1714 * This field is the length of the response in bytes. The last byte of
1715 * the response is a valid flag that will read as '1' when the command
1716 * has been completely written to memory.
1726 * This field is used in Output records to indicate that the output is
1727 * completely written to RAM. This field should be read as '1' to
1728 * indicate that the output has been completely written. When writing a
1729 * command completion or response to an internal processor, the order of
1730 * writes has to be such that this field is written last.
1733 } __attribute__((packed));
1735 /* hwrm_exec_fwd_resp */
1737 * Description: This command is used to send an encapsulated request to the
1738 * HWRM. This command instructs the HWRM to execute the request and forward the
1739 * response of the encapsulated request to the location specified in the
1740 * original request that is encapsulated. The target id of this command shall be
1741 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1742 * acknowledge the receipt of the encapsulated request and forwarding of the
1746 /* Input (128 bytes) */
1747 struct hwrm_exec_fwd_resp_input {
1749 * This value indicates what type of request this is. The format for the
1750 * rest of the command is determined by this field.
1755 * This value indicates the what completion ring the request will be
1756 * optionally completed on. If the value is -1, then no CR completion
1757 * will be generated. Any other value must be a valid CR ring_id value
1758 * for this function.
1762 /* This value indicates the command sequence number. */
1766 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1767 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1772 * This is the host address where the response will be written when the
1773 * request is complete. This area must be 16B aligned and must be
1774 * cleared to zero before the request is made.
1779 * This is an encapsulated request. This request should be executed by
1780 * the HWRM and the response should be provided in the response buffer
1781 * inside the encapsulated request.
1783 uint32_t encap_request[26];
1786 * This value indicates the target id of the response to the
1787 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1788 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1790 uint16_t encap_resp_target_id;
1792 uint16_t unused_0[3];
1793 } __attribute__((packed));
1795 /* Output (16 bytes) */
1796 struct hwrm_exec_fwd_resp_output {
1798 * Pass/Fail or error type Note: receiver to verify the in parameters,
1799 * and fail the call with an error when appropriate
1801 uint16_t error_code;
1803 /* This field returns the type of original request. */
1806 /* This field provides original sequence number of the command. */
1810 * This field is the length of the response in bytes. The last byte of
1811 * the response is a valid flag that will read as '1' when the command
1812 * has been completely written to memory.
1822 * This field is used in Output records to indicate that the output is
1823 * completely written to RAM. This field should be read as '1' to
1824 * indicate that the output has been completely written. When writing a
1825 * command completion or response to an internal processor, the order of
1826 * writes has to be such that this field is written last.
1829 } __attribute__((packed));
1831 /* hwrm_func_qcaps */
1833 * Description: This command returns capabilities of a function. The input FID
1834 * value is used to indicate what function is being queried. This allows a
1835 * physical function driver to query virtual functions that are children of the
1836 * physical function. The output FID value is needed to configure Rings and
1837 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1840 /* Input (24 bytes) */
1841 struct hwrm_func_qcaps_input {
1843 * This value indicates what type of request this is. The format for the
1844 * rest of the command is determined by this field.
1849 * This value indicates the what completion ring the request will be
1850 * optionally completed on. If the value is -1, then no CR completion
1851 * will be generated. Any other value must be a valid CR ring_id value
1852 * for this function.
1856 /* This value indicates the command sequence number. */
1860 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1861 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1866 * This is the host address where the response will be written when the
1867 * request is complete. This area must be 16B aligned and must be
1868 * cleared to zero before the request is made.
1873 * Function ID of the function that is being queried. 0xFF... (All Fs)
1874 * if the query is for the requesting function.
1878 uint16_t unused_0[3];
1879 } __attribute__((packed));
1881 /* Output (80 bytes) */
1882 struct hwrm_func_qcaps_output {
1884 * Pass/Fail or error type Note: receiver to verify the in parameters,
1885 * and fail the call with an error when appropriate
1887 uint16_t error_code;
1889 /* This field returns the type of original request. */
1892 /* This field provides original sequence number of the command. */
1896 * This field is the length of the response in bytes. The last byte of
1897 * the response is a valid flag that will read as '1' when the command
1898 * has been completely written to memory.
1903 * FID value. This value is used to identify operations on the PCI bus
1904 * as belonging to a particular PCI function.
1909 * Port ID of port that this function is associated with. Valid only for
1910 * the PF. 0xFF... (All Fs) if this function is not associated with any
1911 * port. 0xFF... (All Fs) if this function is called from a VF.
1915 /* If 1, then Push mode is supported on this function. */
1916 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
1918 * If 1, then the global MSI-X auto-masking is enabled for the device.
1920 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
1923 * If 1, then the Precision Time Protocol (PTP) processing is supported
1924 * on this function. The HWRM should enable PTP on only a single
1925 * Physical Function (PF) per port.
1927 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
1931 * This value is current MAC address configured for this function. A
1932 * value of 00-00-00-00-00-00 indicates no MAC address is currently
1935 uint8_t perm_mac_address[6];
1938 * The maximum number of RSS/COS contexts that can be allocated to the
1941 uint16_t max_rsscos_ctx;
1944 * The maximum number of completion rings that can be allocated to the
1947 uint16_t max_cmpl_rings;
1950 * The maximum number of transmit rings that can be allocated to the
1953 uint16_t max_tx_rings;
1956 * The maximum number of receive rings that can be allocated to the
1959 uint16_t max_rx_rings;
1962 * The maximum number of L2 contexts that can be allocated to the
1965 uint16_t max_l2_ctxs;
1967 /* The maximum number of VNICs that can be allocated to the function. */
1971 * The identifier for the first VF enabled on a PF. This is valid only
1972 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
1973 * called on a PF with SR-IOV disabled or on a VF.
1975 uint16_t first_vf_id;
1978 * The maximum number of VFs that can be allocated to the function. This
1979 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
1980 * command is called on a PF with SR-IOV disabled or on a VF.
1985 * The maximum number of statistic contexts that can be allocated to the
1988 uint16_t max_stat_ctx;
1991 * The maximum number of Encapsulation records that can be offloaded by
1994 uint32_t max_encap_records;
1997 * The maximum number of decapsulation records that can be offloaded by
2000 uint32_t max_decap_records;
2003 * The maximum number of Exact Match (EM) flows that can be offloaded by
2004 * this function on the TX side.
2006 uint32_t max_tx_em_flows;
2009 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2010 * by this function on the TX side.
2012 uint32_t max_tx_wm_flows;
2015 * The maximum number of Exact Match (EM) flows that can be offloaded by
2016 * this function on the RX side.
2018 uint32_t max_rx_em_flows;
2021 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2022 * by this function on the RX side.
2024 uint32_t max_rx_wm_flows;
2027 * The maximum number of multicast filters that can be supported by this
2028 * function on the RX side.
2030 uint32_t max_mcast_filters;
2033 * The maximum value of flow_id that can be supported in completion
2036 uint32_t max_flow_id;
2039 * The maximum number of HW ring groups that can be supported on this
2042 uint32_t max_hw_ring_grps;
2049 * This field is used in Output records to indicate that the output is
2050 * completely written to RAM. This field should be read as '1' to
2051 * indicate that the output has been completely written. When writing a
2052 * command completion or response to an internal processor, the order of
2053 * writes has to be such that this field is written last.
2056 } __attribute__((packed));
2058 /* hwrm_func_reset */
2060 * Description: This command resets a hardware function (PCIe function) and
2061 * frees any resources used by the function. This command shall be initiated by
2062 * the driver after an FLR has occurred to prepare the function for re-use. This
2063 * command may also be initiated by a driver prior to doing it's own
2064 * configuration. This command puts the function into the reset state. In the
2065 * reset state, global and port related features of the chip are not available.
2068 * Note: This command will reset a function that has already been disabled or
2069 * idled. The command returns all the resources owned by the function so a new
2070 * driver may allocate and configure resources normally.
2073 /* Input (24 bytes) */
2074 struct hwrm_func_reset_input {
2076 * This value indicates what type of request this is. The format for the
2077 * rest of the command is determined by this field.
2082 * This value indicates the what completion ring the request will be
2083 * optionally completed on. If the value is -1, then no CR completion
2084 * will be generated. Any other value must be a valid CR ring_id value
2085 * for this function.
2089 /* This value indicates the command sequence number. */
2093 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2094 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2099 * This is the host address where the response will be written when the
2100 * request is complete. This area must be 16B aligned and must be
2101 * cleared to zero before the request is made.
2105 /* This bit must be '1' for the vf_id_valid field to be configured. */
2106 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2111 * The ID of the VF that this PF is trying to reset. Only the parent PF
2112 * shall be allowed to reset a child VF. A parent PF driver shall use
2113 * this field only when a specific child VF is requested to be reset.
2117 /* This value indicates the level of a function reset. */
2119 * Reset the caller function and its children VFs (if any). If
2120 * no children functions exist, then reset the caller function
2123 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2124 (UINT32_C(0x0) << 0)
2125 /* Reset the caller function only */
2126 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2127 (UINT32_C(0x1) << 0)
2129 * Reset all children VFs of the caller function driver if the
2130 * caller is a PF driver. It is an error to specify this level
2131 * by a VF driver. It is an error to specify this level by a PF
2132 * driver with no children VFs.
2134 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2135 (UINT32_C(0x2) << 0)
2137 * Reset a specific VF of the caller function driver if the
2138 * caller is the parent PF driver. It is an error to specify
2139 * this level by a VF driver. It is an error to specify this
2140 * level by a PF driver that is not the parent of the VF that is
2141 * being requested to reset.
2143 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2144 (UINT32_C(0x3) << 0)
2145 uint8_t func_reset_level;
2148 } __attribute__((packed));
2150 /* Output (16 bytes) */
2151 struct hwrm_func_reset_output {
2153 * Pass/Fail or error type Note: receiver to verify the in parameters,
2154 * and fail the call with an error when appropriate
2156 uint16_t error_code;
2158 /* This field returns the type of original request. */
2161 /* This field provides original sequence number of the command. */
2165 * This field is the length of the response in bytes. The last byte of
2166 * the response is a valid flag that will read as '1' when the command
2167 * has been completely written to memory.
2177 * This field is used in Output records to indicate that the output is
2178 * completely written to RAM. This field should be read as '1' to
2179 * indicate that the output has been completely written. When writing a
2180 * command completion or response to an internal processor, the order of
2181 * writes has to be such that this field is written last.
2184 } __attribute__((packed));
2186 /* hwrm_port_phy_cfg */
2188 * Description: This command configures the PHY device for the port. It allows
2189 * setting of the most generic settings for the PHY. The HWRM shall complete
2190 * this command as soon as PHY settings are configured. They may not be applied
2191 * when the command response is provided. A VF driver shall not be allowed to
2192 * configure PHY using this command. In a network partition mode, a PF driver
2193 * shall not be allowed to configure PHY using this command.
2196 /* Input (56 bytes) */
2197 struct hwrm_port_phy_cfg_input {
2199 * This value indicates what type of request this is. The format for the
2200 * rest of the command is determined by this field.
2205 * This value indicates the what completion ring the request will be
2206 * optionally completed on. If the value is -1, then no CR completion
2207 * will be generated. Any other value must be a valid CR ring_id value
2208 * for this function.
2212 /* This value indicates the command sequence number. */
2216 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2217 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2222 * This is the host address where the response will be written when the
2223 * request is complete. This area must be 16B aligned and must be
2224 * cleared to zero before the request is made.
2229 * When this bit is set to '1', the PHY for the port shall be reset. #
2230 * If this bit is set to 1, then the HWRM shall reset the PHY after
2231 * applying PHY configuration changes specified in this command. # In
2232 * order to guarantee that PHY configuration changes specified in this
2233 * command take effect, the HWRM client should set this flag to 1. # If
2234 * this bit is not set to 1, then the HWRM may reset the PHY depending
2235 * on the current PHY configuration and settings specified in this
2238 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2240 * When this bit is set to '1', the link shall be forced to be taken
2241 * down. # When this bit is set to '1", all other command input settings
2242 * related to the link speed shall be ignored. Once the link state is
2243 * forced down, it can be explicitly cleared from that state by setting
2244 * this flag to '0'. # If this flag is set to '0', then the link shall
2245 * be cleared from forced down state if the link is in forced down
2246 * state. There may be conditions (e.g. out-of-band or sideband
2247 * configuration changes for the link) outside the scope of the HWRM
2248 * implementation that may clear forced down link state.
2250 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2252 * When this bit is set to '1', the link shall be forced to the
2253 * force_link_speed value. When this bit is set to '1', the HWRM client
2254 * should not enable any of the auto negotiation related fields
2255 * represented by auto_XXX fields in this command. When this bit is set
2256 * to '1' and the HWRM client has enabled a auto_XXX field in this
2257 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2258 * this bit is set to zero, the link shall be allowed to autoneg.
2260 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2262 * When this bit is set to '1', the auto-negotiation process shall be
2263 * restarted on the link.
2265 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2267 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2268 * requested to be enabled on this link. If EEE is not supported on this
2269 * port, then this flag shall be ignored by the HWRM.
2271 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2273 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2274 * requested to be disabled on this link. If EEE is not supported on
2275 * this port, then this flag shall be ignored by the HWRM.
2277 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2279 * When this bit is set to '1' and EEE is enabled on this link, then TX
2280 * LPI is requested to be enabled on the link. If EEE is not supported
2281 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2282 * disabled on this port, then this flag shall be ignored by the HWRM.
2284 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2287 /* This bit must be '1' for the auto_mode field to be configured. */
2288 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2289 /* This bit must be '1' for the auto_duplex field to be configured. */
2290 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2291 /* This bit must be '1' for the auto_pause field to be configured. */
2292 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2294 * This bit must be '1' for the auto_link_speed field to be configured.
2296 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2298 * This bit must be '1' for the auto_link_speed_mask field to be
2301 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2303 /* This bit must be '1' for the wirespeed field to be configured. */
2304 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2305 /* This bit must be '1' for the lpbk field to be configured. */
2306 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2307 /* This bit must be '1' for the preemphasis field to be configured. */
2308 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2309 /* This bit must be '1' for the force_pause field to be configured. */
2310 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2312 * This bit must be '1' for the eee_link_speed_mask field to be
2315 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2317 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2318 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2321 /* Port ID of port that is to be configured. */
2325 * This is the speed that will be used if the force bit is '1'. If
2326 * unsupported speed is selected, an error will be generated.
2328 /* 100Mb link speed */
2329 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2330 (UINT32_C(0x1) << 0)
2331 /* 1Gb link speed */
2332 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2333 (UINT32_C(0xa) << 0)
2334 /* 2Gb link speed */
2335 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2336 (UINT32_C(0x14) << 0)
2337 /* 2.5Gb link speed */
2338 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2339 (UINT32_C(0x19) << 0)
2340 /* 10Gb link speed */
2341 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2342 (UINT32_C(0x64) << 0)
2343 /* 20Mb link speed */
2344 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2345 (UINT32_C(0xc8) << 0)
2346 /* 25Gb link speed */
2347 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2348 (UINT32_C(0xfa) << 0)
2349 /* 40Gb link speed */
2350 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2351 (UINT32_C(0x190) << 0)
2352 /* 50Gb link speed */
2353 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2354 (UINT32_C(0x1f4) << 0)
2355 /* 100Gb link speed */
2356 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2357 (UINT32_C(0x3e8) << 0)
2358 /* 10Mb link speed */
2359 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2360 (UINT32_C(0xffff) << 0)
2361 uint16_t force_link_speed;
2364 * This value is used to identify what autoneg mode is used when the
2365 * link speed is not being forced.
2368 * Disable autoneg or autoneg disabled. No speeds are selected.
2370 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2371 /* Select all possible speeds for autoneg mode. */
2372 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2373 (UINT32_C(0x1) << 0)
2375 * Select only the auto_link_speed speed for autoneg mode. This
2376 * mode has been DEPRECATED. An HWRM client should not use this
2379 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2380 (UINT32_C(0x2) << 0)
2382 * Select the auto_link_speed or any speed below that speed for
2383 * autoneg. This mode has been DEPRECATED. An HWRM client should
2384 * not use this mode.
2386 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2387 (UINT32_C(0x3) << 0)
2389 * Select the speeds based on the corresponding link speed mask
2390 * value that is provided.
2392 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2393 (UINT32_C(0x4) << 0)
2397 * This is the duplex setting that will be used if the autoneg_mode is
2398 * "one_speed" or "one_or_below".
2400 /* Half Duplex will be requested. */
2401 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2402 (UINT32_C(0x0) << 0)
2403 /* Full duplex will be requested. */
2404 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2405 (UINT32_C(0x1) << 0)
2406 /* Both Half and Full dupex will be requested. */
2407 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2408 (UINT32_C(0x2) << 0)
2409 uint8_t auto_duplex;
2412 * This value is used to configure the pause that will be used for
2413 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2416 * When this bit is '1', Generation of tx pause messages has been
2417 * requested. Disabled otherwise.
2419 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2421 * When this bit is '1', Reception of rx pause messages has been
2422 * requested. Disabled otherwise.
2424 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2426 * When set to 1, the advertisement of pause is enabled. # When the
2427 * auto_mode is not set to none and this flag is set to 1, then the
2428 * auto_pause bits on this port are being advertised and autoneg pause
2429 * results are being interpreted. # When the auto_mode is not set to
2430 * none and this flag is set to 0, the pause is forced as indicated in
2431 * force_pause, and also advertised as auto_pause bits, but the autoneg
2432 * results are not interpreted since the pause configuration is being
2433 * forced. # When the auto_mode is set to none and this flag is set to
2434 * 1, auto_pause bits should be ignored and should be set to 0.
2436 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2442 * This is the speed that will be used if the autoneg_mode is
2443 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2444 * an error will be generated.
2446 /* 100Mb link speed */
2447 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2448 (UINT32_C(0x1) << 0)
2449 /* 1Gb link speed */
2450 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2451 (UINT32_C(0xa) << 0)
2452 /* 2Gb link speed */
2453 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2454 (UINT32_C(0x14) << 0)
2455 /* 2.5Gb link speed */
2456 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2457 (UINT32_C(0x19) << 0)
2458 /* 10Gb link speed */
2459 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2460 (UINT32_C(0x64) << 0)
2461 /* 20Mb link speed */
2462 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2463 (UINT32_C(0xc8) << 0)
2464 /* 25Gb link speed */
2465 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2466 (UINT32_C(0xfa) << 0)
2467 /* 40Gb link speed */
2468 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2469 (UINT32_C(0x190) << 0)
2470 /* 50Gb link speed */
2471 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2472 (UINT32_C(0x1f4) << 0)
2473 /* 100Gb link speed */
2474 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2475 (UINT32_C(0x3e8) << 0)
2476 /* 10Mb link speed */
2477 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2478 (UINT32_C(0xffff) << 0)
2479 uint16_t auto_link_speed;
2482 * This is a mask of link speeds that will be used if autoneg_mode is
2483 * "mask". If unsupported speed is enabled an error will be generated.
2485 /* 100Mb link speed (Half-duplex) */
2486 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2488 /* 100Mb link speed (Full-duplex) */
2489 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2491 /* 1Gb link speed (Half-duplex) */
2492 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2494 /* 1Gb link speed (Full-duplex) */
2495 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2497 /* 2Gb link speed */
2498 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2500 /* 2.5Gb link speed */
2501 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2503 /* 10Gb link speed */
2504 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2506 /* 20Gb link speed */
2507 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2509 /* 25Gb link speed */
2510 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2512 /* 40Gb link speed */
2513 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2515 /* 50Gb link speed */
2516 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2518 /* 100Gb link speed */
2519 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2521 /* 10Mb link speed (Half-duplex) */
2522 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2524 /* 10Mb link speed (Full-duplex) */
2525 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2527 uint16_t auto_link_speed_mask;
2529 /* This value controls the wirespeed feature. */
2530 /* Wirespeed feature is disabled. */
2531 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2532 /* Wirespeed feature is enabled. */
2533 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2536 /* This value controls the loopback setting for the PHY. */
2537 /* No loopback is selected. Normal operation. */
2538 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2540 * The HW will be configured with local loopback such that host
2541 * data is sent back to the host without modification.
2543 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2545 * The HW will be configured with remote loopback such that port
2546 * logic will send packets back out the transmitter that are
2549 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2553 * This value is used to configure the pause that will be used for force
2557 * When this bit is '1', Generation of tx pause messages is supported.
2558 * Disabled otherwise.
2560 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2562 * When this bit is '1', Reception of rx pause messages is supported.
2563 * Disabled otherwise.
2565 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2566 uint8_t force_pause;
2571 * This value controls the pre-emphasis to be used for the link. Driver
2572 * should not set this value (use enable.preemphasis = 0) unless driver
2573 * is sure of setting. Normally HWRM FW will determine proper pre-
2576 uint32_t preemphasis;
2579 * Setting for link speed mask that is used to advertise speeds during
2580 * autonegotiation when EEE is enabled. This field is valid only when
2581 * EEE is enabled. The speeds specified in this field shall be a subset
2582 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2583 * at least one speed shall be provided in this mask.
2586 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2587 /* 100Mb link speed (Full-duplex) */
2588 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2590 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2591 /* 1Gb link speed (Full-duplex) */
2592 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2594 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2597 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2599 /* 10Gb link speed */
2600 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2602 uint16_t eee_link_speed_mask;
2608 * Reuested setting of TX LPI timer in microseconds. This field is valid
2609 * only when EEE is enabled and TX LPI is enabled.
2611 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2613 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2614 uint32_t tx_lpi_timer;
2617 } __attribute__((packed));
2619 /* Output (16 bytes) */
2620 struct hwrm_port_phy_cfg_output {
2622 * Pass/Fail or error type Note: receiver to verify the in parameters,
2623 * and fail the call with an error when appropriate
2625 uint16_t error_code;
2627 /* This field returns the type of original request. */
2630 /* This field provides original sequence number of the command. */
2634 * This field is the length of the response in bytes. The last byte of
2635 * the response is a valid flag that will read as '1' when the command
2636 * has been completely written to memory.
2646 * This field is used in Output records to indicate that the output is
2647 * completely written to RAM. This field should be read as '1' to
2648 * indicate that the output has been completely written. When writing a
2649 * command completion or response to an internal processor, the order of
2650 * writes has to be such that this field is written last.
2653 } __attribute__((packed));
2657 * Description: This function is called by a driver to determine the HWRM
2658 * interface version supported by the HWRM firmware, the version of HWRM
2659 * firmware implementation, the name of HWRM firmware, the versions of other
2660 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2661 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2662 * be considered an invalid version.
2665 /* Input (24 bytes) */
2666 struct hwrm_ver_get_input {
2668 * This value indicates what type of request this is. The format for the
2669 * rest of the command is determined by this field.
2674 * This value indicates the what completion ring the request will be
2675 * optionally completed on. If the value is -1, then no CR completion
2676 * will be generated. Any other value must be a valid CR ring_id value
2677 * for this function.
2681 /* This value indicates the command sequence number. */
2685 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2686 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2691 * This is the host address where the response will be written when the
2692 * request is complete. This area must be 16B aligned and must be
2693 * cleared to zero before the request is made.
2698 * This field represents the major version of HWRM interface
2699 * specification supported by the driver HWRM implementation. The
2700 * interface major version is intended to change only when non backward
2701 * compatible changes are made to the HWRM interface specification.
2703 uint8_t hwrm_intf_maj;
2706 * This field represents the minor version of HWRM interface
2707 * specification supported by the driver HWRM implementation. A change
2708 * in interface minor version is used to reflect significant backward
2709 * compatible modification to HWRM interface specification. This can be
2710 * due to addition or removal of functionality. HWRM interface
2711 * specifications with the same major version but different minor
2712 * versions are compatible.
2714 uint8_t hwrm_intf_min;
2717 * This field represents the update version of HWRM interface
2718 * specification supported by the driver HWRM implementation. The
2719 * interface update version is used to reflect minor changes or bug
2720 * fixes to a released HWRM interface specification.
2722 uint8_t hwrm_intf_upd;
2724 uint8_t unused_0[5];
2725 } __attribute__((packed));
2727 /* Output (128 bytes) */
2728 struct hwrm_ver_get_output {
2730 * Pass/Fail or error type Note: receiver to verify the in parameters,
2731 * and fail the call with an error when appropriate
2733 uint16_t error_code;
2735 /* This field returns the type of original request. */
2738 /* This field provides original sequence number of the command. */
2742 * This field is the length of the response in bytes. The last byte of
2743 * the response is a valid flag that will read as '1' when the command
2744 * has been completely written to memory.
2749 * This field represents the major version of HWRM interface
2750 * specification supported by the HWRM implementation. The interface
2751 * major version is intended to change only when non backward compatible
2752 * changes are made to the HWRM interface specification. A HWRM
2753 * implementation that is compliant with this specification shall
2754 * provide value of 1 in this field.
2756 uint8_t hwrm_intf_maj;
2759 * This field represents the minor version of HWRM interface
2760 * specification supported by the HWRM implementation. A change in
2761 * interface minor version is used to reflect significant backward
2762 * compatible modification to HWRM interface specification. This can be
2763 * due to addition or removal of functionality. HWRM interface
2764 * specifications with the same major version but different minor
2765 * versions are compatible. A HWRM implementation that is compliant with
2766 * this specification shall provide value of 0 in this field.
2768 uint8_t hwrm_intf_min;
2771 * This field represents the update version of HWRM interface
2772 * specification supported by the HWRM implementation. The interface
2773 * update version is used to reflect minor changes or bug fixes to a
2774 * released HWRM interface specification. A HWRM implementation that is
2775 * compliant with this specification shall provide value of 1 in this
2778 uint8_t hwrm_intf_upd;
2780 uint8_t hwrm_intf_rsvd;
2783 * This field represents the major version of HWRM firmware. A change in
2784 * firmware major version represents a major firmware release.
2786 uint8_t hwrm_fw_maj;
2789 * This field represents the minor version of HWRM firmware. A change in
2790 * firmware minor version represents significant firmware functionality
2793 uint8_t hwrm_fw_min;
2796 * This field represents the build version of HWRM firmware. A change in
2797 * firmware build version represents bug fixes to a released firmware.
2799 uint8_t hwrm_fw_bld;
2802 * This field is a reserved field. This field can be used to represent
2803 * firmware branches or customer specific releases tied to a specific
2804 * (major,minor,update) version of the HWRM firmware.
2806 uint8_t hwrm_fw_rsvd;
2809 * This field represents the major version of mgmt firmware. A change in
2810 * major version represents a major release.
2812 uint8_t mgmt_fw_maj;
2815 * This field represents the minor version of mgmt firmware. A change in
2816 * minor version represents significant functionality changes.
2818 uint8_t mgmt_fw_min;
2821 * This field represents the build version of mgmt firmware. A change in
2822 * update version represents bug fixes.
2824 uint8_t mgmt_fw_bld;
2827 * This field is a reserved field. This field can be used to represent
2828 * firmware branches or customer specific releases tied to a specific
2829 * (major,minor,update) version
2831 uint8_t mgmt_fw_rsvd;
2834 * This field represents the major version of network control firmware.
2835 * A change in major version represents a major release.
2837 uint8_t netctrl_fw_maj;
2840 * This field represents the minor version of network control firmware.
2841 * A change in minor version represents significant functionality
2844 uint8_t netctrl_fw_min;
2847 * This field represents the build version of network control firmware.
2848 * A change in update version represents bug fixes.
2850 uint8_t netctrl_fw_bld;
2853 * This field is a reserved field. This field can be used to represent
2854 * firmware branches or customer specific releases tied to a specific
2855 * (major,minor,update) version
2857 uint8_t netctrl_fw_rsvd;
2860 * This field is reserved for future use. The responder should set it to
2861 * 0. The requester should ignore this field.
2866 * This field represents the major version of RoCE firmware. A change in
2867 * major version represents a major release.
2869 uint8_t roce_fw_maj;
2872 * This field represents the minor version of RoCE firmware. A change in
2873 * minor version represents significant functionality changes.
2875 uint8_t roce_fw_min;
2878 * This field represents the build version of RoCE firmware. A change in
2879 * update version represents bug fixes.
2881 uint8_t roce_fw_bld;
2884 * This field is a reserved field. This field can be used to represent
2885 * firmware branches or customer specific releases tied to a specific
2886 * (major,minor,update) version
2888 uint8_t roce_fw_rsvd;
2891 * This field represents the name of HWRM FW (ASCII chars without NULL
2894 char hwrm_fw_name[16];
2897 * This field represents the name of mgmt FW (ASCII chars without NULL
2900 char mgmt_fw_name[16];
2903 * This field represents the name of network control firmware (ASCII
2904 * chars without NULL at the end).
2906 char netctrl_fw_name[16];
2909 * This field is reserved for future use. The responder should set it to
2910 * 0. The requester should ignore this field.
2912 uint32_t reserved2[4];
2915 * This field represents the name of RoCE FW (ASCII chars without NULL
2918 char roce_fw_name[16];
2920 /* This field returns the chip number. */
2923 /* This field returns the revision of chip. */
2926 /* This field returns the chip metal number. */
2929 /* This field returns the bond id of the chip. */
2930 uint8_t chip_bond_id;
2933 * This value indicates the type of platform used for chip
2937 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
2938 (UINT32_C(0x0) << 0)
2939 /* FPGA platform of the chip. */
2940 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
2941 (UINT32_C(0x1) << 0)
2942 /* Palladium platform of the chip. */
2943 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
2944 (UINT32_C(0x2) << 0)
2945 uint8_t chip_platform_type;
2948 * This field returns the maximum value of request window that is
2949 * supported by the HWRM. The request window is mapped into device
2950 * address space using MMIO.
2952 uint16_t max_req_win_len;
2955 * This field returns the maximum value of response buffer in bytes. If
2956 * a request specifies the response buffer length that is greater than
2957 * this value, then the HWRM should fail it. The value of this field
2958 * shall be 4KB or more.
2960 uint16_t max_resp_len;
2963 * This field returns the default request timeout value in milliseconds.
2965 uint16_t def_req_timeout;
2972 * This field is used in Output records to indicate that the output is
2973 * completely written to RAM. This field should be read as '1' to
2974 * indicate that the output has been completely written. When writing a
2975 * command completion or response to an internal processor, the order of
2976 * writes has to be such that this field is written last.
2979 } __attribute__((packed));
2981 /* hwrm_queue_qportcfg */
2983 * Description: This function is called by a driver to query queue configuration
2984 * of a port. # The HWRM shall at least advertise one queue with lossy service
2985 * profile. # The driver shall use this command to query queue ids before
2986 * configuring or using any queues. # If a service profile is not set for a
2987 * queue, then the driver shall not use that queue without configuring a service
2988 * profile for it. # If the driver is not allowed to configure service profiles,
2989 * then the driver shall only use queues for which service profiles are pre-
2993 /* Input (24 bytes) */
2994 struct hwrm_queue_qportcfg_input {
2996 * This value indicates what type of request this is. The format for the
2997 * rest of the command is determined by this field.
3002 * This value indicates the what completion ring the request will be
3003 * optionally completed on. If the value is -1, then no CR completion
3004 * will be generated. Any other value must be a valid CR ring_id value
3005 * for this function.
3009 /* This value indicates the command sequence number. */
3013 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3014 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3019 * This is the host address where the response will be written when the
3020 * request is complete. This area must be 16B aligned and must be
3021 * cleared to zero before the request is made.
3026 * Enumeration denoting the RX, TX type of the resource. This
3027 * enumeration is used for resources that are similar for both TX and RX
3028 * paths of the chip.
3030 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3033 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3034 (UINT32_C(0x0) << 0)
3036 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3037 (UINT32_C(0x1) << 0)
3038 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3039 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3043 * Port ID of port for which the queue configuration is being queried.
3044 * This field is only required when sent by IPC.
3049 } __attribute__((packed));
3051 /* hwrm_stat_ctx_clr_stats */
3052 /* Description: This command clears statistics of a context. */
3054 /* Input (24 bytes) */
3055 struct hwrm_stat_ctx_clr_stats_input {
3057 * This value indicates what type of request this is. The format for the
3058 * rest of the command is determined by this field.
3063 * This value indicates the what completion ring the request will be
3064 * optionally completed on. If the value is -1, then no CR completion
3065 * will be generated. Any other value must be a valid CR ring_id value
3066 * for this function.
3070 /* This value indicates the command sequence number. */
3074 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3075 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3080 * This is the host address where the response will be written when the
3081 * request is complete. This area must be 16B aligned and must be
3082 * cleared to zero before the request is made.
3086 /* ID of the statistics context that is being queried. */
3087 uint32_t stat_ctx_id;
3090 } __attribute__((packed));
3092 /* Output (16 bytes) */
3093 struct hwrm_stat_ctx_clr_stats_output {
3095 * Pass/Fail or error type Note: receiver to verify the in parameters,
3096 * and fail the call with an error when appropriate
3098 uint16_t error_code;
3100 /* This field returns the type of original request. */
3103 /* This field provides original sequence number of the command. */
3107 * This field is the length of the response in bytes. The last byte of
3108 * the response is a valid flag that will read as '1' when the command
3109 * has been completely written to memory.
3119 * This field is used in Output records to indicate that the output is
3120 * completely written to RAM. This field should be read as '1' to
3121 * indicate that the output has been completely written. When writing a
3122 * command completion or response to an internal processor, the order of
3123 * writes has to be such that this field is written last.
3126 } __attribute__((packed));
3128 /* hwrm_vnic_alloc */
3130 * Description: This VNIC is a resource in the RX side of the chip that is used
3131 * to represent a virtual host "interface". # At the time of VNIC allocation or
3132 * configuration, the function can specify whether it wants the requested VNIC
3133 * to be the default VNIC for the function or not. # If a function requests
3134 * allocation of a VNIC for the first time and a VNIC is successfully allocated
3135 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
3136 * for that function. # The default VNIC shall be used for the default action
3137 * for a partition or function. # For each VNIC allocated on a function, a
3138 * mapping on the RX side to map the allocated VNIC to source virtual interface
3139 * shall be performed by the HWRM. This should be hidden to the function driver
3140 * requesting the VNIC allocation. This enables broadcast/multicast replication
3141 * with source knockout. # If multicast replication with source knockout is
3142 * enabled, then the internal VNIC to SVIF mapping data structures shall be
3143 * programmed at the time of VNIC allocation.
3146 /* Input (24 bytes) */
3147 struct hwrm_vnic_alloc_input {
3149 * This value indicates what type of request this is. The format for the
3150 * rest of the command is determined by this field.
3155 * This value indicates the what completion ring the request will be
3156 * optionally completed on. If the value is -1, then no CR completion
3157 * will be generated. Any other value must be a valid CR ring_id value
3158 * for this function.
3162 /* This value indicates the command sequence number. */
3166 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3167 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3172 * This is the host address where the response will be written when the
3173 * request is complete. This area must be 16B aligned and must be
3174 * cleared to zero before the request is made.
3179 * When this bit is '1', this VNIC is requested to be the default VNIC
3180 * for this function.
3182 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3186 } __attribute__((packed));
3188 /* Output (16 bytes) */
3189 struct hwrm_vnic_alloc_output {
3191 * Pass/Fail or error type Note: receiver to verify the in parameters,
3192 * and fail the call with an error when appropriate
3194 uint16_t error_code;
3196 /* This field returns the type of original request. */
3199 /* This field provides original sequence number of the command. */
3203 * This field is the length of the response in bytes. The last byte of
3204 * the response is a valid flag that will read as '1' when the command
3205 * has been completely written to memory.
3209 /* Logical vnic ID */
3217 * This field is used in Output records to indicate that the output is
3218 * completely written to RAM. This field should be read as '1' to
3219 * indicate that the output has been completely written. When writing a
3220 * command completion or response to an internal processor, the order of
3221 * writes has to be such that this field is written last.
3224 } __attribute__((packed));
3227 /* Description: Configure the RX VNIC structure. */
3229 /* Input (40 bytes) */
3230 struct hwrm_vnic_cfg_input {
3232 * This value indicates what type of request this is. The format for the
3233 * rest of the command is determined by this field.
3238 * This value indicates the what completion ring the request will be
3239 * optionally completed on. If the value is -1, then no CR completion
3240 * will be generated. Any other value must be a valid CR ring_id value
3241 * for this function.
3245 /* This value indicates the command sequence number. */
3249 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3250 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3255 * This is the host address where the response will be written when the
3256 * request is complete. This area must be 16B aligned and must be
3257 * cleared to zero before the request is made.
3262 * When this bit is '1', the VNIC is requested to be the default VNIC
3265 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3267 * When this bit is '1', the VNIC is being configured to strip VLAN in
3268 * the RX path. If set to '0', then VLAN stripping is disabled on this
3271 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
3273 * When this bit is '1', the VNIC is being configured to buffer receive
3274 * packets in the hardware until the host posts new receive buffers. If
3275 * set to '0', then bd_stall is being configured to be disabled on this
3278 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
3280 * When this bit is '1', the VNIC is being configured to receive both
3281 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
3282 * configured to be operating in dual VNIC mode.
3284 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
3286 * When this flag is set to '1', the VNIC is requested to be configured
3287 * to receive only RoCE traffic. If this flag is set to '0', then this
3288 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
3289 * to '1', then the HWRM client shall not set this flag to '1'.
3291 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
3294 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
3295 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
3296 /* This bit must be '1' for the rss_rule field to be configured. */
3297 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
3298 /* This bit must be '1' for the cos_rule field to be configured. */
3299 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
3300 /* This bit must be '1' for the lb_rule field to be configured. */
3301 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
3302 /* This bit must be '1' for the mru field to be configured. */
3303 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
3306 /* Logical vnic ID */
3310 * Default Completion ring for the VNIC. This ring will be chosen if
3311 * packet does not match any RSS rules and if there is no COS rule.
3313 uint16_t dflt_ring_grp;
3316 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
3322 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
3328 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
3329 * there is no LB rule.
3334 * The maximum receive unit of the vnic. Each vnic is associated with a
3335 * function. The vnic mru value overwrites the mru setting of the
3336 * associated function. The HWRM shall make sure that vnic mru does not
3337 * exceed the mru of the port the function is associated with.
3342 } __attribute__((packed));
3344 /* Output (16 bytes) */
3345 struct hwrm_vnic_cfg_output {
3347 * Pass/Fail or error type Note: receiver to verify the in parameters,
3348 * and fail the call with an error when appropriate
3350 uint16_t error_code;
3352 /* This field returns the type of original request. */
3355 /* This field provides original sequence number of the command. */
3359 * This field is the length of the response in bytes. The last byte of
3360 * the response is a valid flag that will read as '1' when the command
3361 * has been completely written to memory.
3371 * This field is used in Output records to indicate that the output is
3372 * completely written to RAM. This field should be read as '1' to
3373 * indicate that the output has been completely written. When writing a
3374 * command completion or response to an internal processor, the order of
3375 * writes has to be such that this field is written last.
3378 } __attribute__((packed));
3380 /* hwrm_vnic_free */
3382 * Description: Free a VNIC resource. Idle any resources associated with the
3383 * VNIC as well as the VNIC. Reset and release all resources associated with the
3387 /* Input (24 bytes) */
3388 struct hwrm_vnic_free_input {
3390 * This value indicates what type of request this is. The format for the
3391 * rest of the command is determined by this field.
3396 * This value indicates the what completion ring the request will be
3397 * optionally completed on. If the value is -1, then no CR completion
3398 * will be generated. Any other value must be a valid CR ring_id value
3399 * for this function.
3403 /* This value indicates the command sequence number. */
3407 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3408 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3413 * This is the host address where the response will be written when the
3414 * request is complete. This area must be 16B aligned and must be
3415 * cleared to zero before the request is made.
3419 /* Logical vnic ID */
3423 } __attribute__((packed));
3425 /* Output (16 bytes) */
3426 struct hwrm_vnic_free_output {
3428 * Pass/Fail or error type Note: receiver to verify the in parameters,
3429 * and fail the call with an error when appropriate
3431 uint16_t error_code;
3433 /* This field returns the type of original request. */
3436 /* This field provides original sequence number of the command. */
3440 * This field is the length of the response in bytes. The last byte of
3441 * the response is a valid flag that will read as '1' when the command
3442 * has been completely written to memory.
3452 * This field is used in Output records to indicate that the output is
3453 * completely written to RAM. This field should be read as '1' to
3454 * indicate that the output has been completely written. When writing a
3455 * command completion or response to an internal processor, the order of
3456 * writes has to be such that this field is written last.
3459 } __attribute__((packed));
3461 /* hwrm_vnic_rss_cfg */
3462 /* Description: This function is used to enable RSS configuration. */
3464 /* Input (48 bytes) */
3465 struct hwrm_vnic_rss_cfg_input {
3467 * This value indicates what type of request this is. The format for the
3468 * rest of the command is determined by this field.
3473 * This value indicates the what completion ring the request will be
3474 * optionally completed on. If the value is -1, then no CR completion
3475 * will be generated. Any other value must be a valid CR ring_id value
3476 * for this function.
3480 /* This value indicates the command sequence number. */
3484 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3485 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3490 * This is the host address where the response will be written when the
3491 * request is complete. This area must be 16B aligned and must be
3492 * cleared to zero before the request is made.
3497 * When this bit is '1', the RSS hash shall be computed over source and
3498 * destination IPv4 addresses of IPv4 packets.
3500 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
3502 * When this bit is '1', the RSS hash shall be computed over
3503 * source/destination IPv4 addresses and source/destination ports of
3506 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
3508 * When this bit is '1', the RSS hash shall be computed over
3509 * source/destination IPv4 addresses and source/destination ports of
3512 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
3514 * When this bit is '1', the RSS hash shall be computed over source and
3515 * destination IPv4 addresses of IPv6 packets.
3517 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
3519 * When this bit is '1', the RSS hash shall be computed over
3520 * source/destination IPv6 addresses and source/destination ports of
3523 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
3525 * When this bit is '1', the RSS hash shall be computed over
3526 * source/destination IPv6 addresses and source/destination ports of
3529 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
3534 /* This is the address for rss ring group table */
3535 uint64_t ring_grp_tbl_addr;
3537 /* This is the address for rss hash key table */
3538 uint64_t hash_key_tbl_addr;
3540 /* Index to the rss indirection table. */
3541 uint16_t rss_ctx_idx;
3543 uint16_t unused_1[3];
3544 } __attribute__((packed));
3546 /* Output (16 bytes) */
3547 struct hwrm_vnic_rss_cfg_output {
3549 * Pass/Fail or error type Note: receiver to verify the in parameters,
3550 * and fail the call with an error when appropriate
3552 uint16_t error_code;
3554 /* This field returns the type of original request. */
3557 /* This field provides original sequence number of the command. */
3561 * This field is the length of the response in bytes. The last byte of
3562 * the response is a valid flag that will read as '1' when the command
3563 * has been completely written to memory.
3573 * This field is used in Output records to indicate that the output is
3574 * completely written to RAM. This field should be read as '1' to
3575 * indicate that the output has been completely written. When writing a
3576 * command completion or response to an internal processor, the order of
3577 * writes has to be such that this field is written last.
3580 } __attribute__((packed));
3582 /* Input (16 bytes) */
3583 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
3585 * This value indicates what type of request this is. The format for the
3586 * rest of the command is determined by this field.
3591 * This value indicates the what completion ring the request will be
3592 * optionally completed on. If the value is -1, then no CR completion
3593 * will be generated. Any other value must be a valid CR ring_id value
3594 * for this function.
3598 /* This value indicates the command sequence number. */
3602 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3603 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3608 * This is the host address where the response will be written when the
3609 * request is complete. This area must be 16B aligned and must be
3610 * cleared to zero before the request is made.
3613 } __attribute__((packed));
3615 /* Output (16 bytes) */
3617 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
3619 * Pass/Fail or error type Note: receiver to verify the in parameters,
3620 * and fail the call with an error when appropriate
3622 uint16_t error_code;
3624 /* This field returns the type of original request. */
3627 /* This field provides original sequence number of the command. */
3631 * This field is the length of the response in bytes. The last byte of
3632 * the response is a valid flag that will read as '1' when the command
3633 * has been completely written to memory.
3637 /* rss_cos_lb_ctx_id is 16 b */
3638 uint16_t rss_cos_lb_ctx_id;
3647 * This field is used in Output records to indicate that the output is
3648 * completely written to RAM. This field should be read as '1' to
3649 * indicate that the output has been completely written. When writing a
3650 * command completion or response to an internal processor, the order of
3651 * writes has to be such that this field is written last.
3654 } __attribute__((packed));
3656 /* hwrm_vnic_rss_cos_lb_ctx_free */
3657 /* Description: This function can be used to free COS/Load Balance context. */
3658 /* Input (24 bytes) */
3660 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
3662 * This value indicates what type of request this is. The format for the
3663 * rest of the command is determined by this field.
3668 * This value indicates the what completion ring the request will be
3669 * optionally completed on. If the value is -1, then no CR completion
3670 * will be generated. Any other value must be a valid CR ring_id value
3671 * for this function.
3675 /* This value indicates the command sequence number. */
3679 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3680 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3685 * This is the host address where the response will be written when the
3686 * request is complete. This area must be 16B aligned and must be
3687 * cleared to zero before the request is made.
3691 /* rss_cos_lb_ctx_id is 16 b */
3692 uint16_t rss_cos_lb_ctx_id;
3694 uint16_t unused_0[3];
3695 } __attribute__((packed));
3697 /* Output (16 bytes) */
3698 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
3700 * Pass/Fail or error type Note: receiver to verify the in parameters,
3701 * and fail the call with an error when appropriate
3703 uint16_t error_code;
3705 /* This field returns the type of original request. */
3708 /* This field provides original sequence number of the command. */
3712 * This field is the length of the response in bytes. The last byte of
3713 * the response is a valid flag that will read as '1' when the command
3714 * has been completely written to memory.
3724 * This field is used in Output records to indicate that the output is
3725 * completely written to RAM. This field should be read as '1' to
3726 * indicate that the output has been completely written. When writing a
3727 * command completion or response to an internal processor, the order of
3728 * writes has to be such that this field is written last.
3731 } __attribute__((packed));
3733 /* Output (32 bytes) */
3734 struct hwrm_queue_qportcfg_output {
3736 * Pass/Fail or error type Note: receiver to verify the in parameters,
3737 * and fail the call with an error when appropriate
3739 uint16_t error_code;
3741 /* This field returns the type of original request. */
3744 /* This field provides original sequence number of the command. */
3748 * This field is the length of the response in bytes. The last byte of
3749 * the response is a valid flag that will read as '1' when the command
3750 * has been completely written to memory.
3754 /* The maximum number of queues that can be configured. */
3755 uint8_t max_configurable_queues;
3757 /* The maximum number of lossless queues that can be configured. */
3758 uint8_t max_configurable_lossless_queues;
3761 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
3762 * the HWRM shall allow the host SW driver to configure queues using
3765 uint8_t queue_cfg_allowed;
3768 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3769 * the HWRM shall allow the host SW driver to configure queue buffers
3770 * using hwrm_queue_buffers_cfg.
3772 uint8_t queue_buffers_cfg_allowed;
3775 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3776 * the HWRM shall allow the host SW driver to configure PFC using
3777 * hwrm_queue_pfcenable_cfg.
3779 uint8_t queue_pfcenable_cfg_allowed;
3782 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3783 * the HWRM shall allow the host SW driver to configure Priority to CoS
3784 * mapping using hwrm_queue_pri2cos_cfg.
3786 uint8_t queue_pri2cos_cfg_allowed;
3789 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3790 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
3791 * configuration using hwrm_queue_cos2bw_cfg.
3793 uint8_t queue_cos2bw_cfg_allowed;
3795 /* ID of CoS Queue 0. FF - Invalid id */
3798 /* This value is applicable to CoS queues only. */
3799 /* Lossy (best-effort) */
3800 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
3801 (UINT32_C(0x0) << 0)
3803 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
3804 (UINT32_C(0x1) << 0)
3806 * Set to 0xFF... (All Fs) if there is no service profile
3809 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
3810 (UINT32_C(0xff) << 0)
3811 uint8_t queue_id0_service_profile;
3813 /* ID of CoS Queue 1. FF - Invalid id */
3815 /* This value is applicable to CoS queues only. */
3816 /* Lossy (best-effort) */
3817 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
3818 (UINT32_C(0x0) << 0)
3820 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
3821 (UINT32_C(0x1) << 0)
3823 * Set to 0xFF... (All Fs) if there is no service profile
3826 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
3827 (UINT32_C(0xff) << 0)
3828 uint8_t queue_id1_service_profile;
3830 /* ID of CoS Queue 2. FF - Invalid id */
3832 /* This value is applicable to CoS queues only. */
3833 /* Lossy (best-effort) */
3834 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
3835 (UINT32_C(0x0) << 0)
3837 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
3838 (UINT32_C(0x1) << 0)
3840 * Set to 0xFF... (All Fs) if there is no service profile
3843 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
3844 (UINT32_C(0xff) << 0)
3845 uint8_t queue_id2_service_profile;
3847 /* ID of CoS Queue 3. FF - Invalid id */
3850 /* This value is applicable to CoS queues only. */
3851 /* Lossy (best-effort) */
3852 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
3853 (UINT32_C(0x0) << 0)
3855 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
3856 (UINT32_C(0x1) << 0)
3858 * Set to 0xFF... (All Fs) if there is no service profile
3861 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
3862 (UINT32_C(0xff) << 0)
3863 uint8_t queue_id3_service_profile;
3865 /* ID of CoS Queue 4. FF - Invalid id */
3867 /* This value is applicable to CoS queues only. */
3868 /* Lossy (best-effort) */
3869 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
3870 (UINT32_C(0x0) << 0)
3872 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
3873 (UINT32_C(0x1) << 0)
3875 * Set to 0xFF... (All Fs) if there is no service profile
3878 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
3879 (UINT32_C(0xff) << 0)
3880 uint8_t queue_id4_service_profile;
3882 /* ID of CoS Queue 5. FF - Invalid id */
3885 /* This value is applicable to CoS queues only. */
3886 /* Lossy (best-effort) */
3887 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
3888 (UINT32_C(0x0) << 0)
3890 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
3891 (UINT32_C(0x1) << 0)
3893 * Set to 0xFF... (All Fs) if there is no service profile
3896 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
3897 (UINT32_C(0xff) << 0)
3898 uint8_t queue_id5_service_profile;
3900 /* ID of CoS Queue 6. FF - Invalid id */
3901 uint8_t queue_id6_service_profile;
3902 /* This value is applicable to CoS queues only. */
3903 /* Lossy (best-effort) */
3904 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
3905 (UINT32_C(0x0) << 0)
3907 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
3908 (UINT32_C(0x1) << 0)
3910 * Set to 0xFF... (All Fs) if there is no service profile
3913 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
3914 (UINT32_C(0xff) << 0)
3917 /* ID of CoS Queue 7. FF - Invalid id */
3920 /* This value is applicable to CoS queues only. */
3921 /* Lossy (best-effort) */
3922 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
3923 (UINT32_C(0x0) << 0)
3925 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
3926 (UINT32_C(0x1) << 0)
3928 * Set to 0xFF... (All Fs) if there is no service profile
3931 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
3932 (UINT32_C(0xff) << 0)
3933 uint8_t queue_id7_service_profile;
3936 * This field is used in Output records to indicate that the output is
3937 * completely written to RAM. This field should be read as '1' to
3938 * indicate that the output has been completely written. When writing a
3939 * command completion or response to an internal processor, the order of
3940 * writes has to be such that this field is written last.
3943 } __attribute__((packed));
3945 /* hwrm_func_drv_rgtr */
3947 * Description: This command is used by the function driver to register its
3948 * information with the HWRM. A function driver shall implement this command. A
3949 * function driver shall use this command during the driver initialization right
3950 * after the HWRM version discovery and default ring resources allocation.
3953 /* Input (80 bytes) */
3954 struct hwrm_func_drv_rgtr_input {
3956 * This value indicates what type of request this is. The format for the
3957 * rest of the command is determined by this field.
3962 * This value indicates the what completion ring the request will be
3963 * optionally completed on. If the value is -1, then no CR completion
3964 * will be generated. Any other value must be a valid CR ring_id value
3965 * for this function.
3969 /* This value indicates the command sequence number. */
3973 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3974 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3979 * This is the host address where the response will be written when the
3980 * request is complete. This area must be 16B aligned and must be
3981 * cleared to zero before the request is made.
3986 * When this bit is '1', the function driver is requesting all requests
3987 * from its children VF drivers to be forwarded to itself. This flag can
3988 * only be set by the PF driver. If a VF driver sets this flag, it
3989 * should be ignored by the HWRM.
3991 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
3993 * When this bit is '1', the function is requesting none of the requests
3994 * from its children VF drivers to be forwarded to itself. This flag can
3995 * only be set by the PF driver. If a VF driver sets this flag, it
3996 * should be ignored by the HWRM.
3998 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4001 /* This bit must be '1' for the os_type field to be configured. */
4002 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4003 /* This bit must be '1' for the ver field to be configured. */
4004 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4005 /* This bit must be '1' for the timestamp field to be configured. */
4006 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4007 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4008 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
4010 * This bit must be '1' for the async_event_fwd field to be configured.
4012 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
4016 /* This value indicates the type of OS. */
4018 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
4019 (UINT32_C(0x0) << 0)
4020 /* Other OS not listed below. */
4021 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
4022 (UINT32_C(0x1) << 0)
4024 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
4025 (UINT32_C(0xe) << 0)
4027 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
4028 (UINT32_C(0x12) << 0)
4030 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
4031 (UINT32_C(0x1d) << 0)
4033 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
4034 (UINT32_C(0x24) << 0)
4036 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
4037 (UINT32_C(0x2a) << 0)
4038 /* VMware ESXi OS. */
4039 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
4040 (UINT32_C(0x68) << 0)
4041 /* Microsoft Windows 8 64-bit OS. */
4042 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
4043 (UINT32_C(0x73) << 0)
4044 /* Microsoft Windows Server 2012 R2 OS. */
4045 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
4046 (UINT32_C(0x74) << 0)
4049 /* This is the major version of the driver. */
4052 /* This is the minor version of the driver. */
4055 /* This is the update version of the driver. */
4062 * This is a 32-bit timestamp provided by the driver for keep alive. The
4063 * timestamp is in multiples of 1ms.
4070 * This is a 256-bit bit mask provided by the PF driver for letting the
4071 * HWRM know what commands issued by the VF driver to the HWRM should be
4072 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
4073 * Setting Nth bit to 1 indicates that requests from the VF driver with
4074 * req_type equal to N shall be forwarded to the parent PF driver. This
4075 * field is not valid for the VF driver.
4077 uint32_t vf_req_fwd[8];
4080 * This is a 256-bit bit mask provided by the function driver (PF or VF
4081 * driver) to indicate the list of asynchronous event completions to be
4082 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
4083 * by the function driver shall result in the HWRM forwarding
4084 * asynchronous event completion with event_id equal to N. If all bits
4085 * are set to 0 (value of 0), then the HWRM shall not forward any
4086 * asynchronous event completion to this function driver.
4088 uint32_t async_event_fwd[8];
4089 } __attribute__((packed));
4091 /* Output (16 bytes) */
4093 struct hwrm_func_drv_rgtr_output {
4095 * Pass/Fail or error type Note: receiver to verify the in parameters,
4096 * and fail the call with an error when appropriate
4098 uint16_t error_code;
4100 /* This field returns the type of original request. */
4103 /* This field provides original sequence number of the command. */
4107 * This field is the length of the response in bytes. The last byte of
4108 * the response is a valid flag that will read as '1' when the command
4109 * has been completely written to memory.
4119 * This field is used in Output records to indicate that the output is
4120 * completely written to RAM. This field should be read as '1' to
4121 * indicate that the output has been completely written. When writing a
4122 * command completion or response to an internal processor, the order of
4123 * writes has to be such that this field is written last.
4126 } __attribute__((packed));
4128 /* hwrm_func_drv_unrgtr */
4130 * Description: This command is used by the function driver to un register with
4131 * the HWRM. A function driver shall implement this command. A function driver
4132 * shall use this command during the driver unloading.
4134 /* Input (24 bytes) */
4136 struct hwrm_func_drv_unrgtr_input {
4138 * This value indicates what type of request this is. The format for the
4139 * rest of the command is determined by this field.
4144 * This value indicates the what completion ring the request will be
4145 * optionally completed on. If the value is -1, then no CR completion
4146 * will be generated. Any other value must be a valid CR ring_id value
4147 * for this function.
4151 /* This value indicates the command sequence number. */
4155 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4156 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4161 * This is the host address where the response will be written when the
4162 * request is complete. This area must be 16B aligned and must be
4163 * cleared to zero before the request is made.
4168 * When this bit is '1', the function driver is notifying the HWRM to
4169 * prepare for the shutdown.
4171 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4176 } __attribute__((packed));
4178 /* Output (16 bytes) */
4179 struct hwrm_func_drv_unrgtr_output {
4181 * Pass/Fail or error type Note: receiver to verify the in parameters,
4182 * and fail the call with an error when appropriate
4184 uint16_t error_code;
4186 /* This field returns the type of original request. */
4189 /* This field provides original sequence number of the command. */
4193 * This field is the length of the response in bytes. The last byte of
4194 * the response is a valid flag that will read as '1' when the command
4195 * has been completely written to memory.
4205 * This field is used in Output records to indicate that the output is
4206 * completely written to RAM. This field should be read as '1' to
4207 * indicate that the output has been completely written. When writing a
4208 * command completion or response to an internal processor, the order of
4209 * writes has to be such that this field is written last.
4212 } __attribute__((packed));