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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
89 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
90 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
91 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
92 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
93 #define HWRM_VNIC_FREE (UINT32_C(0x41))
94 #define HWRM_VNIC_CFG (UINT32_C(0x42))
95 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
96 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
97 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
98 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
99 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
100 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
101 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
102 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
103 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
104 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
107 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
108 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
110 /* Short TX BD (16 bytes) */
113 * All bits in this field must be valid on the first BD of a packet.
114 * Only the packet_end bit must be valid for the remaining BDs of a
117 /* This value identifies the type of buffer descriptor. */
118 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
119 #define TX_BD_SHORT_TYPE_SFT 0
121 * Indicates that this BD is 16B long and is used for normal L2
122 * packet transmission.
124 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
126 * If set to 1, the packet ends with the data in the buffer pointed to
127 * by this descriptor. This flag must be valid on every BD.
129 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
131 * If set to 1, the device will not generate a completion for this
132 * transmit packet unless there is an error in it's processing. If this
133 * bit is set to 0, then the packet will be completed normally. This bit
134 * must be valid only on the first BD of a packet.
136 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
138 * This value indicates how many 16B BD locations are consumed in the
139 * ring by this packet. A value of 1 indicates that this BD is the only
140 * BD (and that the it is a short BD). A value of 3 indicates either 3
141 * short BDs or 1 long BD and one short BD in the packet. A value of 0
142 * indicates that there are 32 BD locations in the packet (the maximum).
143 * This field is valid only on the first BD of a packet.
145 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
146 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
148 * This value is a hint for the length of the entire packet. It is used
149 * by the chip to optimize internal processing. The packet will be
150 * dropped if the hint is too short. This field is valid only on the
151 * first BD of a packet.
153 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
154 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
155 /* indicates packet length < 512B */
156 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
157 /* indicates 512 <= packet length < 1KB */
158 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
159 /* indicates 1KB <= packet length < 2KB */
160 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
161 /* indicates packet length >= 2KB */
162 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
163 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
165 * If set to 1, the device immediately updates the Send Consumer Index
166 * after the buffer associated with this descriptor has been transferred
167 * via DMA to NIC memory from host memory. An interrupt may or may not
168 * be generated according to the state of the interrupt avoidance
169 * mechanisms. If this bit is set to 0, then the Consumer Index is only
170 * updated as soon as one of the host interrupt coalescing conditions
171 * has been met. This bit must be valid on the first BD of a packet.
173 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
175 * All bits in this field must be valid on the first BD of a packet.
176 * Only the packet_end bit must be valid for the remaining BDs of a
179 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
180 #define TX_BD_SHORT_FLAGS_SFT 6
184 * This is the length of the host physical buffer this BD describes in
185 * bytes. This field must be valid on all BDs of a packet.
189 * The opaque data field is pass through to the completion and can be
190 * used for any data that the driver wants to associate with the
191 * transmit BD. This field must be valid on the first BD of a packet.
196 * This is the host physical address for the portion of the packet
197 * described by this TX BD. This value must be valid on all BDs of a
201 } __attribute__((packed));
203 /* Long TX BD (32 bytes split to 2 16-byte struct) */
206 * All bits in this field must be valid on the first BD of a packet.
207 * Only the packet_end bit must be valid for the remaining BDs of a
210 /* This value identifies the type of buffer descriptor. */
211 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
212 #define TX_BD_LONG_TYPE_SFT 0
214 * Indicates that this BD is 32B long and is used for normal L2
215 * packet transmission.
217 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
219 * If set to 1, the packet ends with the data in the buffer pointed to
220 * by this descriptor. This flag must be valid on every BD.
222 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
224 * If set to 1, the device will not generate a completion for this
225 * transmit packet unless there is an error in it's processing. If this
226 * bit is set to 0, then the packet will be completed normally. This bit
227 * must be valid only on the first BD of a packet.
229 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
231 * This value indicates how many 16B BD locations are consumed in the
232 * ring by this packet. A value of 1 indicates that this BD is the only
233 * BD (and that the it is a short BD). A value of 3 indicates either 3
234 * short BDs or 1 long BD and one short BD in the packet. A value of 0
235 * indicates that there are 32 BD locations in the packet (the maximum).
236 * This field is valid only on the first BD of a packet.
238 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
239 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
241 * This value is a hint for the length of the entire packet. It is used
242 * by the chip to optimize internal processing. The packet will be
243 * dropped if the hint is too short. This field is valid only on the
244 * first BD of a packet.
246 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
247 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
248 /* indicates packet length < 512B */
249 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
250 /* indicates 512 <= packet length < 1KB */
251 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
252 /* indicates 1KB <= packet length < 2KB */
253 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
254 /* indicates packet length >= 2KB */
255 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
256 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
258 * If set to 1, the device immediately updates the Send Consumer Index
259 * after the buffer associated with this descriptor has been transferred
260 * via DMA to NIC memory from host memory. An interrupt may or may not
261 * be generated according to the state of the interrupt avoidance
262 * mechanisms. If this bit is set to 0, then the Consumer Index is only
263 * updated as soon as one of the host interrupt coalescing conditions
264 * has been met. This bit must be valid on the first BD of a packet.
266 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
268 * All bits in this field must be valid on the first BD of a packet.
269 * Only the packet_end bit must be valid for the remaining BDs of a
272 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
273 #define TX_BD_LONG_FLAGS_SFT 6
277 * This is the length of the host physical buffer this BD describes in
278 * bytes. This field must be valid on all BDs of a packet.
283 * The opaque data field is pass through to the completion and can be
284 * used for any data that the driver wants to associate with the
285 * transmit BD. This field must be valid on the first BD of a packet.
290 * This is the host physical address for the portion of the packet
291 * described by this TX BD. This value must be valid on all BDs of a
295 } __attribute__((packed));
297 /* last 16 bytes of Long TX BD */
299 struct tx_bd_long_hi {
301 * All bits in this field must be valid on the first BD of a packet.
302 * Their value on other BDs of the packet will be ignored.
305 * If set to 1, the controller replaces the TCP/UPD checksum fields of
306 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
307 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
308 * checksum for the packet associated with this descriptor. This bit
309 * must be valid on the first BD of a packet.
311 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
313 * If set to 1, the controller replaces the IP checksum of the normal
314 * packets, or the inner IP checksum of the encapsulated packets with
315 * the hardware calculated IP checksum for the packet associated with
316 * this descriptor. This bit must be valid on the first BD of a packet.
318 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
320 * If set to 1, the controller will not append an Ethernet CRC to the
321 * end of the frame. This bit must be valid on the first BD of a packet.
322 * Packet must be 64B or longer when this flag is set. It is not useful
323 * to use this bit with any form of TX offload such as CSO or LSO. The
324 * intent is that the packet from the host already has a valid Ethernet
327 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
329 * If set to 1, the device will record the time at which the packet was
330 * actually transmitted at the TX MAC. This bit must be valid on the
331 * first BD of a packet.
333 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
335 * If set to 1, The controller replaces the tunnel IP checksum field
336 * with hardware calculated IP checksum for the IP header of the packet
337 * associated with this descriptor. In case of VXLAN, the controller
338 * also replaces the outer header UDP checksum with hardware calculated
339 * UDP checksum for the packet associated with this descriptor.
341 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
343 * If set to 1, the device will treat this packet with LSO(Large Send
344 * Offload) processing for both normal or encapsulated packets, which is
345 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
346 * fields must be valid. The driver doesn't need to set t_ip_chksum,
347 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
348 * the appropriate checksum fields for segmented packets. When this bit
349 * is 1, the hdr_size and mss fields must be valid.
351 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
353 * If set to zero when LSO is '1', then the IPID will be treated as a
354 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
355 * set to one when LSO is '1', then the IPID will be treated as a 15b
356 * number and will be wrapped if it exceeds a value 0f 0x7fff.
358 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
360 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
361 * will not be modified during LSO operations. If set to one when LSO is
362 * '1', then the IPID of the tunnel IP header will be incremented for
363 * each subsequent segment of an LSO operation.
365 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
367 * If set to '1', then the RoCE ICRC will be appended to the packet.
368 * Packet must be a valid RoCE format packet.
370 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
372 * If set to '1', then the FCoE CRC will be appended to the packet.
373 * Packet must be a valid FCoE format packet.
375 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
379 * When LSO is '1', this field must contain the offset of the TCP
380 * payload from the beginning of the packet in as 16b words. In case of
381 * encapsulated/tunneling packet, this field contains the offset of the
382 * inner TCP payload from beginning of the packet as 16-bit words. This
383 * value must be valid on the first BD of a packet.
385 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
386 #define TX_BD_LONG_HDR_SIZE_SFT 0
390 * This is the MSS value that will be used to do the LSO processing. The
391 * value is the length in bytes of the TCP payload for each segment
392 * generated by the LSO operation. This value must be valid on the first
395 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
396 #define TX_BD_LONG_MSS_SFT 0
402 * This value selects a CFA action to perform on the packet. Set this
403 * value to zero if no CFA action is desired. This value must be valid
404 * on the first BD of a packet.
409 * This value is action meta-data that defines CFA edit operations that
410 * are done in addition to any action editing.
412 /* When key=1, This is the VLAN tag VID value. */
413 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
414 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
415 /* When key=1, This is the VLAN tag DE value. */
416 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
417 /* When key=1, This is the VLAN tag PRI value. */
418 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
419 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
420 /* When key=1, This is the VLAN tag TPID select value. */
421 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
422 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
424 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
426 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
428 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
430 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
432 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
433 /* Value programmed in CFA VLANTPID register. */
434 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
435 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
436 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
437 /* When key=1, This is the VLAN tag TPID select value. */
438 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
439 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
441 * This field identifies the type of edit to be performed on the packet.
442 * This value must be valid on the first BD of a packet.
444 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
445 #define TX_BD_LONG_CFA_META_KEY_SFT 28
447 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
449 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
450 * - PRI/DE value. - meta[11:0] - VID value.
452 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
453 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
455 } __attribute__((packed));
457 /* RX Producer Packet BD (16 bytes) */
458 struct rx_prod_pkt_bd {
459 /* This value identifies the type of buffer descriptor. */
460 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
461 #define RX_PROD_PKT_BD_TYPE_SFT 0
463 * Indicates that this BD is 16B long and is an RX Producer (ie.
464 * empty) buffer descriptor.
466 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
468 * If set to 1, the packet will be placed at the address plus 2B. The 2
469 * Bytes of padding will be written as zero.
472 * This is intended to be used when the host buffer is cache-line
473 * aligned to produce packets that are easy to parse in host memory
474 * while still allowing writes to be cache line aligned.
476 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
478 * If set to 1, the packet write will be padded out to the nearest
479 * cache-line with zero value padding.
482 * If receive buffers start/end on cache-line boundaries, this feature
483 * will ensure that all data writes on the PCI bus start/end on cache
486 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
488 * This value is the number of additional buffers in the ring that
489 * describe the buffer space to be consumed for the this packet. If the
490 * value is zero, then the packet must fit within the space described by
491 * this BD. If this value is 1 or more, it indicates how many additional
492 * "buffer" BDs are in the ring immediately following this BD to be used
493 * for the same network packet. Even if the packet to be placed does not
494 * need all the additional buffers, they will be consumed anyway.
496 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
497 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
498 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
499 #define RX_PROD_PKT_BD_FLAGS_SFT 6
503 * This is the length in Bytes of the host physical buffer where data
504 * for the packet may be placed in host memory.
507 * While this is a Byte resolution value, it is often advantageous to
508 * ensure that the buffers provided end on a host cache line.
513 * The opaque data field is pass through to the completion and can be
514 * used for any data that the driver wants to associate with this
515 * receive buffer set.
520 * This is the host physical address where data for the packet may by
521 * placed in host memory.
524 * While this is a Byte resolution value, it is often advantageous to
525 * ensure that the buffers provide start on a host cache line.
528 } __attribute__((packed));
530 /* Completion Ring Structures */
531 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
532 /* Base Completion Record (16 bytes) */
536 * This field indicates the exact type of the completion. By convention,
537 * the LSB identifies the length of the record in 16B units. Even values
538 * indicate 16B records. Odd values indicate 32B records.
540 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
541 #define CMPL_BASE_TYPE_SFT 0
542 /* TX L2 completion: Completion of TX packet. Length = 16B */
543 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
545 * RX L2 completion: Completion of and L2 RX packet.
548 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
550 * RX Aggregation Buffer completion : Completion of an L2
551 * aggregation buffer in support of TPA, HDS, or Jumbo packet
552 * completion. Length = 16B
554 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
556 * RX L2 TPA Start Completion: Completion at the beginning of a
557 * TPA operation. Length = 32B
559 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
561 * RX L2 TPA End Completion: Completion at the end of a TPA
562 * operation. Length = 32B
564 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
566 * Statistics Ejection Completion: Completion of statistics data
567 * ejection buffer. Length = 16B
569 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
570 /* HWRM Command Completion: Completion of an HWRM command. */
571 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
572 /* Forwarded HWRM Request */
573 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
574 /* Forwarded HWRM Response */
575 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
576 /* HWRM Asynchronous Event Information */
577 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
578 /* CQ Notification */
579 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
580 /* SRQ Threshold Event */
581 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
582 /* DBQ Threshold Event */
583 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
584 /* QP Async Notification */
585 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
586 /* Function Async Notification */
587 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
594 * This value is written by the NIC such that it will be different for
595 * each pass through the completion queue. The even passes will write 1.
596 * The odd passes will write 0.
598 #define CMPL_BASE_V UINT32_C(0x1)
600 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
601 #define CMPL_BASE_INFO3_SFT 1
605 } __attribute__((packed));
607 /* TX Completion Record (16 bytes) */
610 * This field indicates the exact type of the completion. By convention,
611 * the LSB identifies the length of the record in 16B units. Even values
612 * indicate 16B records. Odd values indicate 32B records.
614 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
615 #define TX_CMPL_TYPE_SFT 0
616 /* TX L2 completion: Completion of TX packet. Length = 16B */
617 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
619 * When this bit is '1', it indicates a packet that has an error of some
620 * type. Type of error is indicated in error_flags.
622 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
624 * When this bit is '1', it indicates that the packet completed was
625 * transmitted using the push acceleration data provided by the driver.
626 * When this bit is '0', it indicates that the packet had not push
627 * acceleration data written or was executed as a normal packet even
628 * though push data was provided.
630 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
631 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
632 #define TX_CMPL_FLAGS_SFT 6
638 * This is a copy of the opaque field from the first TX BD of this
639 * transmitted packet.
644 * This value is written by the NIC such that it will be different for
645 * each pass through the completion queue. The even passes will write 1.
646 * The odd passes will write 0.
648 #define TX_CMPL_V UINT32_C(0x1)
650 * This error indicates that there was some sort of problem with the BDs
653 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
654 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
656 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
657 /* Bad Format: BDs were not formatted correctly. */
658 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
659 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
660 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
662 * When this bit is '1', it indicates that the length of the packet was
663 * zero. No packet was transmitted.
665 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
667 * When this bit is '1', it indicates that the packet was longer than
668 * the programmed limit in TDI. No packet was transmitted.
670 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
672 * When this bit is '1', it indicates that one or more of the BDs
673 * associated with this packet generated a PCI error. This probably
674 * means the address was not valid.
676 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
678 * When this bit is '1', it indicates that the packet was longer than
679 * indicated by the hint. No packet was transmitted.
681 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
683 * When this bit is '1', it indicates that the packet was dropped due to
684 * Poison TLP error on one or more of the TLPs in the PXP completion.
686 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
687 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
688 #define TX_CMPL_ERRORS_SFT 1
693 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
695 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
698 * This field indicates the exact type of the completion. By convention,
699 * the LSB identifies the length of the record in 16B units. Even values
700 * indicate 16B records. Odd values indicate 32B records.
702 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
703 #define RX_PKT_CMPL_TYPE_SFT 0
705 * RX L2 completion: Completion of and L2 RX packet.
708 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
710 * When this bit is '1', it indicates a packet that has an error of some
711 * type. Type of error is indicated in error_flags.
713 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
714 /* This field indicates how the packet was placed in the buffer. */
715 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
716 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
717 /* Normal: Packet was placed using normal algorithm. */
718 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
719 /* Jumbo: Packet was placed using jumbo algorithm. */
720 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
722 * Header/Data Separation: Packet was placed using Header/Data
723 * separation algorithm. The separation location is indicated by
726 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
727 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
728 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
729 /* This bit is '1' if the RSS field in this completion is valid. */
730 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
732 * This value indicates what the inner packet determined for the packet
735 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
736 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
737 /* Not Known: Indicates that the packet type was not known. */
738 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
740 * IP Packet: Indicates that the packet was an IP packet, but
741 * further classification was not possible.
743 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
745 * TCP Packet: Indicates that the packet was IP and TCP. This
746 * indicates that the payload_offset field is valid.
748 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
750 * UDP Packet: Indicates that the packet was IP and UDP. This
751 * indicates that the payload_offset field is valid.
753 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
755 * FCoE Packet: Indicates that the packet was recognized as a
756 * FCoE. This also indicates that the payload_offset field is
759 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
761 * RoCE Packet: Indicates that the packet was recognized as a
762 * RoCE. This also indicates that the payload_offset field is
765 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
767 * ICMP Packet: Indicates that the packet was recognized as
768 * ICMP. This indicates that the payload_offset field is valid.
770 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
772 * PtP packet wo/timestamp: Indicates that the packet was
773 * recognized as a PtP packet.
775 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
776 (UINT32_C(0x8) << 12)
778 * PtP packet w/timestamp: Indicates that the packet was
779 * recognized as a PtP packet and that a timestamp was taken for
782 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
783 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
784 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
785 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
786 #define RX_PKT_CMPL_FLAGS_SFT 6
790 * This is the length of the data for the packet stored in the buffer(s)
791 * identified by the opaque value. This includes the packet BD and any
792 * associated buffer BDs. This does not include the the length of any
793 * data places in aggregation BDs.
798 * This is a copy of the opaque field from the RX BD this completion
804 * This value is written by the NIC such that it will be different for
805 * each pass through the completion queue. The even passes will write 1.
806 * The odd passes will write 0.
808 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
810 * This value is the number of aggregation buffers that follow this
811 * entry in the completion ring that are a part of this packet. If the
812 * value is zero, then the packet is completely contained in the buffer
813 * space provided for the packet in the RX ring.
815 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
816 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
820 * This is the RSS hash type for the packet. The value is packed
821 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
823 uint8_t rss_hash_type;
826 * This value indicates the offset from the beginning of the packet
827 * where the inner payload starts. This value is valid for TCP, UDP,
828 * FCoE, and RoCE packets.
830 uint8_t payload_offset;
835 * This value is the RSS hash value calculated for the packet based on
836 * the mode bits and key value in the VNIC.
839 } __attribute__((packed));
841 /* last 16 bytes of RX Packet Completion Record */
842 struct rx_pkt_cmpl_hi {
844 * This indicates that the ip checksum was calculated for the inner
845 * packet and that the ip_cs_error field indicates if there was an
848 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
850 * This indicates that the TCP, UDP or ICMP checksum was calculated for
851 * the inner packet and that the l4_cs_error field indicates if there
854 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
856 * This indicates that the ip checksum was calculated for the tunnel
857 * header and that the t_ip_cs_error field indicates if there was an
860 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
862 * This indicates that the UDP checksum was calculated for the tunnel
863 * packet and that the t_l4_cs_error field indicates if there was an
866 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
867 /* This value indicates what format the metadata field is. */
868 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
869 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
870 /* No metadata informtaion. Value is zero. */
871 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
873 * The metadata field contains the VLAN tag and TPID value. -
874 * metadata[11:0] contains the vlan VID value. - metadata[12]
875 * contains the vlan DE value. - metadata[15:13] contains the
876 * vlan PRI value. - metadata[31:16] contains the vlan TPID
879 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
880 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
881 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
883 * This field indicates the IP type for the inner-most IP header. A
884 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
885 * value is only valid if itype indicates a packet with an IP header.
887 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
891 * This is data from the CFA block as indicated by the meta_format
894 /* When meta_format=1, this value is the VLAN VID. */
895 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
896 #define RX_PKT_CMPL_METADATA_VID_SFT 0
897 /* When meta_format=1, this value is the VLAN DE. */
898 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
899 /* When meta_format=1, this value is the VLAN PRI. */
900 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
901 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
902 /* When meta_format=1, this value is the VLAN TPID. */
903 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
904 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
908 * This value is written by the NIC such that it will be different for
909 * each pass through the completion queue. The even passes will write 1.
910 * The odd passes will write 0.
912 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
914 * This error indicates that there was some sort of problem with the BDs
915 * for the packet that was found after part of the packet was already
916 * placed. The packet should be treated as invalid.
918 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
919 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
920 /* No buffer error */
921 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
924 * Did Not Fit: Packet did not fit into packet buffer provided.
925 * For regular placement, this means the packet did not fit in
926 * the buffer provided. For HDS and jumbo placement, this means
927 * that the packet could not be placed into 7 physical buffers
930 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
933 * Not On Chip: All BDs needed for the packet were not on-chip
934 * when the packet arrived.
936 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
938 /* Bad Format: BDs were not formatted correctly. */
939 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
941 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
942 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
943 /* This indicates that there was an error in the IP header checksum. */
944 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
946 * This indicates that there was an error in the TCP, UDP or ICMP
949 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
951 * This indicates that there was an error in the tunnel IP header
954 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
955 /* This indicates that there was an error in the tunnel UDP checksum. */
956 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
958 * This indicates that there was a CRC error on either an FCoE or RoCE
959 * packet. The itype indicates the packet type.
961 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
963 * This indicates that there was an error in the tunnel portion of the
964 * packet when this field is non-zero.
966 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
967 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
969 * No additional error occurred on the tunnel portion of the
970 * packet of the packet does not have a tunnel.
972 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
974 * Indicates that IP header version does not match expectation
975 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
977 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
980 * Indicates that header length is out of range in the tunnel
981 * header. Valid for IPv4.
983 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
986 * Indicates that the physical packet is shorter than that
987 * claimed by the PPPoE header length for a tunnel PPPoE packet.
989 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
992 * Indicates that physical packet is shorter than that claimed
993 * by the tunnel l3 header length. Valid for IPv4, or IPv6
994 * tunnel packet packets.
996 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
999 * Indicates that the physical packet is shorter than that
1000 * claimed by the tunnel UDP header length for a tunnel UDP
1001 * packet that is not fragmented.
1003 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1004 (UINT32_C(0x5) << 9)
1006 * indicates that the IPv4 TTL or IPv6 hop limit check have
1007 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1010 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1011 (UINT32_C(0x6) << 9)
1012 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1013 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1015 * This indicates that there was an error in the inner portion of the
1016 * packet when this field is non-zero.
1018 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1019 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1021 * No additional error occurred on the tunnel portion of the
1022 * packet of the packet does not have a tunnel.
1024 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1026 * Indicates that IP header version does not match expectation
1027 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1028 * VFT was parsed on FCoE packet.
1030 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1031 (UINT32_C(0x1) << 12)
1033 * indicates that header length is out of range. Valid for IPv4
1036 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1037 (UINT32_C(0x2) << 12)
1039 * indicates that the IPv4 TTL or IPv6 hop limit check have
1040 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1042 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1044 * Indicates that physical packet is shorter than that claimed
1045 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1048 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1049 (UINT32_C(0x4) << 12)
1051 * Indicates that the physical packet is shorter than that
1052 * claimed by the UDP header length for a UDP packet that is not
1055 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1056 (UINT32_C(0x5) << 12)
1058 * Indicates that TCP header length > IP payload. Valid for TCP
1061 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1062 (UINT32_C(0x6) << 12)
1063 /* Indicates that TCP header length < 5. Valid for TCP. */
1064 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1065 (UINT32_C(0x7) << 12)
1067 * Indicates that TCP option headers result in a TCP header size
1068 * that does not match data offset in TCP header. Valid for TCP.
1070 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1071 (UINT32_C(0x8) << 12)
1072 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1073 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1074 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1075 #define RX_PKT_CMPL_ERRORS_SFT 1
1079 * This field identifies the CFA action rule that was used for this
1085 * This value holds the reordering sequence number for the packet. If
1086 * the reordering sequence is not valid, then this value is zero. The
1087 * reordering domain for the packet is in the bottom 8 to 10b of the
1088 * rss_hash value. The bottom 20b of this value contain the ordering
1089 * domain value for the packet.
1091 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1092 #define RX_PKT_CMPL_REORDER_SFT 0
1094 } __attribute__((packed));
1096 /* HWRM Forwarded Request (16 bytes) */
1097 struct hwrm_fwd_req_cmpl {
1098 /* Length of forwarded request in bytes. */
1100 * This field indicates the exact type of the completion. By convention,
1101 * the LSB identifies the length of the record in 16B units. Even values
1102 * indicate 16B records. Odd values indicate 32B records.
1104 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1105 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1106 /* Forwarded HWRM Request */
1107 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1108 /* Length of forwarded request in bytes. */
1109 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1110 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1111 uint16_t req_len_type;
1114 * Source ID of this request. Typically used in forwarding requests and
1115 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1116 * Reserved for internal processors 0xFFFF - HWRM
1122 /* Address of forwarded request. */
1124 * This value is written by the NIC such that it will be different for
1125 * each pass through the completion queue. The even passes will write 1.
1126 * The odd passes will write 0.
1128 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1129 /* Address of forwarded request. */
1130 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1131 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1132 uint64_t req_buf_addr_v;
1133 } __attribute__((packed));
1135 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1136 struct hwrm_async_event_cmpl {
1138 * This field indicates the exact type of the completion. By convention,
1139 * the LSB identifies the length of the record in 16B units. Even values
1140 * indicate 16B records. Odd values indicate 32B records.
1142 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1143 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1144 /* HWRM Asynchronous Event Information */
1145 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1146 (UINT32_C(0x2e) << 0)
1149 /* Identifiers of events. */
1150 /* Link status changed */
1151 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1152 (UINT32_C(0x0) << 0)
1153 /* Link MTU changed */
1154 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1155 (UINT32_C(0x1) << 0)
1156 /* Link speed changed */
1157 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1158 (UINT32_C(0x2) << 0)
1159 /* DCB Configuration changed */
1160 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1161 (UINT32_C(0x3) << 0)
1162 /* Port connection not allowed */
1163 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1164 (UINT32_C(0x4) << 0)
1165 /* Link speed configuration was not allowed */
1166 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1167 (UINT32_C(0x5) << 0)
1168 /* Function driver unloaded */
1169 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1170 (UINT32_C(0x10) << 0)
1171 /* Function driver loaded */
1172 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1173 (UINT32_C(0x11) << 0)
1174 /* PF driver unloaded */
1175 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1176 (UINT32_C(0x20) << 0)
1177 /* PF driver loaded */
1178 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1179 (UINT32_C(0x21) << 0)
1180 /* VF Function Level Reset (FLR) */
1181 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1182 /* VF MAC Address Change */
1183 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1184 (UINT32_C(0x31) << 0)
1185 /* PF-VF communication channel status change. */
1186 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1187 (UINT32_C(0x32) << 0)
1189 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1190 (UINT32_C(0xff) << 0)
1193 /* Event specific data */
1194 uint32_t event_data2;
1198 * This value is written by the NIC such that it will be different for
1199 * each pass through the completion queue. The even passes will write 1.
1200 * The odd passes will write 0.
1202 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1204 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1205 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1208 /* 8-lsb timestamp from POR (100-msec resolution) */
1209 uint8_t timestamp_lo;
1211 /* 16-lsb timestamp from POR (100-msec resolution) */
1212 uint16_t timestamp_hi;
1214 /* Event specific data */
1215 uint32_t event_data1;
1216 } __attribute__((packed));
1219 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1220 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1221 * processors inside the chip. This firmware is vital part of the chip's
1222 * hardware. The chip can not be used by driver without it.
1225 /* Input (16 bytes) */
1228 * This value indicates what type of request this is. The format for the
1229 * rest of the command is determined by this field.
1234 * This value indicates the what completion ring the request will be
1235 * optionally completed on. If the value is -1, then no CR completion
1236 * will be generated. Any other value must be a valid CR ring_id value
1237 * for this function.
1241 /* This value indicates the command sequence number. */
1245 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1246 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1251 * This is the host address where the response will be written when the
1252 * request is complete. This area must be 16B aligned and must be
1253 * cleared to zero before the request is made.
1256 } __attribute__((packed));
1258 /* Output (8 bytes) */
1261 * Pass/Fail or error type Note: receiver to verify the in parameters,
1262 * and fail the call with an error when appropriate
1264 uint16_t error_code;
1266 /* This field returns the type of original request. */
1269 /* This field provides original sequence number of the command. */
1273 * This field is the length of the response in bytes. The last byte of
1274 * the response is a valid flag that will read as '1' when the command
1275 * has been completely written to memory.
1278 } __attribute__((packed));
1280 /* hwrm_cfa_l2_filter_alloc */
1282 * A filter is used to identify traffic that contains a matching set of
1283 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1284 * other things which then allows the ASIC to direct the incoming traffic
1285 * to an appropriate VNIC or Rx ring.
1288 /* Input (96 bytes) */
1289 struct hwrm_cfa_l2_filter_alloc_input {
1291 * This value indicates what type of request this is. The format for the
1292 * rest of the command is determined by this field.
1297 * This value indicates the what completion ring the request will be
1298 * optionally completed on. If the value is -1, then no CR completion
1299 * will be generated. Any other value must be a valid CR ring_id value
1300 * for this function.
1304 /* This value indicates the command sequence number. */
1308 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1309 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1314 * This is the host address where the response will be written when the
1315 * request is complete. This area must be 16B aligned and must be
1316 * cleared to zero before the request is made.
1321 * Enumeration denoting the RX, TX type of the resource. This
1322 * enumeration is used for resources that are similar for both TX and RX
1323 * paths of the chip.
1325 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1328 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1329 (UINT32_C(0x0) << 0)
1331 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1332 (UINT32_C(0x1) << 0)
1333 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1334 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1336 * Setting of this flag indicates the applicability to the loopback
1339 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1342 * Setting of this flag indicates drop action. If this flag is not set,
1343 * then it should be considered accept action.
1345 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1348 * If this flag is set, all t_l2_* fields are invalid and they should
1349 * not be specified. If this flag is set, then l2_* fields refer to
1350 * fields of outermost L2 header.
1352 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1356 /* This bit must be '1' for the l2_addr field to be configured. */
1357 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1359 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1360 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1362 /* This bit must be '1' for the l2_ovlan field to be configured. */
1363 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1365 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1366 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1368 /* This bit must be '1' for the l2_ivlan field to be configured. */
1369 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1371 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1372 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1374 /* This bit must be '1' for the t_l2_addr field to be configured. */
1375 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1378 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1380 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1382 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1383 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1386 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1388 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1390 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1391 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1394 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1396 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1398 /* This bit must be '1' for the src_type field to be configured. */
1399 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1401 /* This bit must be '1' for the src_id field to be configured. */
1402 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1404 /* This bit must be '1' for the tunnel_type field to be configured. */
1405 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1407 /* This bit must be '1' for the dst_id field to be configured. */
1408 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1411 * This bit must be '1' for the mirror_vnic_id field to be configured.
1413 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1418 * This value sets the match value for the L2 MAC address. Destination
1419 * MAC address for RX path. Source MAC address for TX path.
1427 * This value sets the mask value for the L2 address. A value of 0 will
1428 * mask the corresponding bit from compare.
1430 uint8_t l2_addr_mask[6];
1432 /* This value sets VLAN ID value for outer VLAN. */
1436 * This value sets the mask value for the ovlan id. A value of 0 will
1437 * mask the corresponding bit from compare.
1439 uint16_t l2_ovlan_mask;
1441 /* This value sets VLAN ID value for inner VLAN. */
1445 * This value sets the mask value for the ivlan id. A value of 0 will
1446 * mask the corresponding bit from compare.
1448 uint16_t l2_ivlan_mask;
1454 * This value sets the match value for the tunnel L2 MAC address.
1455 * Destination MAC address for RX path. Source MAC address for TX path.
1457 uint8_t t_l2_addr[6];
1463 * This value sets the mask value for the tunnel L2 address. A value of
1464 * 0 will mask the corresponding bit from compare.
1466 uint8_t t_l2_addr_mask[6];
1468 /* This value sets VLAN ID value for tunnel outer VLAN. */
1469 uint16_t t_l2_ovlan;
1472 * This value sets the mask value for the tunnel ovlan id. A value of 0
1473 * will mask the corresponding bit from compare.
1475 uint16_t t_l2_ovlan_mask;
1477 /* This value sets VLAN ID value for tunnel inner VLAN. */
1478 uint16_t t_l2_ivlan;
1481 * This value sets the mask value for the tunnel ivlan id. A value of 0
1482 * will mask the corresponding bit from compare.
1484 uint16_t t_l2_ivlan_mask;
1486 /* This value identifies the type of source of the packet. */
1488 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1489 (UINT32_C(0x0) << 0)
1490 /* Physical function */
1491 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1492 (UINT32_C(0x1) << 0)
1493 /* Virtual function */
1494 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1495 (UINT32_C(0x2) << 0)
1496 /* Virtual NIC of a function */
1497 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1498 (UINT32_C(0x3) << 0)
1499 /* Embedded processor for CFA management */
1500 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1501 (UINT32_C(0x4) << 0)
1502 /* Embedded processor for OOB management */
1503 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1504 (UINT32_C(0x5) << 0)
1505 /* Embedded processor for RoCE */
1506 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1507 (UINT32_C(0x6) << 0)
1508 /* Embedded processor for network proxy functions */
1509 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1510 (UINT32_C(0x7) << 0)
1515 * This value is the id of the source. For a network port, it represents
1516 * port_id. For a physical function, it represents fid. For a virtual
1517 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1518 * embedded processors, this id is not valid. Notes: 1. The function ID
1519 * is implied if it src_id is not provided for a src_type that is either
1525 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1526 (UINT32_C(0x0) << 0)
1527 /* Virtual eXtensible Local Area Network (VXLAN) */
1528 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1529 (UINT32_C(0x1) << 0)
1531 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1533 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1534 (UINT32_C(0x2) << 0)
1536 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1538 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1539 (UINT32_C(0x3) << 0)
1541 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1542 (UINT32_C(0x4) << 0)
1543 /* Generic Network Virtualization Encapsulation (Geneve) */
1544 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1545 (UINT32_C(0x5) << 0)
1546 /* Multi-Protocol Lable Switching (MPLS) */
1547 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1548 (UINT32_C(0x6) << 0)
1549 /* Stateless Transport Tunnel (STT) */
1550 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1551 (UINT32_C(0x7) << 0)
1553 * Generic Routing Encapsulation (GRE) inside IP datagram
1556 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1557 (UINT32_C(0x8) << 0)
1558 /* Any tunneled traffic */
1559 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1560 (UINT32_C(0xff) << 0)
1561 uint8_t tunnel_type;
1566 * If set, this value shall represent the Logical VNIC ID of the
1567 * destination VNIC for the RX path and network port id of the
1568 * destination port for the TX path.
1572 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1573 uint16_t mirror_vnic_id;
1576 * This hint is provided to help in placing the filter in the filter
1580 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1581 (UINT32_C(0x0) << 0)
1582 /* Above the given filter */
1583 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1584 (UINT32_C(0x1) << 0)
1585 /* Below the given filter */
1586 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1587 (UINT32_C(0x2) << 0)
1588 /* As high as possible */
1589 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1590 (UINT32_C(0x3) << 0)
1591 /* As low as possible */
1592 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1593 (UINT32_C(0x4) << 0)
1600 * This is the ID of the filter that goes along with the pri_hint. This
1601 * field is valid only for the following values. 1 - Above the given
1602 * filter 2 - Below the given filter
1604 uint64_t l2_filter_id_hint;
1605 } __attribute__((packed));
1607 /* Output (24 bytes) */
1608 struct hwrm_cfa_l2_filter_alloc_output {
1610 * Pass/Fail or error type Note: receiver to verify the in parameters,
1611 * and fail the call with an error when appropriate
1613 uint16_t error_code;
1615 /* This field returns the type of original request. */
1618 /* This field provides original sequence number of the command. */
1622 * This field is the length of the response in bytes. The last byte of
1623 * the response is a valid flag that will read as '1' when the command
1624 * has been completely written to memory.
1629 * This value identifies a set of CFA data structures used for an L2
1632 uint64_t l2_filter_id;
1635 * This is the ID of the flow associated with this filter. This value
1636 * shall be used to match and associate the flow identifier returned in
1637 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1646 * This field is used in Output records to indicate that the output is
1647 * completely written to RAM. This field should be read as '1' to
1648 * indicate that the output has been completely written. When writing a
1649 * command completion or response to an internal processor, the order of
1650 * writes has to be such that this field is written last.
1653 } __attribute__((packed));
1655 /* hwrm_cfa_l2_filter_free */
1657 * Description: Free a L2 filter. The HWRM shall free all associated filter
1658 * resources with the L2 filter.
1661 /* Input (24 bytes) */
1662 struct hwrm_cfa_l2_filter_free_input {
1664 * This value indicates what type of request this is. The format for the
1665 * rest of the command is determined by this field.
1670 * This value indicates the what completion ring the request will be
1671 * optionally completed on. If the value is -1, then no CR completion
1672 * will be generated. Any other value must be a valid CR ring_id value
1673 * for this function.
1677 /* This value indicates the command sequence number. */
1681 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1682 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1687 * This is the host address where the response will be written when the
1688 * request is complete. This area must be 16B aligned and must be
1689 * cleared to zero before the request is made.
1694 * This value identifies a set of CFA data structures used for an L2
1697 uint64_t l2_filter_id;
1698 } __attribute__((packed));
1700 /* Output (16 bytes) */
1701 struct hwrm_cfa_l2_filter_free_output {
1703 * Pass/Fail or error type Note: receiver to verify the in parameters,
1704 * and fail the call with an error when appropriate
1706 uint16_t error_code;
1708 /* This field returns the type of original request. */
1711 /* This field provides original sequence number of the command. */
1715 * This field is the length of the response in bytes. The last byte of
1716 * the response is a valid flag that will read as '1' when the command
1717 * has been completely written to memory.
1727 * This field is used in Output records to indicate that the output is
1728 * completely written to RAM. This field should be read as '1' to
1729 * indicate that the output has been completely written. When writing a
1730 * command completion or response to an internal processor, the order of
1731 * writes has to be such that this field is written last.
1734 } __attribute__((packed));
1736 /* hwrm_cfa_l2_set_rx_mask */
1737 /* Description: This command will set rx mask of the function. */
1739 /* Input (40 bytes) */
1740 struct hwrm_cfa_l2_set_rx_mask_input {
1742 * This value indicates what type of request this is. The format for the
1743 * rest of the command is determined by this field.
1748 * This value indicates the what completion ring the request will be
1749 * optionally completed on. If the value is -1, then no CR completion
1750 * will be generated. Any other value must be a valid CR ring_id value
1751 * for this function.
1755 /* This value indicates the command sequence number. */
1759 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1760 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1765 * This is the host address where the response will be written when the
1766 * request is complete. This area must be 16B aligned and must be
1767 * cleared to zero before the request is made.
1774 /* Reserved for future use. */
1775 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
1777 * When this bit is '1', the function is requested to accept multi-cast
1778 * packets specified by the multicast addr table.
1780 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
1782 * When this bit is '1', the function is requested to accept all multi-
1785 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
1787 * When this bit is '1', the function is requested to accept broadcast
1790 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
1792 * When this bit is '1', the function is requested to be put in the
1793 * promiscuous mode. The HWRM should accept any function to set up
1794 * promiscuous mode. The HWRM shall follow the semantics below for the
1795 * promiscuous mode support. # When partitioning is not enabled on a
1796 * port (i.e. single PF on the port), then the PF shall be allowed to be
1797 * in the promiscuous mode. When the PF is in the promiscuous mode, then
1798 * it shall receive all host bound traffic on that port. # When
1799 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
1800 * PF on that port is in the promiscuous mode, then the PF receives all
1801 * traffic within that partition as identified by a unique identifier
1802 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
1803 * specified, then the setting of promiscuous mode on that PF shall
1804 * result in the PF receiving all host bound traffic with matching outer
1805 * VLAN. # A VF shall can be set in the promiscuous mode. In the
1806 * promiscuous mode, the VF does not receive any traffic unless a unique
1807 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
1808 * is specified, then the setting of promiscuous mode on that VF shall
1809 * result in the VF receiving all host bound traffic with the matching
1810 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
1811 * a function independently from the promiscuous mode settings on other
1814 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
1816 * If this flag is set, the corresponding RX filters shall be set up to
1817 * cover multicast/broadcast filters for the outermost Layer 2
1818 * destination MAC address field.
1820 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
1823 /* This is the address for mcast address tbl. */
1824 uint64_t mc_tbl_addr;
1827 * This value indicates how many entries in mc_tbl are valid. Each entry
1830 uint32_t num_mc_entries;
1833 } __attribute__((packed));
1835 /* Output (16 bytes) */
1836 struct hwrm_cfa_l2_set_rx_mask_output {
1838 * Pass/Fail or error type Note: receiver to verify the in parameters,
1839 * and fail the call with an error when appropriate
1841 uint16_t error_code;
1843 /* This field returns the type of original request. */
1846 /* This field provides original sequence number of the command. */
1850 * This field is the length of the response in bytes. The last byte of
1851 * the response is a valid flag that will read as '1' when the command
1852 * has been completely written to memory.
1862 * This field is used in Output records to indicate that the output is
1863 * completely written to RAM. This field should be read as '1' to
1864 * indicate that the output has been completely written. When writing a
1865 * command completion or response to an internal processor, the order of
1866 * writes has to be such that this field is written last.
1869 } __attribute__((packed));
1871 /* hwrm_exec_fwd_resp */
1873 * Description: This command is used to send an encapsulated request to the
1874 * HWRM. This command instructs the HWRM to execute the request and forward the
1875 * response of the encapsulated request to the location specified in the
1876 * original request that is encapsulated. The target id of this command shall be
1877 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1878 * acknowledge the receipt of the encapsulated request and forwarding of the
1882 /* Input (128 bytes) */
1883 struct hwrm_exec_fwd_resp_input {
1885 * This value indicates what type of request this is. The format for the
1886 * rest of the command is determined by this field.
1891 * This value indicates the what completion ring the request will be
1892 * optionally completed on. If the value is -1, then no CR completion
1893 * will be generated. Any other value must be a valid CR ring_id value
1894 * for this function.
1898 /* This value indicates the command sequence number. */
1902 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1903 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1908 * This is the host address where the response will be written when the
1909 * request is complete. This area must be 16B aligned and must be
1910 * cleared to zero before the request is made.
1915 * This is an encapsulated request. This request should be executed by
1916 * the HWRM and the response should be provided in the response buffer
1917 * inside the encapsulated request.
1919 uint32_t encap_request[26];
1922 * This value indicates the target id of the response to the
1923 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1924 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1926 uint16_t encap_resp_target_id;
1928 uint16_t unused_0[3];
1929 } __attribute__((packed));
1931 /* Output (16 bytes) */
1932 struct hwrm_exec_fwd_resp_output {
1934 * Pass/Fail or error type Note: receiver to verify the in parameters,
1935 * and fail the call with an error when appropriate
1937 uint16_t error_code;
1939 /* This field returns the type of original request. */
1942 /* This field provides original sequence number of the command. */
1946 * This field is the length of the response in bytes. The last byte of
1947 * the response is a valid flag that will read as '1' when the command
1948 * has been completely written to memory.
1958 * This field is used in Output records to indicate that the output is
1959 * completely written to RAM. This field should be read as '1' to
1960 * indicate that the output has been completely written. When writing a
1961 * command completion or response to an internal processor, the order of
1962 * writes has to be such that this field is written last.
1965 } __attribute__((packed));
1967 /* hwrm_func_qcaps */
1969 * Description: This command returns capabilities of a function. The input FID
1970 * value is used to indicate what function is being queried. This allows a
1971 * physical function driver to query virtual functions that are children of the
1972 * physical function. The output FID value is needed to configure Rings and
1973 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1976 /* Input (24 bytes) */
1977 struct hwrm_func_qcaps_input {
1979 * This value indicates what type of request this is. The format for the
1980 * rest of the command is determined by this field.
1985 * This value indicates the what completion ring the request will be
1986 * optionally completed on. If the value is -1, then no CR completion
1987 * will be generated. Any other value must be a valid CR ring_id value
1988 * for this function.
1992 /* This value indicates the command sequence number. */
1996 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1997 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2002 * This is the host address where the response will be written when the
2003 * request is complete. This area must be 16B aligned and must be
2004 * cleared to zero before the request is made.
2009 * Function ID of the function that is being queried. 0xFF... (All Fs)
2010 * if the query is for the requesting function.
2014 uint16_t unused_0[3];
2015 } __attribute__((packed));
2017 /* Output (80 bytes) */
2018 struct hwrm_func_qcaps_output {
2020 * Pass/Fail or error type Note: receiver to verify the in parameters,
2021 * and fail the call with an error when appropriate
2023 uint16_t error_code;
2025 /* This field returns the type of original request. */
2028 /* This field provides original sequence number of the command. */
2032 * This field is the length of the response in bytes. The last byte of
2033 * the response is a valid flag that will read as '1' when the command
2034 * has been completely written to memory.
2039 * FID value. This value is used to identify operations on the PCI bus
2040 * as belonging to a particular PCI function.
2045 * Port ID of port that this function is associated with. Valid only for
2046 * the PF. 0xFF... (All Fs) if this function is not associated with any
2047 * port. 0xFF... (All Fs) if this function is called from a VF.
2051 /* If 1, then Push mode is supported on this function. */
2052 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2054 * If 1, then the global MSI-X auto-masking is enabled for the device.
2056 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2059 * If 1, then the Precision Time Protocol (PTP) processing is supported
2060 * on this function. The HWRM should enable PTP on only a single
2061 * Physical Function (PF) per port.
2063 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2067 * This value is current MAC address configured for this function. A
2068 * value of 00-00-00-00-00-00 indicates no MAC address is currently
2071 uint8_t perm_mac_address[6];
2074 * The maximum number of RSS/COS contexts that can be allocated to the
2077 uint16_t max_rsscos_ctx;
2080 * The maximum number of completion rings that can be allocated to the
2083 uint16_t max_cmpl_rings;
2086 * The maximum number of transmit rings that can be allocated to the
2089 uint16_t max_tx_rings;
2092 * The maximum number of receive rings that can be allocated to the
2095 uint16_t max_rx_rings;
2098 * The maximum number of L2 contexts that can be allocated to the
2101 uint16_t max_l2_ctxs;
2103 /* The maximum number of VNICs that can be allocated to the function. */
2107 * The identifier for the first VF enabled on a PF. This is valid only
2108 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
2109 * called on a PF with SR-IOV disabled or on a VF.
2111 uint16_t first_vf_id;
2114 * The maximum number of VFs that can be allocated to the function. This
2115 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
2116 * command is called on a PF with SR-IOV disabled or on a VF.
2121 * The maximum number of statistic contexts that can be allocated to the
2124 uint16_t max_stat_ctx;
2127 * The maximum number of Encapsulation records that can be offloaded by
2130 uint32_t max_encap_records;
2133 * The maximum number of decapsulation records that can be offloaded by
2136 uint32_t max_decap_records;
2139 * The maximum number of Exact Match (EM) flows that can be offloaded by
2140 * this function on the TX side.
2142 uint32_t max_tx_em_flows;
2145 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2146 * by this function on the TX side.
2148 uint32_t max_tx_wm_flows;
2151 * The maximum number of Exact Match (EM) flows that can be offloaded by
2152 * this function on the RX side.
2154 uint32_t max_rx_em_flows;
2157 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2158 * by this function on the RX side.
2160 uint32_t max_rx_wm_flows;
2163 * The maximum number of multicast filters that can be supported by this
2164 * function on the RX side.
2166 uint32_t max_mcast_filters;
2169 * The maximum value of flow_id that can be supported in completion
2172 uint32_t max_flow_id;
2175 * The maximum number of HW ring groups that can be supported on this
2178 uint32_t max_hw_ring_grps;
2185 * This field is used in Output records to indicate that the output is
2186 * completely written to RAM. This field should be read as '1' to
2187 * indicate that the output has been completely written. When writing a
2188 * command completion or response to an internal processor, the order of
2189 * writes has to be such that this field is written last.
2192 } __attribute__((packed));
2194 /* hwrm_func_reset */
2196 * Description: This command resets a hardware function (PCIe function) and
2197 * frees any resources used by the function. This command shall be initiated by
2198 * the driver after an FLR has occurred to prepare the function for re-use. This
2199 * command may also be initiated by a driver prior to doing it's own
2200 * configuration. This command puts the function into the reset state. In the
2201 * reset state, global and port related features of the chip are not available.
2204 * Note: This command will reset a function that has already been disabled or
2205 * idled. The command returns all the resources owned by the function so a new
2206 * driver may allocate and configure resources normally.
2209 /* Input (24 bytes) */
2210 struct hwrm_func_reset_input {
2212 * This value indicates what type of request this is. The format for the
2213 * rest of the command is determined by this field.
2218 * This value indicates the what completion ring the request will be
2219 * optionally completed on. If the value is -1, then no CR completion
2220 * will be generated. Any other value must be a valid CR ring_id value
2221 * for this function.
2225 /* This value indicates the command sequence number. */
2229 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2230 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2235 * This is the host address where the response will be written when the
2236 * request is complete. This area must be 16B aligned and must be
2237 * cleared to zero before the request is made.
2241 /* This bit must be '1' for the vf_id_valid field to be configured. */
2242 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2247 * The ID of the VF that this PF is trying to reset. Only the parent PF
2248 * shall be allowed to reset a child VF. A parent PF driver shall use
2249 * this field only when a specific child VF is requested to be reset.
2253 /* This value indicates the level of a function reset. */
2255 * Reset the caller function and its children VFs (if any). If
2256 * no children functions exist, then reset the caller function
2259 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2260 (UINT32_C(0x0) << 0)
2261 /* Reset the caller function only */
2262 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2263 (UINT32_C(0x1) << 0)
2265 * Reset all children VFs of the caller function driver if the
2266 * caller is a PF driver. It is an error to specify this level
2267 * by a VF driver. It is an error to specify this level by a PF
2268 * driver with no children VFs.
2270 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2271 (UINT32_C(0x2) << 0)
2273 * Reset a specific VF of the caller function driver if the
2274 * caller is the parent PF driver. It is an error to specify
2275 * this level by a VF driver. It is an error to specify this
2276 * level by a PF driver that is not the parent of the VF that is
2277 * being requested to reset.
2279 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2280 (UINT32_C(0x3) << 0)
2281 uint8_t func_reset_level;
2284 } __attribute__((packed));
2286 /* Output (16 bytes) */
2287 struct hwrm_func_reset_output {
2289 * Pass/Fail or error type Note: receiver to verify the in parameters,
2290 * and fail the call with an error when appropriate
2292 uint16_t error_code;
2294 /* This field returns the type of original request. */
2297 /* This field provides original sequence number of the command. */
2301 * This field is the length of the response in bytes. The last byte of
2302 * the response is a valid flag that will read as '1' when the command
2303 * has been completely written to memory.
2313 * This field is used in Output records to indicate that the output is
2314 * completely written to RAM. This field should be read as '1' to
2315 * indicate that the output has been completely written. When writing a
2316 * command completion or response to an internal processor, the order of
2317 * writes has to be such that this field is written last.
2320 } __attribute__((packed));
2322 /* hwrm_port_phy_cfg */
2324 * Description: This command configures the PHY device for the port. It allows
2325 * setting of the most generic settings for the PHY. The HWRM shall complete
2326 * this command as soon as PHY settings are configured. They may not be applied
2327 * when the command response is provided. A VF driver shall not be allowed to
2328 * configure PHY using this command. In a network partition mode, a PF driver
2329 * shall not be allowed to configure PHY using this command.
2332 /* Input (56 bytes) */
2333 struct hwrm_port_phy_cfg_input {
2335 * This value indicates what type of request this is. The format for the
2336 * rest of the command is determined by this field.
2341 * This value indicates the what completion ring the request will be
2342 * optionally completed on. If the value is -1, then no CR completion
2343 * will be generated. Any other value must be a valid CR ring_id value
2344 * for this function.
2348 /* This value indicates the command sequence number. */
2352 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2353 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2358 * This is the host address where the response will be written when the
2359 * request is complete. This area must be 16B aligned and must be
2360 * cleared to zero before the request is made.
2365 * When this bit is set to '1', the PHY for the port shall be reset. #
2366 * If this bit is set to 1, then the HWRM shall reset the PHY after
2367 * applying PHY configuration changes specified in this command. # In
2368 * order to guarantee that PHY configuration changes specified in this
2369 * command take effect, the HWRM client should set this flag to 1. # If
2370 * this bit is not set to 1, then the HWRM may reset the PHY depending
2371 * on the current PHY configuration and settings specified in this
2374 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2376 * When this bit is set to '1', the link shall be forced to be taken
2377 * down. # When this bit is set to '1", all other command input settings
2378 * related to the link speed shall be ignored. Once the link state is
2379 * forced down, it can be explicitly cleared from that state by setting
2380 * this flag to '0'. # If this flag is set to '0', then the link shall
2381 * be cleared from forced down state if the link is in forced down
2382 * state. There may be conditions (e.g. out-of-band or sideband
2383 * configuration changes for the link) outside the scope of the HWRM
2384 * implementation that may clear forced down link state.
2386 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2388 * When this bit is set to '1', the link shall be forced to the
2389 * force_link_speed value. When this bit is set to '1', the HWRM client
2390 * should not enable any of the auto negotiation related fields
2391 * represented by auto_XXX fields in this command. When this bit is set
2392 * to '1' and the HWRM client has enabled a auto_XXX field in this
2393 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2394 * this bit is set to zero, the link shall be allowed to autoneg.
2396 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2398 * When this bit is set to '1', the auto-negotiation process shall be
2399 * restarted on the link.
2401 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2403 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2404 * requested to be enabled on this link. If EEE is not supported on this
2405 * port, then this flag shall be ignored by the HWRM.
2407 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2409 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2410 * requested to be disabled on this link. If EEE is not supported on
2411 * this port, then this flag shall be ignored by the HWRM.
2413 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2415 * When this bit is set to '1' and EEE is enabled on this link, then TX
2416 * LPI is requested to be enabled on the link. If EEE is not supported
2417 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2418 * disabled on this port, then this flag shall be ignored by the HWRM.
2420 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2423 /* This bit must be '1' for the auto_mode field to be configured. */
2424 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2425 /* This bit must be '1' for the auto_duplex field to be configured. */
2426 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2427 /* This bit must be '1' for the auto_pause field to be configured. */
2428 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2430 * This bit must be '1' for the auto_link_speed field to be configured.
2432 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2434 * This bit must be '1' for the auto_link_speed_mask field to be
2437 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2439 /* This bit must be '1' for the wirespeed field to be configured. */
2440 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2441 /* This bit must be '1' for the lpbk field to be configured. */
2442 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2443 /* This bit must be '1' for the preemphasis field to be configured. */
2444 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2445 /* This bit must be '1' for the force_pause field to be configured. */
2446 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2448 * This bit must be '1' for the eee_link_speed_mask field to be
2451 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2453 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2454 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2457 /* Port ID of port that is to be configured. */
2461 * This is the speed that will be used if the force bit is '1'. If
2462 * unsupported speed is selected, an error will be generated.
2464 /* 100Mb link speed */
2465 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2466 (UINT32_C(0x1) << 0)
2467 /* 1Gb link speed */
2468 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2469 (UINT32_C(0xa) << 0)
2470 /* 2Gb link speed */
2471 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2472 (UINT32_C(0x14) << 0)
2473 /* 2.5Gb link speed */
2474 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2475 (UINT32_C(0x19) << 0)
2476 /* 10Gb link speed */
2477 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2478 (UINT32_C(0x64) << 0)
2479 /* 20Mb link speed */
2480 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2481 (UINT32_C(0xc8) << 0)
2482 /* 25Gb link speed */
2483 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2484 (UINT32_C(0xfa) << 0)
2485 /* 40Gb link speed */
2486 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2487 (UINT32_C(0x190) << 0)
2488 /* 50Gb link speed */
2489 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2490 (UINT32_C(0x1f4) << 0)
2491 /* 100Gb link speed */
2492 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2493 (UINT32_C(0x3e8) << 0)
2494 /* 10Mb link speed */
2495 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2496 (UINT32_C(0xffff) << 0)
2497 uint16_t force_link_speed;
2500 * This value is used to identify what autoneg mode is used when the
2501 * link speed is not being forced.
2504 * Disable autoneg or autoneg disabled. No speeds are selected.
2506 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2507 /* Select all possible speeds for autoneg mode. */
2508 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2509 (UINT32_C(0x1) << 0)
2511 * Select only the auto_link_speed speed for autoneg mode. This
2512 * mode has been DEPRECATED. An HWRM client should not use this
2515 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2516 (UINT32_C(0x2) << 0)
2518 * Select the auto_link_speed or any speed below that speed for
2519 * autoneg. This mode has been DEPRECATED. An HWRM client should
2520 * not use this mode.
2522 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2523 (UINT32_C(0x3) << 0)
2525 * Select the speeds based on the corresponding link speed mask
2526 * value that is provided.
2528 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2529 (UINT32_C(0x4) << 0)
2533 * This is the duplex setting that will be used if the autoneg_mode is
2534 * "one_speed" or "one_or_below".
2536 /* Half Duplex will be requested. */
2537 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2538 (UINT32_C(0x0) << 0)
2539 /* Full duplex will be requested. */
2540 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2541 (UINT32_C(0x1) << 0)
2542 /* Both Half and Full dupex will be requested. */
2543 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2544 (UINT32_C(0x2) << 0)
2545 uint8_t auto_duplex;
2548 * This value is used to configure the pause that will be used for
2549 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2552 * When this bit is '1', Generation of tx pause messages has been
2553 * requested. Disabled otherwise.
2555 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2557 * When this bit is '1', Reception of rx pause messages has been
2558 * requested. Disabled otherwise.
2560 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2562 * When set to 1, the advertisement of pause is enabled. # When the
2563 * auto_mode is not set to none and this flag is set to 1, then the
2564 * auto_pause bits on this port are being advertised and autoneg pause
2565 * results are being interpreted. # When the auto_mode is not set to
2566 * none and this flag is set to 0, the pause is forced as indicated in
2567 * force_pause, and also advertised as auto_pause bits, but the autoneg
2568 * results are not interpreted since the pause configuration is being
2569 * forced. # When the auto_mode is set to none and this flag is set to
2570 * 1, auto_pause bits should be ignored and should be set to 0.
2572 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2578 * This is the speed that will be used if the autoneg_mode is
2579 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2580 * an error will be generated.
2582 /* 100Mb link speed */
2583 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2584 (UINT32_C(0x1) << 0)
2585 /* 1Gb link speed */
2586 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2587 (UINT32_C(0xa) << 0)
2588 /* 2Gb link speed */
2589 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2590 (UINT32_C(0x14) << 0)
2591 /* 2.5Gb link speed */
2592 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2593 (UINT32_C(0x19) << 0)
2594 /* 10Gb link speed */
2595 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2596 (UINT32_C(0x64) << 0)
2597 /* 20Mb link speed */
2598 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2599 (UINT32_C(0xc8) << 0)
2600 /* 25Gb link speed */
2601 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2602 (UINT32_C(0xfa) << 0)
2603 /* 40Gb link speed */
2604 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2605 (UINT32_C(0x190) << 0)
2606 /* 50Gb link speed */
2607 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2608 (UINT32_C(0x1f4) << 0)
2609 /* 100Gb link speed */
2610 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2611 (UINT32_C(0x3e8) << 0)
2612 /* 10Mb link speed */
2613 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2614 (UINT32_C(0xffff) << 0)
2615 uint16_t auto_link_speed;
2618 * This is a mask of link speeds that will be used if autoneg_mode is
2619 * "mask". If unsupported speed is enabled an error will be generated.
2621 /* 100Mb link speed (Half-duplex) */
2622 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2624 /* 100Mb link speed (Full-duplex) */
2625 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2627 /* 1Gb link speed (Half-duplex) */
2628 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2630 /* 1Gb link speed (Full-duplex) */
2631 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2633 /* 2Gb link speed */
2634 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2636 /* 2.5Gb link speed */
2637 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2639 /* 10Gb link speed */
2640 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2642 /* 20Gb link speed */
2643 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2645 /* 25Gb link speed */
2646 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2648 /* 40Gb link speed */
2649 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2651 /* 50Gb link speed */
2652 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2654 /* 100Gb link speed */
2655 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2657 /* 10Mb link speed (Half-duplex) */
2658 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2660 /* 10Mb link speed (Full-duplex) */
2661 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2663 uint16_t auto_link_speed_mask;
2665 /* This value controls the wirespeed feature. */
2666 /* Wirespeed feature is disabled. */
2667 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2668 /* Wirespeed feature is enabled. */
2669 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2672 /* This value controls the loopback setting for the PHY. */
2673 /* No loopback is selected. Normal operation. */
2674 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2676 * The HW will be configured with local loopback such that host
2677 * data is sent back to the host without modification.
2679 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2681 * The HW will be configured with remote loopback such that port
2682 * logic will send packets back out the transmitter that are
2685 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2689 * This value is used to configure the pause that will be used for force
2693 * When this bit is '1', Generation of tx pause messages is supported.
2694 * Disabled otherwise.
2696 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2698 * When this bit is '1', Reception of rx pause messages is supported.
2699 * Disabled otherwise.
2701 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2702 uint8_t force_pause;
2707 * This value controls the pre-emphasis to be used for the link. Driver
2708 * should not set this value (use enable.preemphasis = 0) unless driver
2709 * is sure of setting. Normally HWRM FW will determine proper pre-
2712 uint32_t preemphasis;
2715 * Setting for link speed mask that is used to advertise speeds during
2716 * autonegotiation when EEE is enabled. This field is valid only when
2717 * EEE is enabled. The speeds specified in this field shall be a subset
2718 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2719 * at least one speed shall be provided in this mask.
2722 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2723 /* 100Mb link speed (Full-duplex) */
2724 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2726 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2727 /* 1Gb link speed (Full-duplex) */
2728 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2730 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2733 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2735 /* 10Gb link speed */
2736 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2738 uint16_t eee_link_speed_mask;
2744 * Reuested setting of TX LPI timer in microseconds. This field is valid
2745 * only when EEE is enabled and TX LPI is enabled.
2747 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2749 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2750 uint32_t tx_lpi_timer;
2753 } __attribute__((packed));
2755 /* Output (16 bytes) */
2756 struct hwrm_port_phy_cfg_output {
2758 * Pass/Fail or error type Note: receiver to verify the in parameters,
2759 * and fail the call with an error when appropriate
2761 uint16_t error_code;
2763 /* This field returns the type of original request. */
2766 /* This field provides original sequence number of the command. */
2770 * This field is the length of the response in bytes. The last byte of
2771 * the response is a valid flag that will read as '1' when the command
2772 * has been completely written to memory.
2782 * This field is used in Output records to indicate that the output is
2783 * completely written to RAM. This field should be read as '1' to
2784 * indicate that the output has been completely written. When writing a
2785 * command completion or response to an internal processor, the order of
2786 * writes has to be such that this field is written last.
2789 } __attribute__((packed));
2793 * Description: This function is called by a driver to determine the HWRM
2794 * interface version supported by the HWRM firmware, the version of HWRM
2795 * firmware implementation, the name of HWRM firmware, the versions of other
2796 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2797 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2798 * be considered an invalid version.
2801 /* Input (24 bytes) */
2802 struct hwrm_ver_get_input {
2804 * This value indicates what type of request this is. The format for the
2805 * rest of the command is determined by this field.
2810 * This value indicates the what completion ring the request will be
2811 * optionally completed on. If the value is -1, then no CR completion
2812 * will be generated. Any other value must be a valid CR ring_id value
2813 * for this function.
2817 /* This value indicates the command sequence number. */
2821 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2822 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2827 * This is the host address where the response will be written when the
2828 * request is complete. This area must be 16B aligned and must be
2829 * cleared to zero before the request is made.
2834 * This field represents the major version of HWRM interface
2835 * specification supported by the driver HWRM implementation. The
2836 * interface major version is intended to change only when non backward
2837 * compatible changes are made to the HWRM interface specification.
2839 uint8_t hwrm_intf_maj;
2842 * This field represents the minor version of HWRM interface
2843 * specification supported by the driver HWRM implementation. A change
2844 * in interface minor version is used to reflect significant backward
2845 * compatible modification to HWRM interface specification. This can be
2846 * due to addition or removal of functionality. HWRM interface
2847 * specifications with the same major version but different minor
2848 * versions are compatible.
2850 uint8_t hwrm_intf_min;
2853 * This field represents the update version of HWRM interface
2854 * specification supported by the driver HWRM implementation. The
2855 * interface update version is used to reflect minor changes or bug
2856 * fixes to a released HWRM interface specification.
2858 uint8_t hwrm_intf_upd;
2860 uint8_t unused_0[5];
2861 } __attribute__((packed));
2863 /* Output (128 bytes) */
2864 struct hwrm_ver_get_output {
2866 * Pass/Fail or error type Note: receiver to verify the in parameters,
2867 * and fail the call with an error when appropriate
2869 uint16_t error_code;
2871 /* This field returns the type of original request. */
2874 /* This field provides original sequence number of the command. */
2878 * This field is the length of the response in bytes. The last byte of
2879 * the response is a valid flag that will read as '1' when the command
2880 * has been completely written to memory.
2885 * This field represents the major version of HWRM interface
2886 * specification supported by the HWRM implementation. The interface
2887 * major version is intended to change only when non backward compatible
2888 * changes are made to the HWRM interface specification. A HWRM
2889 * implementation that is compliant with this specification shall
2890 * provide value of 1 in this field.
2892 uint8_t hwrm_intf_maj;
2895 * This field represents the minor version of HWRM interface
2896 * specification supported by the HWRM implementation. A change in
2897 * interface minor version is used to reflect significant backward
2898 * compatible modification to HWRM interface specification. This can be
2899 * due to addition or removal of functionality. HWRM interface
2900 * specifications with the same major version but different minor
2901 * versions are compatible. A HWRM implementation that is compliant with
2902 * this specification shall provide value of 0 in this field.
2904 uint8_t hwrm_intf_min;
2907 * This field represents the update version of HWRM interface
2908 * specification supported by the HWRM implementation. The interface
2909 * update version is used to reflect minor changes or bug fixes to a
2910 * released HWRM interface specification. A HWRM implementation that is
2911 * compliant with this specification shall provide value of 1 in this
2914 uint8_t hwrm_intf_upd;
2916 uint8_t hwrm_intf_rsvd;
2919 * This field represents the major version of HWRM firmware. A change in
2920 * firmware major version represents a major firmware release.
2922 uint8_t hwrm_fw_maj;
2925 * This field represents the minor version of HWRM firmware. A change in
2926 * firmware minor version represents significant firmware functionality
2929 uint8_t hwrm_fw_min;
2932 * This field represents the build version of HWRM firmware. A change in
2933 * firmware build version represents bug fixes to a released firmware.
2935 uint8_t hwrm_fw_bld;
2938 * This field is a reserved field. This field can be used to represent
2939 * firmware branches or customer specific releases tied to a specific
2940 * (major,minor,update) version of the HWRM firmware.
2942 uint8_t hwrm_fw_rsvd;
2945 * This field represents the major version of mgmt firmware. A change in
2946 * major version represents a major release.
2948 uint8_t mgmt_fw_maj;
2951 * This field represents the minor version of mgmt firmware. A change in
2952 * minor version represents significant functionality changes.
2954 uint8_t mgmt_fw_min;
2957 * This field represents the build version of mgmt firmware. A change in
2958 * update version represents bug fixes.
2960 uint8_t mgmt_fw_bld;
2963 * This field is a reserved field. This field can be used to represent
2964 * firmware branches or customer specific releases tied to a specific
2965 * (major,minor,update) version
2967 uint8_t mgmt_fw_rsvd;
2970 * This field represents the major version of network control firmware.
2971 * A change in major version represents a major release.
2973 uint8_t netctrl_fw_maj;
2976 * This field represents the minor version of network control firmware.
2977 * A change in minor version represents significant functionality
2980 uint8_t netctrl_fw_min;
2983 * This field represents the build version of network control firmware.
2984 * A change in update version represents bug fixes.
2986 uint8_t netctrl_fw_bld;
2989 * This field is a reserved field. This field can be used to represent
2990 * firmware branches or customer specific releases tied to a specific
2991 * (major,minor,update) version
2993 uint8_t netctrl_fw_rsvd;
2996 * This field is reserved for future use. The responder should set it to
2997 * 0. The requester should ignore this field.
3002 * This field represents the major version of RoCE firmware. A change in
3003 * major version represents a major release.
3005 uint8_t roce_fw_maj;
3008 * This field represents the minor version of RoCE firmware. A change in
3009 * minor version represents significant functionality changes.
3011 uint8_t roce_fw_min;
3014 * This field represents the build version of RoCE firmware. A change in
3015 * update version represents bug fixes.
3017 uint8_t roce_fw_bld;
3020 * This field is a reserved field. This field can be used to represent
3021 * firmware branches or customer specific releases tied to a specific
3022 * (major,minor,update) version
3024 uint8_t roce_fw_rsvd;
3027 * This field represents the name of HWRM FW (ASCII chars without NULL
3030 char hwrm_fw_name[16];
3033 * This field represents the name of mgmt FW (ASCII chars without NULL
3036 char mgmt_fw_name[16];
3039 * This field represents the name of network control firmware (ASCII
3040 * chars without NULL at the end).
3042 char netctrl_fw_name[16];
3045 * This field is reserved for future use. The responder should set it to
3046 * 0. The requester should ignore this field.
3048 uint32_t reserved2[4];
3051 * This field represents the name of RoCE FW (ASCII chars without NULL
3054 char roce_fw_name[16];
3056 /* This field returns the chip number. */
3059 /* This field returns the revision of chip. */
3062 /* This field returns the chip metal number. */
3065 /* This field returns the bond id of the chip. */
3066 uint8_t chip_bond_id;
3069 * This value indicates the type of platform used for chip
3073 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
3074 (UINT32_C(0x0) << 0)
3075 /* FPGA platform of the chip. */
3076 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
3077 (UINT32_C(0x1) << 0)
3078 /* Palladium platform of the chip. */
3079 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
3080 (UINT32_C(0x2) << 0)
3081 uint8_t chip_platform_type;
3084 * This field returns the maximum value of request window that is
3085 * supported by the HWRM. The request window is mapped into device
3086 * address space using MMIO.
3088 uint16_t max_req_win_len;
3091 * This field returns the maximum value of response buffer in bytes. If
3092 * a request specifies the response buffer length that is greater than
3093 * this value, then the HWRM should fail it. The value of this field
3094 * shall be 4KB or more.
3096 uint16_t max_resp_len;
3099 * This field returns the default request timeout value in milliseconds.
3101 uint16_t def_req_timeout;
3108 * This field is used in Output records to indicate that the output is
3109 * completely written to RAM. This field should be read as '1' to
3110 * indicate that the output has been completely written. When writing a
3111 * command completion or response to an internal processor, the order of
3112 * writes has to be such that this field is written last.
3115 } __attribute__((packed));
3117 /* hwrm_queue_qportcfg */
3119 * Description: This function is called by a driver to query queue configuration
3120 * of a port. # The HWRM shall at least advertise one queue with lossy service
3121 * profile. # The driver shall use this command to query queue ids before
3122 * configuring or using any queues. # If a service profile is not set for a
3123 * queue, then the driver shall not use that queue without configuring a service
3124 * profile for it. # If the driver is not allowed to configure service profiles,
3125 * then the driver shall only use queues for which service profiles are pre-
3129 /* Input (24 bytes) */
3130 struct hwrm_queue_qportcfg_input {
3132 * This value indicates what type of request this is. The format for the
3133 * rest of the command is determined by this field.
3138 * This value indicates the what completion ring the request will be
3139 * optionally completed on. If the value is -1, then no CR completion
3140 * will be generated. Any other value must be a valid CR ring_id value
3141 * for this function.
3145 /* This value indicates the command sequence number. */
3149 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3150 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3155 * This is the host address where the response will be written when the
3156 * request is complete. This area must be 16B aligned and must be
3157 * cleared to zero before the request is made.
3162 * Enumeration denoting the RX, TX type of the resource. This
3163 * enumeration is used for resources that are similar for both TX and RX
3164 * paths of the chip.
3166 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3169 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3170 (UINT32_C(0x0) << 0)
3172 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3173 (UINT32_C(0x1) << 0)
3174 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3175 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3179 * Port ID of port for which the queue configuration is being queried.
3180 * This field is only required when sent by IPC.
3185 } __attribute__((packed));
3187 /* hwrm_stat_ctx_alloc */
3189 * Description: This command allocates and does basic preparation for a stat
3193 /* Input (32 bytes) */
3194 struct hwrm_stat_ctx_alloc_input {
3196 * This value indicates what type of request this is. The format for the
3197 * rest of the command is determined by this field.
3202 * This value indicates the what completion ring the request will be
3203 * optionally completed on. If the value is -1, then no CR completion
3204 * will be generated. Any other value must be a valid CR ring_id value
3205 * for this function.
3209 /* This value indicates the command sequence number. */
3213 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3214 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3219 * This is the host address where the response will be written when the
3220 * request is complete. This area must be 16B aligned and must be
3221 * cleared to zero before the request is made.
3225 /* This is the address for statistic block. */
3226 uint64_t stats_dma_addr;
3229 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
3232 uint32_t update_period_ms;
3235 } __attribute__((packed));
3237 /* Output (16 bytes) */
3238 struct hwrm_stat_ctx_alloc_output {
3240 * Pass/Fail or error type Note: receiver to verify the in parameters,
3241 * and fail the call with an error when appropriate
3243 uint16_t error_code;
3245 /* This field returns the type of original request. */
3248 /* This field provides original sequence number of the command. */
3252 * This field is the length of the response in bytes. The last byte of
3253 * the response is a valid flag that will read as '1' when the command
3254 * has been completely written to memory.
3258 /* This is the statistics context ID value. */
3259 uint32_t stat_ctx_id;
3266 * This field is used in Output records to indicate that the output is
3267 * completely written to RAM. This field should be read as '1' to
3268 * indicate that the output has been completely written. When writing a
3269 * command completion or response to an internal processor, the order of
3270 * writes has to be such that this field is written last.
3273 } __attribute__((packed));
3275 /* hwrm_stat_ctx_clr_stats */
3276 /* Description: This command clears statistics of a context. */
3278 /* Input (24 bytes) */
3279 struct hwrm_stat_ctx_clr_stats_input {
3281 * This value indicates what type of request this is. The format for the
3282 * rest of the command is determined by this field.
3287 * This value indicates the what completion ring the request will be
3288 * optionally completed on. If the value is -1, then no CR completion
3289 * will be generated. Any other value must be a valid CR ring_id value
3290 * for this function.
3294 /* This value indicates the command sequence number. */
3298 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3299 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3304 * This is the host address where the response will be written when the
3305 * request is complete. This area must be 16B aligned and must be
3306 * cleared to zero before the request is made.
3310 /* ID of the statistics context that is being queried. */
3311 uint32_t stat_ctx_id;
3314 } __attribute__((packed));
3316 /* Output (16 bytes) */
3317 struct hwrm_stat_ctx_clr_stats_output {
3319 * Pass/Fail or error type Note: receiver to verify the in parameters,
3320 * and fail the call with an error when appropriate
3322 uint16_t error_code;
3324 /* This field returns the type of original request. */
3327 /* This field provides original sequence number of the command. */
3331 * This field is the length of the response in bytes. The last byte of
3332 * the response is a valid flag that will read as '1' when the command
3333 * has been completely written to memory.
3343 * This field is used in Output records to indicate that the output is
3344 * completely written to RAM. This field should be read as '1' to
3345 * indicate that the output has been completely written. When writing a
3346 * command completion or response to an internal processor, the order of
3347 * writes has to be such that this field is written last.
3350 } __attribute__((packed));
3352 /* hwrm_vnic_alloc */
3354 * Description: This VNIC is a resource in the RX side of the chip that is used
3355 * to represent a virtual host "interface". # At the time of VNIC allocation or
3356 * configuration, the function can specify whether it wants the requested VNIC
3357 * to be the default VNIC for the function or not. # If a function requests
3358 * allocation of a VNIC for the first time and a VNIC is successfully allocated
3359 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
3360 * for that function. # The default VNIC shall be used for the default action
3361 * for a partition or function. # For each VNIC allocated on a function, a
3362 * mapping on the RX side to map the allocated VNIC to source virtual interface
3363 * shall be performed by the HWRM. This should be hidden to the function driver
3364 * requesting the VNIC allocation. This enables broadcast/multicast replication
3365 * with source knockout. # If multicast replication with source knockout is
3366 * enabled, then the internal VNIC to SVIF mapping data structures shall be
3367 * programmed at the time of VNIC allocation.
3370 /* Input (24 bytes) */
3371 struct hwrm_vnic_alloc_input {
3373 * This value indicates what type of request this is. The format for the
3374 * rest of the command is determined by this field.
3379 * This value indicates the what completion ring the request will be
3380 * optionally completed on. If the value is -1, then no CR completion
3381 * will be generated. Any other value must be a valid CR ring_id value
3382 * for this function.
3386 /* This value indicates the command sequence number. */
3390 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3391 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3396 * This is the host address where the response will be written when the
3397 * request is complete. This area must be 16B aligned and must be
3398 * cleared to zero before the request is made.
3403 * When this bit is '1', this VNIC is requested to be the default VNIC
3404 * for this function.
3406 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3410 } __attribute__((packed));
3412 /* Output (16 bytes) */
3413 struct hwrm_vnic_alloc_output {
3415 * Pass/Fail or error type Note: receiver to verify the in parameters,
3416 * and fail the call with an error when appropriate
3418 uint16_t error_code;
3420 /* This field returns the type of original request. */
3423 /* This field provides original sequence number of the command. */
3427 * This field is the length of the response in bytes. The last byte of
3428 * the response is a valid flag that will read as '1' when the command
3429 * has been completely written to memory.
3433 /* Logical vnic ID */
3441 * This field is used in Output records to indicate that the output is
3442 * completely written to RAM. This field should be read as '1' to
3443 * indicate that the output has been completely written. When writing a
3444 * command completion or response to an internal processor, the order of
3445 * writes has to be such that this field is written last.
3448 } __attribute__((packed));
3451 /* Description: Configure the RX VNIC structure. */
3453 /* Input (40 bytes) */
3454 struct hwrm_vnic_cfg_input {
3456 * This value indicates what type of request this is. The format for the
3457 * rest of the command is determined by this field.
3462 * This value indicates the what completion ring the request will be
3463 * optionally completed on. If the value is -1, then no CR completion
3464 * will be generated. Any other value must be a valid CR ring_id value
3465 * for this function.
3469 /* This value indicates the command sequence number. */
3473 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3474 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3479 * This is the host address where the response will be written when the
3480 * request is complete. This area must be 16B aligned and must be
3481 * cleared to zero before the request is made.
3486 * When this bit is '1', the VNIC is requested to be the default VNIC
3489 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3491 * When this bit is '1', the VNIC is being configured to strip VLAN in
3492 * the RX path. If set to '0', then VLAN stripping is disabled on this
3495 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
3497 * When this bit is '1', the VNIC is being configured to buffer receive
3498 * packets in the hardware until the host posts new receive buffers. If
3499 * set to '0', then bd_stall is being configured to be disabled on this
3502 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
3504 * When this bit is '1', the VNIC is being configured to receive both
3505 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
3506 * configured to be operating in dual VNIC mode.
3508 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
3510 * When this flag is set to '1', the VNIC is requested to be configured
3511 * to receive only RoCE traffic. If this flag is set to '0', then this
3512 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
3513 * to '1', then the HWRM client shall not set this flag to '1'.
3515 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
3518 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
3519 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
3520 /* This bit must be '1' for the rss_rule field to be configured. */
3521 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
3522 /* This bit must be '1' for the cos_rule field to be configured. */
3523 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
3524 /* This bit must be '1' for the lb_rule field to be configured. */
3525 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
3526 /* This bit must be '1' for the mru field to be configured. */
3527 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
3530 /* Logical vnic ID */
3534 * Default Completion ring for the VNIC. This ring will be chosen if
3535 * packet does not match any RSS rules and if there is no COS rule.
3537 uint16_t dflt_ring_grp;
3540 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
3546 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
3552 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
3553 * there is no LB rule.
3558 * The maximum receive unit of the vnic. Each vnic is associated with a
3559 * function. The vnic mru value overwrites the mru setting of the
3560 * associated function. The HWRM shall make sure that vnic mru does not
3561 * exceed the mru of the port the function is associated with.
3566 } __attribute__((packed));
3568 /* Output (16 bytes) */
3569 struct hwrm_vnic_cfg_output {
3571 * Pass/Fail or error type Note: receiver to verify the in parameters,
3572 * and fail the call with an error when appropriate
3574 uint16_t error_code;
3576 /* This field returns the type of original request. */
3579 /* This field provides original sequence number of the command. */
3583 * This field is the length of the response in bytes. The last byte of
3584 * the response is a valid flag that will read as '1' when the command
3585 * has been completely written to memory.
3595 * This field is used in Output records to indicate that the output is
3596 * completely written to RAM. This field should be read as '1' to
3597 * indicate that the output has been completely written. When writing a
3598 * command completion or response to an internal processor, the order of
3599 * writes has to be such that this field is written last.
3602 } __attribute__((packed));
3604 /* hwrm_vnic_free */
3606 * Description: Free a VNIC resource. Idle any resources associated with the
3607 * VNIC as well as the VNIC. Reset and release all resources associated with the
3611 /* Input (24 bytes) */
3612 struct hwrm_vnic_free_input {
3614 * This value indicates what type of request this is. The format for the
3615 * rest of the command is determined by this field.
3620 * This value indicates the what completion ring the request will be
3621 * optionally completed on. If the value is -1, then no CR completion
3622 * will be generated. Any other value must be a valid CR ring_id value
3623 * for this function.
3627 /* This value indicates the command sequence number. */
3631 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3632 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3637 * This is the host address where the response will be written when the
3638 * request is complete. This area must be 16B aligned and must be
3639 * cleared to zero before the request is made.
3643 /* Logical vnic ID */
3647 } __attribute__((packed));
3649 /* Output (16 bytes) */
3650 struct hwrm_vnic_free_output {
3652 * Pass/Fail or error type Note: receiver to verify the in parameters,
3653 * and fail the call with an error when appropriate
3655 uint16_t error_code;
3657 /* This field returns the type of original request. */
3660 /* This field provides original sequence number of the command. */
3664 * This field is the length of the response in bytes. The last byte of
3665 * the response is a valid flag that will read as '1' when the command
3666 * has been completely written to memory.
3676 * This field is used in Output records to indicate that the output is
3677 * completely written to RAM. This field should be read as '1' to
3678 * indicate that the output has been completely written. When writing a
3679 * command completion or response to an internal processor, the order of
3680 * writes has to be such that this field is written last.
3683 } __attribute__((packed));
3685 /* hwrm_vnic_rss_cfg */
3686 /* Description: This function is used to enable RSS configuration. */
3688 /* Input (48 bytes) */
3689 struct hwrm_vnic_rss_cfg_input {
3691 * This value indicates what type of request this is. The format for the
3692 * rest of the command is determined by this field.
3697 * This value indicates the what completion ring the request will be
3698 * optionally completed on. If the value is -1, then no CR completion
3699 * will be generated. Any other value must be a valid CR ring_id value
3700 * for this function.
3704 /* This value indicates the command sequence number. */
3708 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3709 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3714 * This is the host address where the response will be written when the
3715 * request is complete. This area must be 16B aligned and must be
3716 * cleared to zero before the request is made.
3721 * When this bit is '1', the RSS hash shall be computed over source and
3722 * destination IPv4 addresses of IPv4 packets.
3724 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
3726 * When this bit is '1', the RSS hash shall be computed over
3727 * source/destination IPv4 addresses and source/destination ports of
3730 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
3732 * When this bit is '1', the RSS hash shall be computed over
3733 * source/destination IPv4 addresses and source/destination ports of
3736 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
3738 * When this bit is '1', the RSS hash shall be computed over source and
3739 * destination IPv4 addresses of IPv6 packets.
3741 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
3743 * When this bit is '1', the RSS hash shall be computed over
3744 * source/destination IPv6 addresses and source/destination ports of
3747 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
3749 * When this bit is '1', the RSS hash shall be computed over
3750 * source/destination IPv6 addresses and source/destination ports of
3753 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
3758 /* This is the address for rss ring group table */
3759 uint64_t ring_grp_tbl_addr;
3761 /* This is the address for rss hash key table */
3762 uint64_t hash_key_tbl_addr;
3764 /* Index to the rss indirection table. */
3765 uint16_t rss_ctx_idx;
3767 uint16_t unused_1[3];
3768 } __attribute__((packed));
3770 /* Output (16 bytes) */
3771 struct hwrm_vnic_rss_cfg_output {
3773 * Pass/Fail or error type Note: receiver to verify the in parameters,
3774 * and fail the call with an error when appropriate
3776 uint16_t error_code;
3778 /* This field returns the type of original request. */
3781 /* This field provides original sequence number of the command. */
3785 * This field is the length of the response in bytes. The last byte of
3786 * the response is a valid flag that will read as '1' when the command
3787 * has been completely written to memory.
3797 * This field is used in Output records to indicate that the output is
3798 * completely written to RAM. This field should be read as '1' to
3799 * indicate that the output has been completely written. When writing a
3800 * command completion or response to an internal processor, the order of
3801 * writes has to be such that this field is written last.
3804 } __attribute__((packed));
3806 /* Input (16 bytes) */
3807 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
3809 * This value indicates what type of request this is. The format for the
3810 * rest of the command is determined by this field.
3815 * This value indicates the what completion ring the request will be
3816 * optionally completed on. If the value is -1, then no CR completion
3817 * will be generated. Any other value must be a valid CR ring_id value
3818 * for this function.
3822 /* This value indicates the command sequence number. */
3826 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3827 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3832 * This is the host address where the response will be written when the
3833 * request is complete. This area must be 16B aligned and must be
3834 * cleared to zero before the request is made.
3837 } __attribute__((packed));
3839 /* Output (16 bytes) */
3841 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
3843 * Pass/Fail or error type Note: receiver to verify the in parameters,
3844 * and fail the call with an error when appropriate
3846 uint16_t error_code;
3848 /* This field returns the type of original request. */
3851 /* This field provides original sequence number of the command. */
3855 * This field is the length of the response in bytes. The last byte of
3856 * the response is a valid flag that will read as '1' when the command
3857 * has been completely written to memory.
3861 /* rss_cos_lb_ctx_id is 16 b */
3862 uint16_t rss_cos_lb_ctx_id;
3871 * This field is used in Output records to indicate that the output is
3872 * completely written to RAM. This field should be read as '1' to
3873 * indicate that the output has been completely written. When writing a
3874 * command completion or response to an internal processor, the order of
3875 * writes has to be such that this field is written last.
3878 } __attribute__((packed));
3880 /* hwrm_vnic_rss_cos_lb_ctx_free */
3881 /* Description: This function can be used to free COS/Load Balance context. */
3882 /* Input (24 bytes) */
3884 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
3886 * This value indicates what type of request this is. The format for the
3887 * rest of the command is determined by this field.
3892 * This value indicates the what completion ring the request will be
3893 * optionally completed on. If the value is -1, then no CR completion
3894 * will be generated. Any other value must be a valid CR ring_id value
3895 * for this function.
3899 /* This value indicates the command sequence number. */
3903 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3904 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3909 * This is the host address where the response will be written when the
3910 * request is complete. This area must be 16B aligned and must be
3911 * cleared to zero before the request is made.
3915 /* rss_cos_lb_ctx_id is 16 b */
3916 uint16_t rss_cos_lb_ctx_id;
3918 uint16_t unused_0[3];
3919 } __attribute__((packed));
3921 /* Output (16 bytes) */
3922 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
3924 * Pass/Fail or error type Note: receiver to verify the in parameters,
3925 * and fail the call with an error when appropriate
3927 uint16_t error_code;
3929 /* This field returns the type of original request. */
3932 /* This field provides original sequence number of the command. */
3936 * This field is the length of the response in bytes. The last byte of
3937 * the response is a valid flag that will read as '1' when the command
3938 * has been completely written to memory.
3948 * This field is used in Output records to indicate that the output is
3949 * completely written to RAM. This field should be read as '1' to
3950 * indicate that the output has been completely written. When writing a
3951 * command completion or response to an internal processor, the order of
3952 * writes has to be such that this field is written last.
3955 } __attribute__((packed));
3957 /* Output (32 bytes) */
3958 struct hwrm_queue_qportcfg_output {
3960 * Pass/Fail or error type Note: receiver to verify the in parameters,
3961 * and fail the call with an error when appropriate
3963 uint16_t error_code;
3965 /* This field returns the type of original request. */
3968 /* This field provides original sequence number of the command. */
3972 * This field is the length of the response in bytes. The last byte of
3973 * the response is a valid flag that will read as '1' when the command
3974 * has been completely written to memory.
3978 /* The maximum number of queues that can be configured. */
3979 uint8_t max_configurable_queues;
3981 /* The maximum number of lossless queues that can be configured. */
3982 uint8_t max_configurable_lossless_queues;
3985 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
3986 * the HWRM shall allow the host SW driver to configure queues using
3989 uint8_t queue_cfg_allowed;
3992 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3993 * the HWRM shall allow the host SW driver to configure queue buffers
3994 * using hwrm_queue_buffers_cfg.
3996 uint8_t queue_buffers_cfg_allowed;
3999 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4000 * the HWRM shall allow the host SW driver to configure PFC using
4001 * hwrm_queue_pfcenable_cfg.
4003 uint8_t queue_pfcenable_cfg_allowed;
4006 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4007 * the HWRM shall allow the host SW driver to configure Priority to CoS
4008 * mapping using hwrm_queue_pri2cos_cfg.
4010 uint8_t queue_pri2cos_cfg_allowed;
4013 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
4014 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
4015 * configuration using hwrm_queue_cos2bw_cfg.
4017 uint8_t queue_cos2bw_cfg_allowed;
4019 /* ID of CoS Queue 0. FF - Invalid id */
4022 /* This value is applicable to CoS queues only. */
4023 /* Lossy (best-effort) */
4024 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
4025 (UINT32_C(0x0) << 0)
4027 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
4028 (UINT32_C(0x1) << 0)
4030 * Set to 0xFF... (All Fs) if there is no service profile
4033 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
4034 (UINT32_C(0xff) << 0)
4035 uint8_t queue_id0_service_profile;
4037 /* ID of CoS Queue 1. FF - Invalid id */
4039 /* This value is applicable to CoS queues only. */
4040 /* Lossy (best-effort) */
4041 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
4042 (UINT32_C(0x0) << 0)
4044 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
4045 (UINT32_C(0x1) << 0)
4047 * Set to 0xFF... (All Fs) if there is no service profile
4050 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
4051 (UINT32_C(0xff) << 0)
4052 uint8_t queue_id1_service_profile;
4054 /* ID of CoS Queue 2. FF - Invalid id */
4056 /* This value is applicable to CoS queues only. */
4057 /* Lossy (best-effort) */
4058 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
4059 (UINT32_C(0x0) << 0)
4061 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
4062 (UINT32_C(0x1) << 0)
4064 * Set to 0xFF... (All Fs) if there is no service profile
4067 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
4068 (UINT32_C(0xff) << 0)
4069 uint8_t queue_id2_service_profile;
4071 /* ID of CoS Queue 3. FF - Invalid id */
4074 /* This value is applicable to CoS queues only. */
4075 /* Lossy (best-effort) */
4076 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
4077 (UINT32_C(0x0) << 0)
4079 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
4080 (UINT32_C(0x1) << 0)
4082 * Set to 0xFF... (All Fs) if there is no service profile
4085 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
4086 (UINT32_C(0xff) << 0)
4087 uint8_t queue_id3_service_profile;
4089 /* ID of CoS Queue 4. FF - Invalid id */
4091 /* This value is applicable to CoS queues only. */
4092 /* Lossy (best-effort) */
4093 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
4094 (UINT32_C(0x0) << 0)
4096 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
4097 (UINT32_C(0x1) << 0)
4099 * Set to 0xFF... (All Fs) if there is no service profile
4102 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
4103 (UINT32_C(0xff) << 0)
4104 uint8_t queue_id4_service_profile;
4106 /* ID of CoS Queue 5. FF - Invalid id */
4109 /* This value is applicable to CoS queues only. */
4110 /* Lossy (best-effort) */
4111 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
4112 (UINT32_C(0x0) << 0)
4114 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
4115 (UINT32_C(0x1) << 0)
4117 * Set to 0xFF... (All Fs) if there is no service profile
4120 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
4121 (UINT32_C(0xff) << 0)
4122 uint8_t queue_id5_service_profile;
4124 /* ID of CoS Queue 6. FF - Invalid id */
4125 uint8_t queue_id6_service_profile;
4126 /* This value is applicable to CoS queues only. */
4127 /* Lossy (best-effort) */
4128 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
4129 (UINT32_C(0x0) << 0)
4131 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
4132 (UINT32_C(0x1) << 0)
4134 * Set to 0xFF... (All Fs) if there is no service profile
4137 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
4138 (UINT32_C(0xff) << 0)
4141 /* ID of CoS Queue 7. FF - Invalid id */
4144 /* This value is applicable to CoS queues only. */
4145 /* Lossy (best-effort) */
4146 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
4147 (UINT32_C(0x0) << 0)
4149 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
4150 (UINT32_C(0x1) << 0)
4152 * Set to 0xFF... (All Fs) if there is no service profile
4155 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
4156 (UINT32_C(0xff) << 0)
4157 uint8_t queue_id7_service_profile;
4160 * This field is used in Output records to indicate that the output is
4161 * completely written to RAM. This field should be read as '1' to
4162 * indicate that the output has been completely written. When writing a
4163 * command completion or response to an internal processor, the order of
4164 * writes has to be such that this field is written last.
4167 } __attribute__((packed));
4169 /* hwrm_func_drv_rgtr */
4171 * Description: This command is used by the function driver to register its
4172 * information with the HWRM. A function driver shall implement this command. A
4173 * function driver shall use this command during the driver initialization right
4174 * after the HWRM version discovery and default ring resources allocation.
4177 /* Input (80 bytes) */
4178 struct hwrm_func_drv_rgtr_input {
4180 * This value indicates what type of request this is. The format for the
4181 * rest of the command is determined by this field.
4186 * This value indicates the what completion ring the request will be
4187 * optionally completed on. If the value is -1, then no CR completion
4188 * will be generated. Any other value must be a valid CR ring_id value
4189 * for this function.
4193 /* This value indicates the command sequence number. */
4197 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4198 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4203 * This is the host address where the response will be written when the
4204 * request is complete. This area must be 16B aligned and must be
4205 * cleared to zero before the request is made.
4210 * When this bit is '1', the function driver is requesting all requests
4211 * from its children VF drivers to be forwarded to itself. This flag can
4212 * only be set by the PF driver. If a VF driver sets this flag, it
4213 * should be ignored by the HWRM.
4215 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
4217 * When this bit is '1', the function is requesting none of the requests
4218 * from its children VF drivers to be forwarded to itself. This flag can
4219 * only be set by the PF driver. If a VF driver sets this flag, it
4220 * should be ignored by the HWRM.
4222 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4225 /* This bit must be '1' for the os_type field to be configured. */
4226 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4227 /* This bit must be '1' for the ver field to be configured. */
4228 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4229 /* This bit must be '1' for the timestamp field to be configured. */
4230 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4231 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4232 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
4234 * This bit must be '1' for the async_event_fwd field to be configured.
4236 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
4240 /* This value indicates the type of OS. */
4242 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
4243 (UINT32_C(0x0) << 0)
4244 /* Other OS not listed below. */
4245 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
4246 (UINT32_C(0x1) << 0)
4248 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
4249 (UINT32_C(0xe) << 0)
4251 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
4252 (UINT32_C(0x12) << 0)
4254 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
4255 (UINT32_C(0x1d) << 0)
4257 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
4258 (UINT32_C(0x24) << 0)
4260 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
4261 (UINT32_C(0x2a) << 0)
4262 /* VMware ESXi OS. */
4263 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
4264 (UINT32_C(0x68) << 0)
4265 /* Microsoft Windows 8 64-bit OS. */
4266 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
4267 (UINT32_C(0x73) << 0)
4268 /* Microsoft Windows Server 2012 R2 OS. */
4269 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
4270 (UINT32_C(0x74) << 0)
4273 /* This is the major version of the driver. */
4276 /* This is the minor version of the driver. */
4279 /* This is the update version of the driver. */
4286 * This is a 32-bit timestamp provided by the driver for keep alive. The
4287 * timestamp is in multiples of 1ms.
4294 * This is a 256-bit bit mask provided by the PF driver for letting the
4295 * HWRM know what commands issued by the VF driver to the HWRM should be
4296 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
4297 * Setting Nth bit to 1 indicates that requests from the VF driver with
4298 * req_type equal to N shall be forwarded to the parent PF driver. This
4299 * field is not valid for the VF driver.
4301 uint32_t vf_req_fwd[8];
4304 * This is a 256-bit bit mask provided by the function driver (PF or VF
4305 * driver) to indicate the list of asynchronous event completions to be
4306 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
4307 * by the function driver shall result in the HWRM forwarding
4308 * asynchronous event completion with event_id equal to N. If all bits
4309 * are set to 0 (value of 0), then the HWRM shall not forward any
4310 * asynchronous event completion to this function driver.
4312 uint32_t async_event_fwd[8];
4313 } __attribute__((packed));
4315 /* Output (16 bytes) */
4317 struct hwrm_func_drv_rgtr_output {
4319 * Pass/Fail or error type Note: receiver to verify the in parameters,
4320 * and fail the call with an error when appropriate
4322 uint16_t error_code;
4324 /* This field returns the type of original request. */
4327 /* This field provides original sequence number of the command. */
4331 * This field is the length of the response in bytes. The last byte of
4332 * the response is a valid flag that will read as '1' when the command
4333 * has been completely written to memory.
4343 * This field is used in Output records to indicate that the output is
4344 * completely written to RAM. This field should be read as '1' to
4345 * indicate that the output has been completely written. When writing a
4346 * command completion or response to an internal processor, the order of
4347 * writes has to be such that this field is written last.
4350 } __attribute__((packed));
4352 /* hwrm_func_drv_unrgtr */
4354 * Description: This command is used by the function driver to un register with
4355 * the HWRM. A function driver shall implement this command. A function driver
4356 * shall use this command during the driver unloading.
4358 /* Input (24 bytes) */
4360 struct hwrm_func_drv_unrgtr_input {
4362 * This value indicates what type of request this is. The format for the
4363 * rest of the command is determined by this field.
4368 * This value indicates the what completion ring the request will be
4369 * optionally completed on. If the value is -1, then no CR completion
4370 * will be generated. Any other value must be a valid CR ring_id value
4371 * for this function.
4375 /* This value indicates the command sequence number. */
4379 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4380 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4385 * This is the host address where the response will be written when the
4386 * request is complete. This area must be 16B aligned and must be
4387 * cleared to zero before the request is made.
4392 * When this bit is '1', the function driver is notifying the HWRM to
4393 * prepare for the shutdown.
4395 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4400 } __attribute__((packed));
4402 /* Output (16 bytes) */
4403 struct hwrm_func_drv_unrgtr_output {
4405 * Pass/Fail or error type Note: receiver to verify the in parameters,
4406 * and fail the call with an error when appropriate
4408 uint16_t error_code;
4410 /* This field returns the type of original request. */
4413 /* This field provides original sequence number of the command. */
4417 * This field is the length of the response in bytes. The last byte of
4418 * the response is a valid flag that will read as '1' when the command
4419 * has been completely written to memory.
4429 * This field is used in Output records to indicate that the output is
4430 * completely written to RAM. This field should be read as '1' to
4431 * indicate that the output has been completely written. When writing a
4432 * command completion or response to an internal processor, the order of
4433 * writes has to be such that this field is written last.
4436 } __attribute__((packed));