net/bnxt: add mailbox selection via device operation
[dpdk.git] / drivers / net / bnxt / tf_core / tf_device_p4.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2019-2021 Broadcom
3  * All rights reserved.
4  */
5
6 #include <rte_common.h>
7
8 #include "cfa_resource_types.h"
9 #include "tf_device.h"
10 #include "tf_identifier.h"
11 #include "tf_tbl.h"
12 #include "tf_tcam.h"
13 #include "tf_em.h"
14 #include "tf_if_tbl.h"
15 #include "tfp.h"
16 #include "tf_msg_common.h"
17
18 #define TF_DEV_P4_PARIF_MAX 16
19 #define TF_DEV_P4_PF_MASK 0xfUL
20
21 const char *tf_resource_str_p4[CFA_RESOURCE_TYPE_P4_LAST + 1] = {
22         /* CFA_RESOURCE_TYPE_P4_MCG */
23         "mc_group",
24         /* CFA_RESOURCE_TYPE_P4_ENCAP_8B */
25         "encap_8 ",
26         /* CFA_RESOURCE_TYPE_P4_ENCAP_16B */
27         "encap_16",
28         /* CFA_RESOURCE_TYPE_P4_ENCAP_64B */
29         "encap_64",
30         /* CFA_RESOURCE_TYPE_P4_SP_MAC */
31         "sp_mac  ",
32         /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 */
33         "sp_macv4",
34         /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 */
35         "sp_macv6",
36         /* CFA_RESOURCE_TYPE_P4_COUNTER_64B */
37         "ctr_64b ",
38         /* CFA_RESOURCE_TYPE_P4_NAT_PORT */
39         "nat_port",
40         /* CFA_RESOURCE_TYPE_P4_NAT_IPV4 */
41         "nat_ipv4",
42         /* CFA_RESOURCE_TYPE_P4_METER */
43         "meter   ",
44         /* CFA_RESOURCE_TYPE_P4_FLOW_STATE */
45         "flow_st ",
46         /* CFA_RESOURCE_TYPE_P4_FULL_ACTION */
47         "full_act",
48         /* CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION */
49         "fmt0_act",
50         /* CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION */
51         "ext0_act",
52         /* CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION */
53         "fmt1_act",
54         /* CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION */
55         "fmt2_act",
56         /* CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION */
57         "fmt3_act",
58         /* CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION */
59         "fmt4_act",
60         /* CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION */
61         "fmt5_act",
62         /* CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION */
63         "fmt6_act",
64         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH */
65         "l2ctx_hi",
66         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW */
67         "l2ctx_lo",
68         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH */
69         "l2ctr_hi",
70         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW */
71         "l2ctr_lo",
72         /* CFA_RESOURCE_TYPE_P4_PROF_FUNC */
73         "prf_func",
74         /* CFA_RESOURCE_TYPE_P4_PROF_TCAM */
75         "prf_tcam",
76         /* CFA_RESOURCE_TYPE_P4_EM_PROF_ID */
77         "em_prof ",
78         /* CFA_RESOURCE_TYPE_P4_EM_REC */
79         "em_rec  ",
80         /* CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID */
81         "wc_prof ",
82         /* CFA_RESOURCE_TYPE_P4_WC_TCAM */
83         "wc_tcam ",
84         /* CFA_RESOURCE_TYPE_P4_METER_PROF */
85         "mtr_prof",
86         /* CFA_RESOURCE_TYPE_P4_MIRROR */
87         "mirror  ",
88         /* CFA_RESOURCE_TYPE_P4_SP_TCAM */
89         "sp_tcam ",
90         /* CFA_RESOURCE_TYPE_P4_TBL_SCOPE */
91         "tb_scope",
92 };
93
94 /**
95  * Device specific function that retrieves the MAX number of HCAPI
96  * types the device supports.
97  *
98  * [in] tfp
99  *   Pointer to TF handle
100  *
101  * [out] max_types
102  *   Pointer to the MAX number of CFA resource types supported
103  *
104  * Returns
105  *   - (0) if successful.
106  *   - (-EINVAL) on failure.
107  */
108 static int
109 tf_dev_p4_get_max_types(struct tf *tfp,
110                         uint16_t *max_types)
111 {
112         struct tf_session *tfs;
113         struct tf_dev_info *dev;
114         int rc;
115
116         if (max_types == NULL || tfp == NULL)
117                 return -EINVAL;
118
119         /* Retrieve the session information */
120         rc = tf_session_get_session(tfp, &tfs);
121         if (rc)
122                 return rc;
123
124         /* Retrieve the device information */
125         rc = tf_session_get_device(tfs, &dev);
126         if (rc)
127                 return rc;
128
129         if (dev->type == TF_DEVICE_TYPE_WH)
130                 *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;
131         else if (dev->type == TF_DEVICE_TYPE_SR)
132                 *max_types = CFA_RESOURCE_TYPE_P45_LAST + 1;
133         else
134                 return -ENODEV;
135
136         return 0;
137 }
138 /**
139  * Device specific function that retrieves a human readable
140  * string to identify a CFA resource type.
141  *
142  * [in] tfp
143  *   Pointer to TF handle
144  *
145  * [in] resource_id
146  *   HCAPI CFA resource id
147  *
148  * [out] resource_str
149  *   Resource string
150  *
151  * Returns
152  *   - (0) if successful.
153  *   - (-EINVAL) on failure.
154  */
155 static int
156 tf_dev_p4_get_resource_str(struct tf *tfp __rte_unused,
157                            uint16_t resource_id,
158                            const char **resource_str)
159 {
160         if (resource_str == NULL)
161                 return -EINVAL;
162
163         if (resource_id > CFA_RESOURCE_TYPE_P4_LAST)
164                 return -EINVAL;
165
166         *resource_str = tf_resource_str_p4[resource_id];
167
168         return 0;
169 }
170
171 /**
172  * Device specific function that retrieves the WC TCAM slices the
173  * device supports.
174  *
175  * [in] tfp
176  *   Pointer to TF handle
177  *
178  * [out] slice_size
179  *   Pointer to the WC TCAM slice size
180  *
181  * [out] num_slices_per_row
182  *   Pointer to the WC TCAM row slice configuration
183  *
184  * Returns
185  *   - (0) if successful.
186  *   - (-EINVAL) on failure.
187  */
188 static int
189 tf_dev_p4_get_tcam_slice_info(struct tf *tfp __rte_unused,
190                               enum tf_tcam_tbl_type type,
191                               uint16_t key_sz,
192                               uint16_t *num_slices_per_row)
193 {
194 #define CFA_P4_WC_TCAM_SLICES_PER_ROW 2
195 #define CFA_P4_WC_TCAM_SLICE_SIZE     12
196
197         if (type == TF_TCAM_TBL_TYPE_WC_TCAM) {
198                 *num_slices_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW;
199                 if (key_sz > *num_slices_per_row * CFA_P4_WC_TCAM_SLICE_SIZE)
200                         return -ENOTSUP;
201
202                 *num_slices_per_row = 1;
203         } else { /* for other type of tcam */
204                 *num_slices_per_row = 1;
205         }
206
207         return 0;
208 }
209
210 static int
211 tf_dev_p4_map_parif(struct tf *tfp __rte_unused,
212                     uint16_t parif_bitmask,
213                     uint16_t pf,
214                     uint8_t *data,
215                     uint8_t *mask,
216                     uint16_t sz_in_bytes)
217 {
218         uint32_t parif_pf[2] = { 0 };
219         uint32_t parif_pf_mask[2] = { 0 };
220         uint32_t parif;
221         uint32_t shift;
222
223         if (sz_in_bytes != sizeof(uint64_t))
224                 return -ENOTSUP;
225
226         for (parif = 0; parif < TF_DEV_P4_PARIF_MAX; parif++) {
227                 if (parif_bitmask & (1UL << parif)) {
228                         if (parif < 8) {
229                                 shift = 4 * parif;
230                                 parif_pf_mask[0] |= TF_DEV_P4_PF_MASK << shift;
231                                 parif_pf[0] |= pf << shift;
232                         } else {
233                                 shift = 4 * (parif - 8);
234                                 parif_pf_mask[1] |= TF_DEV_P4_PF_MASK << shift;
235                                 parif_pf[1] |= pf << shift;
236                         }
237                 }
238         }
239         tfp_memcpy(data, parif_pf, sz_in_bytes);
240         tfp_memcpy(mask, parif_pf_mask, sz_in_bytes);
241
242         return 0;
243 }
244
245 static int tf_dev_p4_get_mailbox(void)
246 {
247         return TF_KONG_MB;
248 }
249
250
251 /**
252  * Truflow P4 device specific functions
253  */
254 const struct tf_dev_ops tf_dev_ops_p4_init = {
255         .tf_dev_get_max_types = tf_dev_p4_get_max_types,
256         .tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
257         .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
258         .tf_dev_alloc_ident = NULL,
259         .tf_dev_free_ident = NULL,
260         .tf_dev_search_ident = NULL,
261         .tf_dev_alloc_ext_tbl = NULL,
262         .tf_dev_alloc_tbl = NULL,
263         .tf_dev_free_ext_tbl = NULL,
264         .tf_dev_free_tbl = NULL,
265         .tf_dev_alloc_search_tbl = NULL,
266         .tf_dev_set_tbl = NULL,
267         .tf_dev_set_ext_tbl = NULL,
268         .tf_dev_get_tbl = NULL,
269         .tf_dev_get_bulk_tbl = NULL,
270         .tf_dev_alloc_tcam = NULL,
271         .tf_dev_free_tcam = NULL,
272         .tf_dev_alloc_search_tcam = NULL,
273         .tf_dev_set_tcam = NULL,
274         .tf_dev_get_tcam = NULL,
275         .tf_dev_insert_int_em_entry = NULL,
276         .tf_dev_delete_int_em_entry = NULL,
277         .tf_dev_insert_ext_em_entry = NULL,
278         .tf_dev_delete_ext_em_entry = NULL,
279         .tf_dev_alloc_tbl_scope = NULL,
280         .tf_dev_map_tbl_scope = NULL,
281         .tf_dev_map_parif = NULL,
282         .tf_dev_free_tbl_scope = NULL,
283         .tf_dev_set_if_tbl = NULL,
284         .tf_dev_get_if_tbl = NULL,
285         .tf_dev_set_global_cfg = NULL,
286         .tf_dev_get_global_cfg = NULL,
287         .tf_dev_get_mailbox = tf_dev_p4_get_mailbox,
288 };
289
290 /**
291  * Truflow P4 device specific functions
292  */
293 const struct tf_dev_ops tf_dev_ops_p4 = {
294         .tf_dev_get_max_types = tf_dev_p4_get_max_types,
295         .tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
296         .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
297         .tf_dev_alloc_ident = tf_ident_alloc,
298         .tf_dev_free_ident = tf_ident_free,
299         .tf_dev_search_ident = tf_ident_search,
300         .tf_dev_alloc_tbl = tf_tbl_alloc,
301         .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
302         .tf_dev_free_tbl = tf_tbl_free,
303         .tf_dev_free_ext_tbl = tf_tbl_ext_free,
304         .tf_dev_alloc_search_tbl = tf_tbl_alloc_search,
305         .tf_dev_set_tbl = tf_tbl_set,
306         .tf_dev_set_ext_tbl = tf_tbl_ext_common_set,
307         .tf_dev_get_tbl = tf_tbl_get,
308         .tf_dev_get_bulk_tbl = tf_tbl_bulk_get,
309         .tf_dev_alloc_tcam = tf_tcam_alloc,
310         .tf_dev_free_tcam = tf_tcam_free,
311         .tf_dev_alloc_search_tcam = tf_tcam_alloc_search,
312         .tf_dev_set_tcam = tf_tcam_set,
313         .tf_dev_get_tcam = NULL,
314         .tf_dev_insert_int_em_entry = tf_em_insert_int_entry,
315         .tf_dev_delete_int_em_entry = tf_em_delete_int_entry,
316         .tf_dev_insert_ext_em_entry = tf_em_insert_ext_entry,
317         .tf_dev_delete_ext_em_entry = tf_em_delete_ext_entry,
318         .tf_dev_alloc_tbl_scope = tf_em_ext_common_alloc,
319         .tf_dev_map_tbl_scope = tf_em_ext_map_tbl_scope,
320         .tf_dev_map_parif = tf_dev_p4_map_parif,
321         .tf_dev_free_tbl_scope = tf_em_ext_common_free,
322         .tf_dev_set_if_tbl = tf_if_tbl_set,
323         .tf_dev_get_if_tbl = tf_if_tbl_get,
324         .tf_dev_set_global_cfg = tf_global_cfg_set,
325         .tf_dev_get_global_cfg = tf_global_cfg_get,
326         .tf_dev_get_mailbox = tf_dev_p4_get_mailbox,
327 };