net/bnxt: add base TRUFLOW support for Thor
[dpdk.git] / drivers / net / bnxt / tf_core / tf_device_p4.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2019-2021 Broadcom
3  * All rights reserved.
4  */
5
6 #include <rte_common.h>
7
8 #include "cfa_resource_types.h"
9 #include "tf_device.h"
10 #include "tf_identifier.h"
11 #include "tf_tbl.h"
12 #include "tf_tcam.h"
13 #include "tf_em.h"
14 #include "tf_if_tbl.h"
15 #include "tfp.h"
16
17 #define TF_DEV_P4_PARIF_MAX 16
18 #define TF_DEV_P4_PF_MASK 0xfUL
19
20 const char *tf_resource_str_p4[CFA_RESOURCE_TYPE_P4_LAST + 1] = {
21         /* CFA_RESOURCE_TYPE_P4_MCG */
22         "mc_group",
23         /* CFA_RESOURCE_TYPE_P4_ENCAP_8B */
24         "encap_8 ",
25         /* CFA_RESOURCE_TYPE_P4_ENCAP_16B */
26         "encap_16",
27         /* CFA_RESOURCE_TYPE_P4_ENCAP_64B */
28         "encap_64",
29         /* CFA_RESOURCE_TYPE_P4_SP_MAC */
30         "sp_mac  ",
31         /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 */
32         "sp_macv4",
33         /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 */
34         "sp_macv6",
35         /* CFA_RESOURCE_TYPE_P4_COUNTER_64B */
36         "ctr_64b ",
37         /* CFA_RESOURCE_TYPE_P4_NAT_PORT */
38         "nat_port",
39         /* CFA_RESOURCE_TYPE_P4_NAT_IPV4 */
40         "nat_ipv4",
41         /* CFA_RESOURCE_TYPE_P4_METER */
42         "meter   ",
43         /* CFA_RESOURCE_TYPE_P4_FLOW_STATE */
44         "flow_st ",
45         /* CFA_RESOURCE_TYPE_P4_FULL_ACTION */
46         "full_act",
47         /* CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION */
48         "fmt0_act",
49         /* CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION */
50         "ext0_act",
51         /* CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION */
52         "fmt1_act",
53         /* CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION */
54         "fmt2_act",
55         /* CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION */
56         "fmt3_act",
57         /* CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION */
58         "fmt4_act",
59         /* CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION */
60         "fmt5_act",
61         /* CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION */
62         "fmt6_act",
63         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH */
64         "l2ctx_hi",
65         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW */
66         "l2ctx_lo",
67         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH */
68         "l2ctr_hi",
69         /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW */
70         "l2ctr_lo",
71         /* CFA_RESOURCE_TYPE_P4_PROF_FUNC */
72         "prf_func",
73         /* CFA_RESOURCE_TYPE_P4_PROF_TCAM */
74         "prf_tcam",
75         /* CFA_RESOURCE_TYPE_P4_EM_PROF_ID */
76         "em_prof ",
77         /* CFA_RESOURCE_TYPE_P4_EM_REC */
78         "em_rec  ",
79         /* CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID */
80         "wc_prof ",
81         /* CFA_RESOURCE_TYPE_P4_WC_TCAM */
82         "wc_tcam ",
83         /* CFA_RESOURCE_TYPE_P4_METER_PROF */
84         "mtr_prof",
85         /* CFA_RESOURCE_TYPE_P4_MIRROR */
86         "mirror  ",
87         /* CFA_RESOURCE_TYPE_P4_SP_TCAM */
88         "sp_tcam ",
89         /* CFA_RESOURCE_TYPE_P4_TBL_SCOPE */
90         "tb_scope",
91 };
92
93 /**
94  * Device specific function that retrieves the MAX number of HCAPI
95  * types the device supports.
96  *
97  * [in] tfp
98  *   Pointer to TF handle
99  *
100  * [out] max_types
101  *   Pointer to the MAX number of CFA resource types supported
102  *
103  * Returns
104  *   - (0) if successful.
105  *   - (-EINVAL) on failure.
106  */
107 static int
108 tf_dev_p4_get_max_types(struct tf *tfp,
109                         uint16_t *max_types)
110 {
111         struct tf_session *tfs;
112         struct tf_dev_info *dev;
113         int rc;
114
115         if (max_types == NULL || tfp == NULL)
116                 return -EINVAL;
117
118         /* Retrieve the session information */
119         rc = tf_session_get_session(tfp, &tfs);
120         if (rc)
121                 return rc;
122
123         /* Retrieve the device information */
124         rc = tf_session_get_device(tfs, &dev);
125         if (rc)
126                 return rc;
127
128         if (dev->type == TF_DEVICE_TYPE_WH)
129                 *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;
130         else if (dev->type == TF_DEVICE_TYPE_SR)
131                 *max_types = CFA_RESOURCE_TYPE_P45_LAST + 1;
132         else
133                 return -ENODEV;
134
135         return 0;
136 }
137 /**
138  * Device specific function that retrieves a human readable
139  * string to identify a CFA resource type.
140  *
141  * [in] tfp
142  *   Pointer to TF handle
143  *
144  * [in] resource_id
145  *   HCAPI CFA resource id
146  *
147  * [out] resource_str
148  *   Resource string
149  *
150  * Returns
151  *   - (0) if successful.
152  *   - (-EINVAL) on failure.
153  */
154 static int
155 tf_dev_p4_get_resource_str(struct tf *tfp __rte_unused,
156                            uint16_t resource_id,
157                            const char **resource_str)
158 {
159         if (resource_str == NULL)
160                 return -EINVAL;
161
162         if (resource_id > CFA_RESOURCE_TYPE_P4_LAST)
163                 return -EINVAL;
164
165         *resource_str = tf_resource_str_p4[resource_id];
166
167         return 0;
168 }
169
170 /**
171  * Device specific function that retrieves the WC TCAM slices the
172  * device supports.
173  *
174  * [in] tfp
175  *   Pointer to TF handle
176  *
177  * [out] slice_size
178  *   Pointer to the WC TCAM slice size
179  *
180  * [out] num_slices_per_row
181  *   Pointer to the WC TCAM row slice configuration
182  *
183  * Returns
184  *   - (0) if successful.
185  *   - (-EINVAL) on failure.
186  */
187 static int
188 tf_dev_p4_get_tcam_slice_info(struct tf *tfp __rte_unused,
189                               enum tf_tcam_tbl_type type,
190                               uint16_t key_sz,
191                               uint16_t *num_slices_per_row)
192 {
193 #define CFA_P4_WC_TCAM_SLICES_PER_ROW 2
194 #define CFA_P4_WC_TCAM_SLICE_SIZE     12
195
196         if (type == TF_TCAM_TBL_TYPE_WC_TCAM) {
197                 *num_slices_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW;
198                 if (key_sz > *num_slices_per_row * CFA_P4_WC_TCAM_SLICE_SIZE)
199                         return -ENOTSUP;
200
201                 *num_slices_per_row = 1;
202         } else { /* for other type of tcam */
203                 *num_slices_per_row = 1;
204         }
205
206         return 0;
207 }
208
209 static int
210 tf_dev_p4_map_parif(struct tf *tfp __rte_unused,
211                     uint16_t parif_bitmask,
212                     uint16_t pf,
213                     uint8_t *data,
214                     uint8_t *mask,
215                     uint16_t sz_in_bytes)
216 {
217         uint32_t parif_pf[2] = { 0 };
218         uint32_t parif_pf_mask[2] = { 0 };
219         uint32_t parif;
220         uint32_t shift;
221
222         if (sz_in_bytes != sizeof(uint64_t))
223                 return -ENOTSUP;
224
225         for (parif = 0; parif < TF_DEV_P4_PARIF_MAX; parif++) {
226                 if (parif_bitmask & (1UL << parif)) {
227                         if (parif < 8) {
228                                 shift = 4 * parif;
229                                 parif_pf_mask[0] |= TF_DEV_P4_PF_MASK << shift;
230                                 parif_pf[0] |= pf << shift;
231                         } else {
232                                 shift = 4 * (parif - 8);
233                                 parif_pf_mask[1] |= TF_DEV_P4_PF_MASK << shift;
234                                 parif_pf[1] |= pf << shift;
235                         }
236                 }
237         }
238         tfp_memcpy(data, parif_pf, sz_in_bytes);
239         tfp_memcpy(mask, parif_pf_mask, sz_in_bytes);
240
241         return 0;
242 }
243
244
245 /**
246  * Truflow P4 device specific functions
247  */
248 const struct tf_dev_ops tf_dev_ops_p4_init = {
249         .tf_dev_get_max_types = tf_dev_p4_get_max_types,
250         .tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
251         .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
252         .tf_dev_alloc_ident = NULL,
253         .tf_dev_free_ident = NULL,
254         .tf_dev_search_ident = NULL,
255         .tf_dev_alloc_ext_tbl = NULL,
256         .tf_dev_alloc_tbl = NULL,
257         .tf_dev_free_ext_tbl = NULL,
258         .tf_dev_free_tbl = NULL,
259         .tf_dev_alloc_search_tbl = NULL,
260         .tf_dev_set_tbl = NULL,
261         .tf_dev_set_ext_tbl = NULL,
262         .tf_dev_get_tbl = NULL,
263         .tf_dev_get_bulk_tbl = NULL,
264         .tf_dev_alloc_tcam = NULL,
265         .tf_dev_free_tcam = NULL,
266         .tf_dev_alloc_search_tcam = NULL,
267         .tf_dev_set_tcam = NULL,
268         .tf_dev_get_tcam = NULL,
269         .tf_dev_insert_int_em_entry = NULL,
270         .tf_dev_delete_int_em_entry = NULL,
271         .tf_dev_insert_ext_em_entry = NULL,
272         .tf_dev_delete_ext_em_entry = NULL,
273         .tf_dev_alloc_tbl_scope = NULL,
274         .tf_dev_map_tbl_scope = NULL,
275         .tf_dev_map_parif = NULL,
276         .tf_dev_free_tbl_scope = NULL,
277         .tf_dev_set_if_tbl = NULL,
278         .tf_dev_get_if_tbl = NULL,
279         .tf_dev_set_global_cfg = NULL,
280         .tf_dev_get_global_cfg = NULL,
281 };
282
283 /**
284  * Truflow P4 device specific functions
285  */
286 const struct tf_dev_ops tf_dev_ops_p4 = {
287         .tf_dev_get_max_types = tf_dev_p4_get_max_types,
288         .tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
289         .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
290         .tf_dev_alloc_ident = tf_ident_alloc,
291         .tf_dev_free_ident = tf_ident_free,
292         .tf_dev_search_ident = tf_ident_search,
293         .tf_dev_alloc_tbl = tf_tbl_alloc,
294         .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
295         .tf_dev_free_tbl = tf_tbl_free,
296         .tf_dev_free_ext_tbl = tf_tbl_ext_free,
297         .tf_dev_alloc_search_tbl = tf_tbl_alloc_search,
298         .tf_dev_set_tbl = tf_tbl_set,
299         .tf_dev_set_ext_tbl = tf_tbl_ext_common_set,
300         .tf_dev_get_tbl = tf_tbl_get,
301         .tf_dev_get_bulk_tbl = tf_tbl_bulk_get,
302         .tf_dev_alloc_tcam = tf_tcam_alloc,
303         .tf_dev_free_tcam = tf_tcam_free,
304         .tf_dev_alloc_search_tcam = tf_tcam_alloc_search,
305         .tf_dev_set_tcam = tf_tcam_set,
306         .tf_dev_get_tcam = NULL,
307         .tf_dev_insert_int_em_entry = tf_em_insert_int_entry,
308         .tf_dev_delete_int_em_entry = tf_em_delete_int_entry,
309         .tf_dev_insert_ext_em_entry = tf_em_insert_ext_entry,
310         .tf_dev_delete_ext_em_entry = tf_em_delete_ext_entry,
311         .tf_dev_alloc_tbl_scope = tf_em_ext_common_alloc,
312         .tf_dev_map_tbl_scope = tf_em_ext_map_tbl_scope,
313         .tf_dev_map_parif = tf_dev_p4_map_parif,
314         .tf_dev_free_tbl_scope = tf_em_ext_common_free,
315         .tf_dev_set_if_tbl = tf_if_tbl_set,
316         .tf_dev_get_if_tbl = tf_if_tbl_get,
317         .tf_dev_set_global_cfg = tf_global_cfg_set,
318         .tf_dev_get_global_cfg = tf_global_cfg_get,
319 };