1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019-2021 Broadcom
6 #ifndef _TF_DEVICE_P4_H_
7 #define _TF_DEVICE_P4_H_
9 #include "cfa_resource_types.h"
12 #include "tf_if_tbl.h"
13 #include "tf_global_cfg.h"
15 extern struct tf_rm_element_cfg tf_tbl_p4[TF_DIR_MAX][TF_TBL_TYPE_MAX];
17 struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {
18 [TF_IDENT_TYPE_L2_CTXT_HIGH] = {
19 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH,
22 [TF_IDENT_TYPE_L2_CTXT_LOW] = {
23 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW,
26 [TF_IDENT_TYPE_PROF_FUNC] = {
27 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC,
30 [TF_IDENT_TYPE_WC_PROF] = {
31 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID,
34 [TF_IDENT_TYPE_EM_PROF] = {
35 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID,
40 struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {
41 [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = {
42 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH,
45 [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = {
46 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW,
49 [TF_TCAM_TBL_TYPE_PROF_TCAM] = {
50 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM,
53 [TF_TCAM_TBL_TYPE_WC_TCAM] = {
54 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM,
57 [TF_TCAM_TBL_TYPE_SP_TCAM] = {
58 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM,
63 struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = {
64 [TF_EM_TBL_TYPE_TBL_SCOPE] = {
65 TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE,
70 struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = {
71 [TF_EM_TBL_TYPE_EM_RECORD] = {
72 TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC,
77 /* Note that hcapi_types from this table are from hcapi_cfa_p4.h
78 * These are not CFA resource types because they are not allocated
79 * CFA resources - they are identifiers for the interface tables
80 * shared between the firmware and the host. It may make sense to
81 * move these types to cfa_resource_types.h.
83 struct tf_if_tbl_cfg tf_if_tbl_p4[TF_IF_TBL_TYPE_MAX] = {
84 [TF_IF_TBL_TYPE_PROF_SPIF_DFLT_L2_CTXT] = {
85 TF_IF_TBL_CFG, CFA_P4_TBL_PROF_SPIF_DFLT_L2CTXT
87 [TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR] = {
88 TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_DFLT_ACT_REC_PTR
90 [TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR] = {
91 TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_ERR_ACT_REC_PTR
93 [TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR] = {
94 TF_IF_TBL_CFG, CFA_P4_TBL_LKUP_PARIF_DFLT_ACT_REC_PTR
98 struct tf_global_cfg_cfg tf_global_cfg_p4[TF_GLOBAL_CFG_TYPE_MAX] = {
100 TF_GLOBAL_CFG_CFG_HCAPI, TF_TUNNEL_ENCAP
102 [TF_ACTION_BLOCK] = {
103 TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK
107 const struct tf_hcapi_resource_map tf_hcapi_res_map_p4[CFA_RESOURCE_TYPE_P4_LAST + 1] = {
108 [CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH] = {
109 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_L2_CTXT_HIGH
111 [CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW] = {
112 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_L2_CTXT_LOW
114 [CFA_RESOURCE_TYPE_P4_PROF_FUNC] = {
115 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_PROF_FUNC
117 [CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID] = {
118 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_WC_PROF
120 [CFA_RESOURCE_TYPE_P4_EM_PROF_ID] = {
121 TF_MODULE_TYPE_IDENTIFIER, 1 << TF_IDENT_TYPE_EM_PROF
123 [CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH] = {
124 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH
126 [CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW] = {
127 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW
129 [CFA_RESOURCE_TYPE_P4_PROF_TCAM] = {
130 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_PROF_TCAM
132 [CFA_RESOURCE_TYPE_P4_WC_TCAM] = {
133 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_WC_TCAM
135 [CFA_RESOURCE_TYPE_P4_SP_TCAM] = {
136 TF_MODULE_TYPE_TCAM, 1 << TF_TCAM_TBL_TYPE_SP_TCAM
138 [CFA_RESOURCE_TYPE_P4_NAT_IPV4] = {
139 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_MODIFY_IPV4
141 [CFA_RESOURCE_TYPE_P4_METER_PROF] = {
142 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_METER_PROF
144 [CFA_RESOURCE_TYPE_P4_METER] = {
145 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_METER_INST
147 [CFA_RESOURCE_TYPE_P4_MIRROR] = {
148 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_MIRROR_CONFIG
150 [CFA_RESOURCE_TYPE_P4_FULL_ACTION] = {
151 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_FULL_ACT_RECORD
153 [CFA_RESOURCE_TYPE_P4_MCG] = {
154 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_MCAST_GROUPS
156 [CFA_RESOURCE_TYPE_P4_ENCAP_8B] = {
157 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_ENCAP_8B
159 [CFA_RESOURCE_TYPE_P4_ENCAP_16B] = {
160 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_ENCAP_16B
162 [CFA_RESOURCE_TYPE_P4_ENCAP_64B] = {
163 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_ENCAP_64B
165 [CFA_RESOURCE_TYPE_P4_SP_MAC] = {
166 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_SP_SMAC
168 [CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4] = {
169 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_SP_SMAC_IPV4
171 [CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6] = {
172 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_SP_SMAC_IPV6
174 [CFA_RESOURCE_TYPE_P4_COUNTER_64B] = {
175 TF_MODULE_TYPE_TABLE, 1 << TF_TBL_TYPE_ACT_STATS_64
177 [CFA_RESOURCE_TYPE_P4_EM_REC] = {
178 TF_MODULE_TYPE_EM, 1 << TF_EM_TBL_TYPE_EM_RECORD
180 [CFA_RESOURCE_TYPE_P4_TBL_SCOPE] = {
181 TF_MODULE_TYPE_EM, 1 << TF_EM_TBL_TYPE_TBL_SCOPE
185 #endif /* _TF_DEVICE_P4_H_ */