1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019-2020 Broadcom
6 #ifndef _TF_DEVICE_P4_H_
7 #define _TF_DEVICE_P4_H_
9 #include <cfa_resource_types.h>
14 struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {
15 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP },
16 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC },
17 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID },
18 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID },
19 /* CFA_RESOURCE_TYPE_P4_L2_FUNC */
20 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }
23 struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {
24 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM },
25 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM },
26 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM },
27 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM },
28 /* CFA_RESOURCE_TYPE_P4_CT_RULE_TCAM */
29 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
30 /* CFA_RESOURCE_TYPE_P4_VEB_TCAM */
31 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }
34 struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {
35 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION },
36 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG },
37 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B },
38 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B },
39 /* CFA_RESOURCE_TYPE_P4_ENCAP_32B */
40 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
41 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B },
42 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC },
43 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 },
44 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 },
45 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B },
46 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_SPORT },
47 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_DPORT },
48 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 },
49 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 },
50 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_S_IPV6 },
51 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_D_IPV6 },
52 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF },
53 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER },
54 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR },
55 /* CFA_RESOURCE_TYPE_P4_UPAR */
56 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
57 /* CFA_RESOURCE_TYPE_P4_EPOC */
58 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
59 /* CFA_RESOURCE_TYPE_P4_METADATA */
60 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
61 /* CFA_RESOURCE_TYPE_P4_CT_STATE */
62 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
63 /* CFA_RESOURCE_TYPE_P4_RANGE_PROF */
64 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
65 /* CFA_RESOURCE_TYPE_P4_RANGE_ENTRY */
66 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
67 /* CFA_RESOURCE_TYPE_P4_LAG */
68 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
69 /* CFA_RESOURCE_TYPE_P4_VNIC_SVIF */
70 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
71 /* CFA_RESOURCE_TYPE_P4_EM_FBK */
72 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
73 /* CFA_RESOURCE_TYPE_P4_WC_FKB */
74 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
75 /* CFA_RESOURCE_TYPE_P4_EXT */
76 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }
79 struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = {
80 /* CFA_RESOURCE_TYPE_P4_EM_REC */
81 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
82 { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE },
85 struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = {
86 { TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC },
87 /* CFA_RESOURCE_TYPE_P4_TBL_SCOPE */
88 { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
91 #endif /* _TF_DEVICE_P4_H_ */