eal: remove sys/queue.h from public headers
[dpdk.git] / drivers / net / bnxt / tf_core / tf_device_p58.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2019-2021 Broadcom
3  * All rights reserved.
4  */
5
6 #include <rte_common.h>
7
8 #include "cfa_resource_types.h"
9 #include "tf_device.h"
10 #include "tf_identifier.h"
11 #include "tf_tbl.h"
12 #include "tf_tcam.h"
13 #ifdef TF_TCAM_SHARED
14 #include "tf_tcam_shared.h"
15 #endif /* TF_TCAM_SHARED */
16 #include "tf_em.h"
17 #include "tf_if_tbl.h"
18 #include "tfp.h"
19 #include "tf_msg_common.h"
20 #include "tf_tbl_sram.h"
21
22 #define TF_DEV_P58_PARIF_MAX 16
23 #define TF_DEV_P58_PF_MASK 0xfUL
24
25 /* For print alignment, make all entries 8 chars in this table */
26 const char *tf_resource_str_p58[CFA_RESOURCE_TYPE_P58_LAST + 1] = {
27         [CFA_RESOURCE_TYPE_P58_METER]              = "meter   ",
28         [CFA_RESOURCE_TYPE_P58_SRAM_BANK_0]        = "sram_bk0",
29         [CFA_RESOURCE_TYPE_P58_SRAM_BANK_1]        = "sram_bk1",
30         [CFA_RESOURCE_TYPE_P58_SRAM_BANK_2]        = "sram_bk2",
31         [CFA_RESOURCE_TYPE_P58_SRAM_BANK_3]        = "sram_bk3",
32         [CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH]  = "l2ctx_hi",
33         [CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW]   = "l2ctx_lo",
34         [CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH] = "l2ctr_hi",
35         [CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW]  = "l2ctr_lo",
36         [CFA_RESOURCE_TYPE_P58_PROF_FUNC]          = "prf_func",
37         [CFA_RESOURCE_TYPE_P58_PROF_TCAM]          = "prf_tcam",
38         [CFA_RESOURCE_TYPE_P58_EM_PROF_ID]         = "em_prof ",
39         [CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID]    = "wc_prof ",
40         [CFA_RESOURCE_TYPE_P58_EM_REC]             = "em_rec  ",
41         [CFA_RESOURCE_TYPE_P58_WC_TCAM]            = "wc_tcam ",
42         [CFA_RESOURCE_TYPE_P58_METER_PROF]         = "mtr_prof",
43         [CFA_RESOURCE_TYPE_P58_MIRROR]             = "mirror  ",
44         [CFA_RESOURCE_TYPE_P58_EM_FKB]             = "em_fkb  ",
45         [CFA_RESOURCE_TYPE_P58_WC_FKB]             = "wc_fkb  ",
46         [CFA_RESOURCE_TYPE_P58_VEB_TCAM]           = "veb     ",
47         [CFA_RESOURCE_TYPE_P58_METADATA]           = "metadata",
48 };
49
50 /**
51  * Device specific function that retrieves the MAX number of HCAPI
52  * types the device supports.
53  *
54  * [in] tfp
55  *   Pointer to TF handle
56  *
57  * [out] max_types
58  *   Pointer to the MAX number of HCAPI types supported
59  *
60  * Returns
61  *   - (0) if successful.
62  *   - (-EINVAL) on failure.
63  */
64 static int
65 tf_dev_p58_get_max_types(struct tf *tfp,
66                          uint16_t *max_types)
67 {
68         if (max_types == NULL || tfp == NULL)
69                 return -EINVAL;
70
71         *max_types = CFA_RESOURCE_TYPE_P58_LAST + 1;
72
73         return 0;
74 }
75 /**
76  * Device specific function that retrieves a human readable
77  * string to identify a CFA resource type.
78  *
79  * [in] tfp
80  *   Pointer to TF handle
81  *
82  * [in] resource_id
83  *   HCAPI CFA resource id
84  *
85  * [out] resource_str
86  *   Resource string
87  *
88  * Returns
89  *   - (0) if successful.
90  *   - (-EINVAL) on failure.
91  */
92 static int
93 tf_dev_p58_get_resource_str(struct tf *tfp __rte_unused,
94                             uint16_t resource_id,
95                             const char **resource_str)
96 {
97         if (resource_str == NULL)
98                 return -EINVAL;
99
100         if (resource_id > CFA_RESOURCE_TYPE_P58_LAST)
101                 return -EINVAL;
102
103         *resource_str = tf_resource_str_p58[resource_id];
104
105         return 0;
106 }
107
108 /**
109  * Device specific function that set the WC TCAM slices the
110  * device supports.
111  *
112  * [in] tfp
113  *   Pointer to TF handle
114  *
115  * [in] num_slices_per_row
116  *   The WC TCAM row slice configuration
117  *
118  * Returns
119  *   - (0) if successful.
120  *   - (-EINVAL) on failure.
121  */
122 static int
123 tf_dev_p58_set_tcam_slice_info(struct tf *tfp __rte_unused,
124                                enum tf_wc_num_slice num_slices_per_row)
125 {
126         switch (num_slices_per_row) {
127         case TF_WC_TCAM_1_SLICE_PER_ROW:
128         case TF_WC_TCAM_2_SLICE_PER_ROW:
129         case TF_WC_TCAM_4_SLICE_PER_ROW:
130                 g_wc_num_slices_per_row = num_slices_per_row;
131         break;
132         default:
133                 return -EINVAL;
134         }
135
136         return 0;
137 }
138
139 /**
140  * Device specific function that retrieves the TCAM slices the
141  * device supports.
142  *
143  * [in] tfp
144  *   Pointer to TF handle
145  *
146  * [in] type
147  *   TF TCAM type
148  *
149  * [in] key_sz
150  *   The key size
151  *
152  * [out] num_slices_per_row
153  *   Pointer to the WC TCAM row slice configuration
154  *
155  * Returns
156  *   - (0) if successful.
157  *   - (-EINVAL) on failure.
158  */
159 static int
160 tf_dev_p58_get_tcam_slice_info(struct tf *tfp __rte_unused,
161                                enum tf_tcam_tbl_type type,
162                                uint16_t key_sz,
163                                uint16_t *num_slices_per_row)
164 {
165 #define CFA_P58_WC_TCAM_SLICE_SIZE     24
166         if (type == TF_TCAM_TBL_TYPE_WC_TCAM) {
167                 *num_slices_per_row = g_wc_num_slices_per_row;
168                 if (key_sz > *num_slices_per_row * CFA_P58_WC_TCAM_SLICE_SIZE)
169                         return -ENOTSUP;
170         } else { /* for other type of tcam */
171                 *num_slices_per_row = 1;
172         }
173
174         return 0;
175 }
176
177 static int tf_dev_p58_get_mailbox(void)
178 {
179         return TF_CHIMP_MB;
180 }
181
182 static int tf_dev_p58_word_align(uint16_t size)
183 {
184         return ((((size) + 63) >> 6) * 8);
185 }
186
187 /**
188  * Device specific function that retrieves the increment
189  * required for certain table types in a shared session
190  *
191  * [in] tfp
192  * tf handle
193  *
194  * [in/out] parms
195  *   pointer to parms structure
196  *
197  * Returns
198  *   - (0) if successful.
199  *   - (-EINVAL) on failure.
200  */
201 static int tf_dev_p58_get_shared_tbl_increment(struct tf *tfp __rte_unused,
202                                 struct tf_get_shared_tbl_increment_parms *parms)
203 {
204         switch (parms->type) {
205         case TF_TBL_TYPE_FULL_ACT_RECORD:
206         case TF_TBL_TYPE_COMPACT_ACT_RECORD:
207         case TF_TBL_TYPE_ACT_ENCAP_8B:
208         case TF_TBL_TYPE_ACT_ENCAP_16B:
209         case TF_TBL_TYPE_ACT_ENCAP_32B:
210         case TF_TBL_TYPE_ACT_ENCAP_64B:
211         case TF_TBL_TYPE_ACT_SP_SMAC:
212         case TF_TBL_TYPE_ACT_SP_SMAC_IPV4:
213         case TF_TBL_TYPE_ACT_SP_SMAC_IPV6:
214         case TF_TBL_TYPE_ACT_STATS_64:
215         case TF_TBL_TYPE_ACT_MODIFY_IPV4:
216         case TF_TBL_TYPE_ACT_MODIFY_8B:
217         case TF_TBL_TYPE_ACT_MODIFY_16B:
218         case TF_TBL_TYPE_ACT_MODIFY_32B:
219         case TF_TBL_TYPE_ACT_MODIFY_64B:
220                 parms->increment_cnt = 8;
221                 break;
222         default:
223                 parms->increment_cnt = 1;
224                 break;
225         }
226         return 0;
227 }
228
229 /**
230  * Indicates whether the index table type is SRAM managed
231  *
232  * [in] tfp
233  *   Pointer to TF handle
234  *
235  * [in] type
236  *   Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD
237  *
238  * Returns
239  *   - (0) if the table is not managed by the SRAM manager
240  *   - (1) if the table is managed by the SRAM manager
241  */
242 static bool tf_dev_p58_is_sram_managed(struct tf *tfp __rte_unused,
243                                        enum tf_tbl_type type)
244 {
245         switch (type) {
246         case TF_TBL_TYPE_FULL_ACT_RECORD:
247         case TF_TBL_TYPE_COMPACT_ACT_RECORD:
248         case TF_TBL_TYPE_ACT_ENCAP_8B:
249         case TF_TBL_TYPE_ACT_ENCAP_16B:
250         case TF_TBL_TYPE_ACT_ENCAP_32B:
251         case TF_TBL_TYPE_ACT_ENCAP_64B:
252         case TF_TBL_TYPE_ACT_SP_SMAC:
253         case TF_TBL_TYPE_ACT_SP_SMAC_IPV4:
254         case TF_TBL_TYPE_ACT_SP_SMAC_IPV6:
255         case TF_TBL_TYPE_ACT_STATS_64:
256         case TF_TBL_TYPE_ACT_MODIFY_IPV4:
257         case TF_TBL_TYPE_ACT_MODIFY_8B:
258         case TF_TBL_TYPE_ACT_MODIFY_16B:
259         case TF_TBL_TYPE_ACT_MODIFY_32B:
260         case TF_TBL_TYPE_ACT_MODIFY_64B:
261                 return true;
262         default:
263                 return false;
264         }
265 }
266
267 #define TF_DEV_P58_BANK_SZ_64B 2048
268 /**
269  * Get SRAM table information.
270  *
271  * Converts an internal RM allocated element offset to
272  * a user address and vice versa.
273  *
274  * [in] tfp
275  *   Pointer to TF handle
276  *
277  * [in] type
278  *   Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD
279  *
280  * [in/out] base
281  *   Pointer to the Base address of the associated SRAM bank used for
282  *   the type of record allocated.
283  *
284  * [in/out] shift
285  *   Pointer to the factor to be used as a multiplier to translate
286  *   between the RM units to the user address.  SRAM manages 64B entries
287  *   Addresses must be shifted to an 8B address.
288  *
289  * Returns
290  *   - (0) if successful.
291  *   - (-EINVAL) on failure.
292  */
293 static int tf_dev_p58_get_sram_tbl_info(struct tf *tfp __rte_unused,
294                                         void *db,
295                                         enum tf_tbl_type type,
296                                         uint16_t *base,
297                                         uint16_t *shift)
298 {
299         uint16_t hcapi_type;
300         struct tf_rm_get_hcapi_parms parms;
301         int rc;
302
303         parms.rm_db = db;
304         parms.subtype = type;
305         parms.hcapi_type = &hcapi_type;
306
307         rc = tf_rm_get_hcapi_type(&parms);
308         if (rc) {
309                 *base = 0;
310                 *shift = 0;
311                 return 0;
312         }
313
314         switch (hcapi_type) {
315         case CFA_RESOURCE_TYPE_P58_SRAM_BANK_0:
316                 *base = 0;
317                 *shift = 3;
318                 break;
319         case CFA_RESOURCE_TYPE_P58_SRAM_BANK_1:
320                 *base = TF_DEV_P58_BANK_SZ_64B;
321                 *shift = 3;
322                 break;
323         case CFA_RESOURCE_TYPE_P58_SRAM_BANK_2:
324                 *base = TF_DEV_P58_BANK_SZ_64B * 2;
325                 *shift = 3;
326                 break;
327         case CFA_RESOURCE_TYPE_P58_SRAM_BANK_3:
328                 *base = TF_DEV_P58_BANK_SZ_64B * 3;
329                 *shift = 3;
330                 break;
331         default:
332                 *base = 0;
333                 *shift = 0;
334                 break;
335         }
336         return 0;
337 }
338
339 /**
340  * Truflow P58 device specific functions
341  */
342 const struct tf_dev_ops tf_dev_ops_p58_init = {
343         .tf_dev_get_max_types = tf_dev_p58_get_max_types,
344         .tf_dev_get_resource_str = tf_dev_p58_get_resource_str,
345         .tf_dev_set_tcam_slice_info = tf_dev_p58_set_tcam_slice_info,
346         .tf_dev_get_tcam_slice_info = tf_dev_p58_get_tcam_slice_info,
347         .tf_dev_alloc_ident = NULL,
348         .tf_dev_free_ident = NULL,
349         .tf_dev_search_ident = NULL,
350         .tf_dev_get_ident_resc_info = NULL,
351         .tf_dev_get_tbl_info = NULL,
352         .tf_dev_is_sram_managed = tf_dev_p58_is_sram_managed,
353         .tf_dev_alloc_ext_tbl = NULL,
354         .tf_dev_alloc_tbl = NULL,
355         .tf_dev_alloc_sram_tbl = NULL,
356         .tf_dev_free_ext_tbl = NULL,
357         .tf_dev_free_tbl = NULL,
358         .tf_dev_free_sram_tbl = NULL,
359         .tf_dev_set_tbl = NULL,
360         .tf_dev_set_ext_tbl = NULL,
361         .tf_dev_set_sram_tbl = NULL,
362         .tf_dev_get_tbl = NULL,
363         .tf_dev_get_sram_tbl = NULL,
364         .tf_dev_get_bulk_tbl = NULL,
365         .tf_dev_get_bulk_sram_tbl = NULL,
366         .tf_dev_get_shared_tbl_increment = tf_dev_p58_get_shared_tbl_increment,
367         .tf_dev_get_tbl_resc_info = NULL,
368         .tf_dev_alloc_tcam = NULL,
369         .tf_dev_free_tcam = NULL,
370         .tf_dev_alloc_search_tcam = NULL,
371         .tf_dev_set_tcam = NULL,
372         .tf_dev_get_tcam = NULL,
373         .tf_dev_get_tcam_resc_info = NULL,
374         .tf_dev_insert_int_em_entry = NULL,
375         .tf_dev_delete_int_em_entry = NULL,
376         .tf_dev_insert_ext_em_entry = NULL,
377         .tf_dev_delete_ext_em_entry = NULL,
378         .tf_dev_get_em_resc_info = NULL,
379         .tf_dev_alloc_tbl_scope = NULL,
380         .tf_dev_map_tbl_scope = NULL,
381         .tf_dev_map_parif = NULL,
382         .tf_dev_free_tbl_scope = NULL,
383         .tf_dev_set_if_tbl = NULL,
384         .tf_dev_get_if_tbl = NULL,
385         .tf_dev_set_global_cfg = NULL,
386         .tf_dev_get_global_cfg = NULL,
387         .tf_dev_get_mailbox = tf_dev_p58_get_mailbox,
388         .tf_dev_word_align = NULL,
389 };
390
391 /**
392  * Truflow P58 device specific functions
393  */
394 const struct tf_dev_ops tf_dev_ops_p58 = {
395         .tf_dev_get_max_types = tf_dev_p58_get_max_types,
396         .tf_dev_get_resource_str = tf_dev_p58_get_resource_str,
397         .tf_dev_set_tcam_slice_info = tf_dev_p58_set_tcam_slice_info,
398         .tf_dev_get_tcam_slice_info = tf_dev_p58_get_tcam_slice_info,
399         .tf_dev_alloc_ident = tf_ident_alloc,
400         .tf_dev_free_ident = tf_ident_free,
401         .tf_dev_search_ident = tf_ident_search,
402         .tf_dev_get_ident_resc_info = tf_ident_get_resc_info,
403         .tf_dev_is_sram_managed = tf_dev_p58_is_sram_managed,
404         .tf_dev_get_tbl_info = tf_dev_p58_get_sram_tbl_info,
405         .tf_dev_alloc_tbl = tf_tbl_alloc,
406         .tf_dev_alloc_sram_tbl = tf_tbl_sram_alloc,
407         .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
408         .tf_dev_free_tbl = tf_tbl_free,
409         .tf_dev_free_ext_tbl = tf_tbl_ext_free,
410         .tf_dev_free_sram_tbl = tf_tbl_sram_free,
411         .tf_dev_set_tbl = tf_tbl_set,
412         .tf_dev_set_ext_tbl = tf_tbl_ext_common_set,
413         .tf_dev_set_sram_tbl = tf_tbl_sram_set,
414         .tf_dev_get_tbl = tf_tbl_get,
415         .tf_dev_get_sram_tbl = tf_tbl_sram_get,
416         .tf_dev_get_bulk_tbl = tf_tbl_bulk_get,
417         .tf_dev_get_bulk_sram_tbl = tf_tbl_sram_bulk_get,
418         .tf_dev_get_shared_tbl_increment = tf_dev_p58_get_shared_tbl_increment,
419         .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info,
420 #ifdef TF_TCAM_SHARED
421         .tf_dev_alloc_tcam = tf_tcam_shared_alloc,
422         .tf_dev_free_tcam = tf_tcam_shared_free,
423         .tf_dev_set_tcam = tf_tcam_shared_set,
424         .tf_dev_get_tcam = tf_tcam_shared_get,
425         .tf_dev_move_tcam = tf_tcam_shared_move_p58,
426         .tf_dev_clear_tcam = tf_tcam_shared_clear,
427 #else /* !TF_TCAM_SHARED */
428         .tf_dev_alloc_tcam = tf_tcam_alloc,
429         .tf_dev_free_tcam = tf_tcam_free,
430         .tf_dev_set_tcam = tf_tcam_set,
431         .tf_dev_get_tcam = tf_tcam_get,
432 #endif
433         .tf_dev_alloc_search_tcam = tf_tcam_alloc_search,
434         .tf_dev_get_tcam_resc_info = tf_tcam_get_resc_info,
435         .tf_dev_insert_int_em_entry = tf_em_hash_insert_int_entry,
436         .tf_dev_delete_int_em_entry = tf_em_hash_delete_int_entry,
437         .tf_dev_move_int_em_entry = tf_em_move_int_entry,
438         .tf_dev_insert_ext_em_entry = NULL,
439         .tf_dev_delete_ext_em_entry = NULL,
440         .tf_dev_get_em_resc_info = tf_em_get_resc_info,
441         .tf_dev_alloc_tbl_scope = NULL,
442         .tf_dev_map_tbl_scope = NULL,
443         .tf_dev_map_parif = NULL,
444         .tf_dev_free_tbl_scope = NULL,
445         .tf_dev_set_if_tbl = tf_if_tbl_set,
446         .tf_dev_get_if_tbl = tf_if_tbl_get,
447         .tf_dev_set_global_cfg = tf_global_cfg_set,
448         .tf_dev_get_global_cfg = tf_global_cfg_get,
449         .tf_dev_get_mailbox = tf_dev_p58_get_mailbox,
450         .tf_dev_word_align = tf_dev_p58_word_align,
451         .tf_dev_cfa_key_hash = hcapi_cfa_p58_key_hash
452 };