drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2021 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 /* date: Wed Mar 17 11:31:19 2021 */
   7
   8 #include "ulp_template_db_enum.h"
   9 #include "ulp_template_db_field.h"
  10 #include "ulp_template_struct.h"
  11 #include "ulp_template_db_tbl.h"
  12
  13 /*
  14  * Action signature table:
  15  * maps hash id to ulp_act_match_list[] index
  16  */
  17 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
  18         [BNXT_ULP_ACT_HID_0000] = 1,
  19         [BNXT_ULP_ACT_HID_0001] = 2,
  20         [BNXT_ULP_ACT_HID_0400] = 3,
  21         [BNXT_ULP_ACT_HID_01ab] = 4,
  22         [BNXT_ULP_ACT_HID_0010] = 5,
  23         [BNXT_ULP_ACT_HID_05ab] = 6,
  24         [BNXT_ULP_ACT_HID_01bb] = 7,
  25         [BNXT_ULP_ACT_HID_0002] = 8,
  26         [BNXT_ULP_ACT_HID_0003] = 9,
  27         [BNXT_ULP_ACT_HID_0402] = 10,
  28         [BNXT_ULP_ACT_HID_01ad] = 11,
  29         [BNXT_ULP_ACT_HID_0012] = 12,
  30         [BNXT_ULP_ACT_HID_05ad] = 13,
  31         [BNXT_ULP_ACT_HID_01bd] = 14,
  32         [BNXT_ULP_ACT_HID_0613] = 15,
  33         [BNXT_ULP_ACT_HID_02a9] = 16,
  34         [BNXT_ULP_ACT_HID_0054] = 17,
  35         [BNXT_ULP_ACT_HID_0622] = 18,
  36         [BNXT_ULP_ACT_HID_0454] = 19,
  37         [BNXT_ULP_ACT_HID_0064] = 20,
  38         [BNXT_ULP_ACT_HID_0614] = 21,
  39         [BNXT_ULP_ACT_HID_0615] = 22,
  40         [BNXT_ULP_ACT_HID_02ab] = 23,
  41         [BNXT_ULP_ACT_HID_0056] = 24,
  42         [BNXT_ULP_ACT_HID_0624] = 25,
  43         [BNXT_ULP_ACT_HID_0456] = 26,
  44         [BNXT_ULP_ACT_HID_0066] = 27,
  45         [BNXT_ULP_ACT_HID_048d] = 28,
  46         [BNXT_ULP_ACT_HID_048f] = 29,
  47         [BNXT_ULP_ACT_HID_04bc] = 30,
  48         [BNXT_ULP_ACT_HID_00a9] = 31,
  49         [BNXT_ULP_ACT_HID_020f] = 32,
  50         [BNXT_ULP_ACT_HID_04a9] = 33,
  51         [BNXT_ULP_ACT_HID_01fc] = 34,
  52         [BNXT_ULP_ACT_HID_04be] = 35,
  53         [BNXT_ULP_ACT_HID_00ab] = 36,
  54         [BNXT_ULP_ACT_HID_0211] = 37,
  55         [BNXT_ULP_ACT_HID_04ab] = 38,
  56         [BNXT_ULP_ACT_HID_01fe] = 39,
  57         [BNXT_ULP_ACT_HID_0667] = 40,
  58         [BNXT_ULP_ACT_HID_0254] = 41,
  59         [BNXT_ULP_ACT_HID_03ba] = 42,
  60         [BNXT_ULP_ACT_HID_0654] = 43,
  61         [BNXT_ULP_ACT_HID_03a7] = 44,
  62         [BNXT_ULP_ACT_HID_0669] = 45,
  63         [BNXT_ULP_ACT_HID_0256] = 46,
  64         [BNXT_ULP_ACT_HID_03bc] = 47,
  65         [BNXT_ULP_ACT_HID_0656] = 48,
  66         [BNXT_ULP_ACT_HID_03a9] = 49,
  67         [BNXT_ULP_ACT_HID_021b] = 50,
  68         [BNXT_ULP_ACT_HID_021c] = 51,
  69         [BNXT_ULP_ACT_HID_021e] = 52,
  70         [BNXT_ULP_ACT_HID_063f] = 53,
  71         [BNXT_ULP_ACT_HID_0510] = 54,
  72         [BNXT_ULP_ACT_HID_03c6] = 55,
  73         [BNXT_ULP_ACT_HID_0082] = 56,
  74         [BNXT_ULP_ACT_HID_06bb] = 57,
  75         [BNXT_ULP_ACT_HID_021d] = 58,
  76         [BNXT_ULP_ACT_HID_0641] = 59,
  77         [BNXT_ULP_ACT_HID_0512] = 60,
  78         [BNXT_ULP_ACT_HID_03c8] = 61,
  79         [BNXT_ULP_ACT_HID_0084] = 62,
  80         [BNXT_ULP_ACT_HID_06bd] = 63,
  81         [BNXT_ULP_ACT_HID_06d7] = 64,
  82         [BNXT_ULP_ACT_HID_02c4] = 65,
  83         [BNXT_ULP_ACT_HID_042a] = 66,
  84         [BNXT_ULP_ACT_HID_06c4] = 67,
  85         [BNXT_ULP_ACT_HID_0417] = 68,
  86         [BNXT_ULP_ACT_HID_06d9] = 69,
  87         [BNXT_ULP_ACT_HID_02c6] = 70,
  88         [BNXT_ULP_ACT_HID_042c] = 71,
  89         [BNXT_ULP_ACT_HID_06c6] = 72,
  90         [BNXT_ULP_ACT_HID_0419] = 73,
  91         [BNXT_ULP_ACT_HID_0119] = 74,
  92         [BNXT_ULP_ACT_HID_046f] = 75,
  93         [BNXT_ULP_ACT_HID_05d5] = 76,
  94         [BNXT_ULP_ACT_HID_0106] = 77,
  95         [BNXT_ULP_ACT_HID_05c2] = 78,
  96         [BNXT_ULP_ACT_HID_011b] = 79,
  97         [BNXT_ULP_ACT_HID_0471] = 80,
  98         [BNXT_ULP_ACT_HID_05d7] = 81,
  99         [BNXT_ULP_ACT_HID_0108] = 82,
 100         [BNXT_ULP_ACT_HID_05c4] = 83,
 101         [BNXT_ULP_ACT_HID_00a2] = 84,
 102         [BNXT_ULP_ACT_HID_00a4] = 85
 103 };
 104
 105 /* Array for the act matcher list */
 106 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 107         [1] = {
 108         .act_hid = BNXT_ULP_ACT_HID_0000,
 109         .act_pattern_id = 0,
 110         .app_sig = 0,
 111         .act_sig = { .bits =
 112                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 113         .act_tid = 1
 114         },
 115         [2] = {
 116         .act_hid = BNXT_ULP_ACT_HID_0001,
 117         .act_pattern_id = 1,
 118         .app_sig = 0,
 119         .act_sig = { .bits =
 120                 BNXT_ULP_ACT_BIT_DROP |
 121                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 122         .act_tid = 1
 123         },
 124         [3] = {
 125         .act_hid = BNXT_ULP_ACT_HID_0400,
 126         .act_pattern_id = 2,
 127         .app_sig = 0,
 128         .act_sig = { .bits =
 129                 BNXT_ULP_ACT_BIT_POP_VLAN |
 130                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 131         .act_tid = 1
 132         },
 133         [4] = {
 134         .act_hid = BNXT_ULP_ACT_HID_01ab,
 135         .act_pattern_id = 3,
 136         .app_sig = 0,
 137         .act_sig = { .bits =
 138                 BNXT_ULP_ACT_BIT_DEC_TTL |
 139                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 140         .act_tid = 1
 141         },
 142         [5] = {
 143         .act_hid = BNXT_ULP_ACT_HID_0010,
 144         .act_pattern_id = 4,
 145         .app_sig = 0,
 146         .act_sig = { .bits =
 147                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 148                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 149         .act_tid = 1
 150         },
 151         [6] = {
 152         .act_hid = BNXT_ULP_ACT_HID_05ab,
 153         .act_pattern_id = 5,
 154         .app_sig = 0,
 155         .act_sig = { .bits =
 156                 BNXT_ULP_ACT_BIT_DEC_TTL |
 157                 BNXT_ULP_ACT_BIT_POP_VLAN |
 158                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 159         .act_tid = 1
 160         },
 161         [7] = {
 162         .act_hid = BNXT_ULP_ACT_HID_01bb,
 163         .act_pattern_id = 6,
 164         .app_sig = 0,
 165         .act_sig = { .bits =
 166                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 167                 BNXT_ULP_ACT_BIT_DEC_TTL |
 168                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 169         .act_tid = 1
 170         },
 171         [8] = {
 172         .act_hid = BNXT_ULP_ACT_HID_0002,
 173         .act_pattern_id = 7,
 174         .app_sig = 0,
 175         .act_sig = { .bits =
 176                 BNXT_ULP_ACT_BIT_COUNT |
 177                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 178         .act_tid = 1
 179         },
 180         [9] = {
 181         .act_hid = BNXT_ULP_ACT_HID_0003,
 182         .act_pattern_id = 8,
 183         .app_sig = 0,
 184         .act_sig = { .bits =
 185                 BNXT_ULP_ACT_BIT_COUNT |
 186                 BNXT_ULP_ACT_BIT_DROP |
 187                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 188         .act_tid = 1
 189         },
 190         [10] = {
 191         .act_hid = BNXT_ULP_ACT_HID_0402,
 192         .act_pattern_id = 9,
 193         .app_sig = 0,
 194         .act_sig = { .bits =
 195                 BNXT_ULP_ACT_BIT_COUNT |
 196                 BNXT_ULP_ACT_BIT_POP_VLAN |
 197                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 198         .act_tid = 1
 199         },
 200         [11] = {
 201         .act_hid = BNXT_ULP_ACT_HID_01ad,
 202         .act_pattern_id = 10,
 203         .app_sig = 0,
 204         .act_sig = { .bits =
 205                 BNXT_ULP_ACT_BIT_COUNT |
 206                 BNXT_ULP_ACT_BIT_DEC_TTL |
 207                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 208         .act_tid = 1
 209         },
 210         [12] = {
 211         .act_hid = BNXT_ULP_ACT_HID_0012,
 212         .act_pattern_id = 11,
 213         .app_sig = 0,
 214         .act_sig = { .bits =
 215                 BNXT_ULP_ACT_BIT_COUNT |
 216                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 217                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 218         .act_tid = 1
 219         },
 220         [13] = {
 221         .act_hid = BNXT_ULP_ACT_HID_05ad,
 222         .act_pattern_id = 12,
 223         .app_sig = 0,
 224         .act_sig = { .bits =
 225                 BNXT_ULP_ACT_BIT_COUNT |
 226                 BNXT_ULP_ACT_BIT_DEC_TTL |
 227                 BNXT_ULP_ACT_BIT_POP_VLAN |
 228                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 229         .act_tid = 1
 230         },
 231         [14] = {
 232         .act_hid = BNXT_ULP_ACT_HID_01bd,
 233         .act_pattern_id = 13,
 234         .app_sig = 0,
 235         .act_sig = { .bits =
 236                 BNXT_ULP_ACT_BIT_COUNT |
 237                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 238                 BNXT_ULP_ACT_BIT_DEC_TTL |
 239                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 240         .act_tid = 1
 241         },
 242         [15] = {
 243         .act_hid = BNXT_ULP_ACT_HID_0613,
 244         .act_pattern_id = 14,
 245         .app_sig = 0,
 246         .act_sig = { .bits =
 247                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 248                 BNXT_ULP_ACT_BIT_DROP |
 249                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 250         .act_tid = 1
 251         },
 252         [16] = {
 253         .act_hid = BNXT_ULP_ACT_HID_02a9,
 254         .act_pattern_id = 15,
 255         .app_sig = 0,
 256         .act_sig = { .bits =
 257                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 258                 BNXT_ULP_ACT_BIT_POP_VLAN |
 259                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 260         .act_tid = 1
 261         },
 262         [17] = {
 263         .act_hid = BNXT_ULP_ACT_HID_0054,
 264         .act_pattern_id = 16,
 265         .app_sig = 0,
 266         .act_sig = { .bits =
 267                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 268                 BNXT_ULP_ACT_BIT_DEC_TTL |
 269                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 270         .act_tid = 1
 271         },
 272         [18] = {
 273         .act_hid = BNXT_ULP_ACT_HID_0622,
 274         .act_pattern_id = 17,
 275         .app_sig = 0,
 276         .act_sig = { .bits =
 277                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 278                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 279                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 280         .act_tid = 1
 281         },
 282         [19] = {
 283         .act_hid = BNXT_ULP_ACT_HID_0454,
 284         .act_pattern_id = 18,
 285         .app_sig = 0,
 286         .act_sig = { .bits =
 287                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 288                 BNXT_ULP_ACT_BIT_DEC_TTL |
 289                 BNXT_ULP_ACT_BIT_POP_VLAN |
 290                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 291         .act_tid = 1
 292         },
 293         [20] = {
 294         .act_hid = BNXT_ULP_ACT_HID_0064,
 295         .act_pattern_id = 19,
 296         .app_sig = 0,
 297         .act_sig = { .bits =
 298                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 299                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 300                 BNXT_ULP_ACT_BIT_DEC_TTL |
 301                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 302         .act_tid = 1
 303         },
 304         [21] = {
 305         .act_hid = BNXT_ULP_ACT_HID_0614,
 306         .act_pattern_id = 20,
 307         .app_sig = 0,
 308         .act_sig = { .bits =
 309                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 310                 BNXT_ULP_ACT_BIT_COUNT |
 311                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 312         .act_tid = 1
 313         },
 314         [22] = {
 315         .act_hid = BNXT_ULP_ACT_HID_0615,
 316         .act_pattern_id = 21,
 317         .app_sig = 0,
 318         .act_sig = { .bits =
 319                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 320                 BNXT_ULP_ACT_BIT_COUNT |
 321                 BNXT_ULP_ACT_BIT_DROP |
 322                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 323         .act_tid = 1
 324         },
 325         [23] = {
 326         .act_hid = BNXT_ULP_ACT_HID_02ab,
 327         .act_pattern_id = 22,
 328         .app_sig = 0,
 329         .act_sig = { .bits =
 330                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 331                 BNXT_ULP_ACT_BIT_COUNT |
 332                 BNXT_ULP_ACT_BIT_POP_VLAN |
 333                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 334         .act_tid = 1
 335         },
 336         [24] = {
 337         .act_hid = BNXT_ULP_ACT_HID_0056,
 338         .act_pattern_id = 23,
 339         .app_sig = 0,
 340         .act_sig = { .bits =
 341                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 342                 BNXT_ULP_ACT_BIT_COUNT |
 343                 BNXT_ULP_ACT_BIT_DEC_TTL |
 344                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 345         .act_tid = 1
 346         },
 347         [25] = {
 348         .act_hid = BNXT_ULP_ACT_HID_0624,
 349         .act_pattern_id = 24,
 350         .app_sig = 0,
 351         .act_sig = { .bits =
 352                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 353                 BNXT_ULP_ACT_BIT_COUNT |
 354                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 355                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 356         .act_tid = 1
 357         },
 358         [26] = {
 359         .act_hid = BNXT_ULP_ACT_HID_0456,
 360         .act_pattern_id = 25,
 361         .app_sig = 0,
 362         .act_sig = { .bits =
 363                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 364                 BNXT_ULP_ACT_BIT_COUNT |
 365                 BNXT_ULP_ACT_BIT_DEC_TTL |
 366                 BNXT_ULP_ACT_BIT_POP_VLAN |
 367                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 368         .act_tid = 1
 369         },
 370         [27] = {
 371         .act_hid = BNXT_ULP_ACT_HID_0066,
 372         .act_pattern_id = 26,
 373         .app_sig = 0,
 374         .act_sig = { .bits =
 375                 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
 376                 BNXT_ULP_ACT_BIT_COUNT |
 377                 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
 378                 BNXT_ULP_ACT_BIT_DEC_TTL |
 379                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 380         .act_tid = 1
 381         },
 382         [28] = {
 383         .act_hid = BNXT_ULP_ACT_HID_048d,
 384         .act_pattern_id = 0,
 385         .app_sig = 0,
 386         .act_sig = { .bits =
 387                 BNXT_ULP_ACT_BIT_SHARED |
 388                 BNXT_ULP_ACT_BIT_SAMPLE |
 389                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 390         .act_tid = 2
 391         },
 392         [29] = {
 393         .act_hid = BNXT_ULP_ACT_HID_048f,
 394         .act_pattern_id = 1,
 395         .app_sig = 0,
 396         .act_sig = { .bits =
 397                 BNXT_ULP_ACT_BIT_SHARED |
 398                 BNXT_ULP_ACT_BIT_SAMPLE |
 399                 BNXT_ULP_ACT_BIT_COUNT |
 400                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 401         .act_tid = 2
 402         },
 403         [30] = {
 404         .act_hid = BNXT_ULP_ACT_HID_04bc,
 405         .act_pattern_id = 0,
 406         .app_sig = 0,
 407         .act_sig = { .bits =
 408                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 409                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 410         .act_tid = 3
 411         },
 412         [31] = {
 413         .act_hid = BNXT_ULP_ACT_HID_00a9,
 414         .act_pattern_id = 1,
 415         .app_sig = 0,
 416         .act_sig = { .bits =
 417                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 418                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 419                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 420         .act_tid = 3
 421         },
 422         [32] = {
 423         .act_hid = BNXT_ULP_ACT_HID_020f,
 424         .act_pattern_id = 2,
 425         .app_sig = 0,
 426         .act_sig = { .bits =
 427                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 428                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 429         .act_tid = 3
 430         },
 431         [33] = {
 432         .act_hid = BNXT_ULP_ACT_HID_04a9,
 433         .act_pattern_id = 3,
 434         .app_sig = 0,
 435         .act_sig = { .bits =
 436                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 437                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 438                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 439                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 440         .act_tid = 3
 441         },
 442         [34] = {
 443         .act_hid = BNXT_ULP_ACT_HID_01fc,
 444         .act_pattern_id = 4,
 445         .app_sig = 0,
 446         .act_sig = { .bits =
 447                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 448                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 449                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 450                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 451                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 452         .act_tid = 3
 453         },
 454         [35] = {
 455         .act_hid = BNXT_ULP_ACT_HID_04be,
 456         .act_pattern_id = 5,
 457         .app_sig = 0,
 458         .act_sig = { .bits =
 459                 BNXT_ULP_ACT_BIT_COUNT |
 460                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 461                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 462         .act_tid = 3
 463         },
 464         [36] = {
 465         .act_hid = BNXT_ULP_ACT_HID_00ab,
 466         .act_pattern_id = 6,
 467         .app_sig = 0,
 468         .act_sig = { .bits =
 469                 BNXT_ULP_ACT_BIT_COUNT |
 470                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 471                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 472                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 473         .act_tid = 3
 474         },
 475         [37] = {
 476         .act_hid = BNXT_ULP_ACT_HID_0211,
 477         .act_pattern_id = 7,
 478         .app_sig = 0,
 479         .act_sig = { .bits =
 480                 BNXT_ULP_ACT_BIT_COUNT |
 481                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 482                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 483         .act_tid = 3
 484         },
 485         [38] = {
 486         .act_hid = BNXT_ULP_ACT_HID_04ab,
 487         .act_pattern_id = 8,
 488         .app_sig = 0,
 489         .act_sig = { .bits =
 490                 BNXT_ULP_ACT_BIT_COUNT |
 491                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 492                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 493                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 494                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 495         .act_tid = 3
 496         },
 497         [39] = {
 498         .act_hid = BNXT_ULP_ACT_HID_01fe,
 499         .act_pattern_id = 9,
 500         .app_sig = 0,
 501         .act_sig = { .bits =
 502                 BNXT_ULP_ACT_BIT_COUNT |
 503                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 504                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 505                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 506                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 507                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 508         .act_tid = 3
 509         },
 510         [40] = {
 511         .act_hid = BNXT_ULP_ACT_HID_0667,
 512         .act_pattern_id = 10,
 513         .app_sig = 0,
 514         .act_sig = { .bits =
 515                 BNXT_ULP_ACT_BIT_DEC_TTL |
 516                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 517                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 518         .act_tid = 3
 519         },
 520         [41] = {
 521         .act_hid = BNXT_ULP_ACT_HID_0254,
 522         .act_pattern_id = 11,
 523         .app_sig = 0,
 524         .act_sig = { .bits =
 525                 BNXT_ULP_ACT_BIT_DEC_TTL |
 526                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 527                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 528                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 529         .act_tid = 3
 530         },
 531         [42] = {
 532         .act_hid = BNXT_ULP_ACT_HID_03ba,
 533         .act_pattern_id = 12,
 534         .app_sig = 0,
 535         .act_sig = { .bits =
 536                 BNXT_ULP_ACT_BIT_DEC_TTL |
 537                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 538                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 539         .act_tid = 3
 540         },
 541         [43] = {
 542         .act_hid = BNXT_ULP_ACT_HID_0654,
 543         .act_pattern_id = 13,
 544         .app_sig = 0,
 545         .act_sig = { .bits =
 546                 BNXT_ULP_ACT_BIT_DEC_TTL |
 547                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 548                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 549                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 550                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 551         .act_tid = 3
 552         },
 553         [44] = {
 554         .act_hid = BNXT_ULP_ACT_HID_03a7,
 555         .act_pattern_id = 14,
 556         .app_sig = 0,
 557         .act_sig = { .bits =
 558                 BNXT_ULP_ACT_BIT_DEC_TTL |
 559                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 560                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 561                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 562                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 563                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 564         .act_tid = 3
 565         },
 566         [45] = {
 567         .act_hid = BNXT_ULP_ACT_HID_0669,
 568         .act_pattern_id = 15,
 569         .app_sig = 0,
 570         .act_sig = { .bits =
 571                 BNXT_ULP_ACT_BIT_DEC_TTL |
 572                 BNXT_ULP_ACT_BIT_COUNT |
 573                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 574                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 575         .act_tid = 3
 576         },
 577         [46] = {
 578         .act_hid = BNXT_ULP_ACT_HID_0256,
 579         .act_pattern_id = 16,
 580         .app_sig = 0,
 581         .act_sig = { .bits =
 582                 BNXT_ULP_ACT_BIT_DEC_TTL |
 583                 BNXT_ULP_ACT_BIT_COUNT |
 584                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 585                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 586                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 587         .act_tid = 3
 588         },
 589         [47] = {
 590         .act_hid = BNXT_ULP_ACT_HID_03bc,
 591         .act_pattern_id = 17,
 592         .app_sig = 0,
 593         .act_sig = { .bits =
 594                 BNXT_ULP_ACT_BIT_DEC_TTL |
 595                 BNXT_ULP_ACT_BIT_COUNT |
 596                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 597                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 598         .act_tid = 3
 599         },
 600         [48] = {
 601         .act_hid = BNXT_ULP_ACT_HID_0656,
 602         .act_pattern_id = 18,
 603         .app_sig = 0,
 604         .act_sig = { .bits =
 605                 BNXT_ULP_ACT_BIT_DEC_TTL |
 606                 BNXT_ULP_ACT_BIT_COUNT |
 607                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 608                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 609                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 610                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 611         .act_tid = 3
 612         },
 613         [49] = {
 614         .act_hid = BNXT_ULP_ACT_HID_03a9,
 615         .act_pattern_id = 19,
 616         .app_sig = 0,
 617         .act_sig = { .bits =
 618                 BNXT_ULP_ACT_BIT_DEC_TTL |
 619                 BNXT_ULP_ACT_BIT_COUNT |
 620                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 621                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 622                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 623                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 624                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 625         .act_tid = 3
 626         },
 627         [50] = {
 628         .act_hid = BNXT_ULP_ACT_HID_021b,
 629         .act_pattern_id = 0,
 630         .app_sig = 0,
 631         .act_sig = { .bits =
 632                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 633         .act_tid = 4
 634         },
 635         [51] = {
 636         .act_hid = BNXT_ULP_ACT_HID_021c,
 637         .act_pattern_id = 1,
 638         .app_sig = 0,
 639         .act_sig = { .bits =
 640                 BNXT_ULP_ACT_BIT_DROP |
 641                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 642         .act_tid = 4
 643         },
 644         [52] = {
 645         .act_hid = BNXT_ULP_ACT_HID_021e,
 646         .act_pattern_id = 2,
 647         .app_sig = 0,
 648         .act_sig = { .bits =
 649                 BNXT_ULP_ACT_BIT_DROP |
 650                 BNXT_ULP_ACT_BIT_COUNT |
 651                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 652         .act_tid = 4
 653         },
 654         [53] = {
 655         .act_hid = BNXT_ULP_ACT_HID_063f,
 656         .act_pattern_id = 3,
 657         .app_sig = 0,
 658         .act_sig = { .bits =
 659                 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
 660                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 661                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 662                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 663         .act_tid = 4
 664         },
 665         [54] = {
 666         .act_hid = BNXT_ULP_ACT_HID_0510,
 667         .act_pattern_id = 4,
 668         .app_sig = 0,
 669         .act_sig = { .bits =
 670                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 671                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 672                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 673         .act_tid = 4
 674         },
 675         [55] = {
 676         .act_hid = BNXT_ULP_ACT_HID_03c6,
 677         .act_pattern_id = 5,
 678         .app_sig = 0,
 679         .act_sig = { .bits =
 680                 BNXT_ULP_ACT_BIT_DEC_TTL |
 681                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 682         .act_tid = 4
 683         },
 684         [56] = {
 685         .act_hid = BNXT_ULP_ACT_HID_0082,
 686         .act_pattern_id = 6,
 687         .app_sig = 0,
 688         .act_sig = { .bits =
 689                 BNXT_ULP_ACT_BIT_DEC_TTL |
 690                 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
 691                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 692                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 693                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 694         .act_tid = 4
 695         },
 696         [57] = {
 697         .act_hid = BNXT_ULP_ACT_HID_06bb,
 698         .act_pattern_id = 7,
 699         .app_sig = 0,
 700         .act_sig = { .bits =
 701                 BNXT_ULP_ACT_BIT_DEC_TTL |
 702                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 703                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 704                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 705         .act_tid = 4
 706         },
 707         [58] = {
 708         .act_hid = BNXT_ULP_ACT_HID_021d,
 709         .act_pattern_id = 8,
 710         .app_sig = 0,
 711         .act_sig = { .bits =
 712                 BNXT_ULP_ACT_BIT_COUNT |
 713                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 714         .act_tid = 4
 715         },
 716         [59] = {
 717         .act_hid = BNXT_ULP_ACT_HID_0641,
 718         .act_pattern_id = 9,
 719         .app_sig = 0,
 720         .act_sig = { .bits =
 721                 BNXT_ULP_ACT_BIT_COUNT |
 722                 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
 723                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 724                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 725                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 726         .act_tid = 4
 727         },
 728         [60] = {
 729         .act_hid = BNXT_ULP_ACT_HID_0512,
 730         .act_pattern_id = 10,
 731         .app_sig = 0,
 732         .act_sig = { .bits =
 733                 BNXT_ULP_ACT_BIT_COUNT |
 734                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 735                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 736                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 737         .act_tid = 4
 738         },
 739         [61] = {
 740         .act_hid = BNXT_ULP_ACT_HID_03c8,
 741         .act_pattern_id = 11,
 742         .app_sig = 0,
 743         .act_sig = { .bits =
 744                 BNXT_ULP_ACT_BIT_COUNT |
 745                 BNXT_ULP_ACT_BIT_DEC_TTL |
 746                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 747         .act_tid = 4
 748         },
 749         [62] = {
 750         .act_hid = BNXT_ULP_ACT_HID_0084,
 751         .act_pattern_id = 12,
 752         .app_sig = 0,
 753         .act_sig = { .bits =
 754                 BNXT_ULP_ACT_BIT_COUNT |
 755                 BNXT_ULP_ACT_BIT_DEC_TTL |
 756                 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
 757                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 758                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 759                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 760         .act_tid = 4
 761         },
 762         [63] = {
 763         .act_hid = BNXT_ULP_ACT_HID_06bd,
 764         .act_pattern_id = 13,
 765         .app_sig = 0,
 766         .act_sig = { .bits =
 767                 BNXT_ULP_ACT_BIT_COUNT |
 768                 BNXT_ULP_ACT_BIT_DEC_TTL |
 769                 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
 770                 BNXT_ULP_ACT_BIT_PUSH_VLAN |
 771                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 772         .act_tid = 4
 773         },
 774         [64] = {
 775         .act_hid = BNXT_ULP_ACT_HID_06d7,
 776         .act_pattern_id = 0,
 777         .app_sig = 0,
 778         .act_sig = { .bits =
 779                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 780                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 781         .act_tid = 5
 782         },
 783         [65] = {
 784         .act_hid = BNXT_ULP_ACT_HID_02c4,
 785         .act_pattern_id = 1,
 786         .app_sig = 0,
 787         .act_sig = { .bits =
 788                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 789                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 790                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 791         .act_tid = 5
 792         },
 793         [66] = {
 794         .act_hid = BNXT_ULP_ACT_HID_042a,
 795         .act_pattern_id = 2,
 796         .app_sig = 0,
 797         .act_sig = { .bits =
 798                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 799                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 800         .act_tid = 5
 801         },
 802         [67] = {
 803         .act_hid = BNXT_ULP_ACT_HID_06c4,
 804         .act_pattern_id = 3,
 805         .app_sig = 0,
 806         .act_sig = { .bits =
 807                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 808                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 809                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 810                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 811         .act_tid = 5
 812         },
 813         [68] = {
 814         .act_hid = BNXT_ULP_ACT_HID_0417,
 815         .act_pattern_id = 4,
 816         .app_sig = 0,
 817         .act_sig = { .bits =
 818                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 819                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 820                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 821                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 822                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 823         .act_tid = 5
 824         },
 825         [69] = {
 826         .act_hid = BNXT_ULP_ACT_HID_06d9,
 827         .act_pattern_id = 5,
 828         .app_sig = 0,
 829         .act_sig = { .bits =
 830                 BNXT_ULP_ACT_BIT_COUNT |
 831                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 832                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 833         .act_tid = 5
 834         },
 835         [70] = {
 836         .act_hid = BNXT_ULP_ACT_HID_02c6,
 837         .act_pattern_id = 6,
 838         .app_sig = 0,
 839         .act_sig = { .bits =
 840                 BNXT_ULP_ACT_BIT_COUNT |
 841                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 842                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 843                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 844         .act_tid = 5
 845         },
 846         [71] = {
 847         .act_hid = BNXT_ULP_ACT_HID_042c,
 848         .act_pattern_id = 7,
 849         .app_sig = 0,
 850         .act_sig = { .bits =
 851                 BNXT_ULP_ACT_BIT_COUNT |
 852                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 853                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 854         .act_tid = 5
 855         },
 856         [72] = {
 857         .act_hid = BNXT_ULP_ACT_HID_06c6,
 858         .act_pattern_id = 8,
 859         .app_sig = 0,
 860         .act_sig = { .bits =
 861                 BNXT_ULP_ACT_BIT_COUNT |
 862                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 863                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 864                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 865                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 866         .act_tid = 5
 867         },
 868         [73] = {
 869         .act_hid = BNXT_ULP_ACT_HID_0419,
 870         .act_pattern_id = 9,
 871         .app_sig = 0,
 872         .act_sig = { .bits =
 873                 BNXT_ULP_ACT_BIT_COUNT |
 874                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 875                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 876                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 877                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 878                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 879         .act_tid = 5
 880         },
 881         [74] = {
 882         .act_hid = BNXT_ULP_ACT_HID_0119,
 883         .act_pattern_id = 10,
 884         .app_sig = 0,
 885         .act_sig = { .bits =
 886                 BNXT_ULP_ACT_BIT_DEC_TTL |
 887                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 888                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 889         .act_tid = 5
 890         },
 891         [75] = {
 892         .act_hid = BNXT_ULP_ACT_HID_046f,
 893         .act_pattern_id = 11,
 894         .app_sig = 0,
 895         .act_sig = { .bits =
 896                 BNXT_ULP_ACT_BIT_DEC_TTL |
 897                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 898                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 899                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 900         .act_tid = 5
 901         },
 902         [76] = {
 903         .act_hid = BNXT_ULP_ACT_HID_05d5,
 904         .act_pattern_id = 12,
 905         .app_sig = 0,
 906         .act_sig = { .bits =
 907                 BNXT_ULP_ACT_BIT_DEC_TTL |
 908                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 909                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 910         .act_tid = 5
 911         },
 912         [77] = {
 913         .act_hid = BNXT_ULP_ACT_HID_0106,
 914         .act_pattern_id = 13,
 915         .app_sig = 0,
 916         .act_sig = { .bits =
 917                 BNXT_ULP_ACT_BIT_DEC_TTL |
 918                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 919                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 920                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 921                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 922         .act_tid = 5
 923         },
 924         [78] = {
 925         .act_hid = BNXT_ULP_ACT_HID_05c2,
 926         .act_pattern_id = 14,
 927         .app_sig = 0,
 928         .act_sig = { .bits =
 929                 BNXT_ULP_ACT_BIT_DEC_TTL |
 930                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 931                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 932                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 933                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 934                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 935         .act_tid = 5
 936         },
 937         [79] = {
 938         .act_hid = BNXT_ULP_ACT_HID_011b,
 939         .act_pattern_id = 15,
 940         .app_sig = 0,
 941         .act_sig = { .bits =
 942                 BNXT_ULP_ACT_BIT_DEC_TTL |
 943                 BNXT_ULP_ACT_BIT_COUNT |
 944                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 945                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 946         .act_tid = 5
 947         },
 948         [80] = {
 949         .act_hid = BNXT_ULP_ACT_HID_0471,
 950         .act_pattern_id = 16,
 951         .app_sig = 0,
 952         .act_sig = { .bits =
 953                 BNXT_ULP_ACT_BIT_DEC_TTL |
 954                 BNXT_ULP_ACT_BIT_COUNT |
 955                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 956                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 957                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 958         .act_tid = 5
 959         },
 960         [81] = {
 961         .act_hid = BNXT_ULP_ACT_HID_05d7,
 962         .act_pattern_id = 17,
 963         .app_sig = 0,
 964         .act_sig = { .bits =
 965                 BNXT_ULP_ACT_BIT_DEC_TTL |
 966                 BNXT_ULP_ACT_BIT_COUNT |
 967                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 968                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 969         .act_tid = 5
 970         },
 971         [82] = {
 972         .act_hid = BNXT_ULP_ACT_HID_0108,
 973         .act_pattern_id = 18,
 974         .app_sig = 0,
 975         .act_sig = { .bits =
 976                 BNXT_ULP_ACT_BIT_DEC_TTL |
 977                 BNXT_ULP_ACT_BIT_COUNT |
 978                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 979                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 980                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 981                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 982         .act_tid = 5
 983         },
 984         [83] = {
 985         .act_hid = BNXT_ULP_ACT_HID_05c4,
 986         .act_pattern_id = 19,
 987         .app_sig = 0,
 988         .act_sig = { .bits =
 989                 BNXT_ULP_ACT_BIT_DEC_TTL |
 990                 BNXT_ULP_ACT_BIT_COUNT |
 991                 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
 992                 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
 993                 BNXT_ULP_ACT_BIT_SET_TP_SRC |
 994                 BNXT_ULP_ACT_BIT_SET_TP_DST |
 995                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
 996         .act_tid = 5
 997         },
 998         [84] = {
 999         .act_hid = BNXT_ULP_ACT_HID_00a2,
1000         .act_pattern_id = 0,
1001         .app_sig = 0,
1002         .act_sig = { .bits =
1003                 BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
1004                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
1005         .act_tid = 6
1006         },
1007         [85] = {
1008         .act_hid = BNXT_ULP_ACT_HID_00a4,
1009         .act_pattern_id = 1,
1010         .app_sig = 0,
1011         .act_sig = { .bits =
1012                 BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
1013                 BNXT_ULP_ACT_BIT_COUNT |
1014                 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
1015         .act_tid = 6
1016         }
1017 };