1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2021 Broadcom
6 /* date: Wed Mar 17 11:31:19 2021 */
8 #include "ulp_template_db_enum.h"
9 #include "ulp_template_db_field.h"
10 #include "ulp_template_struct.h"
11 #include "ulp_template_db_tbl.h"
14 * Action signature table:
15 * maps hash id to ulp_act_match_list[] index
17 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
18 [BNXT_ULP_ACT_HID_0000] = 1,
19 [BNXT_ULP_ACT_HID_0001] = 2,
20 [BNXT_ULP_ACT_HID_0400] = 3,
21 [BNXT_ULP_ACT_HID_01ab] = 4,
22 [BNXT_ULP_ACT_HID_0010] = 5,
23 [BNXT_ULP_ACT_HID_05ab] = 6,
24 [BNXT_ULP_ACT_HID_01bb] = 7,
25 [BNXT_ULP_ACT_HID_0002] = 8,
26 [BNXT_ULP_ACT_HID_0003] = 9,
27 [BNXT_ULP_ACT_HID_0402] = 10,
28 [BNXT_ULP_ACT_HID_01ad] = 11,
29 [BNXT_ULP_ACT_HID_0012] = 12,
30 [BNXT_ULP_ACT_HID_05ad] = 13,
31 [BNXT_ULP_ACT_HID_01bd] = 14,
32 [BNXT_ULP_ACT_HID_0613] = 15,
33 [BNXT_ULP_ACT_HID_02a9] = 16,
34 [BNXT_ULP_ACT_HID_0054] = 17,
35 [BNXT_ULP_ACT_HID_0622] = 18,
36 [BNXT_ULP_ACT_HID_0454] = 19,
37 [BNXT_ULP_ACT_HID_0064] = 20,
38 [BNXT_ULP_ACT_HID_0614] = 21,
39 [BNXT_ULP_ACT_HID_0615] = 22,
40 [BNXT_ULP_ACT_HID_02ab] = 23,
41 [BNXT_ULP_ACT_HID_0056] = 24,
42 [BNXT_ULP_ACT_HID_0624] = 25,
43 [BNXT_ULP_ACT_HID_0456] = 26,
44 [BNXT_ULP_ACT_HID_0066] = 27,
45 [BNXT_ULP_ACT_HID_048d] = 28,
46 [BNXT_ULP_ACT_HID_048f] = 29,
47 [BNXT_ULP_ACT_HID_04bc] = 30,
48 [BNXT_ULP_ACT_HID_00a9] = 31,
49 [BNXT_ULP_ACT_HID_020f] = 32,
50 [BNXT_ULP_ACT_HID_04a9] = 33,
51 [BNXT_ULP_ACT_HID_01fc] = 34,
52 [BNXT_ULP_ACT_HID_04be] = 35,
53 [BNXT_ULP_ACT_HID_00ab] = 36,
54 [BNXT_ULP_ACT_HID_0211] = 37,
55 [BNXT_ULP_ACT_HID_04ab] = 38,
56 [BNXT_ULP_ACT_HID_01fe] = 39,
57 [BNXT_ULP_ACT_HID_0667] = 40,
58 [BNXT_ULP_ACT_HID_0254] = 41,
59 [BNXT_ULP_ACT_HID_03ba] = 42,
60 [BNXT_ULP_ACT_HID_0654] = 43,
61 [BNXT_ULP_ACT_HID_03a7] = 44,
62 [BNXT_ULP_ACT_HID_0669] = 45,
63 [BNXT_ULP_ACT_HID_0256] = 46,
64 [BNXT_ULP_ACT_HID_03bc] = 47,
65 [BNXT_ULP_ACT_HID_0656] = 48,
66 [BNXT_ULP_ACT_HID_03a9] = 49,
67 [BNXT_ULP_ACT_HID_021b] = 50,
68 [BNXT_ULP_ACT_HID_021c] = 51,
69 [BNXT_ULP_ACT_HID_021e] = 52,
70 [BNXT_ULP_ACT_HID_063f] = 53,
71 [BNXT_ULP_ACT_HID_0510] = 54,
72 [BNXT_ULP_ACT_HID_03c6] = 55,
73 [BNXT_ULP_ACT_HID_0082] = 56,
74 [BNXT_ULP_ACT_HID_06bb] = 57,
75 [BNXT_ULP_ACT_HID_021d] = 58,
76 [BNXT_ULP_ACT_HID_0641] = 59,
77 [BNXT_ULP_ACT_HID_0512] = 60,
78 [BNXT_ULP_ACT_HID_03c8] = 61,
79 [BNXT_ULP_ACT_HID_0084] = 62,
80 [BNXT_ULP_ACT_HID_06bd] = 63,
81 [BNXT_ULP_ACT_HID_06d7] = 64,
82 [BNXT_ULP_ACT_HID_02c4] = 65,
83 [BNXT_ULP_ACT_HID_042a] = 66,
84 [BNXT_ULP_ACT_HID_06c4] = 67,
85 [BNXT_ULP_ACT_HID_0417] = 68,
86 [BNXT_ULP_ACT_HID_06d9] = 69,
87 [BNXT_ULP_ACT_HID_02c6] = 70,
88 [BNXT_ULP_ACT_HID_042c] = 71,
89 [BNXT_ULP_ACT_HID_06c6] = 72,
90 [BNXT_ULP_ACT_HID_0419] = 73,
91 [BNXT_ULP_ACT_HID_0119] = 74,
92 [BNXT_ULP_ACT_HID_046f] = 75,
93 [BNXT_ULP_ACT_HID_05d5] = 76,
94 [BNXT_ULP_ACT_HID_0106] = 77,
95 [BNXT_ULP_ACT_HID_05c2] = 78,
96 [BNXT_ULP_ACT_HID_011b] = 79,
97 [BNXT_ULP_ACT_HID_0471] = 80,
98 [BNXT_ULP_ACT_HID_05d7] = 81,
99 [BNXT_ULP_ACT_HID_0108] = 82,
100 [BNXT_ULP_ACT_HID_05c4] = 83,
101 [BNXT_ULP_ACT_HID_00a2] = 84,
102 [BNXT_ULP_ACT_HID_00a4] = 85
105 /* Array for the act matcher list */
106 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
108 .act_hid = BNXT_ULP_ACT_HID_0000,
112 BNXT_ULP_FLOW_DIR_BITMASK_ING },
116 .act_hid = BNXT_ULP_ACT_HID_0001,
120 BNXT_ULP_ACT_BIT_DROP |
121 BNXT_ULP_FLOW_DIR_BITMASK_ING },
125 .act_hid = BNXT_ULP_ACT_HID_0400,
129 BNXT_ULP_ACT_BIT_POP_VLAN |
130 BNXT_ULP_FLOW_DIR_BITMASK_ING },
134 .act_hid = BNXT_ULP_ACT_HID_01ab,
138 BNXT_ULP_ACT_BIT_DEC_TTL |
139 BNXT_ULP_FLOW_DIR_BITMASK_ING },
143 .act_hid = BNXT_ULP_ACT_HID_0010,
147 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
148 BNXT_ULP_FLOW_DIR_BITMASK_ING },
152 .act_hid = BNXT_ULP_ACT_HID_05ab,
156 BNXT_ULP_ACT_BIT_DEC_TTL |
157 BNXT_ULP_ACT_BIT_POP_VLAN |
158 BNXT_ULP_FLOW_DIR_BITMASK_ING },
162 .act_hid = BNXT_ULP_ACT_HID_01bb,
166 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
167 BNXT_ULP_ACT_BIT_DEC_TTL |
168 BNXT_ULP_FLOW_DIR_BITMASK_ING },
172 .act_hid = BNXT_ULP_ACT_HID_0002,
176 BNXT_ULP_ACT_BIT_COUNT |
177 BNXT_ULP_FLOW_DIR_BITMASK_ING },
181 .act_hid = BNXT_ULP_ACT_HID_0003,
185 BNXT_ULP_ACT_BIT_COUNT |
186 BNXT_ULP_ACT_BIT_DROP |
187 BNXT_ULP_FLOW_DIR_BITMASK_ING },
191 .act_hid = BNXT_ULP_ACT_HID_0402,
195 BNXT_ULP_ACT_BIT_COUNT |
196 BNXT_ULP_ACT_BIT_POP_VLAN |
197 BNXT_ULP_FLOW_DIR_BITMASK_ING },
201 .act_hid = BNXT_ULP_ACT_HID_01ad,
202 .act_pattern_id = 10,
205 BNXT_ULP_ACT_BIT_COUNT |
206 BNXT_ULP_ACT_BIT_DEC_TTL |
207 BNXT_ULP_FLOW_DIR_BITMASK_ING },
211 .act_hid = BNXT_ULP_ACT_HID_0012,
212 .act_pattern_id = 11,
215 BNXT_ULP_ACT_BIT_COUNT |
216 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
217 BNXT_ULP_FLOW_DIR_BITMASK_ING },
221 .act_hid = BNXT_ULP_ACT_HID_05ad,
222 .act_pattern_id = 12,
225 BNXT_ULP_ACT_BIT_COUNT |
226 BNXT_ULP_ACT_BIT_DEC_TTL |
227 BNXT_ULP_ACT_BIT_POP_VLAN |
228 BNXT_ULP_FLOW_DIR_BITMASK_ING },
232 .act_hid = BNXT_ULP_ACT_HID_01bd,
233 .act_pattern_id = 13,
236 BNXT_ULP_ACT_BIT_COUNT |
237 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
238 BNXT_ULP_ACT_BIT_DEC_TTL |
239 BNXT_ULP_FLOW_DIR_BITMASK_ING },
243 .act_hid = BNXT_ULP_ACT_HID_0613,
244 .act_pattern_id = 14,
247 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
248 BNXT_ULP_ACT_BIT_DROP |
249 BNXT_ULP_FLOW_DIR_BITMASK_ING },
253 .act_hid = BNXT_ULP_ACT_HID_02a9,
254 .act_pattern_id = 15,
257 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
258 BNXT_ULP_ACT_BIT_POP_VLAN |
259 BNXT_ULP_FLOW_DIR_BITMASK_ING },
263 .act_hid = BNXT_ULP_ACT_HID_0054,
264 .act_pattern_id = 16,
267 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
268 BNXT_ULP_ACT_BIT_DEC_TTL |
269 BNXT_ULP_FLOW_DIR_BITMASK_ING },
273 .act_hid = BNXT_ULP_ACT_HID_0622,
274 .act_pattern_id = 17,
277 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
278 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
279 BNXT_ULP_FLOW_DIR_BITMASK_ING },
283 .act_hid = BNXT_ULP_ACT_HID_0454,
284 .act_pattern_id = 18,
287 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
288 BNXT_ULP_ACT_BIT_DEC_TTL |
289 BNXT_ULP_ACT_BIT_POP_VLAN |
290 BNXT_ULP_FLOW_DIR_BITMASK_ING },
294 .act_hid = BNXT_ULP_ACT_HID_0064,
295 .act_pattern_id = 19,
298 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
299 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
300 BNXT_ULP_ACT_BIT_DEC_TTL |
301 BNXT_ULP_FLOW_DIR_BITMASK_ING },
305 .act_hid = BNXT_ULP_ACT_HID_0614,
306 .act_pattern_id = 20,
309 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
310 BNXT_ULP_ACT_BIT_COUNT |
311 BNXT_ULP_FLOW_DIR_BITMASK_ING },
315 .act_hid = BNXT_ULP_ACT_HID_0615,
316 .act_pattern_id = 21,
319 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
320 BNXT_ULP_ACT_BIT_COUNT |
321 BNXT_ULP_ACT_BIT_DROP |
322 BNXT_ULP_FLOW_DIR_BITMASK_ING },
326 .act_hid = BNXT_ULP_ACT_HID_02ab,
327 .act_pattern_id = 22,
330 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
331 BNXT_ULP_ACT_BIT_COUNT |
332 BNXT_ULP_ACT_BIT_POP_VLAN |
333 BNXT_ULP_FLOW_DIR_BITMASK_ING },
337 .act_hid = BNXT_ULP_ACT_HID_0056,
338 .act_pattern_id = 23,
341 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
342 BNXT_ULP_ACT_BIT_COUNT |
343 BNXT_ULP_ACT_BIT_DEC_TTL |
344 BNXT_ULP_FLOW_DIR_BITMASK_ING },
348 .act_hid = BNXT_ULP_ACT_HID_0624,
349 .act_pattern_id = 24,
352 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
353 BNXT_ULP_ACT_BIT_COUNT |
354 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
355 BNXT_ULP_FLOW_DIR_BITMASK_ING },
359 .act_hid = BNXT_ULP_ACT_HID_0456,
360 .act_pattern_id = 25,
363 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
364 BNXT_ULP_ACT_BIT_COUNT |
365 BNXT_ULP_ACT_BIT_DEC_TTL |
366 BNXT_ULP_ACT_BIT_POP_VLAN |
367 BNXT_ULP_FLOW_DIR_BITMASK_ING },
371 .act_hid = BNXT_ULP_ACT_HID_0066,
372 .act_pattern_id = 26,
375 BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
376 BNXT_ULP_ACT_BIT_COUNT |
377 BNXT_ULP_ACT_BIT_VXLAN_DECAP |
378 BNXT_ULP_ACT_BIT_DEC_TTL |
379 BNXT_ULP_FLOW_DIR_BITMASK_ING },
383 .act_hid = BNXT_ULP_ACT_HID_048d,
387 BNXT_ULP_ACT_BIT_SHARED |
388 BNXT_ULP_ACT_BIT_SAMPLE |
389 BNXT_ULP_FLOW_DIR_BITMASK_ING },
393 .act_hid = BNXT_ULP_ACT_HID_048f,
397 BNXT_ULP_ACT_BIT_SHARED |
398 BNXT_ULP_ACT_BIT_SAMPLE |
399 BNXT_ULP_ACT_BIT_COUNT |
400 BNXT_ULP_FLOW_DIR_BITMASK_ING },
404 .act_hid = BNXT_ULP_ACT_HID_04bc,
408 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
409 BNXT_ULP_FLOW_DIR_BITMASK_ING },
413 .act_hid = BNXT_ULP_ACT_HID_00a9,
417 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
418 BNXT_ULP_ACT_BIT_SET_TP_SRC |
419 BNXT_ULP_FLOW_DIR_BITMASK_ING },
423 .act_hid = BNXT_ULP_ACT_HID_020f,
427 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
428 BNXT_ULP_FLOW_DIR_BITMASK_ING },
432 .act_hid = BNXT_ULP_ACT_HID_04a9,
436 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
437 BNXT_ULP_ACT_BIT_SET_TP_SRC |
438 BNXT_ULP_ACT_BIT_SET_TP_DST |
439 BNXT_ULP_FLOW_DIR_BITMASK_ING },
443 .act_hid = BNXT_ULP_ACT_HID_01fc,
447 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
448 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
449 BNXT_ULP_ACT_BIT_SET_TP_SRC |
450 BNXT_ULP_ACT_BIT_SET_TP_DST |
451 BNXT_ULP_FLOW_DIR_BITMASK_ING },
455 .act_hid = BNXT_ULP_ACT_HID_04be,
459 BNXT_ULP_ACT_BIT_COUNT |
460 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
461 BNXT_ULP_FLOW_DIR_BITMASK_ING },
465 .act_hid = BNXT_ULP_ACT_HID_00ab,
469 BNXT_ULP_ACT_BIT_COUNT |
470 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
471 BNXT_ULP_ACT_BIT_SET_TP_SRC |
472 BNXT_ULP_FLOW_DIR_BITMASK_ING },
476 .act_hid = BNXT_ULP_ACT_HID_0211,
480 BNXT_ULP_ACT_BIT_COUNT |
481 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
482 BNXT_ULP_FLOW_DIR_BITMASK_ING },
486 .act_hid = BNXT_ULP_ACT_HID_04ab,
490 BNXT_ULP_ACT_BIT_COUNT |
491 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
492 BNXT_ULP_ACT_BIT_SET_TP_SRC |
493 BNXT_ULP_ACT_BIT_SET_TP_DST |
494 BNXT_ULP_FLOW_DIR_BITMASK_ING },
498 .act_hid = BNXT_ULP_ACT_HID_01fe,
502 BNXT_ULP_ACT_BIT_COUNT |
503 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
504 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
505 BNXT_ULP_ACT_BIT_SET_TP_SRC |
506 BNXT_ULP_ACT_BIT_SET_TP_DST |
507 BNXT_ULP_FLOW_DIR_BITMASK_ING },
511 .act_hid = BNXT_ULP_ACT_HID_0667,
512 .act_pattern_id = 10,
515 BNXT_ULP_ACT_BIT_DEC_TTL |
516 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
517 BNXT_ULP_FLOW_DIR_BITMASK_ING },
521 .act_hid = BNXT_ULP_ACT_HID_0254,
522 .act_pattern_id = 11,
525 BNXT_ULP_ACT_BIT_DEC_TTL |
526 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
527 BNXT_ULP_ACT_BIT_SET_TP_SRC |
528 BNXT_ULP_FLOW_DIR_BITMASK_ING },
532 .act_hid = BNXT_ULP_ACT_HID_03ba,
533 .act_pattern_id = 12,
536 BNXT_ULP_ACT_BIT_DEC_TTL |
537 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
538 BNXT_ULP_FLOW_DIR_BITMASK_ING },
542 .act_hid = BNXT_ULP_ACT_HID_0654,
543 .act_pattern_id = 13,
546 BNXT_ULP_ACT_BIT_DEC_TTL |
547 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
548 BNXT_ULP_ACT_BIT_SET_TP_SRC |
549 BNXT_ULP_ACT_BIT_SET_TP_DST |
550 BNXT_ULP_FLOW_DIR_BITMASK_ING },
554 .act_hid = BNXT_ULP_ACT_HID_03a7,
555 .act_pattern_id = 14,
558 BNXT_ULP_ACT_BIT_DEC_TTL |
559 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
560 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
561 BNXT_ULP_ACT_BIT_SET_TP_SRC |
562 BNXT_ULP_ACT_BIT_SET_TP_DST |
563 BNXT_ULP_FLOW_DIR_BITMASK_ING },
567 .act_hid = BNXT_ULP_ACT_HID_0669,
568 .act_pattern_id = 15,
571 BNXT_ULP_ACT_BIT_DEC_TTL |
572 BNXT_ULP_ACT_BIT_COUNT |
573 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
574 BNXT_ULP_FLOW_DIR_BITMASK_ING },
578 .act_hid = BNXT_ULP_ACT_HID_0256,
579 .act_pattern_id = 16,
582 BNXT_ULP_ACT_BIT_DEC_TTL |
583 BNXT_ULP_ACT_BIT_COUNT |
584 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
585 BNXT_ULP_ACT_BIT_SET_TP_SRC |
586 BNXT_ULP_FLOW_DIR_BITMASK_ING },
590 .act_hid = BNXT_ULP_ACT_HID_03bc,
591 .act_pattern_id = 17,
594 BNXT_ULP_ACT_BIT_DEC_TTL |
595 BNXT_ULP_ACT_BIT_COUNT |
596 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
597 BNXT_ULP_FLOW_DIR_BITMASK_ING },
601 .act_hid = BNXT_ULP_ACT_HID_0656,
602 .act_pattern_id = 18,
605 BNXT_ULP_ACT_BIT_DEC_TTL |
606 BNXT_ULP_ACT_BIT_COUNT |
607 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
608 BNXT_ULP_ACT_BIT_SET_TP_SRC |
609 BNXT_ULP_ACT_BIT_SET_TP_DST |
610 BNXT_ULP_FLOW_DIR_BITMASK_ING },
614 .act_hid = BNXT_ULP_ACT_HID_03a9,
615 .act_pattern_id = 19,
618 BNXT_ULP_ACT_BIT_DEC_TTL |
619 BNXT_ULP_ACT_BIT_COUNT |
620 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
621 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
622 BNXT_ULP_ACT_BIT_SET_TP_SRC |
623 BNXT_ULP_ACT_BIT_SET_TP_DST |
624 BNXT_ULP_FLOW_DIR_BITMASK_ING },
628 .act_hid = BNXT_ULP_ACT_HID_021b,
632 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
636 .act_hid = BNXT_ULP_ACT_HID_021c,
640 BNXT_ULP_ACT_BIT_DROP |
641 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
645 .act_hid = BNXT_ULP_ACT_HID_021e,
649 BNXT_ULP_ACT_BIT_DROP |
650 BNXT_ULP_ACT_BIT_COUNT |
651 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
655 .act_hid = BNXT_ULP_ACT_HID_063f,
659 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
660 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
661 BNXT_ULP_ACT_BIT_PUSH_VLAN |
662 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
666 .act_hid = BNXT_ULP_ACT_HID_0510,
670 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
671 BNXT_ULP_ACT_BIT_PUSH_VLAN |
672 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
676 .act_hid = BNXT_ULP_ACT_HID_03c6,
680 BNXT_ULP_ACT_BIT_DEC_TTL |
681 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
685 .act_hid = BNXT_ULP_ACT_HID_0082,
689 BNXT_ULP_ACT_BIT_DEC_TTL |
690 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
691 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
692 BNXT_ULP_ACT_BIT_PUSH_VLAN |
693 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
697 .act_hid = BNXT_ULP_ACT_HID_06bb,
701 BNXT_ULP_ACT_BIT_DEC_TTL |
702 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
703 BNXT_ULP_ACT_BIT_PUSH_VLAN |
704 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
708 .act_hid = BNXT_ULP_ACT_HID_021d,
712 BNXT_ULP_ACT_BIT_COUNT |
713 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
717 .act_hid = BNXT_ULP_ACT_HID_0641,
721 BNXT_ULP_ACT_BIT_COUNT |
722 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
723 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
724 BNXT_ULP_ACT_BIT_PUSH_VLAN |
725 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
729 .act_hid = BNXT_ULP_ACT_HID_0512,
730 .act_pattern_id = 10,
733 BNXT_ULP_ACT_BIT_COUNT |
734 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
735 BNXT_ULP_ACT_BIT_PUSH_VLAN |
736 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
740 .act_hid = BNXT_ULP_ACT_HID_03c8,
741 .act_pattern_id = 11,
744 BNXT_ULP_ACT_BIT_COUNT |
745 BNXT_ULP_ACT_BIT_DEC_TTL |
746 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
750 .act_hid = BNXT_ULP_ACT_HID_0084,
751 .act_pattern_id = 12,
754 BNXT_ULP_ACT_BIT_COUNT |
755 BNXT_ULP_ACT_BIT_DEC_TTL |
756 BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
757 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
758 BNXT_ULP_ACT_BIT_PUSH_VLAN |
759 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
763 .act_hid = BNXT_ULP_ACT_HID_06bd,
764 .act_pattern_id = 13,
767 BNXT_ULP_ACT_BIT_COUNT |
768 BNXT_ULP_ACT_BIT_DEC_TTL |
769 BNXT_ULP_ACT_BIT_SET_VLAN_VID |
770 BNXT_ULP_ACT_BIT_PUSH_VLAN |
771 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
775 .act_hid = BNXT_ULP_ACT_HID_06d7,
779 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
780 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
784 .act_hid = BNXT_ULP_ACT_HID_02c4,
788 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
789 BNXT_ULP_ACT_BIT_SET_TP_SRC |
790 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
794 .act_hid = BNXT_ULP_ACT_HID_042a,
798 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
799 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
803 .act_hid = BNXT_ULP_ACT_HID_06c4,
807 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
808 BNXT_ULP_ACT_BIT_SET_TP_SRC |
809 BNXT_ULP_ACT_BIT_SET_TP_DST |
810 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
814 .act_hid = BNXT_ULP_ACT_HID_0417,
818 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
819 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
820 BNXT_ULP_ACT_BIT_SET_TP_SRC |
821 BNXT_ULP_ACT_BIT_SET_TP_DST |
822 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
826 .act_hid = BNXT_ULP_ACT_HID_06d9,
830 BNXT_ULP_ACT_BIT_COUNT |
831 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
832 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
836 .act_hid = BNXT_ULP_ACT_HID_02c6,
840 BNXT_ULP_ACT_BIT_COUNT |
841 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
842 BNXT_ULP_ACT_BIT_SET_TP_SRC |
843 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
847 .act_hid = BNXT_ULP_ACT_HID_042c,
851 BNXT_ULP_ACT_BIT_COUNT |
852 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
853 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
857 .act_hid = BNXT_ULP_ACT_HID_06c6,
861 BNXT_ULP_ACT_BIT_COUNT |
862 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
863 BNXT_ULP_ACT_BIT_SET_TP_SRC |
864 BNXT_ULP_ACT_BIT_SET_TP_DST |
865 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
869 .act_hid = BNXT_ULP_ACT_HID_0419,
873 BNXT_ULP_ACT_BIT_COUNT |
874 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
875 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
876 BNXT_ULP_ACT_BIT_SET_TP_SRC |
877 BNXT_ULP_ACT_BIT_SET_TP_DST |
878 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
882 .act_hid = BNXT_ULP_ACT_HID_0119,
883 .act_pattern_id = 10,
886 BNXT_ULP_ACT_BIT_DEC_TTL |
887 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
888 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
892 .act_hid = BNXT_ULP_ACT_HID_046f,
893 .act_pattern_id = 11,
896 BNXT_ULP_ACT_BIT_DEC_TTL |
897 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
898 BNXT_ULP_ACT_BIT_SET_TP_SRC |
899 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
903 .act_hid = BNXT_ULP_ACT_HID_05d5,
904 .act_pattern_id = 12,
907 BNXT_ULP_ACT_BIT_DEC_TTL |
908 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
909 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
913 .act_hid = BNXT_ULP_ACT_HID_0106,
914 .act_pattern_id = 13,
917 BNXT_ULP_ACT_BIT_DEC_TTL |
918 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
919 BNXT_ULP_ACT_BIT_SET_TP_SRC |
920 BNXT_ULP_ACT_BIT_SET_TP_DST |
921 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
925 .act_hid = BNXT_ULP_ACT_HID_05c2,
926 .act_pattern_id = 14,
929 BNXT_ULP_ACT_BIT_DEC_TTL |
930 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
931 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
932 BNXT_ULP_ACT_BIT_SET_TP_SRC |
933 BNXT_ULP_ACT_BIT_SET_TP_DST |
934 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
938 .act_hid = BNXT_ULP_ACT_HID_011b,
939 .act_pattern_id = 15,
942 BNXT_ULP_ACT_BIT_DEC_TTL |
943 BNXT_ULP_ACT_BIT_COUNT |
944 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
945 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
949 .act_hid = BNXT_ULP_ACT_HID_0471,
950 .act_pattern_id = 16,
953 BNXT_ULP_ACT_BIT_DEC_TTL |
954 BNXT_ULP_ACT_BIT_COUNT |
955 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
956 BNXT_ULP_ACT_BIT_SET_TP_SRC |
957 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
961 .act_hid = BNXT_ULP_ACT_HID_05d7,
962 .act_pattern_id = 17,
965 BNXT_ULP_ACT_BIT_DEC_TTL |
966 BNXT_ULP_ACT_BIT_COUNT |
967 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
968 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
972 .act_hid = BNXT_ULP_ACT_HID_0108,
973 .act_pattern_id = 18,
976 BNXT_ULP_ACT_BIT_DEC_TTL |
977 BNXT_ULP_ACT_BIT_COUNT |
978 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
979 BNXT_ULP_ACT_BIT_SET_TP_SRC |
980 BNXT_ULP_ACT_BIT_SET_TP_DST |
981 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
985 .act_hid = BNXT_ULP_ACT_HID_05c4,
986 .act_pattern_id = 19,
989 BNXT_ULP_ACT_BIT_DEC_TTL |
990 BNXT_ULP_ACT_BIT_COUNT |
991 BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
992 BNXT_ULP_ACT_BIT_SET_IPV4_DST |
993 BNXT_ULP_ACT_BIT_SET_TP_SRC |
994 BNXT_ULP_ACT_BIT_SET_TP_DST |
995 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
999 .act_hid = BNXT_ULP_ACT_HID_00a2,
1000 .act_pattern_id = 0,
1002 .act_sig = { .bits =
1003 BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
1004 BNXT_ULP_FLOW_DIR_BITMASK_EGR },
1008 .act_hid = BNXT_ULP_ACT_HID_00a4,
1009 .act_pattern_id = 1,
1011 .act_sig = { .bits =
1012 BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
1013 BNXT_ULP_ACT_BIT_COUNT |
1014 BNXT_ULP_FLOW_DIR_BITMASK_EGR },