drivers/net/bnxt/tf_ulp/ulp_template_db.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2020 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 /*
   7  * date: Mon Mar  9 02:37:53 2020
   8  * version: 0.0
   9  */
  10
  11 #include "ulp_template_db.h"
  12 #include "ulp_template_field_db.h"
  13 #include "ulp_template_struct.h"
  14 #include "ulp_rte_parser.h"
  15
  16 uint32_t ulp_act_prop_map_table[] = {
  17         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =
  18                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ,
  19         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =
  20                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ,
  21         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =
  22                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ,
  23         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =
  24                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE,
  25         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =
  26                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM,
  27         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =
  28                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE,
  29         [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =
  30                 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM,
  31         [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =
  32                 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM,
  33         [BNXT_ULP_ACT_PROP_IDX_PORT_ID] =
  34                 BNXT_ULP_ACT_PROP_SZ_PORT_ID,
  35         [BNXT_ULP_ACT_PROP_IDX_VNIC] =
  36                 BNXT_ULP_ACT_PROP_SZ_VNIC,
  37         [BNXT_ULP_ACT_PROP_IDX_VPORT] =
  38                 BNXT_ULP_ACT_PROP_SZ_VPORT,
  39         [BNXT_ULP_ACT_PROP_IDX_MARK] =
  40                 BNXT_ULP_ACT_PROP_SZ_MARK,
  41         [BNXT_ULP_ACT_PROP_IDX_COUNT] =
  42                 BNXT_ULP_ACT_PROP_SZ_COUNT,
  43         [BNXT_ULP_ACT_PROP_IDX_METER] =
  44                 BNXT_ULP_ACT_PROP_SZ_METER,
  45         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =
  46                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC,
  47         [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =
  48                 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST,
  49         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN] =
  50                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN,
  51         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP] =
  52                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP,
  53         [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID] =
  54                 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID,
  55         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =
  56                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC,
  57         [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =
  58                 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST,
  59         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =
  60                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC,
  61         [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =
  62                 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST,
  63         [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =
  64                 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC,
  65         [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =
  66                 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST,
  67         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =
  68                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0,
  69         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =
  70                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1,
  71         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =
  72                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2,
  73         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =
  74                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3,
  75         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =
  76                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4,
  77         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =
  78                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5,
  79         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =
  80                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6,
  81         [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =
  82                 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7,
  83         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =
  84                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,
  85         [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =
  86                 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,
  87         [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =
  88                 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG,
  89         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =
  90                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP,
  91         [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =
  92                 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC,
  93         [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =
  94                 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,
  95         [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
  96                 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,
  97         [BNXT_ULP_ACT_PROP_IDX_LAST] =
  98                 BNXT_ULP_ACT_PROP_SZ_LAST
  99 };
 100
 101 struct bnxt_ulp_rte_act_info ulp_act_info[] = {
 102         [RTE_FLOW_ACTION_TYPE_END] = {
 103                 .act_type                = BNXT_ULP_ACT_TYPE_END,
 104                 .proto_act_func          = NULL
 105         },
 106         [RTE_FLOW_ACTION_TYPE_VOID] = {
 107                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 108                 .proto_act_func          = ulp_rte_void_act_handler
 109         },
 110         [RTE_FLOW_ACTION_TYPE_PASSTHRU] = {
 111                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 112                 .proto_act_func          = NULL
 113         },
 114         [RTE_FLOW_ACTION_TYPE_JUMP] = {
 115                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 116                 .proto_act_func          = NULL
 117         },
 118         [RTE_FLOW_ACTION_TYPE_MARK] = {
 119                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 120                 .proto_act_func          = ulp_rte_mark_act_handler
 121         },
 122         [RTE_FLOW_ACTION_TYPE_FLAG] = {
 123                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 124                 .proto_act_func          = NULL
 125         },
 126         [RTE_FLOW_ACTION_TYPE_QUEUE] = {
 127                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 128                 .proto_act_func          = NULL
 129         },
 130         [RTE_FLOW_ACTION_TYPE_DROP] = {
 131                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 132                 .proto_act_func          = ulp_rte_drop_act_handler
 133         },
 134         [RTE_FLOW_ACTION_TYPE_COUNT] = {
 135                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 136                 .proto_act_func          = ulp_rte_count_act_handler
 137         },
 138         [RTE_FLOW_ACTION_TYPE_RSS] = {
 139                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 140                 .proto_act_func          = ulp_rte_rss_act_handler
 141         },
 142         [RTE_FLOW_ACTION_TYPE_PF] = {
 143                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 144                 .proto_act_func          = ulp_rte_pf_act_handler
 145         },
 146         [RTE_FLOW_ACTION_TYPE_VF] = {
 147                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 148                 .proto_act_func          = ulp_rte_vf_act_handler
 149         },
 150         [RTE_FLOW_ACTION_TYPE_PHY_PORT] = {
 151                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 152                 .proto_act_func          = ulp_rte_phy_port_act_handler
 153         },
 154         [RTE_FLOW_ACTION_TYPE_PORT_ID] = {
 155                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 156                 .proto_act_func          = ulp_rte_port_id_act_handler
 157         },
 158         [RTE_FLOW_ACTION_TYPE_METER] = {
 159                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 160                 .proto_act_func          = NULL
 161         },
 162         [RTE_FLOW_ACTION_TYPE_SECURITY] = {
 163                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 164                 .proto_act_func          = NULL
 165         },
 166         [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {
 167                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 168                 .proto_act_func          = NULL
 169         },
 170         [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {
 171                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 172                 .proto_act_func          = NULL
 173         },
 174         [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {
 175                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 176                 .proto_act_func          = NULL
 177         },
 178         [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {
 179                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 180                 .proto_act_func          = NULL
 181         },
 182         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {
 183                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 184                 .proto_act_func          = NULL
 185         },
 186         [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {
 187                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 188                 .proto_act_func          = NULL
 189         },
 190         [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {
 191                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 192                 .proto_act_func          = NULL
 193         },
 194         [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {
 195                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 196                 .proto_act_func          = NULL
 197         },
 198         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {
 199                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 200                 .proto_act_func          = NULL
 201         },
 202         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {
 203                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 204                 .proto_act_func          = NULL
 205         },
 206         [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {
 207                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 208                 .proto_act_func          = NULL
 209         },
 210         [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {
 211                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 212                 .proto_act_func          = NULL
 213         },
 214         [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {
 215                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 216                 .proto_act_func          = ulp_rte_vxlan_encap_act_handler
 217         },
 218         [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {
 219                 .act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,
 220                 .proto_act_func          = ulp_rte_vxlan_decap_act_handler
 221         },
 222         [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {
 223                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 224                 .proto_act_func          = NULL
 225         },
 226         [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {
 227                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 228                 .proto_act_func          = NULL
 229         },
 230         [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {
 231                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 232                 .proto_act_func          = NULL
 233         },
 234         [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {
 235                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 236                 .proto_act_func          = NULL
 237         },
 238         [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {
 239                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 240                 .proto_act_func          = NULL
 241         },
 242         [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {
 243                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 244                 .proto_act_func          = NULL
 245         },
 246         [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {
 247                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 248                 .proto_act_func          = NULL
 249         },
 250         [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {
 251                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 252                 .proto_act_func          = NULL
 253         },
 254         [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {
 255                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 256                 .proto_act_func          = NULL
 257         },
 258         [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {
 259                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 260                 .proto_act_func          = NULL
 261         },
 262         [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {
 263                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 264                 .proto_act_func          = NULL
 265         },
 266         [RTE_FLOW_ACTION_TYPE_DEC_TTL] = {
 267                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 268                 .proto_act_func          = NULL
 269         },
 270         [RTE_FLOW_ACTION_TYPE_SET_TTL] = {
 271                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 272                 .proto_act_func          = NULL
 273         },
 274         [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {
 275                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 276                 .proto_act_func          = NULL
 277         },
 278         [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {
 279                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 280                 .proto_act_func          = NULL
 281         },
 282         [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {
 283                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 284                 .proto_act_func          = NULL
 285         },
 286         [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {
 287                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 288                 .proto_act_func          = NULL
 289         },
 290         [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {
 291                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 292                 .proto_act_func          = NULL
 293         },
 294         [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {
 295                 .act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
 296                 .proto_act_func          = NULL
 297         }
 298 };
 299
 300 struct bnxt_ulp_def_ident_info ulp_def_ident_tbl[] = {
 301         [0] = {
 302                 .ident_type              = TF_IDENT_TYPE_PROF_FUNC,
 303                 .def_regfile_index       =
 304                         BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID,
 305                 .direction               = TF_DIR_RX
 306         }
 307 };
 308
 309 struct bnxt_ulp_device_params ulp_device_params[] = {
 310         [BNXT_ULP_DEVICE_ID_WH_PLUS] = {
 311                 .global_fid_enable       = BNXT_ULP_SYM_YES,
 312                 .byte_order              = (enum bnxt_ulp_byte_order)
 313                                                 BNXT_ULP_SYM_LITTLE_ENDIAN,
 314                 .encap_byte_swap         = 1,
 315                 .lfid_entries            = 16384,
 316                 .lfid_entry_size         = 4,
 317                 .gfid_entries            = 65536,
 318                 .gfid_entry_size         = 4,
 319                 .num_flows               = 32768,
 320                 .num_resources_per_flow  = 8
 321         }
 322 };
 323
 324 struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {
 325         [RTE_FLOW_ITEM_TYPE_END] = {
 326                 .hdr_type                = BNXT_ULP_HDR_TYPE_END,
 327                 .proto_hdr_func          = NULL
 328         },
 329         [RTE_FLOW_ITEM_TYPE_VOID] = {
 330                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 331                 .proto_hdr_func          = ulp_rte_void_hdr_handler
 332         },
 333         [RTE_FLOW_ITEM_TYPE_INVERT] = {
 334                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 335                 .proto_hdr_func          = NULL
 336         },
 337         [RTE_FLOW_ITEM_TYPE_ANY] = {
 338                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 339                 .proto_hdr_func          = NULL
 340         },
 341         [RTE_FLOW_ITEM_TYPE_PF] = {
 342                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 343                 .proto_hdr_func          = ulp_rte_pf_hdr_handler
 344         },
 345         [RTE_FLOW_ITEM_TYPE_VF] = {
 346                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 347                 .proto_hdr_func          = ulp_rte_vf_hdr_handler
 348         },
 349         [RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
 350                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 351                 .proto_hdr_func          = ulp_rte_phy_port_hdr_handler
 352         },
 353         [RTE_FLOW_ITEM_TYPE_PORT_ID] = {
 354                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 355                 .proto_hdr_func          = ulp_rte_port_id_hdr_handler
 356         },
 357         [RTE_FLOW_ITEM_TYPE_RAW] = {
 358                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 359                 .proto_hdr_func          = NULL
 360         },
 361         [RTE_FLOW_ITEM_TYPE_ETH] = {
 362                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 363                 .proto_hdr_func          = ulp_rte_eth_hdr_handler
 364         },
 365         [RTE_FLOW_ITEM_TYPE_VLAN] = {
 366                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 367                 .proto_hdr_func          = ulp_rte_vlan_hdr_handler
 368         },
 369         [RTE_FLOW_ITEM_TYPE_IPV4] = {
 370                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 371                 .proto_hdr_func          = ulp_rte_ipv4_hdr_handler
 372         },
 373         [RTE_FLOW_ITEM_TYPE_IPV6] = {
 374                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 375                 .proto_hdr_func          = ulp_rte_ipv6_hdr_handler
 376         },
 377         [RTE_FLOW_ITEM_TYPE_ICMP] = {
 378                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 379                 .proto_hdr_func          = NULL
 380         },
 381         [RTE_FLOW_ITEM_TYPE_UDP] = {
 382                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 383                 .proto_hdr_func          = ulp_rte_udp_hdr_handler
 384         },
 385         [RTE_FLOW_ITEM_TYPE_TCP] = {
 386                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 387                 .proto_hdr_func          = ulp_rte_tcp_hdr_handler
 388         },
 389         [RTE_FLOW_ITEM_TYPE_SCTP] = {
 390                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 391                 .proto_hdr_func          = NULL
 392         },
 393         [RTE_FLOW_ITEM_TYPE_VXLAN] = {
 394                 .hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,
 395                 .proto_hdr_func          = ulp_rte_vxlan_hdr_handler
 396         },
 397         [RTE_FLOW_ITEM_TYPE_E_TAG] = {
 398                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 399                 .proto_hdr_func          = NULL
 400         },
 401         [RTE_FLOW_ITEM_TYPE_NVGRE] = {
 402                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 403                 .proto_hdr_func          = NULL
 404         },
 405         [RTE_FLOW_ITEM_TYPE_MPLS] = {
 406                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 407                 .proto_hdr_func          = NULL
 408         },
 409         [RTE_FLOW_ITEM_TYPE_GRE] = {
 410                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 411                 .proto_hdr_func          = NULL
 412         },
 413         [RTE_FLOW_ITEM_TYPE_FUZZY] = {
 414                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 415                 .proto_hdr_func          = NULL
 416         },
 417         [RTE_FLOW_ITEM_TYPE_GTP] = {
 418                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 419                 .proto_hdr_func          = NULL
 420         },
 421         [RTE_FLOW_ITEM_TYPE_GTPC] = {
 422                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 423                 .proto_hdr_func          = NULL
 424         },
 425         [RTE_FLOW_ITEM_TYPE_GTPU] = {
 426                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 427                 .proto_hdr_func          = NULL
 428         },
 429         [RTE_FLOW_ITEM_TYPE_ESP] = {
 430                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 431                 .proto_hdr_func          = NULL
 432         },
 433         [RTE_FLOW_ITEM_TYPE_GENEVE] = {
 434                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 435                 .proto_hdr_func          = NULL
 436         },
 437         [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {
 438                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 439                 .proto_hdr_func          = NULL
 440         },
 441         [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {
 442                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 443                 .proto_hdr_func          = NULL
 444         },
 445         [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {
 446                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 447                 .proto_hdr_func          = NULL
 448         },
 449         [RTE_FLOW_ITEM_TYPE_ICMP6] = {
 450                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 451                 .proto_hdr_func          = NULL
 452         },
 453         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {
 454                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 455                 .proto_hdr_func          = NULL
 456         },
 457         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {
 458                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 459                 .proto_hdr_func          = NULL
 460         },
 461         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {
 462                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 463                 .proto_hdr_func          = NULL
 464         },
 465         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {
 466                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 467                 .proto_hdr_func          = NULL
 468         },
 469         [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {
 470                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 471                 .proto_hdr_func          = NULL
 472         },
 473         [RTE_FLOW_ITEM_TYPE_MARK] = {
 474                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 475                 .proto_hdr_func          = NULL
 476         },
 477         [RTE_FLOW_ITEM_TYPE_META] = {
 478                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 479                 .proto_hdr_func          = NULL
 480         },
 481         [RTE_FLOW_ITEM_TYPE_GRE_KEY] = {
 482                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 483                 .proto_hdr_func          = NULL
 484         },
 485         [RTE_FLOW_ITEM_TYPE_GTP_PSC] = {
 486                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 487                 .proto_hdr_func          = NULL
 488         },
 489         [RTE_FLOW_ITEM_TYPE_PPPOES] = {
 490                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 491                 .proto_hdr_func          = NULL
 492         },
 493         [RTE_FLOW_ITEM_TYPE_PPPOED] = {
 494                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 495                 .proto_hdr_func          = NULL
 496         },
 497         [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {
 498                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 499                 .proto_hdr_func          = NULL
 500         },
 501         [RTE_FLOW_ITEM_TYPE_NSH] = {
 502                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 503                 .proto_hdr_func          = NULL
 504         },
 505         [RTE_FLOW_ITEM_TYPE_IGMP] = {
 506                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 507                 .proto_hdr_func          = NULL
 508         },
 509         [RTE_FLOW_ITEM_TYPE_AH] = {
 510                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 511                 .proto_hdr_func          = NULL
 512         },
 513         [RTE_FLOW_ITEM_TYPE_HIGIG2] = {
 514                 .hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
 515                 .proto_hdr_func          = NULL
 516         }
 517 };
 518
 519 uint32_t bnxt_ulp_encap_vtag_map[] = {
 520         [0] = BNXT_ULP_ENCAP_VTAG_ENCODING_NOP,
 521         [1] = BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI,
 522         [2] = BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI
 523 };
 524
 525 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
 526         [BNXT_ULP_CLASS_HID_0092] = 1
 527 };
 528
 529 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 530         [1] = {
 531         .class_hid = BNXT_ULP_CLASS_HID_0092,
 532         .hdr_sig = { .bits =
 533                 BNXT_ULP_HDR_BIT_O_ETH |
 534                 BNXT_ULP_HDR_BIT_O_IPV4 |
 535                 BNXT_ULP_HDR_BIT_O_UDP |
 536                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 537         .field_sig = { .bits =
 538                 BNXT_ULP_HF0_BITMASK_O_IPV4_SRC_ADDR |
 539                 BNXT_ULP_HF0_BITMASK_O_IPV4_DST_ADDR |
 540                 BNXT_ULP_HF0_BITMASK_O_UDP_SRC_PORT |
 541                 BNXT_ULP_HF0_BITMASK_O_UDP_DST_PORT |
 542                 BNXT_ULP_MATCH_TYPE_BITMASK_EM },
 543         .class_tid = 0,
 544         .act_vnic = 0,
 545         .wc_pri = 0
 546         }
 547 };
 548
 549 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
 550         [BNXT_ULP_ACT_HID_0029] = 1
 551 };
 552
 553 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
 554         [1] = {
 555         .act_hid = BNXT_ULP_ACT_HID_0029,
 556         .act_sig = { .bits =
 557                 BNXT_ULP_ACTION_BIT_MARK |
 558                 BNXT_ULP_ACTION_BIT_RSS |
 559                 BNXT_ULP_ACTION_BIT_VNIC |
 560                 BNXT_ULP_FLOW_DIR_BITMASK_ING },
 561         .act_tid = 0
 562         }
 563 };
 564
 565 struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {
 566         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
 567                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
 568         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
 569         .num_tbls = 3,
 570         .start_tbl_idx = 0
 571         }
 572 };
 573
 574 struct bnxt_ulp_mapper_class_tbl_info ulp_class_tbl_list[] = {
 575         {
 576         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 577         .table_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
 578         .direction = TF_DIR_RX,
 579         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 580         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 581         .key_start_idx = 0,
 582         .blob_key_bit_size = 167,
 583         .key_bit_size = 167,
 584         .key_num_fields = 13,
 585         .result_start_idx = 0,
 586         .result_bit_size = 64,
 587         .result_num_fields = 13,
 588         .ident_start_idx = 0,
 589         .ident_nums = 1,
 590         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 591         .critical_resource = 0,
 592         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 593         },
 594         {
 595         .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
 596         .table_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
 597         .direction = TF_DIR_RX,
 598         .priority = BNXT_ULP_PRIORITY_LEVEL_0,
 599         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 600         .key_start_idx = 13,
 601         .blob_key_bit_size = 81,
 602         .key_bit_size = 81,
 603         .key_num_fields = 42,
 604         .result_start_idx = 13,
 605         .result_bit_size = 38,
 606         .result_num_fields = 8,
 607         .ident_start_idx = 1,
 608         .ident_nums = 1,
 609         .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
 610         .critical_resource = 0,
 611         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 612         },
 613         {
 614         .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
 615         .table_type = TF_MEM_EXTERNAL,
 616         .direction = TF_DIR_RX,
 617         .priority = BNXT_ULP_PRIORITY_NOT_USED,
 618         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
 619         .key_start_idx = 55,
 620         .blob_key_bit_size = 448,
 621         .key_bit_size = 448,
 622         .key_num_fields = 11,
 623         .result_start_idx = 21,
 624         .result_bit_size = 64,
 625         .result_num_fields = 9,
 626         .ident_start_idx = 2,
 627         .ident_nums = 0,
 628         .mark_enable = BNXT_ULP_MARK_ENABLE_YES,
 629         .critical_resource = 1,
 630         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
 631         }
 632 };
 633
 634 struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
 635         {
 636         .field_bit_size = 12,
 637         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 638         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 639                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 640         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 641         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 642                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 643         },
 644         {
 645         .field_bit_size = 12,
 646         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 647         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 648                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 649         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 650         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 651                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 652         },
 653         {
 654         .field_bit_size = 48,
 655         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 656         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 657                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 658         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 659         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 660                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 661         },
 662         {
 663         .field_bit_size = 8,
 664         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,
 665         .mask_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 666                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 667                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 668                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 669         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
 670         .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
 671                 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
 672                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 673                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 674         },
 675         {
 676         .field_bit_size = 4,
 677         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 678         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 679                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 680         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 681         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 682                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 683         },
 684         {
 685         .field_bit_size = 12,
 686         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 687         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 688                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 689         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 690         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 691                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 692         },
 693         {
 694         .field_bit_size = 12,
 695         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 696         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 697                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 698         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 699         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 700                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 701         },
 702         {
 703         .field_bit_size = 48,
 704         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 705         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 706                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 707         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 708         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 709                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 710         },
 711         {
 712         .field_bit_size = 2,
 713         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 714         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 715                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 716         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 717         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 718                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 719         },
 720         {
 721         .field_bit_size = 2,
 722         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 723         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 724                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 725         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 726         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 727                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 728         },
 729         {
 730         .field_bit_size = 4,
 731         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 732         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 733                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 734         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 735         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 736                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 737                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 738         },
 739         {
 740         .field_bit_size = 2,
 741         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 742         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 743                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 744         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 745         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 746                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 747         },
 748         {
 749         .field_bit_size = 1,
 750         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 751         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 752                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 753         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 754         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 755                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 756         },
 757         {
 758         .field_bit_size = 1,
 759         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 760         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 761                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 762         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 763         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 764                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 765         },
 766         {
 767         .field_bit_size = 4,
 768         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 769         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 770                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 771         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 772         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 773                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 774         },
 775         {
 776         .field_bit_size = 1,
 777         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 778         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 779                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 780         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 781         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 782                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 783         },
 784         {
 785         .field_bit_size = 1,
 786         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 787         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 788                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 789         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 790         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 791                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 792         },
 793         {
 794         .field_bit_size = 1,
 795         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 796         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 797                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 798         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 799         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 800                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 801         },
 802         {
 803         .field_bit_size = 1,
 804         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 805         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 806                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 807         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 808         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 809                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 810         },
 811         {
 812         .field_bit_size = 1,
 813         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 814         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 815                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 816         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 817         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 818                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 819         },
 820         {
 821         .field_bit_size = 4,
 822         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 823         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 824                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 825         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 826         .spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4,
 827                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 828                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 829         },
 830         {
 831         .field_bit_size = 1,
 832         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 833         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 834                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 835         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 836         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 837                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 838         },
 839         {
 840         .field_bit_size = 1,
 841         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 842         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 843                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 844         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 845         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 846                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 847         },
 848         {
 849         .field_bit_size = 1,
 850         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 851         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 852                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 853         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 854         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 855                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 856         },
 857         {
 858         .field_bit_size = 1,
 859         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 860         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 861                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 862         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 863         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 864                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 865         },
 866         {
 867         .field_bit_size = 2,
 868         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 869         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 870                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 871         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 872         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 873                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 874         },
 875         {
 876         .field_bit_size = 2,
 877         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 878         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 879                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 880         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 881         .spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX,
 882                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 883                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 884         },
 885         {
 886         .field_bit_size = 1,
 887         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 888         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 889                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 890         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 891         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 892                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 893         },
 894         {
 895         .field_bit_size = 1,
 896         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 897         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 898                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 899         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 900         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 901                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 902         },
 903         {
 904         .field_bit_size = 3,
 905         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 906         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 907                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 908         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 909         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 910                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 911         },
 912         {
 913         .field_bit_size = 4,
 914         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 915         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 916                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 917         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 918         .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
 919                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 920                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 921         },
 922         {
 923         .field_bit_size = 1,
 924         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 925         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 926                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 927         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 928         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 929                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 930         },
 931         {
 932         .field_bit_size = 1,
 933         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 934         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 935                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
 936         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 937         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 938                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 939         },
 940         {
 941         .field_bit_size = 1,
 942         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 943         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 944                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 945         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 946         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 947                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 948         },
 949         {
 950         .field_bit_size = 4,
 951         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 952         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 953                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 954         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 955         .spec_operand = {BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
 956                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 957                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 958         },
 959         {
 960         .field_bit_size = 1,
 961         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 962         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 963                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 964         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 965         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 966                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 967         },
 968         {
 969         .field_bit_size = 1,
 970         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 971         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 972                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 973         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 974         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 975                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 976         },
 977         {
 978         .field_bit_size = 1,
 979         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 980         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 981                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 982         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 983         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 984                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 985         },
 986         {
 987         .field_bit_size = 1,
 988         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 989         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 990                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
 991         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
 992         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 993                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 994         },
 995         {
 996         .field_bit_size = 1,
 997         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 998         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 999                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1000         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1001         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1002                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1003         },
1004         {
1005         .field_bit_size = 4,
1006         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1007         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1008                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1009         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1010         .spec_operand = {BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,
1011                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1012                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1013         },
1014         {
1015         .field_bit_size = 1,
1016         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1017         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1018                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1019         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1020         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1021                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1022         },
1023         {
1024         .field_bit_size = 1,
1025         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1026         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1027                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1028         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1029         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1030                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1031         },
1032         {
1033         .field_bit_size = 1,
1034         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1035         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1036                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1037         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1038         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1039                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1040         },
1041         {
1042         .field_bit_size = 1,
1043         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1044         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1045                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1046         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1047         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1048                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1049         },
1050         {
1051         .field_bit_size = 2,
1052         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1053         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1054                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1055         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1056         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1057                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1058         },
1059         {
1060         .field_bit_size = 2,
1061         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1062         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1063                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1064         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1065         .spec_operand = {BNXT_ULP_SYM_TL2_HDR_TYPE_DIX,
1066                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1067                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1068         },
1069         {
1070         .field_bit_size = 1,
1071         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1072         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1073                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1074         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1075         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1076                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1077         },
1078         {
1079         .field_bit_size = 1,
1080         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1081         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1082                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1083         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1084         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1085                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1086         },
1087         {
1088         .field_bit_size = 9,
1089         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1090         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1091                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1092         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1093         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1094                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1095         },
1096         {
1097         .field_bit_size = 7,
1098         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1099         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1100                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1101         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE,
1102         .spec_operand = {
1103                 (BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID >> 8) & 0xff,
1104                 BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID & 0xff,
1105                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1106                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1107         },
1108         {
1109         .field_bit_size = 1,
1110         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1111         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1112                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1113         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1114         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1115                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1116         },
1117         {
1118         .field_bit_size = 2,
1119         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1120         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1121                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1122         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1123         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1124                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1125         },
1126         {
1127         .field_bit_size = 4,
1128         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1129         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1130                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1131         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1132         .spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2,
1133                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1134                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1135         },
1136         {
1137         .field_bit_size = 1,
1138         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1139         .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1140                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1141         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1142         .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1143                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1144         },
1145         {
1146         .field_bit_size = 251,
1147         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1148         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1149                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1150         .spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,
1151         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1152                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1153         },
1154         {
1155         .field_bit_size = 3,
1156         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1157         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1158                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1159         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1160         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1161                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1162         },
1163         {
1164         .field_bit_size = 16,
1165         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1166         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1167                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1168         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1169         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,
1170                 BNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff,
1171                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1172                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1173         },
1174         {
1175         .field_bit_size = 16,
1176         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1177         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1178                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1179         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1180         .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
1181                 BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff,
1182                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1183                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1184         },
1185         {
1186         .field_bit_size = 8,
1187         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1188         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1189                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1190         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1191         .spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP,
1192                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1193                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1194         },
1195         {
1196         .field_bit_size = 32,
1197         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1198         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1199                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1200         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1201         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
1202                 BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff,
1203                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1204                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1205         },
1206         {
1207         .field_bit_size = 32,
1208         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1209         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1210                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1211         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1212         .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
1213                 BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff,
1214                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1215                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1216         },
1217         {
1218         .field_bit_size = 48,
1219         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1220         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1221                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1222         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1223         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1224                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1225         },
1226         {
1227         .field_bit_size = 24,
1228         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1229         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1230                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1231         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1232         .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1233                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1234         },
1235         {
1236         .field_bit_size = 10,
1237         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1238         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1239                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1240         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1241         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1242                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1243                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1244                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1245         },
1246         {
1247         .field_bit_size = 8,
1248         .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1249         .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1250                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1251         .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1252         .spec_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1253                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1254                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1255                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1256         }
1257 };
1258
1259 struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {
1260         {
1261         .field_bit_size = 10,
1262         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1263         .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1264                 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1265                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1266                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1267         },
1268         {
1269         .field_bit_size = 7,
1270         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_DEF_REGFILE,
1271         .result_operand = {
1272                 (BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID >> 8) & 0xff,
1273                 BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID & 0xff,
1274                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1275                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1276         },
1277         {
1278         .field_bit_size = 1,
1279         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1280         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1281                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1282         },
1283         {
1284         .field_bit_size = 4,
1285         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1286         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1287                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1288         },
1289         {
1290         .field_bit_size = 8,
1291         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1292         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1293                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1294         },
1295         {
1296         .field_bit_size = 3,
1297         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1298         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1299                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1300         },
1301         {
1302         .field_bit_size = 6,
1303         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1304         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1305                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1306         },
1307         {
1308         .field_bit_size = 3,
1309         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1310         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1311                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1312         },
1313         {
1314         .field_bit_size = 1,
1315         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1316         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1317                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1318         },
1319         {
1320         .field_bit_size = 16,
1321         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1322         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1323                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1324         },
1325         {
1326         .field_bit_size = 1,
1327         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1328         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1329                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1330         },
1331         {
1332         .field_bit_size = 2,
1333         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1334         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1335                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1336         },
1337         {
1338         .field_bit_size = 2,
1339         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1340         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1341                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1342         },
1343         {
1344         .field_bit_size = 4,
1345         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1346         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1347                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1348         },
1349         {
1350         .field_bit_size = 8,
1351         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1352         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1353                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1354         },
1355         {
1356         .field_bit_size = 1,
1357         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1358         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1359                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1360         },
1361         {
1362         .field_bit_size = 10,
1363         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1364         .result_operand = {(0x00f9 >> 8) & 0xff,
1365                 0x00f9 & 0xff,
1366                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1367                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1368         },
1369         {
1370         .field_bit_size = 5,
1371         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1372         .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
1373                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1374         },
1375         {
1376         .field_bit_size = 8,
1377         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1378         .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1379                 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1380                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1381                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1382         },
1383         {
1384         .field_bit_size = 1,
1385         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1386         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1387                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1388         },
1389         {
1390         .field_bit_size = 1,
1391         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1392         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1393                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1394         },
1395         {
1396         .field_bit_size = 33,
1397         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1398         .result_operand = {(BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN >> 8) & 0xff,
1399                 BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN & 0xff,
1400                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1401                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1402         },
1403         {
1404         .field_bit_size = 1,
1405         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1406         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1407                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1408         },
1409         {
1410         .field_bit_size = 1,
1411         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1412         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1413                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1414         },
1415         {
1416         .field_bit_size = 5,
1417         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1418         .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
1419                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1420         },
1421         {
1422         .field_bit_size = 9,
1423         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1424         .result_operand = {(0x00c5 >> 8) & 0xff,
1425                 0x00c5 & 0xff,
1426                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1427                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1428         },
1429         {
1430         .field_bit_size = 11,
1431         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1432         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1433                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1434         },
1435         {
1436         .field_bit_size = 2,
1437         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1438         .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1439                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1440         },
1441         {
1442         .field_bit_size = 1,
1443         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1444         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1445                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1446         },
1447         {
1448         .field_bit_size = 1,
1449         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1450         .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1451                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1452         }
1453 };
1454
1455 struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
1456         {
1457         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1458         .ident_type = TF_IDENT_TYPE_L2_CTXT,
1459         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
1460         .ident_bit_size = 10,
1461         .ident_bit_pos = 54
1462         },
1463         {
1464         .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1465         .ident_type = TF_IDENT_TYPE_EM_PROF,
1466         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
1467         .ident_bit_size = 8,
1468         .ident_bit_pos = 2
1469         }
1470 };
1471
1472 struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {
1473         [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
1474                 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
1475         .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
1476         .num_tbls = 1,
1477         .start_tbl_idx = 0
1478         }
1479 };
1480
1481 struct bnxt_ulp_mapper_act_tbl_info ulp_act_tbl_list[] = {
1482         {
1483         .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
1484         .table_type = TF_TBL_TYPE_EXT,
1485         .direction = TF_DIR_RX,
1486         .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
1487         .result_start_idx = 0,
1488         .result_bit_size = 128,
1489         .result_num_fields = 26,
1490         .encap_num_fields = 0,
1491         .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN
1492         }
1493 };
1494
1495 struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {
1496         {
1497         .field_bit_size = 14,
1498         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1499         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1500                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1501         },
1502         {
1503         .field_bit_size = 1,
1504         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1505         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1506                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1507         },
1508         {
1509         .field_bit_size = 1,
1510         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1511         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1512                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1513         },
1514         {
1515         .field_bit_size = 1,
1516         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1517         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1518                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1519         },
1520         {
1521         .field_bit_size = 1,
1522         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1523         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1524                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1525         },
1526         {
1527         .field_bit_size = 1,
1528         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1529         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1530                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1531         },
1532         {
1533         .field_bit_size = 8,
1534         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1535         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1536                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1537         },
1538         {
1539         .field_bit_size = 1,
1540         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1541         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1542                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1543         },
1544         {
1545         .field_bit_size = 1,
1546         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1547         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1548                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1549         },
1550         {
1551         .field_bit_size = 11,
1552         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1553         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1554                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1555         },
1556         {
1557         .field_bit_size = 1,
1558         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1559         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1560                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1561         },
1562         {
1563         .field_bit_size = 10,
1564         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1565         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1566                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1567         },
1568         {
1569         .field_bit_size = 16,
1570         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1571         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1572                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1573         },
1574         {
1575         .field_bit_size = 10,
1576         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1577         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1578                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1579         },
1580         {
1581         .field_bit_size = 16,
1582         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1583         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1584                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1585         },
1586         {
1587         .field_bit_size = 10,
1588         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1589         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1590                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1591         },
1592         {
1593         .field_bit_size = 1,
1594         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1595         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1596                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1597         },
1598         {
1599         .field_bit_size = 1,
1600         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1601         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1602                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1603         },
1604         {
1605         .field_bit_size = 1,
1606         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1607         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1608                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1609         },
1610         {
1611         .field_bit_size = 1,
1612         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1613         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1614                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1615         },
1616         {
1617         .field_bit_size = 4,
1618         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1619         .result_operand = {BNXT_ULP_SYM_DECAP_FUNC_NONE,
1620                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1621                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1622         },
1623         {
1624         .field_bit_size = 12,
1625         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,
1626         .result_operand = {(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1627                 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
1628                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1629                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1630         },
1631         {
1632         .field_bit_size = 1,
1633         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1634         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1635                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1636         },
1637         {
1638         .field_bit_size = 1,
1639         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1640         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1641                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1642         },
1643         {
1644         .field_bit_size = 2,
1645         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1646         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1647                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1648         },
1649         {
1650         .field_bit_size = 1,
1651         .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1652         .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1653                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1654         }
1655 };