1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2020 Broadcom
7 * date: Mon Mar 9 02:37:53 2020
11 #include "ulp_template_db.h"
12 #include "ulp_template_field_db.h"
13 #include "ulp_template_struct.h"
14 #include "ulp_rte_parser.h"
16 uint32_t ulp_act_prop_map_table[] = {
17 [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =
18 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ,
19 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =
20 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ,
21 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =
22 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ,
23 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =
24 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE,
25 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =
26 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM,
27 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =
28 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE,
29 [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =
30 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM,
31 [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =
32 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM,
33 [BNXT_ULP_ACT_PROP_IDX_PORT_ID] =
34 BNXT_ULP_ACT_PROP_SZ_PORT_ID,
35 [BNXT_ULP_ACT_PROP_IDX_VNIC] =
36 BNXT_ULP_ACT_PROP_SZ_VNIC,
37 [BNXT_ULP_ACT_PROP_IDX_VPORT] =
38 BNXT_ULP_ACT_PROP_SZ_VPORT,
39 [BNXT_ULP_ACT_PROP_IDX_MARK] =
40 BNXT_ULP_ACT_PROP_SZ_MARK,
41 [BNXT_ULP_ACT_PROP_IDX_COUNT] =
42 BNXT_ULP_ACT_PROP_SZ_COUNT,
43 [BNXT_ULP_ACT_PROP_IDX_METER] =
44 BNXT_ULP_ACT_PROP_SZ_METER,
45 [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =
46 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC,
47 [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =
48 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST,
49 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN] =
50 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN,
51 [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP] =
52 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP,
53 [BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID] =
54 BNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID,
55 [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =
56 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC,
57 [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =
58 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST,
59 [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =
60 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC,
61 [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =
62 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST,
63 [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =
64 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC,
65 [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =
66 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST,
67 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =
68 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0,
69 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =
70 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1,
71 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =
72 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2,
73 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =
74 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3,
75 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =
76 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4,
77 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =
78 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5,
79 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =
80 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6,
81 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =
82 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7,
83 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =
84 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,
85 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =
86 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,
87 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =
88 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG,
89 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =
90 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP,
91 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =
92 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC,
93 [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =
94 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,
95 [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
96 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,
97 [BNXT_ULP_ACT_PROP_IDX_LAST] =
98 BNXT_ULP_ACT_PROP_SZ_LAST
101 struct bnxt_ulp_rte_act_info ulp_act_info[] = {
102 [RTE_FLOW_ACTION_TYPE_END] = {
103 .act_type = BNXT_ULP_ACT_TYPE_END,
104 .proto_act_func = NULL
106 [RTE_FLOW_ACTION_TYPE_VOID] = {
107 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
108 .proto_act_func = ulp_rte_void_act_handler
110 [RTE_FLOW_ACTION_TYPE_PASSTHRU] = {
111 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
112 .proto_act_func = NULL
114 [RTE_FLOW_ACTION_TYPE_JUMP] = {
115 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
116 .proto_act_func = NULL
118 [RTE_FLOW_ACTION_TYPE_MARK] = {
119 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
120 .proto_act_func = ulp_rte_mark_act_handler
122 [RTE_FLOW_ACTION_TYPE_FLAG] = {
123 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
124 .proto_act_func = NULL
126 [RTE_FLOW_ACTION_TYPE_QUEUE] = {
127 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
128 .proto_act_func = NULL
130 [RTE_FLOW_ACTION_TYPE_DROP] = {
131 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
132 .proto_act_func = ulp_rte_drop_act_handler
134 [RTE_FLOW_ACTION_TYPE_COUNT] = {
135 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
136 .proto_act_func = ulp_rte_count_act_handler
138 [RTE_FLOW_ACTION_TYPE_RSS] = {
139 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
140 .proto_act_func = ulp_rte_rss_act_handler
142 [RTE_FLOW_ACTION_TYPE_PF] = {
143 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
144 .proto_act_func = ulp_rte_pf_act_handler
146 [RTE_FLOW_ACTION_TYPE_VF] = {
147 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
148 .proto_act_func = ulp_rte_vf_act_handler
150 [RTE_FLOW_ACTION_TYPE_PHY_PORT] = {
151 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
152 .proto_act_func = ulp_rte_phy_port_act_handler
154 [RTE_FLOW_ACTION_TYPE_PORT_ID] = {
155 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
156 .proto_act_func = ulp_rte_port_id_act_handler
158 [RTE_FLOW_ACTION_TYPE_METER] = {
159 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
160 .proto_act_func = NULL
162 [RTE_FLOW_ACTION_TYPE_SECURITY] = {
163 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
164 .proto_act_func = NULL
166 [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {
167 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
168 .proto_act_func = NULL
170 [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {
171 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
172 .proto_act_func = NULL
174 [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {
175 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
176 .proto_act_func = NULL
178 [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {
179 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
180 .proto_act_func = NULL
182 [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {
183 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
184 .proto_act_func = NULL
186 [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {
187 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
188 .proto_act_func = NULL
190 [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {
191 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
192 .proto_act_func = NULL
194 [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {
195 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
196 .proto_act_func = NULL
198 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {
199 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
200 .proto_act_func = NULL
202 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {
203 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
204 .proto_act_func = NULL
206 [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {
207 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
208 .proto_act_func = NULL
210 [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {
211 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
212 .proto_act_func = NULL
214 [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {
215 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
216 .proto_act_func = ulp_rte_vxlan_encap_act_handler
218 [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {
219 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
220 .proto_act_func = ulp_rte_vxlan_decap_act_handler
222 [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {
223 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
224 .proto_act_func = NULL
226 [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {
227 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
228 .proto_act_func = NULL
230 [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {
231 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
232 .proto_act_func = NULL
234 [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {
235 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
236 .proto_act_func = NULL
238 [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {
239 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
240 .proto_act_func = NULL
242 [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {
243 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
244 .proto_act_func = NULL
246 [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {
247 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
248 .proto_act_func = NULL
250 [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {
251 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
252 .proto_act_func = NULL
254 [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {
255 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
256 .proto_act_func = NULL
258 [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {
259 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
260 .proto_act_func = NULL
262 [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {
263 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
264 .proto_act_func = NULL
266 [RTE_FLOW_ACTION_TYPE_DEC_TTL] = {
267 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
268 .proto_act_func = NULL
270 [RTE_FLOW_ACTION_TYPE_SET_TTL] = {
271 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
272 .proto_act_func = NULL
274 [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {
275 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
276 .proto_act_func = NULL
278 [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {
279 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
280 .proto_act_func = NULL
282 [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {
283 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
284 .proto_act_func = NULL
286 [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {
287 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
288 .proto_act_func = NULL
290 [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {
291 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
292 .proto_act_func = NULL
294 [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {
295 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
296 .proto_act_func = NULL
300 struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[] = {
301 [BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_INGRESS] = {
304 [BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_EGRESS] = {
307 [BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_INGRESS] = {
310 [BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_EGRESS] = {
315 struct bnxt_ulp_def_ident_info ulp_def_ident_tbl[] = {
317 .ident_type = TF_IDENT_TYPE_PROF_FUNC,
319 BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID,
320 .direction = TF_DIR_RX
324 struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
325 [BNXT_ULP_DEVICE_ID_WH_PLUS] = {
326 .global_fid_enable = BNXT_ULP_SYM_YES,
327 .byte_order = (enum bnxt_ulp_byte_order)
328 BNXT_ULP_SYM_LITTLE_ENDIAN,
329 .encap_byte_swap = 1,
330 .lfid_entries = 16384,
331 .lfid_entry_size = 4,
332 .gfid_entries = 65536,
333 .gfid_entry_size = 4,
335 .num_resources_per_flow = 8
339 struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {
340 [RTE_FLOW_ITEM_TYPE_END] = {
341 .hdr_type = BNXT_ULP_HDR_TYPE_END,
342 .proto_hdr_func = NULL
344 [RTE_FLOW_ITEM_TYPE_VOID] = {
345 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
346 .proto_hdr_func = ulp_rte_void_hdr_handler
348 [RTE_FLOW_ITEM_TYPE_INVERT] = {
349 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
350 .proto_hdr_func = NULL
352 [RTE_FLOW_ITEM_TYPE_ANY] = {
353 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
354 .proto_hdr_func = NULL
356 [RTE_FLOW_ITEM_TYPE_PF] = {
357 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
358 .proto_hdr_func = ulp_rte_pf_hdr_handler
360 [RTE_FLOW_ITEM_TYPE_VF] = {
361 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
362 .proto_hdr_func = ulp_rte_vf_hdr_handler
364 [RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
365 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
366 .proto_hdr_func = ulp_rte_phy_port_hdr_handler
368 [RTE_FLOW_ITEM_TYPE_PORT_ID] = {
369 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
370 .proto_hdr_func = ulp_rte_port_id_hdr_handler
372 [RTE_FLOW_ITEM_TYPE_RAW] = {
373 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
374 .proto_hdr_func = NULL
376 [RTE_FLOW_ITEM_TYPE_ETH] = {
377 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
378 .proto_hdr_func = ulp_rte_eth_hdr_handler
380 [RTE_FLOW_ITEM_TYPE_VLAN] = {
381 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
382 .proto_hdr_func = ulp_rte_vlan_hdr_handler
384 [RTE_FLOW_ITEM_TYPE_IPV4] = {
385 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
386 .proto_hdr_func = ulp_rte_ipv4_hdr_handler
388 [RTE_FLOW_ITEM_TYPE_IPV6] = {
389 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
390 .proto_hdr_func = ulp_rte_ipv6_hdr_handler
392 [RTE_FLOW_ITEM_TYPE_ICMP] = {
393 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
394 .proto_hdr_func = NULL
396 [RTE_FLOW_ITEM_TYPE_UDP] = {
397 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
398 .proto_hdr_func = ulp_rte_udp_hdr_handler
400 [RTE_FLOW_ITEM_TYPE_TCP] = {
401 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
402 .proto_hdr_func = ulp_rte_tcp_hdr_handler
404 [RTE_FLOW_ITEM_TYPE_SCTP] = {
405 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
406 .proto_hdr_func = NULL
408 [RTE_FLOW_ITEM_TYPE_VXLAN] = {
409 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
410 .proto_hdr_func = ulp_rte_vxlan_hdr_handler
412 [RTE_FLOW_ITEM_TYPE_E_TAG] = {
413 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
414 .proto_hdr_func = NULL
416 [RTE_FLOW_ITEM_TYPE_NVGRE] = {
417 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
418 .proto_hdr_func = NULL
420 [RTE_FLOW_ITEM_TYPE_MPLS] = {
421 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
422 .proto_hdr_func = NULL
424 [RTE_FLOW_ITEM_TYPE_GRE] = {
425 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
426 .proto_hdr_func = NULL
428 [RTE_FLOW_ITEM_TYPE_FUZZY] = {
429 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
430 .proto_hdr_func = NULL
432 [RTE_FLOW_ITEM_TYPE_GTP] = {
433 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
434 .proto_hdr_func = NULL
436 [RTE_FLOW_ITEM_TYPE_GTPC] = {
437 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
438 .proto_hdr_func = NULL
440 [RTE_FLOW_ITEM_TYPE_GTPU] = {
441 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
442 .proto_hdr_func = NULL
444 [RTE_FLOW_ITEM_TYPE_ESP] = {
445 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
446 .proto_hdr_func = NULL
448 [RTE_FLOW_ITEM_TYPE_GENEVE] = {
449 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
450 .proto_hdr_func = NULL
452 [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {
453 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
454 .proto_hdr_func = NULL
456 [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {
457 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
458 .proto_hdr_func = NULL
460 [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {
461 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
462 .proto_hdr_func = NULL
464 [RTE_FLOW_ITEM_TYPE_ICMP6] = {
465 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
466 .proto_hdr_func = NULL
468 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {
469 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
470 .proto_hdr_func = NULL
472 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {
473 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
474 .proto_hdr_func = NULL
476 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {
477 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
478 .proto_hdr_func = NULL
480 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {
481 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
482 .proto_hdr_func = NULL
484 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {
485 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
486 .proto_hdr_func = NULL
488 [RTE_FLOW_ITEM_TYPE_MARK] = {
489 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
490 .proto_hdr_func = NULL
492 [RTE_FLOW_ITEM_TYPE_META] = {
493 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
494 .proto_hdr_func = NULL
496 [RTE_FLOW_ITEM_TYPE_GRE_KEY] = {
497 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
498 .proto_hdr_func = NULL
500 [RTE_FLOW_ITEM_TYPE_GTP_PSC] = {
501 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
502 .proto_hdr_func = NULL
504 [RTE_FLOW_ITEM_TYPE_PPPOES] = {
505 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
506 .proto_hdr_func = NULL
508 [RTE_FLOW_ITEM_TYPE_PPPOED] = {
509 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
510 .proto_hdr_func = NULL
512 [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {
513 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
514 .proto_hdr_func = NULL
516 [RTE_FLOW_ITEM_TYPE_NSH] = {
517 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
518 .proto_hdr_func = NULL
520 [RTE_FLOW_ITEM_TYPE_IGMP] = {
521 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
522 .proto_hdr_func = NULL
524 [RTE_FLOW_ITEM_TYPE_AH] = {
525 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
526 .proto_hdr_func = NULL
528 [RTE_FLOW_ITEM_TYPE_HIGIG2] = {
529 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
530 .proto_hdr_func = NULL
534 uint32_t bnxt_ulp_encap_vtag_map[] = {
535 [0] = BNXT_ULP_ENCAP_VTAG_ENCODING_NOP,
536 [1] = BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI,
537 [2] = BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI
540 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
541 [BNXT_ULP_CLASS_HID_0092] = 1
544 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
546 .class_hid = BNXT_ULP_CLASS_HID_0092,
548 BNXT_ULP_HDR_BIT_O_ETH |
549 BNXT_ULP_HDR_BIT_O_IPV4 |
550 BNXT_ULP_HDR_BIT_O_UDP |
551 BNXT_ULP_FLOW_DIR_BITMASK_ING },
552 .field_sig = { .bits =
553 BNXT_ULP_HF0_BITMASK_O_IPV4_SRC_ADDR |
554 BNXT_ULP_HF0_BITMASK_O_IPV4_DST_ADDR |
555 BNXT_ULP_HF0_BITMASK_O_UDP_SRC_PORT |
556 BNXT_ULP_HF0_BITMASK_O_UDP_DST_PORT |
557 BNXT_ULP_MATCH_TYPE_BITMASK_EM },
564 uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
565 [BNXT_ULP_ACT_HID_0029] = 1
568 struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
570 .act_hid = BNXT_ULP_ACT_HID_0029,
572 BNXT_ULP_ACTION_BIT_MARK |
573 BNXT_ULP_ACTION_BIT_RSS |
574 BNXT_ULP_ACTION_BIT_VNIC |
575 BNXT_ULP_FLOW_DIR_BITMASK_ING },
580 struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {
581 [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
582 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
583 .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
589 struct bnxt_ulp_mapper_class_tbl_info ulp_class_tbl_list[] = {
591 .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
592 .table_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
593 .direction = TF_DIR_RX,
594 .priority = BNXT_ULP_PRIORITY_NOT_USED,
595 .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
597 .blob_key_bit_size = 12,
600 .result_start_idx = 0,
601 .result_bit_size = 10,
602 .result_num_fields = 1,
603 .ident_start_idx = 0,
605 .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
606 .critical_resource = 0,
607 .cache_tbl_id = BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_INGRESS,
608 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
611 .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
612 .table_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,
613 .direction = TF_DIR_RX,
614 .priority = BNXT_ULP_PRIORITY_LEVEL_0,
615 .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
617 .blob_key_bit_size = 167,
619 .key_num_fields = 13,
620 .result_start_idx = 1,
621 .result_bit_size = 64,
622 .result_num_fields = 13,
623 .ident_start_idx = 1,
625 .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
626 .critical_resource = 0,
628 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
631 .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
632 .table_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
633 .direction = TF_DIR_RX,
634 .priority = BNXT_ULP_PRIORITY_NOT_USED,
635 .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
637 .blob_key_bit_size = 16,
640 .result_start_idx = 14,
641 .result_bit_size = 10,
642 .result_num_fields = 1,
643 .ident_start_idx = 1,
645 .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
646 .critical_resource = 0,
647 .cache_tbl_id = BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_INGRESS,
648 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
651 .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
652 .table_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
653 .direction = TF_DIR_RX,
654 .priority = BNXT_ULP_PRIORITY_LEVEL_0,
655 .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
657 .blob_key_bit_size = 81,
659 .key_num_fields = 42,
660 .result_start_idx = 15,
661 .result_bit_size = 38,
662 .result_num_fields = 8,
663 .ident_start_idx = 2,
665 .mark_enable = BNXT_ULP_MARK_ENABLE_NO,
666 .critical_resource = 0,
668 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
671 .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
672 .table_type = TF_MEM_EXTERNAL,
673 .direction = TF_DIR_RX,
674 .priority = BNXT_ULP_PRIORITY_NOT_USED,
675 .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
677 .blob_key_bit_size = 448,
679 .key_num_fields = 11,
680 .result_start_idx = 23,
681 .result_bit_size = 64,
682 .result_num_fields = 9,
683 .ident_start_idx = 2,
685 .mark_enable = BNXT_ULP_MARK_ENABLE_YES,
686 .critical_resource = 1,
688 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED
692 struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
695 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
696 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
697 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
698 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
699 .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
700 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
701 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
702 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
706 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
707 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
708 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
709 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
710 .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
711 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
712 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
715 .field_bit_size = 12,
716 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
717 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
718 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
719 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
720 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
721 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
724 .field_bit_size = 12,
725 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
726 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
727 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
728 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
729 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
730 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
733 .field_bit_size = 48,
734 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
735 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
736 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
737 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
738 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
739 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
743 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,
744 .mask_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
745 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
746 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
747 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
748 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
749 .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,
750 BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,
751 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
752 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
756 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
757 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
758 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
759 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
760 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
761 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
764 .field_bit_size = 12,
765 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
766 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
767 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
768 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
769 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
770 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
773 .field_bit_size = 12,
774 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
775 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
776 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
777 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
778 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
779 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
782 .field_bit_size = 48,
783 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
784 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
785 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
786 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
787 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
788 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
792 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
793 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
794 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
795 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
796 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
797 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
801 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
802 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
803 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
804 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
805 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
806 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
810 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
811 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
812 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
813 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
814 .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
815 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
816 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
820 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
821 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
822 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
823 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
824 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
825 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
829 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
830 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
831 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
832 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
833 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
834 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
836 /* class template id: 0, wh_plus, table: profile_tcam_cache_0 */
839 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
840 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
841 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
842 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
843 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
844 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
848 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
849 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
850 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
851 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE,
853 (BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID >> 8) & 0xff,
854 BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID & 0xff,
855 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
856 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
860 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
861 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
862 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
863 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
864 .spec_operand = {(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
865 BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
866 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
867 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
871 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
872 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
873 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
874 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
875 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
876 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
880 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
881 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
882 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
883 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
884 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
885 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
889 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
890 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
891 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
892 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
893 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
894 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
898 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
899 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
900 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
901 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
902 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
903 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
907 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
908 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
909 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
910 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
911 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
912 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
916 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
917 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
918 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
919 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
920 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
921 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
925 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
926 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
927 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
928 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
929 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
930 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
934 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
935 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
936 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
937 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
938 .spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4,
939 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
940 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
944 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
945 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
946 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
947 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
948 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
949 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
953 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
954 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
955 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
956 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
957 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
958 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
962 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
963 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
964 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
965 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
966 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
967 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
971 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
972 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
973 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
974 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
975 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
976 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
980 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
981 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
982 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
983 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
984 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
985 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
989 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
990 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
991 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
992 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
993 .spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX,
994 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
995 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
999 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1000 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1001 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1002 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1003 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1004 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1007 .field_bit_size = 1,
1008 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1009 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1010 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1011 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1012 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1013 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1016 .field_bit_size = 3,
1017 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1018 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1019 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1020 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1021 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1022 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1025 .field_bit_size = 4,
1026 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1027 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1028 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1029 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1030 .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
1031 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1035 .field_bit_size = 1,
1036 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1037 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1038 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1039 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1040 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1041 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1044 .field_bit_size = 1,
1045 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1046 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1047 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1048 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1049 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1050 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1053 .field_bit_size = 1,
1054 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1055 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1056 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1057 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1058 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1059 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1062 .field_bit_size = 4,
1063 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1064 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1065 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1066 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1067 .spec_operand = {BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
1068 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1069 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1072 .field_bit_size = 1,
1073 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1074 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1075 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1076 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1077 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1078 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1081 .field_bit_size = 1,
1082 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1083 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1084 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1085 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1086 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1087 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1090 .field_bit_size = 1,
1091 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1092 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1093 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1094 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1095 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1096 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1099 .field_bit_size = 1,
1100 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1101 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1103 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1104 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1105 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1108 .field_bit_size = 1,
1109 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1110 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1112 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1113 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1114 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1117 .field_bit_size = 4,
1118 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1119 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1120 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1121 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1122 .spec_operand = {BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,
1123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1127 .field_bit_size = 1,
1128 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1129 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1130 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1131 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1132 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1136 .field_bit_size = 1,
1137 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1138 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1139 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1140 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1141 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1142 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1145 .field_bit_size = 1,
1146 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1147 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1149 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1150 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1151 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1154 .field_bit_size = 1,
1155 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1156 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1158 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1159 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1160 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1163 .field_bit_size = 2,
1164 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1165 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1166 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1167 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1168 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1169 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1172 .field_bit_size = 2,
1173 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1174 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1175 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1176 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1177 .spec_operand = {BNXT_ULP_SYM_TL2_HDR_TYPE_DIX,
1178 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1179 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1182 .field_bit_size = 1,
1183 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1184 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1185 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1186 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1187 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1191 .field_bit_size = 1,
1192 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1193 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1194 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1195 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1196 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1200 .field_bit_size = 9,
1201 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1202 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1204 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1205 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1206 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1209 .field_bit_size = 7,
1210 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1211 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1212 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1213 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE,
1215 (BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID >> 8) & 0xff,
1216 BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID & 0xff,
1217 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1218 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1221 .field_bit_size = 1,
1222 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1223 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1224 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1225 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1226 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1227 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1230 .field_bit_size = 2,
1231 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1232 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1233 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1234 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1235 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1236 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1239 .field_bit_size = 4,
1240 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1241 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1242 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1243 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1244 .spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2,
1245 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1246 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1249 .field_bit_size = 1,
1250 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1251 .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1252 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
1253 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1254 .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1255 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1258 .field_bit_size = 251,
1259 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1260 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1261 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1262 .spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,
1263 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1264 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1267 .field_bit_size = 3,
1268 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1269 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1270 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1271 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1272 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1273 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1276 .field_bit_size = 16,
1277 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1278 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1279 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1280 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1281 .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,
1282 BNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff,
1283 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1284 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1287 .field_bit_size = 16,
1288 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1289 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1290 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1291 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1292 .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
1293 BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff,
1294 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1295 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1298 .field_bit_size = 8,
1299 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1300 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1301 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1302 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1303 .spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP,
1304 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1305 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1308 .field_bit_size = 32,
1309 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1310 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1311 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1312 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1313 .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
1314 BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff,
1315 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1316 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1319 .field_bit_size = 32,
1320 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1321 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1322 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1323 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,
1324 .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
1325 BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff,
1326 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1327 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1330 .field_bit_size = 48,
1331 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1332 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1333 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1334 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1335 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1336 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1339 .field_bit_size = 24,
1340 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1341 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1342 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1343 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
1344 .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1345 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1348 .field_bit_size = 10,
1349 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1350 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1351 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1352 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1353 .spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1354 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1355 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1356 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1359 .field_bit_size = 8,
1360 .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
1361 .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1362 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
1363 .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,
1364 .spec_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1365 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1366 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1367 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1371 struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {
1373 .field_bit_size = 10,
1374 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1375 .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1376 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1377 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1378 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1381 .field_bit_size = 10,
1382 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1383 .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
1384 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
1385 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1386 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1389 .field_bit_size = 7,
1390 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_DEF_REGFILE,
1392 (BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID >> 8) & 0xff,
1393 BNXT_ULP_DEF_REGFILE_INDEX_DEF_PROF_FUNC_ID & 0xff,
1394 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1395 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1398 .field_bit_size = 1,
1399 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1400 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1401 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1404 .field_bit_size = 4,
1405 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1406 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1407 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1410 .field_bit_size = 8,
1411 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1412 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1413 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1416 .field_bit_size = 3,
1417 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1418 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1419 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1422 .field_bit_size = 6,
1423 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1424 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1425 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1428 .field_bit_size = 3,
1429 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1430 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1431 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1434 .field_bit_size = 1,
1435 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1436 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1437 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1440 .field_bit_size = 16,
1441 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1442 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1443 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1446 .field_bit_size = 1,
1447 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1448 .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1449 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1452 .field_bit_size = 2,
1453 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1454 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1455 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1458 .field_bit_size = 2,
1459 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1460 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1461 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1465 .field_bit_size = 10,
1466 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1467 .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1468 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1469 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1470 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1473 .field_bit_size = 4,
1474 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1475 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1476 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1479 .field_bit_size = 8,
1480 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1481 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1482 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1485 .field_bit_size = 1,
1486 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1487 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1488 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1491 .field_bit_size = 10,
1492 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1493 .result_operand = {(0x00f9 >> 8) & 0xff,
1495 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1496 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1499 .field_bit_size = 5,
1500 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1501 .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
1502 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1505 .field_bit_size = 8,
1506 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1507 .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
1508 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
1509 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1510 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1513 .field_bit_size = 1,
1514 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1515 .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1516 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1519 .field_bit_size = 1,
1520 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1521 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1522 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1525 .field_bit_size = 33,
1526 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,
1527 .result_operand = {(BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN >> 8) & 0xff,
1528 BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN & 0xff,
1529 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1530 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1533 .field_bit_size = 1,
1534 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1535 .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1536 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1539 .field_bit_size = 1,
1540 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1541 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1542 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1545 .field_bit_size = 5,
1546 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1547 .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
1548 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1551 .field_bit_size = 9,
1552 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1553 .result_operand = {(0x00c5 >> 8) & 0xff,
1555 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1556 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1559 .field_bit_size = 11,
1560 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1561 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1562 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1565 .field_bit_size = 2,
1566 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1567 .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1568 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1571 .field_bit_size = 1,
1572 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1573 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1574 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1577 .field_bit_size = 1,
1578 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1579 .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1580 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1584 struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {
1586 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1587 .ident_type = TF_IDENT_TYPE_L2_CTXT,
1588 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
1589 .ident_bit_size = 10,
1593 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
1594 .ident_type = TF_IDENT_TYPE_EM_PROF,
1595 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
1596 .ident_bit_size = 10,
1601 struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {
1602 [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
1603 BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
1604 .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
1610 struct bnxt_ulp_mapper_act_tbl_info ulp_act_tbl_list[] = {
1612 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
1613 .table_type = TF_TBL_TYPE_EXT,
1614 .direction = TF_DIR_RX,
1615 .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
1616 .result_start_idx = 0,
1617 .result_bit_size = 128,
1618 .result_num_fields = 26,
1619 .encap_num_fields = 0,
1620 .regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN
1624 struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {
1626 .field_bit_size = 14,
1627 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1628 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1629 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1632 .field_bit_size = 1,
1633 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1634 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1635 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1638 .field_bit_size = 1,
1639 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1640 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1641 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1644 .field_bit_size = 1,
1645 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1646 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1647 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1650 .field_bit_size = 1,
1651 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1652 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1653 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1656 .field_bit_size = 1,
1657 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1658 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1659 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1662 .field_bit_size = 8,
1663 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1664 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1665 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1668 .field_bit_size = 1,
1669 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1670 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1671 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1674 .field_bit_size = 1,
1675 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1676 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1677 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1680 .field_bit_size = 11,
1681 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1682 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1683 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1686 .field_bit_size = 1,
1687 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1688 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1689 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1692 .field_bit_size = 10,
1693 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1694 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1695 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1698 .field_bit_size = 16,
1699 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1700 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1701 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1704 .field_bit_size = 10,
1705 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1706 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1707 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1710 .field_bit_size = 16,
1711 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1712 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1713 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1716 .field_bit_size = 10,
1717 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1718 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1719 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1722 .field_bit_size = 1,
1723 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1724 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1725 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1728 .field_bit_size = 1,
1729 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1730 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1731 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1734 .field_bit_size = 1,
1735 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1736 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1737 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1740 .field_bit_size = 1,
1741 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1742 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1743 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1746 .field_bit_size = 4,
1747 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1748 .result_operand = {BNXT_ULP_SYM_DECAP_FUNC_NONE,
1749 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1750 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1753 .field_bit_size = 12,
1754 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,
1755 .result_operand = {(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
1756 BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,
1757 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1758 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1761 .field_bit_size = 1,
1762 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1763 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1764 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1767 .field_bit_size = 1,
1768 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1769 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1770 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1773 .field_bit_size = 2,
1774 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1775 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1776 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
1779 .field_bit_size = 1,
1780 .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,
1781 .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1782 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}