1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2021 Broadcom
6 /* date: Thu Oct 15 17:28:37 2020 */
8 #ifndef ULP_TEMPLATE_DB_H_
9 #define ULP_TEMPLATE_DB_H_
11 #define BNXT_ULP_REGFILE_MAX_SZ 19
12 #define BNXT_ULP_MAX_NUM_DEVICES 4
13 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2
14 #define BNXT_ULP_GEN_TBL_MAX_SZ 4
15 #define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048
16 #define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 217
17 #define BNXT_ULP_CLASS_HID_LOW_PRIME 7919
18 #define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907
19 #define BNXT_ULP_CLASS_HID_SHFTR 32
20 #define BNXT_ULP_CLASS_HID_SHFTL 31
21 #define BNXT_ULP_CLASS_HID_MASK 2047
22 #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 4096
23 #define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 83
24 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919
25 #define BNXT_ULP_ACT_HID_HIGH_PRIME 4721
26 #define BNXT_ULP_ACT_HID_SHFTR 23
27 #define BNXT_ULP_ACT_HID_SHFTL 23
28 #define BNXT_ULP_ACT_HID_MASK 4095
29 #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 8
30 #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1
31 #define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7
33 enum bnxt_ulp_action_bit {
34 BNXT_ULP_ACTION_BIT_MARK = 0x0000000000000001,
35 BNXT_ULP_ACTION_BIT_DROP = 0x0000000000000002,
36 BNXT_ULP_ACTION_BIT_COUNT = 0x0000000000000004,
37 BNXT_ULP_ACTION_BIT_RSS = 0x0000000000000008,
38 BNXT_ULP_ACTION_BIT_METER = 0x0000000000000010,
39 BNXT_ULP_ACTION_BIT_VXLAN_DECAP = 0x0000000000000020,
40 BNXT_ULP_ACTION_BIT_POP_MPLS = 0x0000000000000040,
41 BNXT_ULP_ACTION_BIT_PUSH_MPLS = 0x0000000000000080,
42 BNXT_ULP_ACTION_BIT_MAC_SWAP = 0x0000000000000100,
43 BNXT_ULP_ACTION_BIT_SET_MAC_SRC = 0x0000000000000200,
44 BNXT_ULP_ACTION_BIT_SET_MAC_DST = 0x0000000000000400,
45 BNXT_ULP_ACTION_BIT_POP_VLAN = 0x0000000000000800,
46 BNXT_ULP_ACTION_BIT_PUSH_VLAN = 0x0000000000001000,
47 BNXT_ULP_ACTION_BIT_SET_VLAN_PCP = 0x0000000000002000,
48 BNXT_ULP_ACTION_BIT_SET_VLAN_VID = 0x0000000000004000,
49 BNXT_ULP_ACTION_BIT_SET_IPV4_SRC = 0x0000000000008000,
50 BNXT_ULP_ACTION_BIT_SET_IPV4_DST = 0x0000000000010000,
51 BNXT_ULP_ACTION_BIT_SET_IPV6_SRC = 0x0000000000020000,
52 BNXT_ULP_ACTION_BIT_SET_IPV6_DST = 0x0000000000040000,
53 BNXT_ULP_ACTION_BIT_DEC_TTL = 0x0000000000080000,
54 BNXT_ULP_ACTION_BIT_SET_TP_SRC = 0x0000000000100000,
55 BNXT_ULP_ACTION_BIT_SET_TP_DST = 0x0000000000200000,
56 BNXT_ULP_ACTION_BIT_VXLAN_ENCAP = 0x0000000000400000,
57 BNXT_ULP_ACTION_BIT_JUMP = 0x0000000000800000,
58 BNXT_ULP_ACTION_BIT_SHARED = 0x0000000001000000,
59 BNXT_ULP_ACTION_BIT_SAMPLE = 0x0000000002000000,
60 BNXT_ULP_ACTION_BIT_SHARED_SAMPLE = 0x0000000004000000,
61 BNXT_ULP_ACTION_BIT_LAST = 0x0000000008000000
64 enum bnxt_ulp_hdr_bit {
65 BNXT_ULP_HDR_BIT_O_ETH = 0x0000000000000001,
66 BNXT_ULP_HDR_BIT_OO_VLAN = 0x0000000000000002,
67 BNXT_ULP_HDR_BIT_OI_VLAN = 0x0000000000000004,
68 BNXT_ULP_HDR_BIT_O_IPV4 = 0x0000000000000008,
69 BNXT_ULP_HDR_BIT_O_IPV6 = 0x0000000000000010,
70 BNXT_ULP_HDR_BIT_O_TCP = 0x0000000000000020,
71 BNXT_ULP_HDR_BIT_O_UDP = 0x0000000000000040,
72 BNXT_ULP_HDR_BIT_T_VXLAN = 0x0000000000000080,
73 BNXT_ULP_HDR_BIT_T_GRE = 0x0000000000000100,
74 BNXT_ULP_HDR_BIT_I_ETH = 0x0000000000000200,
75 BNXT_ULP_HDR_BIT_IO_VLAN = 0x0000000000000400,
76 BNXT_ULP_HDR_BIT_II_VLAN = 0x0000000000000800,
77 BNXT_ULP_HDR_BIT_I_IPV4 = 0x0000000000001000,
78 BNXT_ULP_HDR_BIT_I_IPV6 = 0x0000000000002000,
79 BNXT_ULP_HDR_BIT_I_TCP = 0x0000000000004000,
80 BNXT_ULP_HDR_BIT_I_UDP = 0x0000000000008000,
81 BNXT_ULP_HDR_BIT_F1 = 0x0000000000010000,
82 BNXT_ULP_HDR_BIT_LAST = 0x0000000000020000
85 enum bnxt_ulp_act_type {
86 BNXT_ULP_ACT_TYPE_NOT_SUPPORTED = 0,
87 BNXT_ULP_ACT_TYPE_SUPPORTED = 1,
88 BNXT_ULP_ACT_TYPE_END = 2,
89 BNXT_ULP_ACT_TYPE_LAST = 3
92 enum bnxt_ulp_byte_order {
93 BNXT_ULP_BYTE_ORDER_BE = 0,
94 BNXT_ULP_BYTE_ORDER_LE = 1,
95 BNXT_ULP_BYTE_ORDER_LAST = 2
98 enum bnxt_ulp_cf_idx {
99 BNXT_ULP_CF_IDX_NOT_USED = 0,
100 BNXT_ULP_CF_IDX_MPLS_TAG_NUM = 1,
101 BNXT_ULP_CF_IDX_O_VTAG_NUM = 2,
102 BNXT_ULP_CF_IDX_O_NO_VTAG = 3,
103 BNXT_ULP_CF_IDX_O_ONE_VTAG = 4,
104 BNXT_ULP_CF_IDX_O_TWO_VTAGS = 5,
105 BNXT_ULP_CF_IDX_I_VTAG_NUM = 6,
106 BNXT_ULP_CF_IDX_I_NO_VTAG = 7,
107 BNXT_ULP_CF_IDX_I_ONE_VTAG = 8,
108 BNXT_ULP_CF_IDX_I_TWO_VTAGS = 9,
109 BNXT_ULP_CF_IDX_INCOMING_IF = 10,
110 BNXT_ULP_CF_IDX_DIRECTION = 11,
111 BNXT_ULP_CF_IDX_SVIF_FLAG = 12,
112 BNXT_ULP_CF_IDX_O_L3 = 13,
113 BNXT_ULP_CF_IDX_I_L3 = 14,
114 BNXT_ULP_CF_IDX_O_L4 = 15,
115 BNXT_ULP_CF_IDX_I_L4 = 16,
116 BNXT_ULP_CF_IDX_DEV_PORT_ID = 17,
117 BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 18,
118 BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 19,
119 BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 20,
120 BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 21,
121 BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 22,
122 BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 23,
123 BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 24,
124 BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 25,
125 BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 26,
126 BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 27,
127 BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 28,
128 BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 29,
129 BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 30,
130 BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG = 31,
131 BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG = 32,
132 BNXT_ULP_CF_IDX_ACT_DEC_TTL = 33,
133 BNXT_ULP_CF_IDX_ACT_T_DEC_TTL = 34,
134 BNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 35,
135 BNXT_ULP_CF_IDX_ACT_PORT_TYPE = 36,
136 BNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 37,
137 BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP = 38,
138 BNXT_ULP_CF_IDX_VF_TO_VF = 39,
139 BNXT_ULP_CF_IDX_L3_HDR_CNT = 40,
140 BNXT_ULP_CF_IDX_L4_HDR_CNT = 41,
141 BNXT_ULP_CF_IDX_VFR_MODE = 42,
142 BNXT_ULP_CF_IDX_LOOPBACK_PARIF = 43,
143 BNXT_ULP_CF_IDX_L3_TUN = 44,
144 BNXT_ULP_CF_IDX_L3_TUN_DECAP = 45,
145 BNXT_ULP_CF_IDX_LAST = 46
148 enum bnxt_ulp_cond_list_opc {
149 BNXT_ULP_COND_LIST_OPC_TRUE = 0,
150 BNXT_ULP_COND_LIST_OPC_FALSE = 1,
151 BNXT_ULP_COND_LIST_OPC_OR = 2,
152 BNXT_ULP_COND_LIST_OPC_AND = 3,
153 BNXT_ULP_COND_LIST_OPC_LAST = 4
156 enum bnxt_ulp_cond_opc {
157 BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET = 0,
158 BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET = 1,
159 BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET = 2,
160 BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET = 3,
161 BNXT_ULP_COND_OPC_HDR_BIT_IS_SET = 4,
162 BNXT_ULP_COND_OPC_HDR_BIT_NOT_SET = 5,
163 BNXT_ULP_COND_OPC_FIELD_BIT_IS_SET = 6,
164 BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET = 7,
165 BNXT_ULP_COND_OPC_REGFILE_IS_SET = 8,
166 BNXT_ULP_COND_OPC_REGFILE_NOT_SET = 9,
167 BNXT_ULP_COND_OPC_LAST = 10
170 enum bnxt_ulp_critical_resource {
171 BNXT_ULP_CRITICAL_RESOURCE_NO = 0,
172 BNXT_ULP_CRITICAL_RESOURCE_YES = 1,
173 BNXT_ULP_CRITICAL_RESOURCE_LAST = 2
176 enum bnxt_ulp_device_id {
177 BNXT_ULP_DEVICE_ID_WH_PLUS = 0,
178 BNXT_ULP_DEVICE_ID_THOR = 1,
179 BNXT_ULP_DEVICE_ID_STINGRAY = 2,
180 BNXT_ULP_DEVICE_ID_STINGRAY2 = 3,
181 BNXT_ULP_DEVICE_ID_LAST = 4
184 enum bnxt_ulp_df_param_type {
185 BNXT_ULP_DF_PARAM_TYPE_DEV_PORT_ID = 0,
186 BNXT_ULP_DF_PARAM_TYPE_LAST = 1
189 enum bnxt_ulp_direction {
190 BNXT_ULP_DIRECTION_INGRESS = 0,
191 BNXT_ULP_DIRECTION_EGRESS = 1,
192 BNXT_ULP_DIRECTION_LAST = 2
195 enum bnxt_ulp_fdb_opc {
196 BNXT_ULP_FDB_OPC_PUSH = 0,
197 BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE = 1,
198 BNXT_ULP_FDB_OPC_PUSH_REGFILE = 2,
199 BNXT_ULP_FDB_OPC_NOP = 3,
200 BNXT_ULP_FDB_OPC_LAST = 4
203 enum bnxt_ulp_generic_tbl_opc {
204 BNXT_ULP_GENERIC_TBL_OPC_NOT_USED = 0,
205 BNXT_ULP_GENERIC_TBL_OPC_READ = 1,
206 BNXT_ULP_GENERIC_TBL_OPC_WRITE = 2,
207 BNXT_ULP_GENERIC_TBL_OPC_LAST = 3
210 enum bnxt_ulp_glb_regfile_index {
211 BNXT_ULP_GLB_REGFILE_INDEX_NOT_USED = 0,
212 BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 1,
213 BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR = 2,
214 BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID = 3,
215 BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID = 4,
216 BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR = 5,
217 BNXT_ULP_GLB_REGFILE_INDEX_LAST = 6
220 enum bnxt_ulp_hdr_type {
221 BNXT_ULP_HDR_TYPE_NOT_SUPPORTED = 0,
222 BNXT_ULP_HDR_TYPE_SUPPORTED = 1,
223 BNXT_ULP_HDR_TYPE_END = 2,
224 BNXT_ULP_HDR_TYPE_LAST = 3
227 enum bnxt_ulp_if_tbl_opc {
228 BNXT_ULP_IF_TBL_OPC_NOT_USED = 0,
229 BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD = 1,
230 BNXT_ULP_IF_TBL_OPC_WR_REGFILE = 2,
231 BNXT_ULP_IF_TBL_OPC_WR_CONST = 3,
232 BNXT_ULP_IF_TBL_OPC_RD_COMP_FIELD = 4,
233 BNXT_ULP_IF_TBL_OPC_LAST = 5
236 enum bnxt_ulp_index_tbl_opc {
237 BNXT_ULP_INDEX_TBL_OPC_NOT_USED = 0,
238 BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE = 1,
239 BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE = 2,
240 BNXT_ULP_INDEX_TBL_OPC_SRCH_ALLOC_WR_REGFILE = 3,
241 BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE = 4,
242 BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE = 5,
243 BNXT_ULP_INDEX_TBL_OPC_RD_REGFILE = 6,
244 BNXT_ULP_INDEX_TBL_OPC_LAST = 7
247 enum bnxt_ulp_mapper_opc {
248 BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT = 0,
249 BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD = 1,
250 BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD = 2,
251 BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE = 3,
252 BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE = 4,
253 BNXT_ULP_MAPPER_OPC_SET_TO_ZERO = 5,
254 BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT = 6,
255 BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP = 7,
256 BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8,
257 BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9,
258 BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10,
259 BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11,
260 BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12,
261 BNXT_ULP_MAPPER_OPC_LAST = 13
264 enum bnxt_ulp_mark_db_opc {
265 BNXT_ULP_MARK_DB_OPC_NOP = 0,
266 BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION = 1,
267 BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG = 2,
268 BNXT_ULP_MARK_DB_OPC_LAST = 3
271 enum bnxt_ulp_match_type {
272 BNXT_ULP_MATCH_TYPE_EM = 0,
273 BNXT_ULP_MATCH_TYPE_WM = 1,
274 BNXT_ULP_MATCH_TYPE_LAST = 2
277 enum bnxt_ulp_mem_type_opc {
278 BNXT_ULP_MEM_TYPE_OPC_NOP = 0,
279 BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT = 1,
280 BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT = 2,
281 BNXT_ULP_MEM_TYPE_OPC_LAST = 3
284 enum bnxt_ulp_pri_opc {
285 BNXT_ULP_PRI_OPC_NOT_USED = 0,
286 BNXT_ULP_PRI_OPC_CONST = 1,
287 BNXT_ULP_PRI_OPC_APP_PRI = 2,
288 BNXT_ULP_PRI_OPC_LAST = 3
291 enum bnxt_ulp_regfile_index {
292 BNXT_ULP_REGFILE_INDEX_NOT_USED = 0,
293 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1,
294 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2,
295 BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3,
296 BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4,
297 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5,
298 BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6,
299 BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7,
300 BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8,
301 BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 9,
302 BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10,
303 BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11,
304 BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12,
305 BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13,
306 BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 14,
307 BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 15,
308 BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 16,
309 BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 17,
310 BNXT_ULP_REGFILE_INDEX_ACTION_REC_SIZE = 18,
311 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0 = 19,
312 BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_1 = 20,
313 BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0 = 21,
314 BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_1 = 22,
315 BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_0 = 23,
316 BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_1 = 24,
317 BNXT_ULP_REGFILE_INDEX_SRC_PROPERTY_PTR = 25,
318 BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT = 26,
319 BNXT_ULP_REGFILE_INDEX_MIRROR_PTR_0 = 27,
320 BNXT_ULP_REGFILE_INDEX_CLASS_TID = 28,
321 BNXT_ULP_REGFILE_INDEX_FID = 29,
322 BNXT_ULP_REGFILE_INDEX_LAST = 30
325 enum bnxt_ulp_tcam_tbl_opc {
326 BNXT_ULP_TCAM_TBL_OPC_NOT_USED = 0,
327 BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE = 1,
328 BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE = 2,
329 BNXT_ULP_TCAM_TBL_OPC_LAST = 3
332 enum bnxt_ulp_template_type {
333 BNXT_ULP_TEMPLATE_TYPE_CLASS = 0,
334 BNXT_ULP_TEMPLATE_TYPE_ACTION = 1,
335 BNXT_ULP_TEMPLATE_TYPE_LAST = 2
338 enum bnxt_ulp_fdb_resource_flags {
339 BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_INGR = 0x00,
340 BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_EGR = 0x01
343 enum bnxt_ulp_fdb_type {
344 BNXT_ULP_FDB_TYPE_REGULAR = 0,
345 BNXT_ULP_FDB_TYPE_DEFAULT = 1
348 enum bnxt_ulp_flow_dir_bitmask {
349 BNXT_ULP_FLOW_DIR_BITMASK_ING = 0x0000000000000000,
350 BNXT_ULP_FLOW_DIR_BITMASK_EGR = 0x8000000000000000
353 enum bnxt_ulp_match_type_bitmask {
354 BNXT_ULP_MATCH_TYPE_BITMASK_EM = 0x0000000000000000,
355 BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x0000000000000001
358 enum bnxt_ulp_resource_func {
359 BNXT_ULP_RESOURCE_FUNC_INVALID = 0x00,
360 BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE = 0x20,
361 BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE = 0x40,
362 BNXT_ULP_RESOURCE_FUNC_RSVD2 = 0x60,
363 BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE = 0x80,
364 BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE = 0x81,
365 BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE = 0x82,
366 BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83,
367 BNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84,
368 BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85,
369 BNXT_ULP_RESOURCE_FUNC_SHARED_TABLE = 0x86,
370 BNXT_ULP_RESOURCE_FUNC_PARENT_FLOW = 0x87,
371 BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW = 0x88
374 enum bnxt_ulp_resource_sub_type {
375 BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED = 0,
376 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL = 0,
377 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION = 1,
378 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT = 2,
379 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC = 3,
380 BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_EXT_COUNT = 4,
381 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM = 0,
382 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM = 1,
383 BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL = 2
387 BNXT_ULP_SYM_PKT_TYPE_IGNORE = 0,
388 BNXT_ULP_SYM_PKT_TYPE_L2 = 0,
389 BNXT_ULP_SYM_PKT_TYPE_0_IGNORE = 0,
390 BNXT_ULP_SYM_PKT_TYPE_0_L2 = 0,
391 BNXT_ULP_SYM_PKT_TYPE_1_IGNORE = 0,
392 BNXT_ULP_SYM_PKT_TYPE_1_L2 = 0,
393 BNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0,
394 BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0,
395 BNXT_ULP_SYM_RECYCLE_CNT_ONE = 1,
396 BNXT_ULP_SYM_RECYCLE_CNT_TWO = 2,
397 BNXT_ULP_SYM_RECYCLE_CNT_THREE = 3,
398 BNXT_ULP_SYM_AGG_ERROR_IGNORE = 0,
399 BNXT_ULP_SYM_AGG_ERROR_NO = 0,
400 BNXT_ULP_SYM_AGG_ERROR_YES = 1,
401 BNXT_ULP_SYM_RESERVED_IGNORE = 0,
402 BNXT_ULP_SYM_HREC_NEXT_IGNORE = 0,
403 BNXT_ULP_SYM_HREC_NEXT_NO = 0,
404 BNXT_ULP_SYM_HREC_NEXT_YES = 1,
405 BNXT_ULP_SYM_TL2_HDR_VALID_IGNORE = 0,
406 BNXT_ULP_SYM_TL2_HDR_VALID_NO = 0,
407 BNXT_ULP_SYM_TL2_HDR_VALID_YES = 1,
408 BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0,
409 BNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,
410 BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE = 0,
411 BNXT_ULP_SYM_TL2_UC_MC_BC_UC = 0,
412 BNXT_ULP_SYM_TL2_UC_MC_BC_MC = 2,
413 BNXT_ULP_SYM_TL2_UC_MC_BC_BC = 3,
414 BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE = 0,
415 BNXT_ULP_SYM_TL2_VTAG_PRESENT_NO = 0,
416 BNXT_ULP_SYM_TL2_VTAG_PRESENT_YES = 1,
417 BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE = 0,
418 BNXT_ULP_SYM_TL2_TWO_VTAGS_NO = 0,
419 BNXT_ULP_SYM_TL2_TWO_VTAGS_YES = 1,
420 BNXT_ULP_SYM_TL3_HDR_VALID_IGNORE = 0,
421 BNXT_ULP_SYM_TL3_HDR_VALID_NO = 0,
422 BNXT_ULP_SYM_TL3_HDR_VALID_YES = 1,
423 BNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE = 0,
424 BNXT_ULP_SYM_TL3_HDR_ERROR_NO = 0,
425 BNXT_ULP_SYM_TL3_HDR_ERROR_YES = 1,
426 BNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE = 0,
427 BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0,
428 BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1,
429 BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE = 0,
430 BNXT_ULP_SYM_TL3_HDR_ISIP_NO = 0,
431 BNXT_ULP_SYM_TL3_HDR_ISIP_YES = 1,
432 BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0,
433 BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_NO = 0,
434 BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_YES = 1,
435 BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE = 0,
436 BNXT_ULP_SYM_TL3_IPV6_CMP_DST_NO = 0,
437 BNXT_ULP_SYM_TL3_IPV6_CMP_DST_YES = 1,
438 BNXT_ULP_SYM_TL4_HDR_VALID_IGNORE = 0,
439 BNXT_ULP_SYM_TL4_HDR_VALID_NO = 0,
440 BNXT_ULP_SYM_TL4_HDR_VALID_YES = 1,
441 BNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE = 0,
442 BNXT_ULP_SYM_TL4_HDR_ERROR_NO = 0,
443 BNXT_ULP_SYM_TL4_HDR_ERROR_YES = 1,
444 BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0,
445 BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_NO = 0,
446 BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_YES = 1,
447 BNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE = 0,
448 BNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0,
449 BNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1,
450 BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0,
451 BNXT_ULP_SYM_TUN_HDR_VALID_NO = 0,
452 BNXT_ULP_SYM_TUN_HDR_VALID_YES = 1,
453 BNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE = 0,
454 BNXT_ULP_SYM_TUN_HDR_ERROR_NO = 0,
455 BNXT_ULP_SYM_TUN_HDR_ERROR_YES = 1,
456 BNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE = 0,
457 BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0,
458 BNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1,
459 BNXT_ULP_SYM_TUN_HDR_TYPE_NVGRE = 2,
460 BNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3,
461 BNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4,
462 BNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5,
463 BNXT_ULP_SYM_TUN_HDR_TYPE_PPPOE = 6,
464 BNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7,
465 BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8,
466 BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9,
467 BNXT_ULP_SYM_TUN_HDR_TYPE_NONE = 15,
468 BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE = 0,
469 BNXT_ULP_SYM_L2_HDR_VALID_IGNORE = 0,
470 BNXT_ULP_SYM_L2_HDR_VALID_NO = 0,
471 BNXT_ULP_SYM_L2_HDR_VALID_YES = 1,
472 BNXT_ULP_SYM_L2_HDR_ERROR_IGNORE = 0,
473 BNXT_ULP_SYM_L2_HDR_ERROR_NO = 0,
474 BNXT_ULP_SYM_L2_HDR_ERROR_YES = 1,
475 BNXT_ULP_SYM_L2_HDR_TYPE_IGNORE = 0,
476 BNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0,
477 BNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1,
478 BNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2,
479 BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE = 0,
480 BNXT_ULP_SYM_L2_UC_MC_BC_UC = 0,
481 BNXT_ULP_SYM_L2_UC_MC_BC_MC = 2,
482 BNXT_ULP_SYM_L2_UC_MC_BC_BC = 3,
483 BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE = 0,
484 BNXT_ULP_SYM_L2_VTAG_PRESENT_NO = 0,
485 BNXT_ULP_SYM_L2_VTAG_PRESENT_YES = 1,
486 BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE = 0,
487 BNXT_ULP_SYM_L2_TWO_VTAGS_NO = 0,
488 BNXT_ULP_SYM_L2_TWO_VTAGS_YES = 1,
489 BNXT_ULP_SYM_L3_HDR_VALID_IGNORE = 0,
490 BNXT_ULP_SYM_L3_HDR_VALID_NO = 0,
491 BNXT_ULP_SYM_L3_HDR_VALID_YES = 1,
492 BNXT_ULP_SYM_L3_HDR_ERROR_IGNORE = 0,
493 BNXT_ULP_SYM_L3_HDR_ERROR_NO = 0,
494 BNXT_ULP_SYM_L3_HDR_ERROR_YES = 1,
495 BNXT_ULP_SYM_L3_HDR_TYPE_IGNORE = 0,
496 BNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0,
497 BNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1,
498 BNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2,
499 BNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3,
500 BNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4,
501 BNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5,
502 BNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6,
503 BNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7,
504 BNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8,
505 BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE = 0,
506 BNXT_ULP_SYM_L3_HDR_ISIP_NO = 0,
507 BNXT_ULP_SYM_L3_HDR_ISIP_YES = 1,
508 BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE = 0,
509 BNXT_ULP_SYM_L3_IPV6_CMP_SRC_NO = 0,
510 BNXT_ULP_SYM_L3_IPV6_CMP_SRC_YES = 1,
511 BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE = 0,
512 BNXT_ULP_SYM_L3_IPV6_CMP_DST_NO = 0,
513 BNXT_ULP_SYM_L3_IPV6_CMP_DST_YES = 1,
514 BNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0,
515 BNXT_ULP_SYM_L4_HDR_VALID_NO = 0,
516 BNXT_ULP_SYM_L4_HDR_VALID_YES = 1,
517 BNXT_ULP_SYM_L4_HDR_ERROR_IGNORE = 0,
518 BNXT_ULP_SYM_L4_HDR_ERROR_NO = 0,
519 BNXT_ULP_SYM_L4_HDR_ERROR_YES = 1,
520 BNXT_ULP_SYM_L4_HDR_TYPE_IGNORE = 0,
521 BNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0,
522 BNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1,
523 BNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2,
524 BNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3,
525 BNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4,
526 BNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5,
527 BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0,
528 BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_NO = 0,
529 BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_YES = 1,
530 BNXT_ULP_SYM_POP_VLAN_NO = 0,
531 BNXT_ULP_SYM_POP_VLAN_YES = 1,
532 BNXT_ULP_SYM_DECAP_FUNC_NONE = 0,
533 BNXT_ULP_SYM_DECAP_FUNC_THRU_TL2 = 3,
534 BNXT_ULP_SYM_DECAP_FUNC_THRU_TL3 = 8,
535 BNXT_ULP_SYM_DECAP_FUNC_THRU_TL4 = 9,
536 BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN = 10,
537 BNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,
538 BNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12,
539 BNXT_ULP_SYM_DECAP_FUNC_THRU_L4 = 13,
540 BNXT_ULP_SYM_ECV_VALID_NO = 0,
541 BNXT_ULP_SYM_ECV_VALID_YES = 1,
542 BNXT_ULP_SYM_ECV_CUSTOM_EN_NO = 0,
543 BNXT_ULP_SYM_ECV_CUSTOM_EN_YES = 1,
544 BNXT_ULP_SYM_ECV_L2_EN_NO = 0,
545 BNXT_ULP_SYM_ECV_L2_EN_YES = 1,
546 BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP = 0,
547 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1,
548 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2,
549 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3,
550 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4,
551 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5,
552 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6,
553 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7,
554 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8,
555 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8,
556 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8,
557 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8,
558 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8,
559 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8,
560 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8,
561 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8,
562 BNXT_ULP_SYM_ECV_L3_TYPE_NONE = 0,
563 BNXT_ULP_SYM_ECV_L3_TYPE_IPV4 = 4,
564 BNXT_ULP_SYM_ECV_L3_TYPE_IPV6 = 5,
565 BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8847 = 6,
566 BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8848 = 7,
567 BNXT_ULP_SYM_ECV_L4_TYPE_NONE = 0,
568 BNXT_ULP_SYM_ECV_L4_TYPE_UDP = 4,
569 BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM = 5,
570 BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,
571 BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,
572 BNXT_ULP_SYM_ECV_TUN_TYPE_NONE = 0,
573 BNXT_ULP_SYM_ECV_TUN_TYPE_GENERIC = 1,
574 BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2,
575 BNXT_ULP_SYM_ECV_TUN_TYPE_NGE = 3,
576 BNXT_ULP_SYM_ECV_TUN_TYPE_NVGRE = 4,
577 BNXT_ULP_SYM_ECV_TUN_TYPE_GRE = 5,
578 BNXT_ULP_SYM_WH_PLUS_INT_ACT_REC = 1,
579 BNXT_ULP_SYM_WH_PLUS_EXT_ACT_REC = 0,
580 BNXT_ULP_SYM_WH_PLUS_UC_ACT_REC = 0,
581 BNXT_ULP_SYM_WH_PLUS_MC_ACT_REC = 1,
582 BNXT_ULP_SYM_ACT_REC_DROP_YES = 1,
583 BNXT_ULP_SYM_ACT_REC_DROP_NO = 0,
584 BNXT_ULP_SYM_ACT_REC_POP_VLAN_YES = 1,
585 BNXT_ULP_SYM_ACT_REC_POP_VLAN_NO = 0,
586 BNXT_ULP_SYM_ACT_REC_METER_EN_YES = 1,
587 BNXT_ULP_SYM_ACT_REC_METER_EN_NO = 0,
588 BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 4,
589 BNXT_ULP_SYM_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448,
590 BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 16,
591 BNXT_ULP_SYM_STINGRAY_EXT_EM_MAX_KEY_SIZE = 448,
592 BNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3,
593 BNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3,
594 BNXT_ULP_SYM_MATCH_TYPE_EM = 0,
595 BNXT_ULP_SYM_MATCH_TYPE_WM = 1,
596 BNXT_ULP_SYM_IP_PROTO_ICMP = 1,
597 BNXT_ULP_SYM_IP_PROTO_IGMP = 2,
598 BNXT_ULP_SYM_IP_PROTO_IP_IN_IP = 4,
599 BNXT_ULP_SYM_IP_PROTO_TCP = 6,
600 BNXT_ULP_SYM_IP_PROTO_UDP = 17,
601 BNXT_ULP_SYM_VF_FUNC_PARIF = 15,
603 BNXT_ULP_SYM_YES = 1,
604 BNXT_ULP_SYM_RECYCLE_DST = 0x800
607 enum bnxt_ulp_wh_plus {
608 BNXT_ULP_WH_PLUS_LOOPBACK_PORT = 4,
609 BNXT_ULP_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448
612 enum bnxt_ulp_act_prop_sz {
613 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ = 4,
614 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ = 4,
615 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ = 4,
616 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE = 4,
617 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM = 4,
618 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE = 4,
619 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM = 4,
620 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM = 4,
621 BNXT_ULP_ACT_PROP_SZ_PORT_ID = 4,
622 BNXT_ULP_ACT_PROP_SZ_VNIC = 4,
623 BNXT_ULP_ACT_PROP_SZ_VPORT = 4,
624 BNXT_ULP_ACT_PROP_SZ_MARK = 4,
625 BNXT_ULP_ACT_PROP_SZ_COUNT = 4,
626 BNXT_ULP_ACT_PROP_SZ_METER = 4,
627 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC = 8,
628 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST = 8,
629 BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN = 2,
630 BNXT_ULP_ACT_PROP_SZ_SET_VLAN_PCP = 1,
631 BNXT_ULP_ACT_PROP_SZ_SET_VLAN_VID = 2,
632 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC = 4,
633 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST = 4,
634 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC = 16,
635 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST = 16,
636 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC = 2,
637 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST = 2,
638 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0 = 4,
639 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1 = 4,
640 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2 = 4,
641 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3 = 4,
642 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4 = 4,
643 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5 = 4,
644 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6 = 4,
645 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7 = 4,
646 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC = 6,
647 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC = 6,
648 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG = 8,
649 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP = 32,
650 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC = 16,
651 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4,
652 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32,
653 BNXT_ULP_ACT_PROP_SZ_JUMP = 4,
654 BNXT_ULP_ACT_PROP_SZ_LAST = 4
657 enum bnxt_ulp_act_prop_idx {
658 BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ = 0,
659 BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ = 4,
660 BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ = 8,
661 BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE = 12,
662 BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM = 16,
663 BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE = 20,
664 BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM = 24,
665 BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM = 28,
666 BNXT_ULP_ACT_PROP_IDX_PORT_ID = 32,
667 BNXT_ULP_ACT_PROP_IDX_VNIC = 36,
668 BNXT_ULP_ACT_PROP_IDX_VPORT = 40,
669 BNXT_ULP_ACT_PROP_IDX_MARK = 44,
670 BNXT_ULP_ACT_PROP_IDX_COUNT = 48,
671 BNXT_ULP_ACT_PROP_IDX_METER = 52,
672 BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC = 56,
673 BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST = 64,
674 BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN = 72,
675 BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP = 74,
676 BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID = 75,
677 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC = 77,
678 BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST = 81,
679 BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC = 85,
680 BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST = 101,
681 BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC = 117,
682 BNXT_ULP_ACT_PROP_IDX_SET_TP_DST = 119,
683 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0 = 121,
684 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1 = 125,
685 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2 = 129,
686 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3 = 133,
687 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4 = 137,
688 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5 = 141,
689 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6 = 145,
690 BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7 = 149,
691 BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC = 153,
692 BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC = 159,
693 BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG = 165,
694 BNXT_ULP_ACT_PROP_IDX_ENCAP_IP = 173,
695 BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 205,
696 BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 221,
697 BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 225,
698 BNXT_ULP_ACT_PROP_IDX_JUMP = 257,
699 BNXT_ULP_ACT_PROP_IDX_LAST = 261
702 enum bnxt_ulp_class_hid {
703 BNXT_ULP_CLASS_HID_0138 = 0x0138,
704 BNXT_ULP_CLASS_HID_03f0 = 0x03f0,
705 BNXT_ULP_CLASS_HID_0139 = 0x0139,
706 BNXT_ULP_CLASS_HID_03f1 = 0x03f1,
707 BNXT_ULP_CLASS_HID_068b = 0x068b,
708 BNXT_ULP_CLASS_HID_0143 = 0x0143,
709 BNXT_ULP_CLASS_HID_0118 = 0x0118,
710 BNXT_ULP_CLASS_HID_03d0 = 0x03d0,
711 BNXT_ULP_CLASS_HID_0119 = 0x0119,
712 BNXT_ULP_CLASS_HID_03d1 = 0x03d1,
713 BNXT_ULP_CLASS_HID_06ab = 0x06ab,
714 BNXT_ULP_CLASS_HID_0163 = 0x0163,
715 BNXT_ULP_CLASS_HID_0128 = 0x0128,
716 BNXT_ULP_CLASS_HID_03e0 = 0x03e0,
717 BNXT_ULP_CLASS_HID_0129 = 0x0129,
718 BNXT_ULP_CLASS_HID_03e1 = 0x03e1,
719 BNXT_ULP_CLASS_HID_069b = 0x069b,
720 BNXT_ULP_CLASS_HID_0153 = 0x0153,
721 BNXT_ULP_CLASS_HID_0134 = 0x0134,
722 BNXT_ULP_CLASS_HID_03fc = 0x03fc,
723 BNXT_ULP_CLASS_HID_0135 = 0x0135,
724 BNXT_ULP_CLASS_HID_03fd = 0x03fd,
725 BNXT_ULP_CLASS_HID_0687 = 0x0687,
726 BNXT_ULP_CLASS_HID_014f = 0x014f,
727 BNXT_ULP_CLASS_HID_0114 = 0x0114,
728 BNXT_ULP_CLASS_HID_03dc = 0x03dc,
729 BNXT_ULP_CLASS_HID_0115 = 0x0115,
730 BNXT_ULP_CLASS_HID_03dd = 0x03dd,
731 BNXT_ULP_CLASS_HID_06a7 = 0x06a7,
732 BNXT_ULP_CLASS_HID_016f = 0x016f,
733 BNXT_ULP_CLASS_HID_0124 = 0x0124,
734 BNXT_ULP_CLASS_HID_03ec = 0x03ec,
735 BNXT_ULP_CLASS_HID_0125 = 0x0125,
736 BNXT_ULP_CLASS_HID_03ed = 0x03ed,
737 BNXT_ULP_CLASS_HID_0697 = 0x0697,
738 BNXT_ULP_CLASS_HID_015f = 0x015f,
739 BNXT_ULP_CLASS_HID_0452 = 0x0452,
740 BNXT_ULP_CLASS_HID_0528 = 0x0528,
741 BNXT_ULP_CLASS_HID_0790 = 0x0790,
742 BNXT_ULP_CLASS_HID_046e = 0x046e,
743 BNXT_ULP_CLASS_HID_0462 = 0x0462,
744 BNXT_ULP_CLASS_HID_0518 = 0x0518,
745 BNXT_ULP_CLASS_HID_07a0 = 0x07a0,
746 BNXT_ULP_CLASS_HID_045e = 0x045e,
747 BNXT_ULP_CLASS_HID_0228 = 0x0228,
748 BNXT_ULP_CLASS_HID_06d0 = 0x06d0,
749 BNXT_ULP_CLASS_HID_02be = 0x02be,
750 BNXT_ULP_CLASS_HID_07a6 = 0x07a6,
751 BNXT_ULP_CLASS_HID_0218 = 0x0218,
752 BNXT_ULP_CLASS_HID_06e0 = 0x06e0,
753 BNXT_ULP_CLASS_HID_028e = 0x028e,
754 BNXT_ULP_CLASS_HID_0796 = 0x0796,
755 BNXT_ULP_CLASS_HID_079c = 0x079c,
756 BNXT_ULP_CLASS_HID_0654 = 0x0654,
757 BNXT_ULP_CLASS_HID_06d2 = 0x06d2,
758 BNXT_ULP_CLASS_HID_058a = 0x058a,
759 BNXT_ULP_CLASS_HID_052f = 0x052f,
760 BNXT_ULP_CLASS_HID_07e7 = 0x07e7,
761 BNXT_ULP_CLASS_HID_079d = 0x079d,
762 BNXT_ULP_CLASS_HID_0655 = 0x0655,
763 BNXT_ULP_CLASS_HID_046d = 0x046d,
764 BNXT_ULP_CLASS_HID_0725 = 0x0725,
765 BNXT_ULP_CLASS_HID_06d3 = 0x06d3,
766 BNXT_ULP_CLASS_HID_058b = 0x058b,
767 BNXT_ULP_CLASS_HID_07ac = 0x07ac,
768 BNXT_ULP_CLASS_HID_0664 = 0x0664,
769 BNXT_ULP_CLASS_HID_06e2 = 0x06e2,
770 BNXT_ULP_CLASS_HID_05ba = 0x05ba,
771 BNXT_ULP_CLASS_HID_051f = 0x051f,
772 BNXT_ULP_CLASS_HID_07d7 = 0x07d7,
773 BNXT_ULP_CLASS_HID_07ad = 0x07ad,
774 BNXT_ULP_CLASS_HID_0665 = 0x0665,
775 BNXT_ULP_CLASS_HID_045d = 0x045d,
776 BNXT_ULP_CLASS_HID_0715 = 0x0715,
777 BNXT_ULP_CLASS_HID_06e3 = 0x06e3,
778 BNXT_ULP_CLASS_HID_05bb = 0x05bb,
779 BNXT_ULP_CLASS_HID_016a = 0x016a,
780 BNXT_ULP_CLASS_HID_03d2 = 0x03d2,
781 BNXT_ULP_CLASS_HID_0612 = 0x0612,
782 BNXT_ULP_CLASS_HID_00da = 0x00da,
783 BNXT_ULP_CLASS_HID_06bd = 0x06bd,
784 BNXT_ULP_CLASS_HID_0165 = 0x0165,
785 BNXT_ULP_CLASS_HID_016b = 0x016b,
786 BNXT_ULP_CLASS_HID_03d3 = 0x03d3,
787 BNXT_ULP_CLASS_HID_03a5 = 0x03a5,
788 BNXT_ULP_CLASS_HID_066d = 0x066d,
789 BNXT_ULP_CLASS_HID_0613 = 0x0613,
790 BNXT_ULP_CLASS_HID_00db = 0x00db,
791 BNXT_ULP_CLASS_HID_015a = 0x015a,
792 BNXT_ULP_CLASS_HID_03e2 = 0x03e2,
793 BNXT_ULP_CLASS_HID_0622 = 0x0622,
794 BNXT_ULP_CLASS_HID_00ea = 0x00ea,
795 BNXT_ULP_CLASS_HID_068d = 0x068d,
796 BNXT_ULP_CLASS_HID_0155 = 0x0155,
797 BNXT_ULP_CLASS_HID_015b = 0x015b,
798 BNXT_ULP_CLASS_HID_03e3 = 0x03e3,
799 BNXT_ULP_CLASS_HID_0395 = 0x0395,
800 BNXT_ULP_CLASS_HID_065d = 0x065d,
801 BNXT_ULP_CLASS_HID_0623 = 0x0623,
802 BNXT_ULP_CLASS_HID_00eb = 0x00eb,
803 BNXT_ULP_CLASS_HID_04bc = 0x04bc,
804 BNXT_ULP_CLASS_HID_0442 = 0x0442,
805 BNXT_ULP_CLASS_HID_050a = 0x050a,
806 BNXT_ULP_CLASS_HID_06ba = 0x06ba,
807 BNXT_ULP_CLASS_HID_0472 = 0x0472,
808 BNXT_ULP_CLASS_HID_0700 = 0x0700,
809 BNXT_ULP_CLASS_HID_04c8 = 0x04c8,
810 BNXT_ULP_CLASS_HID_0678 = 0x0678,
811 BNXT_ULP_CLASS_HID_061f = 0x061f,
812 BNXT_ULP_CLASS_HID_05ad = 0x05ad,
813 BNXT_ULP_CLASS_HID_06a5 = 0x06a5,
814 BNXT_ULP_CLASS_HID_0455 = 0x0455,
815 BNXT_ULP_CLASS_HID_05dd = 0x05dd,
816 BNXT_ULP_CLASS_HID_0563 = 0x0563,
817 BNXT_ULP_CLASS_HID_059b = 0x059b,
818 BNXT_ULP_CLASS_HID_070b = 0x070b,
819 BNXT_ULP_CLASS_HID_04bd = 0x04bd,
820 BNXT_ULP_CLASS_HID_0443 = 0x0443,
821 BNXT_ULP_CLASS_HID_050b = 0x050b,
822 BNXT_ULP_CLASS_HID_06bb = 0x06bb,
823 BNXT_ULP_CLASS_HID_0473 = 0x0473,
824 BNXT_ULP_CLASS_HID_0701 = 0x0701,
825 BNXT_ULP_CLASS_HID_04c9 = 0x04c9,
826 BNXT_ULP_CLASS_HID_0679 = 0x0679,
827 BNXT_ULP_CLASS_HID_05e2 = 0x05e2,
828 BNXT_ULP_CLASS_HID_00b0 = 0x00b0,
829 BNXT_ULP_CLASS_HID_0648 = 0x0648,
830 BNXT_ULP_CLASS_HID_03f8 = 0x03f8,
831 BNXT_ULP_CLASS_HID_02ea = 0x02ea,
832 BNXT_ULP_CLASS_HID_05b8 = 0x05b8,
833 BNXT_ULP_CLASS_HID_0370 = 0x0370,
834 BNXT_ULP_CLASS_HID_00e0 = 0x00e0,
835 BNXT_ULP_CLASS_HID_0745 = 0x0745,
836 BNXT_ULP_CLASS_HID_0213 = 0x0213,
837 BNXT_ULP_CLASS_HID_031b = 0x031b,
838 BNXT_ULP_CLASS_HID_008b = 0x008b,
839 BNXT_ULP_CLASS_HID_044d = 0x044d,
840 BNXT_ULP_CLASS_HID_071b = 0x071b,
841 BNXT_ULP_CLASS_HID_0003 = 0x0003,
842 BNXT_ULP_CLASS_HID_05b3 = 0x05b3,
843 BNXT_ULP_CLASS_HID_05e3 = 0x05e3,
844 BNXT_ULP_CLASS_HID_00b1 = 0x00b1,
845 BNXT_ULP_CLASS_HID_0649 = 0x0649,
846 BNXT_ULP_CLASS_HID_03f9 = 0x03f9,
847 BNXT_ULP_CLASS_HID_02eb = 0x02eb,
848 BNXT_ULP_CLASS_HID_05b9 = 0x05b9,
849 BNXT_ULP_CLASS_HID_0371 = 0x0371,
850 BNXT_ULP_CLASS_HID_00e1 = 0x00e1,
851 BNXT_ULP_CLASS_HID_0000 = 0x0000,
852 BNXT_ULP_CLASS_HID_00ce = 0x00ce,
853 BNXT_ULP_CLASS_HID_01b6 = 0x01b6,
854 BNXT_ULP_CLASS_HID_0074 = 0x0074,
855 BNXT_ULP_CLASS_HID_00fe = 0x00fe,
856 BNXT_ULP_CLASS_HID_03bc = 0x03bc,
857 BNXT_ULP_CLASS_HID_0206 = 0x0206,
858 BNXT_ULP_CLASS_HID_02c4 = 0x02c4,
859 BNXT_ULP_CLASS_HID_055a = 0x055a,
860 BNXT_ULP_CLASS_HID_045a = 0x045a,
861 BNXT_ULP_CLASS_HID_061a = 0x061a,
862 BNXT_ULP_CLASS_HID_051a = 0x051a,
863 BNXT_ULP_CLASS_HID_074a = 0x074a,
864 BNXT_ULP_CLASS_HID_004e = 0x004e,
865 BNXT_ULP_CLASS_HID_040a = 0x040a,
866 BNXT_ULP_CLASS_HID_010e = 0x010e,
867 BNXT_ULP_CLASS_HID_048b = 0x048b,
868 BNXT_ULP_CLASS_HID_0749 = 0x0749,
869 BNXT_ULP_CLASS_HID_05f1 = 0x05f1,
870 BNXT_ULP_CLASS_HID_04b7 = 0x04b7,
871 BNXT_ULP_CLASS_HID_049b = 0x049b,
872 BNXT_ULP_CLASS_HID_0759 = 0x0759,
873 BNXT_ULP_CLASS_HID_05e1 = 0x05e1,
874 BNXT_ULP_CLASS_HID_04a7 = 0x04a7,
875 BNXT_ULP_CLASS_HID_0301 = 0x0301,
876 BNXT_ULP_CLASS_HID_07f9 = 0x07f9,
877 BNXT_ULP_CLASS_HID_0397 = 0x0397,
878 BNXT_ULP_CLASS_HID_068f = 0x068f,
879 BNXT_ULP_CLASS_HID_02f1 = 0x02f1,
880 BNXT_ULP_CLASS_HID_0609 = 0x0609,
881 BNXT_ULP_CLASS_HID_0267 = 0x0267,
882 BNXT_ULP_CLASS_HID_077f = 0x077f,
883 BNXT_ULP_CLASS_HID_01e1 = 0x01e1,
884 BNXT_ULP_CLASS_HID_0329 = 0x0329,
885 BNXT_ULP_CLASS_HID_01c1 = 0x01c1,
886 BNXT_ULP_CLASS_HID_0309 = 0x0309,
887 BNXT_ULP_CLASS_HID_01d1 = 0x01d1,
888 BNXT_ULP_CLASS_HID_0319 = 0x0319,
889 BNXT_ULP_CLASS_HID_01e2 = 0x01e2,
890 BNXT_ULP_CLASS_HID_032a = 0x032a,
891 BNXT_ULP_CLASS_HID_0650 = 0x0650,
892 BNXT_ULP_CLASS_HID_0198 = 0x0198,
893 BNXT_ULP_CLASS_HID_01c2 = 0x01c2,
894 BNXT_ULP_CLASS_HID_030a = 0x030a,
895 BNXT_ULP_CLASS_HID_0670 = 0x0670,
896 BNXT_ULP_CLASS_HID_01b8 = 0x01b8,
897 BNXT_ULP_CLASS_HID_01d2 = 0x01d2,
898 BNXT_ULP_CLASS_HID_031a = 0x031a,
899 BNXT_ULP_CLASS_HID_0660 = 0x0660,
900 BNXT_ULP_CLASS_HID_01a8 = 0x01a8,
901 BNXT_ULP_CLASS_HID_01dd = 0x01dd,
902 BNXT_ULP_CLASS_HID_0315 = 0x0315,
903 BNXT_ULP_CLASS_HID_003d = 0x003d,
904 BNXT_ULP_CLASS_HID_02f5 = 0x02f5,
905 BNXT_ULP_CLASS_HID_01cd = 0x01cd,
906 BNXT_ULP_CLASS_HID_0305 = 0x0305,
907 BNXT_ULP_CLASS_HID_01de = 0x01de,
908 BNXT_ULP_CLASS_HID_0316 = 0x0316,
909 BNXT_ULP_CLASS_HID_066c = 0x066c,
910 BNXT_ULP_CLASS_HID_01a4 = 0x01a4,
911 BNXT_ULP_CLASS_HID_003e = 0x003e,
912 BNXT_ULP_CLASS_HID_02f6 = 0x02f6,
913 BNXT_ULP_CLASS_HID_078c = 0x078c,
914 BNXT_ULP_CLASS_HID_0044 = 0x0044,
915 BNXT_ULP_CLASS_HID_01ce = 0x01ce,
916 BNXT_ULP_CLASS_HID_0306 = 0x0306,
917 BNXT_ULP_CLASS_HID_067c = 0x067c,
918 BNXT_ULP_CLASS_HID_01b4 = 0x01b4
921 enum bnxt_ulp_act_hid {
922 BNXT_ULP_ACT_HID_015a = 0x015a,
923 BNXT_ULP_ACT_HID_00eb = 0x00eb,
924 BNXT_ULP_ACT_HID_0043 = 0x0043,
925 BNXT_ULP_ACT_HID_03d8 = 0x03d8,
926 BNXT_ULP_ACT_HID_02c1 = 0x02c1,
927 BNXT_ULP_ACT_HID_015e = 0x015e,
928 BNXT_ULP_ACT_HID_00ef = 0x00ef,
929 BNXT_ULP_ACT_HID_0047 = 0x0047,
930 BNXT_ULP_ACT_HID_03dc = 0x03dc,
931 BNXT_ULP_ACT_HID_02c5 = 0x02c5,
932 BNXT_ULP_ACT_HID_025b = 0x025b,
933 BNXT_ULP_ACT_HID_01ec = 0x01ec,
934 BNXT_ULP_ACT_HID_0144 = 0x0144,
935 BNXT_ULP_ACT_HID_04d9 = 0x04d9,
936 BNXT_ULP_ACT_HID_03c2 = 0x03c2,
937 BNXT_ULP_ACT_HID_025f = 0x025f,
938 BNXT_ULP_ACT_HID_01f0 = 0x01f0,
939 BNXT_ULP_ACT_HID_0148 = 0x0148,
940 BNXT_ULP_ACT_HID_04dd = 0x04dd,
941 BNXT_ULP_ACT_HID_03c6 = 0x03c6,
942 BNXT_ULP_ACT_HID_0000 = 0x0000,
943 BNXT_ULP_ACT_HID_0002 = 0x0002,
944 BNXT_ULP_ACT_HID_0800 = 0x0800,
945 BNXT_ULP_ACT_HID_0101 = 0x0101,
946 BNXT_ULP_ACT_HID_0020 = 0x0020,
947 BNXT_ULP_ACT_HID_0901 = 0x0901,
948 BNXT_ULP_ACT_HID_0121 = 0x0121,
949 BNXT_ULP_ACT_HID_0004 = 0x0004,
950 BNXT_ULP_ACT_HID_0006 = 0x0006,
951 BNXT_ULP_ACT_HID_0804 = 0x0804,
952 BNXT_ULP_ACT_HID_0105 = 0x0105,
953 BNXT_ULP_ACT_HID_0024 = 0x0024,
954 BNXT_ULP_ACT_HID_0905 = 0x0905,
955 BNXT_ULP_ACT_HID_0125 = 0x0125,
956 BNXT_ULP_ACT_HID_0001 = 0x0001,
957 BNXT_ULP_ACT_HID_0005 = 0x0005,
958 BNXT_ULP_ACT_HID_0009 = 0x0009,
959 BNXT_ULP_ACT_HID_000d = 0x000d,
960 BNXT_ULP_ACT_HID_0021 = 0x0021,
961 BNXT_ULP_ACT_HID_0029 = 0x0029,
962 BNXT_ULP_ACT_HID_0025 = 0x0025,
963 BNXT_ULP_ACT_HID_002d = 0x002d,
964 BNXT_ULP_ACT_HID_0801 = 0x0801,
965 BNXT_ULP_ACT_HID_0809 = 0x0809,
966 BNXT_ULP_ACT_HID_0805 = 0x0805,
967 BNXT_ULP_ACT_HID_080d = 0x080d,
968 BNXT_ULP_ACT_HID_0c15 = 0x0c15,
969 BNXT_ULP_ACT_HID_0c19 = 0x0c19,
970 BNXT_ULP_ACT_HID_02f6 = 0x02f6,
971 BNXT_ULP_ACT_HID_04f8 = 0x04f8,
972 BNXT_ULP_ACT_HID_01df = 0x01df,
973 BNXT_ULP_ACT_HID_07e5 = 0x07e5,
974 BNXT_ULP_ACT_HID_06ce = 0x06ce,
975 BNXT_ULP_ACT_HID_02fa = 0x02fa,
976 BNXT_ULP_ACT_HID_04fc = 0x04fc,
977 BNXT_ULP_ACT_HID_01e3 = 0x01e3,
978 BNXT_ULP_ACT_HID_07e9 = 0x07e9,
979 BNXT_ULP_ACT_HID_06d2 = 0x06d2,
980 BNXT_ULP_ACT_HID_03f7 = 0x03f7,
981 BNXT_ULP_ACT_HID_05f9 = 0x05f9,
982 BNXT_ULP_ACT_HID_02e0 = 0x02e0,
983 BNXT_ULP_ACT_HID_08e6 = 0x08e6,
984 BNXT_ULP_ACT_HID_07cf = 0x07cf,
985 BNXT_ULP_ACT_HID_03fb = 0x03fb,
986 BNXT_ULP_ACT_HID_05fd = 0x05fd,
987 BNXT_ULP_ACT_HID_02e4 = 0x02e4,
988 BNXT_ULP_ACT_HID_08ea = 0x08ea,
989 BNXT_ULP_ACT_HID_07d3 = 0x07d3,
990 BNXT_ULP_ACT_HID_040d = 0x040d,
991 BNXT_ULP_ACT_HID_040f = 0x040f,
992 BNXT_ULP_ACT_HID_0413 = 0x0413,
993 BNXT_ULP_ACT_HID_0567 = 0x0567,
994 BNXT_ULP_ACT_HID_0a49 = 0x0a49,
995 BNXT_ULP_ACT_HID_050e = 0x050e,
996 BNXT_ULP_ACT_HID_0668 = 0x0668,
997 BNXT_ULP_ACT_HID_0b4a = 0x0b4a,
998 BNXT_ULP_ACT_HID_0411 = 0x0411,
999 BNXT_ULP_ACT_HID_056b = 0x056b,
1000 BNXT_ULP_ACT_HID_0a4d = 0x0a4d,
1001 BNXT_ULP_ACT_HID_0512 = 0x0512,
1002 BNXT_ULP_ACT_HID_066c = 0x066c,
1003 BNXT_ULP_ACT_HID_0b4e = 0x0b4e
1006 enum bnxt_ulp_df_tpl {
1007 BNXT_ULP_DF_TPL_PORT_TO_VS = 1,
1008 BNXT_ULP_DF_TPL_VS_TO_PORT = 2,
1009 BNXT_ULP_DF_TPL_VFREP_TO_VF = 3,
1010 BNXT_ULP_DF_TPL_VF_TO_VFREP = 4,
1011 BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC = 5
git.droids-corp.org / dpdk.git / blob