1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2020 Broadcom
6 #include "ulp_template_db_enum.h"
7 #include "ulp_template_db_field.h"
8 #include "ulp_template_struct.h"
9 #include "ulp_rte_parser.h"
10 #include "ulp_template_db_tbl.h"
12 uint32_t ulp_act_prop_map_table[] = {
13 [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =
14 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ,
15 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =
16 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ,
17 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =
18 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ,
19 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =
20 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE,
21 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =
22 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM,
23 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =
24 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE,
25 [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =
26 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM,
27 [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =
28 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM,
29 [BNXT_ULP_ACT_PROP_IDX_PORT_ID] =
30 BNXT_ULP_ACT_PROP_SZ_PORT_ID,
31 [BNXT_ULP_ACT_PROP_IDX_VNIC] =
32 BNXT_ULP_ACT_PROP_SZ_VNIC,
33 [BNXT_ULP_ACT_PROP_IDX_VPORT] =
34 BNXT_ULP_ACT_PROP_SZ_VPORT,
35 [BNXT_ULP_ACT_PROP_IDX_MARK] =
36 BNXT_ULP_ACT_PROP_SZ_MARK,
37 [BNXT_ULP_ACT_PROP_IDX_COUNT] =
38 BNXT_ULP_ACT_PROP_SZ_COUNT,
39 [BNXT_ULP_ACT_PROP_IDX_METER] =
40 BNXT_ULP_ACT_PROP_SZ_METER,
41 [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =
42 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC,
43 [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =
44 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST,
45 [BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN] =
46 BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN,
47 [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP] =
48 BNXT_ULP_ACT_PROP_SZ_SET_VLAN_PCP,
49 [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID] =
50 BNXT_ULP_ACT_PROP_SZ_SET_VLAN_VID,
51 [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =
52 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC,
53 [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =
54 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST,
55 [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =
56 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC,
57 [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =
58 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST,
59 [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =
60 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC,
61 [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =
62 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST,
63 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =
64 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0,
65 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =
66 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1,
67 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =
68 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2,
69 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =
70 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3,
71 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =
72 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4,
73 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =
74 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5,
75 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =
76 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6,
77 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =
78 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7,
79 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =
80 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,
81 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =
82 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,
83 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =
84 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG,
85 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =
86 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP,
87 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =
88 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC,
89 [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =
90 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,
91 [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
92 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,
93 [BNXT_ULP_ACT_PROP_IDX_LAST] =
94 BNXT_ULP_ACT_PROP_SZ_LAST
97 struct bnxt_ulp_rte_act_info ulp_act_info[] = {
98 [RTE_FLOW_ACTION_TYPE_END] = {
99 .act_type = BNXT_ULP_ACT_TYPE_END,
100 .proto_act_func = NULL
102 [RTE_FLOW_ACTION_TYPE_VOID] = {
103 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
104 .proto_act_func = ulp_rte_void_act_handler
106 [RTE_FLOW_ACTION_TYPE_PASSTHRU] = {
107 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
108 .proto_act_func = NULL
110 [RTE_FLOW_ACTION_TYPE_JUMP] = {
111 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
112 .proto_act_func = NULL
114 [RTE_FLOW_ACTION_TYPE_MARK] = {
115 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
116 .proto_act_func = ulp_rte_mark_act_handler
118 [RTE_FLOW_ACTION_TYPE_FLAG] = {
119 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
120 .proto_act_func = NULL
122 [RTE_FLOW_ACTION_TYPE_QUEUE] = {
123 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
124 .proto_act_func = NULL
126 [RTE_FLOW_ACTION_TYPE_DROP] = {
127 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
128 .proto_act_func = ulp_rte_drop_act_handler
130 [RTE_FLOW_ACTION_TYPE_COUNT] = {
131 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
132 .proto_act_func = ulp_rte_count_act_handler
134 [RTE_FLOW_ACTION_TYPE_RSS] = {
135 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
136 .proto_act_func = ulp_rte_rss_act_handler
138 [RTE_FLOW_ACTION_TYPE_PF] = {
139 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
140 .proto_act_func = ulp_rte_pf_act_handler
142 [RTE_FLOW_ACTION_TYPE_VF] = {
143 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
144 .proto_act_func = ulp_rte_vf_act_handler
146 [RTE_FLOW_ACTION_TYPE_PHY_PORT] = {
147 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
148 .proto_act_func = ulp_rte_phy_port_act_handler
150 [RTE_FLOW_ACTION_TYPE_PORT_ID] = {
151 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
152 .proto_act_func = ulp_rte_port_id_act_handler
154 [RTE_FLOW_ACTION_TYPE_METER] = {
155 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
156 .proto_act_func = NULL
158 [RTE_FLOW_ACTION_TYPE_SECURITY] = {
159 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
160 .proto_act_func = NULL
162 [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {
163 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
164 .proto_act_func = NULL
166 [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {
167 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
168 .proto_act_func = NULL
170 [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {
171 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
172 .proto_act_func = NULL
174 [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {
175 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
176 .proto_act_func = NULL
178 [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {
179 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
180 .proto_act_func = NULL
182 [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {
183 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
184 .proto_act_func = NULL
186 [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {
187 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
188 .proto_act_func = ulp_rte_of_pop_vlan_act_handler
190 [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {
191 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
192 .proto_act_func = ulp_rte_of_push_vlan_act_handler
194 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {
195 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
196 .proto_act_func = ulp_rte_of_set_vlan_vid_act_handler
198 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {
199 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
200 .proto_act_func = ulp_rte_of_set_vlan_pcp_act_handler
202 [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {
203 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
204 .proto_act_func = NULL
206 [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {
207 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
208 .proto_act_func = NULL
210 [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {
211 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
212 .proto_act_func = ulp_rte_vxlan_encap_act_handler
214 [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {
215 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
216 .proto_act_func = ulp_rte_vxlan_decap_act_handler
218 [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {
219 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
220 .proto_act_func = NULL
222 [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {
223 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
224 .proto_act_func = NULL
226 [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {
227 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
228 .proto_act_func = NULL
230 [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {
231 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
232 .proto_act_func = NULL
234 [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {
235 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
236 .proto_act_func = ulp_rte_set_ipv4_src_act_handler
238 [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {
239 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
240 .proto_act_func = ulp_rte_set_ipv4_dst_act_handler
242 [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {
243 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
244 .proto_act_func = NULL
246 [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {
247 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
248 .proto_act_func = NULL
250 [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {
251 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
252 .proto_act_func = ulp_rte_set_tp_src_act_handler
254 [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {
255 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
256 .proto_act_func = ulp_rte_set_tp_dst_act_handler
258 [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {
259 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
260 .proto_act_func = NULL
262 [RTE_FLOW_ACTION_TYPE_DEC_TTL] = {
263 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
264 .proto_act_func = ulp_rte_dec_ttl_act_handler
266 [RTE_FLOW_ACTION_TYPE_SET_TTL] = {
267 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
268 .proto_act_func = NULL
270 [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {
271 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
272 .proto_act_func = NULL
274 [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {
275 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
276 .proto_act_func = NULL
278 [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {
279 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
280 .proto_act_func = NULL
282 [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {
283 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
284 .proto_act_func = NULL
286 [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {
287 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
288 .proto_act_func = NULL
290 [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {
291 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
292 .proto_act_func = NULL
296 struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[] = {
297 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 |
301 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 |
305 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 |
309 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 |
315 const struct ulp_template_device_tbls ulp_template_stingray_tbls[] = {
316 [BNXT_ULP_TEMPLATE_TYPE_CLASS] = {
317 .tmpl_list = ulp_class_stingray_tmpl_list,
318 .tbl_list = ulp_class_stingray_tbl_list,
319 .key_field_list = ulp_class_stingray_key_field_list,
320 .result_field_list = ulp_class_stingray_result_field_list,
321 .ident_list = ulp_class_stingray_ident_list
323 [BNXT_ULP_TEMPLATE_TYPE_ACTION] = {
324 .tmpl_list = ulp_act_stingray_tmpl_list,
325 .tbl_list = ulp_act_stingray_tbl_list,
326 .result_field_list = ulp_act_stingray_result_field_list,
330 const struct ulp_template_device_tbls ulp_template_wh_plus_tbls[] = {
331 [BNXT_ULP_TEMPLATE_TYPE_CLASS] = {
332 .tmpl_list = ulp_class_wh_plus_tmpl_list,
333 .tbl_list = ulp_class_wh_plus_tbl_list,
334 .key_field_list = ulp_class_wh_plus_key_field_list,
335 .result_field_list = ulp_class_wh_plus_result_field_list,
336 .ident_list = ulp_class_wh_plus_ident_list,
338 [BNXT_ULP_TEMPLATE_TYPE_ACTION] = {
339 .tmpl_list = ulp_act_wh_plus_tmpl_list,
340 .tbl_list = ulp_act_wh_plus_tbl_list,
341 .result_field_list = ulp_act_wh_plus_result_field_list
345 struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
346 [BNXT_ULP_DEVICE_ID_WH_PLUS] = {
347 .flow_mem_type = BNXT_ULP_FLOW_MEM_TYPE_INT,
348 .byte_order = BNXT_ULP_BYTE_ORDER_LE,
349 .encap_byte_swap = 1,
350 .flow_db_num_entries = 16384,
351 .mark_db_lfid_entries = 65536,
352 .mark_db_gfid_entries = 0,
353 .flow_count_db_entries = 16384,
354 .num_resources_per_flow = 8,
356 .ext_cntr_table_type = 0,
357 .byte_count_mask = 0x0000000fffffffff,
358 .packet_count_mask = 0xffffffff00000000,
359 .byte_count_shift = 0,
360 .packet_count_shift = 36,
361 .dev_tbls = ulp_template_wh_plus_tbls
363 [BNXT_ULP_DEVICE_ID_STINGRAY] = {
364 .flow_mem_type = BNXT_ULP_FLOW_MEM_TYPE_INT,
365 .byte_order = BNXT_ULP_BYTE_ORDER_LE,
366 .encap_byte_swap = 1,
367 .flow_db_num_entries = 16384,
368 .mark_db_lfid_entries = 65536,
369 .mark_db_gfid_entries = 0,
370 .flow_count_db_entries = 16384,
371 .num_resources_per_flow = 8,
373 .ext_cntr_table_type = 0,
374 .byte_count_mask = 0x0000000fffffffff,
375 .packet_count_mask = 0xffffffff00000000,
376 .byte_count_shift = 0,
377 .packet_count_shift = 36,
378 .dev_tbls = ulp_template_stingray_tbls
382 struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
384 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
385 .resource_type = TF_IDENT_TYPE_PROF_FUNC,
386 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,
387 .direction = TF_DIR_RX
390 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
391 .resource_type = TF_IDENT_TYPE_PROF_FUNC,
392 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,
393 .direction = TF_DIR_TX
396 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
397 .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
398 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR,
399 .direction = TF_DIR_TX
402 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
403 .resource_type = TF_IDENT_TYPE_PROF_FUNC,
404 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID,
405 .direction = TF_DIR_RX
408 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
409 .resource_type = TF_IDENT_TYPE_PROF_FUNC,
410 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID,
411 .direction = TF_DIR_TX
414 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
415 .resource_type = TF_IDENT_TYPE_PROF_FUNC,
416 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID,
417 .direction = TF_DIR_RX
420 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
421 .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
422 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR,
423 .direction = TF_DIR_RX
426 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
427 .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
428 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR,
429 .direction = TF_DIR_TX
433 struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {
434 [RTE_FLOW_ITEM_TYPE_END] = {
435 .hdr_type = BNXT_ULP_HDR_TYPE_END,
436 .proto_hdr_func = NULL
438 [RTE_FLOW_ITEM_TYPE_VOID] = {
439 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
440 .proto_hdr_func = ulp_rte_void_hdr_handler
442 [RTE_FLOW_ITEM_TYPE_INVERT] = {
443 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
444 .proto_hdr_func = NULL
446 [RTE_FLOW_ITEM_TYPE_ANY] = {
447 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
448 .proto_hdr_func = NULL
450 [RTE_FLOW_ITEM_TYPE_PF] = {
451 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
452 .proto_hdr_func = ulp_rte_pf_hdr_handler
454 [RTE_FLOW_ITEM_TYPE_VF] = {
455 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
456 .proto_hdr_func = ulp_rte_vf_hdr_handler
458 [RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
459 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
460 .proto_hdr_func = ulp_rte_phy_port_hdr_handler
462 [RTE_FLOW_ITEM_TYPE_PORT_ID] = {
463 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
464 .proto_hdr_func = ulp_rte_port_id_hdr_handler
466 [RTE_FLOW_ITEM_TYPE_RAW] = {
467 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
468 .proto_hdr_func = NULL
470 [RTE_FLOW_ITEM_TYPE_ETH] = {
471 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
472 .proto_hdr_func = ulp_rte_eth_hdr_handler
474 [RTE_FLOW_ITEM_TYPE_VLAN] = {
475 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
476 .proto_hdr_func = ulp_rte_vlan_hdr_handler
478 [RTE_FLOW_ITEM_TYPE_IPV4] = {
479 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
480 .proto_hdr_func = ulp_rte_ipv4_hdr_handler
482 [RTE_FLOW_ITEM_TYPE_IPV6] = {
483 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
484 .proto_hdr_func = ulp_rte_ipv6_hdr_handler
486 [RTE_FLOW_ITEM_TYPE_ICMP] = {
487 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
488 .proto_hdr_func = NULL
490 [RTE_FLOW_ITEM_TYPE_UDP] = {
491 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
492 .proto_hdr_func = ulp_rte_udp_hdr_handler
494 [RTE_FLOW_ITEM_TYPE_TCP] = {
495 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
496 .proto_hdr_func = ulp_rte_tcp_hdr_handler
498 [RTE_FLOW_ITEM_TYPE_SCTP] = {
499 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
500 .proto_hdr_func = NULL
502 [RTE_FLOW_ITEM_TYPE_VXLAN] = {
503 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,
504 .proto_hdr_func = ulp_rte_vxlan_hdr_handler
506 [RTE_FLOW_ITEM_TYPE_E_TAG] = {
507 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
508 .proto_hdr_func = NULL
510 [RTE_FLOW_ITEM_TYPE_NVGRE] = {
511 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
512 .proto_hdr_func = NULL
514 [RTE_FLOW_ITEM_TYPE_MPLS] = {
515 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
516 .proto_hdr_func = NULL
518 [RTE_FLOW_ITEM_TYPE_GRE] = {
519 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
520 .proto_hdr_func = NULL
522 [RTE_FLOW_ITEM_TYPE_FUZZY] = {
523 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
524 .proto_hdr_func = NULL
526 [RTE_FLOW_ITEM_TYPE_GTP] = {
527 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
528 .proto_hdr_func = NULL
530 [RTE_FLOW_ITEM_TYPE_GTPC] = {
531 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
532 .proto_hdr_func = NULL
534 [RTE_FLOW_ITEM_TYPE_GTPU] = {
535 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
536 .proto_hdr_func = NULL
538 [RTE_FLOW_ITEM_TYPE_ESP] = {
539 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
540 .proto_hdr_func = NULL
542 [RTE_FLOW_ITEM_TYPE_GENEVE] = {
543 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
544 .proto_hdr_func = NULL
546 [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {
547 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
548 .proto_hdr_func = NULL
550 [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {
551 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
552 .proto_hdr_func = NULL
554 [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {
555 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
556 .proto_hdr_func = NULL
558 [RTE_FLOW_ITEM_TYPE_ICMP6] = {
559 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
560 .proto_hdr_func = NULL
562 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {
563 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
564 .proto_hdr_func = NULL
566 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {
567 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
568 .proto_hdr_func = NULL
570 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {
571 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
572 .proto_hdr_func = NULL
574 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {
575 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
576 .proto_hdr_func = NULL
578 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {
579 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
580 .proto_hdr_func = NULL
582 [RTE_FLOW_ITEM_TYPE_MARK] = {
583 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
584 .proto_hdr_func = NULL
586 [RTE_FLOW_ITEM_TYPE_META] = {
587 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
588 .proto_hdr_func = NULL
590 [RTE_FLOW_ITEM_TYPE_GRE_KEY] = {
591 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
592 .proto_hdr_func = NULL
594 [RTE_FLOW_ITEM_TYPE_GTP_PSC] = {
595 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
596 .proto_hdr_func = NULL
598 [RTE_FLOW_ITEM_TYPE_PPPOES] = {
599 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
600 .proto_hdr_func = NULL
602 [RTE_FLOW_ITEM_TYPE_PPPOED] = {
603 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
604 .proto_hdr_func = NULL
606 [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {
607 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
608 .proto_hdr_func = NULL
610 [RTE_FLOW_ITEM_TYPE_NSH] = {
611 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
612 .proto_hdr_func = NULL
614 [RTE_FLOW_ITEM_TYPE_IGMP] = {
615 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
616 .proto_hdr_func = NULL
618 [RTE_FLOW_ITEM_TYPE_AH] = {
619 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
620 .proto_hdr_func = NULL
622 [RTE_FLOW_ITEM_TYPE_HIGIG2] = {
623 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,
624 .proto_hdr_func = NULL
628 uint32_t bnxt_ulp_encap_vtag_map[] = {
629 BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP,
630 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,
631 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI
634 uint32_t ulp_glb_template_tbl[] = {
635 BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC