net/cnxk: add Rx queue setup and release
[dpdk.git] / drivers / net / cnxk / cn10k_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2021 Marvell.
3  */
4 #include "cn10k_ethdev.h"
5
6 static int
7 cn10k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
8                          uint16_t nb_desc, unsigned int socket,
9                          const struct rte_eth_rxconf *rx_conf,
10                          struct rte_mempool *mp)
11 {
12         struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
13         struct cn10k_eth_rxq *rxq;
14         struct roc_nix_rq *rq;
15         struct roc_nix_cq *cq;
16         int rc;
17
18         RTE_SET_USED(socket);
19
20         /* CQ Errata needs min 4K ring */
21         if (dev->cq_min_4k && nb_desc < 4096)
22                 nb_desc = 4096;
23
24         /* Common Rx queue setup */
25         rc = cnxk_nix_rx_queue_setup(eth_dev, qid, nb_desc,
26                                      sizeof(struct cn10k_eth_rxq), rx_conf, mp);
27         if (rc)
28                 return rc;
29
30         rq = &dev->rqs[qid];
31         cq = &dev->cqs[qid];
32
33         /* Update fast path queue */
34         rxq = eth_dev->data->rx_queues[qid];
35         rxq->rq = qid;
36         rxq->desc = (uintptr_t)cq->desc_base;
37         rxq->cq_door = cq->door;
38         rxq->cq_status = cq->status;
39         rxq->wdata = cq->wdata;
40         rxq->head = cq->head;
41         rxq->qmask = cq->qmask;
42
43         /* Data offset from data to start of mbuf is first_skip */
44         rxq->data_off = rq->first_skip;
45         rxq->mbuf_initializer = cnxk_nix_rxq_mbuf_setup(dev);
46         return 0;
47 }
48
49 static int
50 cn10k_nix_configure(struct rte_eth_dev *eth_dev)
51 {
52         struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
53         int rc;
54
55         /* Common nix configure */
56         rc = cnxk_nix_configure(eth_dev);
57         if (rc)
58                 return rc;
59
60         plt_nix_dbg("Configured port%d platform specific rx_offload_flags=%x"
61                     " tx_offload_flags=0x%x",
62                     eth_dev->data->port_id, dev->rx_offload_flags,
63                     dev->tx_offload_flags);
64         return 0;
65 }
66
67 /* Update platform specific eth dev ops */
68 static void
69 nix_eth_dev_ops_override(void)
70 {
71         static int init_once;
72
73         if (init_once)
74                 return;
75         init_once = 1;
76
77         /* Update platform specific ops */
78         cnxk_eth_dev_ops.dev_configure = cn10k_nix_configure;
79         cnxk_eth_dev_ops.rx_queue_setup = cn10k_nix_rx_queue_setup;
80 }
81
82 static int
83 cn10k_nix_remove(struct rte_pci_device *pci_dev)
84 {
85         return cnxk_nix_remove(pci_dev);
86 }
87
88 static int
89 cn10k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
90 {
91         struct rte_eth_dev *eth_dev;
92         int rc;
93
94         if (RTE_CACHE_LINE_SIZE != 64) {
95                 plt_err("Driver not compiled for CN10K");
96                 return -EFAULT;
97         }
98
99         rc = roc_plt_init();
100         if (rc) {
101                 plt_err("Failed to initialize platform model, rc=%d", rc);
102                 return rc;
103         }
104
105         nix_eth_dev_ops_override();
106
107         /* Common probe */
108         rc = cnxk_nix_probe(pci_drv, pci_dev);
109         if (rc)
110                 return rc;
111
112         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
113                 eth_dev = rte_eth_dev_allocated(pci_dev->device.name);
114                 if (!eth_dev)
115                         return -ENOENT;
116         }
117         return 0;
118 }
119
120 static const struct rte_pci_id cn10k_pci_nix_map[] = {
121         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_PF),
122         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_PF),
123         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_VF),
124         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_VF),
125         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_AF_VF),
126         CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_AF_VF),
127         {
128                 .vendor_id = 0,
129         },
130 };
131
132 static struct rte_pci_driver cn10k_pci_nix = {
133         .id_table = cn10k_pci_nix_map,
134         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA |
135                      RTE_PCI_DRV_INTR_LSC,
136         .probe = cn10k_nix_probe,
137         .remove = cn10k_nix_remove,
138 };
139
140 RTE_PMD_REGISTER_PCI(net_cn10k, cn10k_pci_nix);
141 RTE_PMD_REGISTER_PCI_TABLE(net_cn10k, cn10k_pci_nix_map);
142 RTE_PMD_REGISTER_KMOD_DEP(net_cn10k, "vfio-pci");