1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
10 #include <cnxk_ethdev.h>
12 #define NIX_RX_OFFLOAD_NONE (0)
13 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
14 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
15 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
16 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
17 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
18 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
20 /* Flags to control cqe_to_mbuf conversion function.
21 * Defining it from backwards to denote its been
22 * not used as offload flags to pick function
24 #define NIX_RX_MULTI_SEG_F BIT(15)
26 #define CNXK_NIX_CQ_ENTRY_SZ 128
27 #define NIX_DESCS_PER_LOOP 4
28 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
29 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
31 union mbuf_initializer {
41 static __rte_always_inline uint64_t
42 nix_clear_data_off(uint64_t oldval)
44 union mbuf_initializer mbuf_init = {.value = oldval};
46 mbuf_init.fields.data_off = 0;
47 return mbuf_init.value;
50 static __rte_always_inline struct rte_mbuf *
51 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
55 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
56 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
57 return (struct rte_mbuf *)(buff - data_off);
60 static __rte_always_inline uint32_t
61 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
63 const uint16_t *const ptype = lookup_mem;
64 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
65 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
66 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
68 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
71 static __rte_always_inline uint32_t
72 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
74 const uint32_t *const ol_flags =
75 (const uint32_t *)((const uint8_t *)lookup_mem +
78 return ol_flags[(in & 0xfff00000) >> 20];
81 static inline uint64_t
82 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
83 struct rte_mbuf *mbuf)
85 /* There is no separate bit to check match_id
86 * is valid or not? and no flag to identify it is an
87 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
88 * action. The former case addressed through 0 being invalid
89 * value and inc/dec match_id pair when MARK is activated.
90 * The later case addressed through defining
91 * CNXK_FLOW_MARK_DEFAULT as value for
92 * RTE_FLOW_ACTION_TYPE_MARK.
93 * This would translate to not use
94 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
95 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
96 * i.e valid mark_id's are from
97 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
99 if (likely(match_id)) {
100 ol_flags |= PKT_RX_FDIR;
101 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
102 ol_flags |= PKT_RX_FDIR_ID;
103 mbuf->hash.fdir.hi = match_id - 1;
110 static __rte_always_inline void
111 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
114 const rte_iova_t *iova_list;
115 struct rte_mbuf *head;
116 const rte_iova_t *eol;
120 sg = *(const uint64_t *)(rx + 1);
121 nb_segs = (sg >> 48) & 0x3;
122 mbuf->nb_segs = nb_segs;
123 mbuf->data_len = sg & 0xFFFF;
126 eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
127 /* Skip SG_S and first IOVA*/
128 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
131 rearm = rearm & ~0xFFFF;
135 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
138 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
140 mbuf->data_len = sg & 0xFFFF;
142 *(uint64_t *)(&mbuf->rearm_data) = rearm;
146 if (!nb_segs && (iova_list + 1 < eol)) {
147 sg = *(const uint64_t *)(iova_list);
148 nb_segs = (sg >> 48) & 0x3;
149 head->nb_segs += nb_segs;
150 iova_list = (const rte_iova_t *)(iova_list + 1);
156 static __rte_always_inline void
157 cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
158 struct rte_mbuf *mbuf, const void *lookup_mem,
159 const uint64_t val, const uint16_t flag)
161 const union nix_rx_parse_u *rx =
162 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
163 const uint16_t len = rx->pkt_lenm1 + 1;
164 const uint64_t w1 = *(const uint64_t *)rx;
165 uint64_t ol_flags = 0;
167 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
168 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
170 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
171 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
173 mbuf->packet_type = 0;
175 if (flag & NIX_RX_OFFLOAD_RSS_F) {
176 mbuf->hash.rss = tag;
177 ol_flags |= PKT_RX_RSS_HASH;
180 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
181 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
183 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
184 if (rx->vtag0_gone) {
185 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
186 mbuf->vlan_tci = rx->vtag0_tci;
188 if (rx->vtag1_gone) {
189 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
190 mbuf->vlan_tci_outer = rx->vtag1_tci;
194 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
195 ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
197 mbuf->ol_flags = ol_flags;
198 *(uint64_t *)(&mbuf->rearm_data) = val;
201 if (flag & NIX_RX_MULTI_SEG_F) {
202 nix_cqe_xtract_mseg(rx, mbuf, val);
204 mbuf->data_len = len;
209 static inline uint16_t
210 nix_rx_nb_pkts(struct cn10k_eth_rxq *rxq, const uint64_t wdata,
211 const uint16_t pkts, const uint32_t qmask)
213 uint32_t available = rxq->available;
215 /* Update the available count if cached value is not enough */
216 if (unlikely(available < pkts)) {
217 uint64_t reg, head, tail;
219 /* Use LDADDA version to avoid reorder */
220 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
221 /* CQ_OP_STATUS operation error */
222 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
223 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
226 tail = reg & 0xFFFFF;
227 head = (reg >> 20) & 0xFFFFF;
229 available = tail - head + qmask + 1;
231 available = tail - head;
233 rxq->available = available;
236 return RTE_MIN(pkts, available);
239 static __rte_always_inline uint16_t
240 cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
241 const uint16_t flags)
243 struct cn10k_eth_rxq *rxq = rx_queue;
244 const uint64_t mbuf_init = rxq->mbuf_initializer;
245 const void *lookup_mem = rxq->lookup_mem;
246 const uint64_t data_off = rxq->data_off;
247 const uintptr_t desc = rxq->desc;
248 const uint64_t wdata = rxq->wdata;
249 const uint32_t qmask = rxq->qmask;
250 uint16_t packets = 0, nb_pkts;
251 uint32_t head = rxq->head;
252 struct nix_cqe_hdr_s *cq;
253 struct rte_mbuf *mbuf;
255 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
257 while (packets < nb_pkts) {
258 /* Prefetch N desc ahead */
259 rte_prefetch_non_temporal(
260 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
261 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
263 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
265 cn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
267 cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
268 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
269 (uint64_t *)((uint8_t *)mbuf + data_off)
271 rx_pkts[packets++] = mbuf;
272 roc_prefetch_store_keep(mbuf);
278 rxq->available -= nb_pkts;
280 /* Free all the CQs that we've processed */
281 plt_write64((wdata | nb_pkts), rxq->cq_door);
286 #if defined(RTE_ARCH_ARM64)
288 static __rte_always_inline uint64_t
289 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
291 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
292 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
293 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
299 static __rte_always_inline uint64_t
300 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
302 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
303 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
304 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
310 static __rte_always_inline uint16_t
311 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
312 uint16_t pkts, const uint16_t flags)
314 struct cn10k_eth_rxq *rxq = rx_queue;
315 uint16_t packets = 0;
316 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
317 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
318 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
319 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
320 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
321 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
322 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
323 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
324 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
325 const uint16_t *lookup_mem = rxq->lookup_mem;
326 const uint32_t qmask = rxq->qmask;
327 const uint64_t wdata = rxq->wdata;
328 const uintptr_t desc = rxq->desc;
329 uint8x16_t f0, f1, f2, f3;
330 uint32_t head = rxq->head;
333 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
334 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
336 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
337 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
339 while (packets < pkts) {
340 /* Exit loop if head is about to wrap and become unaligned */
341 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
342 NIX_DESCS_PER_LOOP) {
343 pkts_left += (pkts - packets);
347 const uintptr_t cq0 = desc + CQE_SZ(head);
349 /* Prefetch N desc ahead */
350 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
351 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
352 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
353 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
355 /* Get NIX_RX_SG_S for size and buffer pointer */
356 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
357 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
358 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
359 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
361 /* Extract mbuf from NIX_RX_SG_S */
362 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
363 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
364 mbuf01 = vqsubq_u64(mbuf01, data_off);
365 mbuf23 = vqsubq_u64(mbuf23, data_off);
367 /* Move mbufs to scalar registers for future use */
368 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
369 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
370 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
371 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
373 /* Mask to get packet len from NIX_RX_SG_S */
374 const uint8x16_t shuf_msk = {
375 0xFF, 0xFF, /* pkt_type set as unknown */
376 0xFF, 0xFF, /* pkt_type set as unknown */
377 0, 1, /* octet 1~0, low 16 bits pkt_len */
378 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
379 0, 1, /* octet 1~0, 16 bits data_len */
380 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
382 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
383 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
384 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
385 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
386 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
388 /* Load CQE word0 and word 1 */
389 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
390 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
391 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
392 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
393 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
394 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
395 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
396 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
398 if (flags & NIX_RX_OFFLOAD_RSS_F) {
399 /* Fill rss in the rx_descriptor_fields1 */
400 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
401 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
402 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
403 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
404 ol_flags0 = PKT_RX_RSS_HASH;
405 ol_flags1 = PKT_RX_RSS_HASH;
406 ol_flags2 = PKT_RX_RSS_HASH;
407 ol_flags3 = PKT_RX_RSS_HASH;
415 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
416 /* Fill packet_type in the rx_descriptor_fields1 */
417 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
419 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
421 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
423 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
427 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
428 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
429 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
430 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
431 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
434 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
435 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
436 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
437 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
438 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
440 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
441 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
442 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
443 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
445 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
446 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
447 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
448 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
451 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
452 ol_flags0 = nix_update_match_id(
453 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
455 ol_flags1 = nix_update_match_id(
456 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
458 ol_flags2 = nix_update_match_id(
459 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
461 ol_flags3 = nix_update_match_id(
462 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
466 /* Form rearm_data with ol_flags */
467 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
468 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
469 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
470 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
472 /* Update rx_descriptor_fields1 */
473 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
474 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
475 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
476 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
478 /* Update rearm_data */
479 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
480 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
481 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
482 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
484 /* Update that no more segments */
490 /* Store the mbufs to rx_pkts */
491 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
492 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
495 roc_prefetch_store_keep(mbuf0);
496 roc_prefetch_store_keep(mbuf1);
497 roc_prefetch_store_keep(mbuf2);
498 roc_prefetch_store_keep(mbuf3);
500 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
501 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
502 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
503 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
504 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
506 /* Advance head pointer and packets */
507 head += NIX_DESCS_PER_LOOP;
509 packets += NIX_DESCS_PER_LOOP;
513 rxq->available -= packets;
516 /* Free all the CQs that we've processed */
517 plt_write64((rxq->wdata | packets), rxq->cq_door);
519 if (unlikely(pkts_left))
520 packets += cn10k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
528 static inline uint16_t
529 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
530 uint16_t pkts, const uint16_t flags)
532 RTE_SET_USED(rx_queue);
533 RTE_SET_USED(rx_pkts);
543 #define RSS_F NIX_RX_OFFLOAD_RSS_F
544 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
545 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
546 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
547 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
548 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
550 /* [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
551 #define NIX_RX_FASTPATH_MODES \
552 R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
553 R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
554 R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
555 R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
556 R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
557 R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
558 R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
559 R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
560 R(mark, 0, 0, 1, 0, 0, 0, MARK_F) \
561 R(mark_rss, 0, 0, 1, 0, 0, 1, MARK_F | RSS_F) \
562 R(mark_ptype, 0, 0, 1, 0, 1, 0, MARK_F | PTYPE_F) \
563 R(mark_ptype_rss, 0, 0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
564 R(mark_cksum, 0, 0, 1, 1, 0, 0, MARK_F | CKSUM_F) \
565 R(mark_cksum_rss, 0, 0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
566 R(mark_cksum_ptype, 0, 0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \
567 R(mark_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
568 MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
569 R(ts, 0, 1, 0, 0, 0, 0, TS_F) \
570 R(ts_rss, 0, 1, 0, 0, 0, 1, TS_F | RSS_F) \
571 R(ts_ptype, 0, 1, 0, 0, 1, 0, TS_F | PTYPE_F) \
572 R(ts_ptype_rss, 0, 1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \
573 R(ts_cksum, 0, 1, 0, 1, 0, 0, TS_F | CKSUM_F) \
574 R(ts_cksum_rss, 0, 1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \
575 R(ts_cksum_ptype, 0, 1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \
576 R(ts_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
577 TS_F | CKSUM_F | PTYPE_F | RSS_F) \
578 R(ts_mark, 0, 1, 1, 0, 0, 0, TS_F | MARK_F) \
579 R(ts_mark_rss, 0, 1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F) \
580 R(ts_mark_ptype, 0, 1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \
581 R(ts_mark_ptype_rss, 0, 1, 1, 0, 1, 1, \
582 TS_F | MARK_F | PTYPE_F | RSS_F) \
583 R(ts_mark_cksum, 0, 1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \
584 R(ts_mark_cksum_rss, 0, 1, 1, 1, 0, 1, \
585 TS_F | MARK_F | CKSUM_F | RSS_F) \
586 R(ts_mark_cksum_ptype, 0, 1, 1, 1, 1, 0, \
587 TS_F | MARK_F | CKSUM_F | PTYPE_F) \
588 R(ts_mark_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
589 TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
590 R(vlan, 1, 0, 0, 0, 0, 0, RX_VLAN_F) \
591 R(vlan_rss, 1, 0, 0, 0, 0, 1, RX_VLAN_F | RSS_F) \
592 R(vlan_ptype, 1, 0, 0, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
593 R(vlan_ptype_rss, 1, 0, 0, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F) \
594 R(vlan_cksum, 1, 0, 0, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
595 R(vlan_cksum_rss, 1, 0, 0, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F) \
596 R(vlan_cksum_ptype, 1, 0, 0, 1, 1, 0, \
597 RX_VLAN_F | CKSUM_F | PTYPE_F) \
598 R(vlan_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
599 RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
600 R(vlan_mark, 1, 0, 1, 0, 0, 0, RX_VLAN_F | MARK_F) \
601 R(vlan_mark_rss, 1, 0, 1, 0, 0, 1, RX_VLAN_F | MARK_F | RSS_F) \
602 R(vlan_mark_ptype, 1, 0, 1, 0, 1, 0, RX_VLAN_F | MARK_F | PTYPE_F)\
603 R(vlan_mark_ptype_rss, 1, 0, 1, 0, 1, 1, \
604 RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
605 R(vlan_mark_cksum, 1, 0, 1, 1, 0, 0, RX_VLAN_F | MARK_F | CKSUM_F)\
606 R(vlan_mark_cksum_rss, 1, 0, 1, 1, 0, 1, \
607 RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
608 R(vlan_mark_cksum_ptype, 1, 0, 1, 1, 1, 0, \
609 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
610 R(vlan_mark_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
611 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
612 R(vlan_ts, 1, 1, 0, 0, 0, 0, RX_VLAN_F | TS_F) \
613 R(vlan_ts_rss, 1, 1, 0, 0, 0, 1, RX_VLAN_F | TS_F | RSS_F) \
614 R(vlan_ts_ptype, 1, 1, 0, 0, 1, 0, RX_VLAN_F | TS_F | PTYPE_F) \
615 R(vlan_ts_ptype_rss, 1, 1, 0, 0, 1, 1, \
616 RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
617 R(vlan_ts_cksum, 1, 1, 0, 1, 0, 0, RX_VLAN_F | TS_F | CKSUM_F) \
618 R(vlan_ts_cksum_rss, 1, 1, 0, 1, 0, 1, \
619 RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
620 R(vlan_ts_cksum_ptype, 1, 1, 0, 1, 1, 0, \
621 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
622 R(vlan_ts_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
623 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
624 R(vlan_ts_mark, 1, 1, 1, 0, 0, 0, RX_VLAN_F | TS_F | MARK_F) \
625 R(vlan_ts_mark_rss, 1, 1, 1, 0, 0, 1, \
626 RX_VLAN_F | TS_F | MARK_F | RSS_F) \
627 R(vlan_ts_mark_ptype, 1, 1, 1, 0, 1, 0, \
628 RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
629 R(vlan_ts_mark_ptype_rss, 1, 1, 1, 0, 1, 1, \
630 RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
631 R(vlan_ts_mark_cksum, 1, 1, 1, 1, 0, 0, \
632 RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
633 R(vlan_ts_mark_cksum_rss, 1, 1, 1, 1, 0, 1, \
634 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
635 R(vlan_ts_mark_cksum_ptype, 1, 1, 1, 1, 1, 0, \
636 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
637 R(vlan_ts_mark_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
638 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
640 #define R(name, f5, f4, f3, f2, f1, f0, flags) \
641 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \
642 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
644 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
645 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
647 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name( \
648 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
650 NIX_RX_FASTPATH_MODES
653 #endif /* __CN10K_RX_H__ */