1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
10 #define NIX_RX_OFFLOAD_NONE (0)
11 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
12 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
13 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
14 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
15 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
17 /* Flags to control cqe_to_mbuf conversion function.
18 * Defining it from backwards to denote its been
19 * not used as offload flags to pick function
21 #define NIX_RX_MULTI_SEG_F BIT(15)
23 #define CNXK_NIX_CQ_ENTRY_SZ 128
24 #define NIX_DESCS_PER_LOOP 4
25 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
26 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
28 union mbuf_initializer {
38 static __rte_always_inline uint64_t
39 nix_clear_data_off(uint64_t oldval)
41 union mbuf_initializer mbuf_init = {.value = oldval};
43 mbuf_init.fields.data_off = 0;
44 return mbuf_init.value;
47 static __rte_always_inline struct rte_mbuf *
48 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
52 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
53 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
54 return (struct rte_mbuf *)(buff - data_off);
57 static __rte_always_inline uint32_t
58 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
60 const uint16_t *const ptype = lookup_mem;
61 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
62 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
63 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
65 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
68 static __rte_always_inline uint32_t
69 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
71 const uint32_t *const ol_flags =
72 (const uint32_t *)((const uint8_t *)lookup_mem +
75 return ol_flags[(in & 0xfff00000) >> 20];
78 static inline uint64_t
79 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
80 struct rte_mbuf *mbuf)
82 /* There is no separate bit to check match_id
83 * is valid or not? and no flag to identify it is an
84 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
85 * action. The former case addressed through 0 being invalid
86 * value and inc/dec match_id pair when MARK is activated.
87 * The later case addressed through defining
88 * CNXK_FLOW_MARK_DEFAULT as value for
89 * RTE_FLOW_ACTION_TYPE_MARK.
90 * This would translate to not use
91 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
92 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
93 * i.e valid mark_id's are from
94 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
96 if (likely(match_id)) {
97 ol_flags |= PKT_RX_FDIR;
98 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
99 ol_flags |= PKT_RX_FDIR_ID;
100 mbuf->hash.fdir.hi = match_id - 1;
107 static __rte_always_inline void
108 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
111 const rte_iova_t *iova_list;
112 struct rte_mbuf *head;
113 const rte_iova_t *eol;
117 sg = *(const uint64_t *)(rx + 1);
118 nb_segs = (sg >> 48) & 0x3;
119 mbuf->nb_segs = nb_segs;
120 mbuf->data_len = sg & 0xFFFF;
123 eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
124 /* Skip SG_S and first IOVA*/
125 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
128 rearm = rearm & ~0xFFFF;
132 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
135 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
137 mbuf->data_len = sg & 0xFFFF;
139 *(uint64_t *)(&mbuf->rearm_data) = rearm;
143 if (!nb_segs && (iova_list + 1 < eol)) {
144 sg = *(const uint64_t *)(iova_list);
145 nb_segs = (sg >> 48) & 0x3;
146 head->nb_segs += nb_segs;
147 iova_list = (const rte_iova_t *)(iova_list + 1);
153 static __rte_always_inline void
154 cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
155 struct rte_mbuf *mbuf, const void *lookup_mem,
156 const uint64_t val, const uint16_t flag)
158 const union nix_rx_parse_u *rx =
159 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
160 const uint16_t len = rx->pkt_lenm1 + 1;
161 const uint64_t w1 = *(const uint64_t *)rx;
162 uint64_t ol_flags = 0;
164 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
165 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
167 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
168 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
170 mbuf->packet_type = 0;
172 if (flag & NIX_RX_OFFLOAD_RSS_F) {
173 mbuf->hash.rss = tag;
174 ol_flags |= PKT_RX_RSS_HASH;
177 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
178 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
180 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
181 ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
183 mbuf->ol_flags = ol_flags;
184 *(uint64_t *)(&mbuf->rearm_data) = val;
187 if (flag & NIX_RX_MULTI_SEG_F) {
188 nix_cqe_xtract_mseg(rx, mbuf, val);
190 mbuf->data_len = len;
195 static inline uint16_t
196 nix_rx_nb_pkts(struct cn10k_eth_rxq *rxq, const uint64_t wdata,
197 const uint16_t pkts, const uint32_t qmask)
199 uint32_t available = rxq->available;
201 /* Update the available count if cached value is not enough */
202 if (unlikely(available < pkts)) {
203 uint64_t reg, head, tail;
205 /* Use LDADDA version to avoid reorder */
206 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
207 /* CQ_OP_STATUS operation error */
208 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
209 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
212 tail = reg & 0xFFFFF;
213 head = (reg >> 20) & 0xFFFFF;
215 available = tail - head + qmask + 1;
217 available = tail - head;
219 rxq->available = available;
222 return RTE_MIN(pkts, available);
225 static __rte_always_inline uint16_t
226 cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
227 const uint16_t flags)
229 struct cn10k_eth_rxq *rxq = rx_queue;
230 const uint64_t mbuf_init = rxq->mbuf_initializer;
231 const void *lookup_mem = rxq->lookup_mem;
232 const uint64_t data_off = rxq->data_off;
233 const uintptr_t desc = rxq->desc;
234 const uint64_t wdata = rxq->wdata;
235 const uint32_t qmask = rxq->qmask;
236 uint16_t packets = 0, nb_pkts;
237 uint32_t head = rxq->head;
238 struct nix_cqe_hdr_s *cq;
239 struct rte_mbuf *mbuf;
241 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
243 while (packets < nb_pkts) {
244 /* Prefetch N desc ahead */
245 rte_prefetch_non_temporal(
246 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
247 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
249 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
251 cn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
253 rx_pkts[packets++] = mbuf;
254 roc_prefetch_store_keep(mbuf);
260 rxq->available -= nb_pkts;
262 /* Free all the CQs that we've processed */
263 plt_write64((wdata | nb_pkts), rxq->cq_door);
268 #if defined(RTE_ARCH_ARM64)
270 static __rte_always_inline uint16_t
271 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
272 uint16_t pkts, const uint16_t flags)
274 struct cn10k_eth_rxq *rxq = rx_queue;
275 uint16_t packets = 0;
276 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
277 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
278 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
279 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
280 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
281 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
282 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
283 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
284 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
285 const uint16_t *lookup_mem = rxq->lookup_mem;
286 const uint32_t qmask = rxq->qmask;
287 const uint64_t wdata = rxq->wdata;
288 const uintptr_t desc = rxq->desc;
289 uint8x16_t f0, f1, f2, f3;
290 uint32_t head = rxq->head;
293 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
294 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
296 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
297 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
299 while (packets < pkts) {
300 /* Exit loop if head is about to wrap and become unaligned */
301 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
302 NIX_DESCS_PER_LOOP) {
303 pkts_left += (pkts - packets);
307 const uintptr_t cq0 = desc + CQE_SZ(head);
309 /* Prefetch N desc ahead */
310 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
311 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
312 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
313 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
315 /* Get NIX_RX_SG_S for size and buffer pointer */
316 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
317 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
318 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
319 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
321 /* Extract mbuf from NIX_RX_SG_S */
322 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
323 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
324 mbuf01 = vqsubq_u64(mbuf01, data_off);
325 mbuf23 = vqsubq_u64(mbuf23, data_off);
327 /* Move mbufs to scalar registers for future use */
328 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
329 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
330 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
331 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
333 /* Mask to get packet len from NIX_RX_SG_S */
334 const uint8x16_t shuf_msk = {
335 0xFF, 0xFF, /* pkt_type set as unknown */
336 0xFF, 0xFF, /* pkt_type set as unknown */
337 0, 1, /* octet 1~0, low 16 bits pkt_len */
338 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
339 0, 1, /* octet 1~0, 16 bits data_len */
340 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
342 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
343 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
344 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
345 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
346 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
348 /* Load CQE word0 and word 1 */
349 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
350 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
351 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
352 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
353 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
354 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
355 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
356 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
358 if (flags & NIX_RX_OFFLOAD_RSS_F) {
359 /* Fill rss in the rx_descriptor_fields1 */
360 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
361 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
362 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
363 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
364 ol_flags0 = PKT_RX_RSS_HASH;
365 ol_flags1 = PKT_RX_RSS_HASH;
366 ol_flags2 = PKT_RX_RSS_HASH;
367 ol_flags3 = PKT_RX_RSS_HASH;
375 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
376 /* Fill packet_type in the rx_descriptor_fields1 */
377 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
379 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
381 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
383 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
387 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
388 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
389 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
390 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
391 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
394 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
395 ol_flags0 = nix_update_match_id(
396 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
398 ol_flags1 = nix_update_match_id(
399 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
401 ol_flags2 = nix_update_match_id(
402 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
404 ol_flags3 = nix_update_match_id(
405 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
409 /* Form rearm_data with ol_flags */
410 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
411 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
412 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
413 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
415 /* Update rx_descriptor_fields1 */
416 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
417 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
418 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
419 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
421 /* Update rearm_data */
422 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
423 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
424 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
425 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
427 /* Update that no more segments */
433 /* Store the mbufs to rx_pkts */
434 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
435 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
438 roc_prefetch_store_keep(mbuf0);
439 roc_prefetch_store_keep(mbuf1);
440 roc_prefetch_store_keep(mbuf2);
441 roc_prefetch_store_keep(mbuf3);
443 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
444 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
445 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
446 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
447 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
449 /* Advance head pointer and packets */
450 head += NIX_DESCS_PER_LOOP;
452 packets += NIX_DESCS_PER_LOOP;
456 rxq->available -= packets;
459 /* Free all the CQs that we've processed */
460 plt_write64((rxq->wdata | packets), rxq->cq_door);
462 if (unlikely(pkts_left))
463 packets += cn10k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
471 static inline uint16_t
472 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
473 uint16_t pkts, const uint16_t flags)
475 RTE_SET_USED(rx_queue);
476 RTE_SET_USED(rx_pkts);
486 #define RSS_F NIX_RX_OFFLOAD_RSS_F
487 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
488 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
489 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
491 /* [MARK] [CKSUM] [PTYPE] [RSS] */
492 #define NIX_RX_FASTPATH_MODES \
493 R(no_offload, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
494 R(rss, 0, 0, 0, 1, RSS_F) \
495 R(ptype, 0, 0, 1, 0, PTYPE_F) \
496 R(ptype_rss, 0, 0, 1, 1, PTYPE_F | RSS_F) \
497 R(cksum, 0, 1, 0, 0, CKSUM_F) \
498 R(cksum_rss, 0, 1, 0, 1, CKSUM_F | RSS_F) \
499 R(cksum_ptype, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
500 R(cksum_ptype_rss, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
501 R(mark, 1, 0, 0, 0, MARK_F) \
502 R(mark_rss, 1, 0, 0, 1, MARK_F | RSS_F) \
503 R(mark_ptype, 1, 0, 1, 0, MARK_F | PTYPE_F) \
504 R(mark_ptype_rss, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
505 R(mark_cksum, 1, 1, 0, 0, MARK_F | CKSUM_F) \
506 R(mark_cksum_rss, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
507 R(mark_cksum_ptype, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F)\
508 R(mark_cksum_ptype_rss, 1, 1, 1, 1, MARK_F | CKSUM_F | PTYPE_F | RSS_F)
510 #define R(name, f3, f2, f1, f0, flags) \
511 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \
512 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
514 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
515 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
517 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name( \
518 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
520 NIX_RX_FASTPATH_MODES
523 #endif /* __CN10K_RX_H__ */