drivers/net/cnxk/cn10k_rx.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4 #ifndef __CN10K_RX_H__
   5 #define __CN10K_RX_H__
   6
   7 #include <rte_ether.h>
   8 #include <rte_vect.h>
   9
  10 #include <cnxk_ethdev.h>
  11
  12 #define NIX_RX_OFFLOAD_NONE          (0)
  13 #define NIX_RX_OFFLOAD_RSS_F         BIT(0)
  14 #define NIX_RX_OFFLOAD_PTYPE_F       BIT(1)
  15 #define NIX_RX_OFFLOAD_CHECKSUM_F    BIT(2)
  16 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
  17 #define NIX_RX_OFFLOAD_TSTAMP_F      BIT(4)
  18 #define NIX_RX_OFFLOAD_VLAN_STRIP_F  BIT(5)
  19 #define NIX_RX_OFFLOAD_SECURITY_F    BIT(6)
  20 #define NIX_RX_OFFLOAD_MAX           (NIX_RX_OFFLOAD_SECURITY_F << 1)
  21
  22 /* Flags to control cqe_to_mbuf conversion function.
  23  * Defining it from backwards to denote its been
  24  * not used as offload flags to pick function
  25  */
  26 #define NIX_RX_REAS_F      BIT(12)
  27 #define NIX_RX_VWQE_F      BIT(13)
  28 #define NIX_RX_MULTI_SEG_F BIT(14)
  29 #define CPT_RX_WQE_F       BIT(15)
  30
  31 #define CNXK_NIX_CQ_ENTRY_SZ 128
  32 #define NIX_DESCS_PER_LOOP   4
  33 #define CQE_CAST(x)          ((struct nix_cqe_hdr_s *)(x))
  34 #define CQE_SZ(x)            ((x) * CNXK_NIX_CQ_ENTRY_SZ)
  35
  36 #define CQE_PTR_OFF(b, i, o, f)                                                \
  37         (((f) & NIX_RX_VWQE_F) ?                                               \
  38                        (uint64_t *)(((uintptr_t)((uint64_t *)(b))[i]) + (o)) : \
  39                        (uint64_t *)(((uintptr_t)(b)) + CQE_SZ(i) + (o)))
  40 #define CQE_PTR_DIFF(b, i, o, f)                                               \
  41         (((f) & NIX_RX_VWQE_F) ?                                               \
  42                  (uint64_t *)(((uintptr_t)((uint64_t *)(b))[i]) - (o)) :       \
  43                        (uint64_t *)(((uintptr_t)(b)) + CQE_SZ(i) - (o)))
  44
  45 #ifdef RTE_LIBRTE_MEMPOOL_DEBUG
  46 static inline void
  47 nix_mbuf_validate_next(struct rte_mbuf *m)
  48 {
  49         if (m->nb_segs == 1 && m->next) {
  50                 rte_panic("mbuf->next[%p] valid when mbuf->nb_segs is %d",
  51                         m->next, m->nb_segs);
  52         }
  53 }
  54 #else
  55 static inline void
  56 nix_mbuf_validate_next(struct rte_mbuf *m)
  57 {
  58         RTE_SET_USED(m);
  59 }
  60 #endif
  61
  62 #define NIX_RX_SEC_REASSEMBLY_F \
  63         (NIX_RX_REAS_F | NIX_RX_OFFLOAD_SECURITY_F)
  64
  65 static inline rte_eth_ip_reassembly_dynfield_t *
  66 cnxk_ip_reassembly_dynfield(struct rte_mbuf *mbuf,
  67                 int ip_reassembly_dynfield_offset)
  68 {
  69         return RTE_MBUF_DYNFIELD(mbuf, ip_reassembly_dynfield_offset,
  70                                  rte_eth_ip_reassembly_dynfield_t *);
  71 }
  72
  73 union mbuf_initializer {
  74         struct {
  75                 uint16_t data_off;
  76                 uint16_t refcnt;
  77                 uint16_t nb_segs;
  78                 uint16_t port;
  79         } fields;
  80         uint64_t value;
  81 };
  82
  83 static __rte_always_inline uint64_t
  84 nix_clear_data_off(uint64_t oldval)
  85 {
  86         union mbuf_initializer mbuf_init = {.value = oldval};
  87
  88         mbuf_init.fields.data_off = 0;
  89         return mbuf_init.value;
  90 }
  91
  92 static __rte_always_inline struct rte_mbuf *
  93 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
  94 {
  95         rte_iova_t buff;
  96
  97         /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
  98         buff = *((rte_iova_t *)((uint64_t *)cq + 9));
  99         return (struct rte_mbuf *)(buff - data_off);
 100 }
 101
 102 static __rte_always_inline void
 103 nix_sec_flush_meta_burst(uint16_t lmt_id, uint64_t data, uint16_t lnum,
 104                          uintptr_t aura_handle)
 105 {
 106         uint64_t pa;
 107
 108         /* Prepare PA and Data */
 109         pa = roc_npa_aura_handle_to_base(aura_handle) + NPA_LF_AURA_BATCH_FREE0;
 110         pa |= ((data & 0x7) << 4);
 111
 112         data >>= 3;
 113         data <<= 19;
 114         data |= (uint64_t)lmt_id;
 115         data |= (uint64_t)(lnum - 1) << 12;
 116
 117         roc_lmt_submit_steorl(data, pa);
 118 }
 119
 120 static __rte_always_inline void
 121 nix_sec_flush_meta(uintptr_t laddr, uint16_t lmt_id, uint8_t loff,
 122                    uintptr_t aura_handle)
 123 {
 124         uint64_t pa;
 125
 126         /* laddr is pointing to first pointer */
 127         laddr -= 8;
 128
 129         /* Trigger free either on lmtline full or different aura handle */
 130         pa = roc_npa_aura_handle_to_base(aura_handle) + NPA_LF_AURA_BATCH_FREE0;
 131
 132         /* Update aura handle */
 133         *(uint64_t *)laddr = (((uint64_t)(loff & 0x1) << 32) |
 134                               roc_npa_aura_handle_to_aura(aura_handle));
 135
 136         pa |= ((uint64_t)(loff >> 1) << 4);
 137         roc_lmt_submit_steorl(lmt_id, pa);
 138 }
 139
 140 static struct rte_mbuf *
 141 nix_sec_attach_frags(const struct cpt_parse_hdr_s *hdr,
 142                      struct cn10k_inb_priv_data *inb_priv,
 143                      const uint64_t mbuf_init)
 144 {
 145         struct rte_mbuf *head, *mbuf, *mbuf_prev;
 146         uint32_t offset = hdr->w2.fi_offset;
 147         union nix_rx_parse_u *frag_rx;
 148         struct cpt_frag_info_s *finfo;
 149         uint64_t *frag_ptr, ol_flags;
 150         uint16_t frag_size;
 151         uint16_t rlen;
 152         uint64_t *wqe;
 153         int off;
 154
 155         off = inb_priv->reass_dynfield_off;
 156         ol_flags = BIT_ULL(inb_priv->reass_dynflag_bit);
 157         ol_flags |= RTE_MBUF_F_RX_SEC_OFFLOAD;
 158
 159         /* offset of 0 implies 256B, otherwise it implies offset*8B */
 160         offset = (((offset - 1) & 0x1f) + 1) * 8;
 161         finfo = RTE_PTR_ADD(hdr, offset + hdr->w2.fi_pad);
 162
 163         /* Frag-0: */
 164         wqe = (uint64_t *)(rte_be_to_cpu_64(hdr->wqe_ptr));
 165         rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;
 166
 167         frag_rx = (union nix_rx_parse_u *)(wqe + 1);
 168         frag_size = rlen + frag_rx->lcptr - frag_rx->laptr;
 169         frag_rx->pkt_lenm1 = frag_size - 1;
 170
 171         mbuf = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));
 172         *(uint64_t *)(&mbuf->rearm_data) = mbuf_init;
 173         mbuf->data_len = frag_size;
 174         mbuf->pkt_len = frag_size;
 175         mbuf->ol_flags = ol_flags;
 176         mbuf->next = NULL;
 177         head = mbuf;
 178         mbuf_prev = mbuf;
 179         /* Update dynamic field with userdata */
 180         *rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;
 181
 182         cnxk_ip_reassembly_dynfield(head, off)->nb_frags = hdr->w0.num_frags - 1;
 183         cnxk_ip_reassembly_dynfield(head, off)->next_frag = NULL;
 184
 185         /* Frag-1: */
 186         if (hdr->w0.num_frags > 1) {
 187                 wqe = (uint64_t *)(rte_be_to_cpu_64(hdr->frag1_wqe_ptr));
 188                 rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;
 189
 190                 frag_rx = (union nix_rx_parse_u *)(wqe + 1);
 191                 frag_size = rlen + frag_rx->lcptr - frag_rx->laptr;
 192                 frag_rx->pkt_lenm1 = frag_size - 1;
 193
 194                 mbuf = (struct rte_mbuf *)((uintptr_t)wqe -
 195                                 sizeof(struct rte_mbuf));
 196                 *(uint64_t *)(&mbuf->rearm_data) = mbuf_init;
 197                 mbuf->data_len = frag_size;
 198                 mbuf->pkt_len = frag_size;
 199                 mbuf->ol_flags = ol_flags;
 200                 mbuf->next = NULL;
 201
 202                 /* Update dynamic field with userdata */
 203                 *rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;
 204
 205                 cnxk_ip_reassembly_dynfield(mbuf, off)->nb_frags =
 206                         hdr->w0.num_frags - 2;
 207                 cnxk_ip_reassembly_dynfield(mbuf, off)->next_frag = NULL;
 208                 cnxk_ip_reassembly_dynfield(mbuf_prev, off)->next_frag = mbuf;
 209                 mbuf_prev = mbuf;
 210         }
 211
 212         /* Frag-2: */
 213         if (hdr->w0.num_frags > 2) {
 214                 frag_ptr = (uint64_t *)(finfo + 1);
 215                 wqe = (uint64_t *)(rte_be_to_cpu_64(*frag_ptr));
 216                 rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;
 217
 218                 frag_rx = (union nix_rx_parse_u *)(wqe + 1);
 219                 frag_size = rlen + frag_rx->lcptr - frag_rx->laptr;
 220                 frag_rx->pkt_lenm1 = frag_size - 1;
 221
 222                 mbuf = (struct rte_mbuf *)((uintptr_t)wqe -
 223                                 sizeof(struct rte_mbuf));
 224                 *(uint64_t *)(&mbuf->rearm_data) = mbuf_init;
 225                 mbuf->data_len = frag_size;
 226                 mbuf->pkt_len = frag_size;
 227                 mbuf->ol_flags = ol_flags;
 228                 mbuf->next = NULL;
 229
 230                 /* Update dynamic field with userdata */
 231                 *rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;
 232
 233                 cnxk_ip_reassembly_dynfield(mbuf, off)->nb_frags =
 234                         hdr->w0.num_frags - 3;
 235                 cnxk_ip_reassembly_dynfield(mbuf, off)->next_frag = NULL;
 236                 cnxk_ip_reassembly_dynfield(mbuf_prev, off)->next_frag = mbuf;
 237                 mbuf_prev = mbuf;
 238         }
 239
 240         /* Frag-3: */
 241         if (hdr->w0.num_frags > 3) {
 242                 wqe = (uint64_t *)(rte_be_to_cpu_64(*(frag_ptr + 1)));
 243                 rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;
 244
 245                 frag_rx = (union nix_rx_parse_u *)(wqe + 1);
 246                 frag_size = rlen + frag_rx->lcptr - frag_rx->laptr;
 247                 frag_rx->pkt_lenm1 = frag_size - 1;
 248
 249                 mbuf = (struct rte_mbuf *)((uintptr_t)wqe -
 250                                 sizeof(struct rte_mbuf));
 251                 *(uint64_t *)(&mbuf->rearm_data) = mbuf_init;
 252                 mbuf->data_len = frag_size;
 253                 mbuf->pkt_len = frag_size;
 254                 mbuf->ol_flags = ol_flags;
 255                 mbuf->next = NULL;
 256
 257                 /* Update dynamic field with userdata */
 258                 *rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;
 259
 260                 cnxk_ip_reassembly_dynfield(mbuf, off)->nb_frags =
 261                         hdr->w0.num_frags - 4;
 262                 cnxk_ip_reassembly_dynfield(mbuf, off)->next_frag = NULL;
 263                 cnxk_ip_reassembly_dynfield(mbuf_prev, off)->next_frag = mbuf;
 264         }
 265         return head;
 266 }
 267
 268 static struct rte_mbuf *
 269 nix_sec_reassemble_frags(const struct cpt_parse_hdr_s *hdr, uint64_t cq_w1,
 270                         uint64_t cq_w5, uint64_t mbuf_init)
 271 {
 272         uint32_t fragx_sum, pkt_hdr_len, l3_hdr_size;
 273         uint32_t offset = hdr->w2.fi_offset;
 274         union nix_rx_parse_u *inner_rx;
 275         uint16_t rlen, data_off, b_off;
 276         union nix_rx_parse_u *frag_rx;
 277         struct cpt_frag_info_s *finfo;
 278         struct rte_mbuf *head, *mbuf;
 279         rte_iova_t *inner_iova;
 280         uint64_t *frag_ptr;
 281         uint16_t frag_size;
 282         uint64_t *wqe;
 283
 284         /* Base data offset */
 285         b_off = mbuf_init & 0xFFFFUL;
 286         mbuf_init &= ~0xFFFFUL;
 287
 288         /* offset of 0 implies 256B, otherwise it implies offset*8B */
 289         offset = (((offset - 1) & 0x1f) + 1) * 8;
 290         finfo = RTE_PTR_ADD(hdr, offset + hdr->w2.fi_pad);
 291
 292         /* Frag-0: */
 293         wqe = (uint64_t *)rte_be_to_cpu_64(hdr->wqe_ptr);
 294         inner_rx = (union nix_rx_parse_u *)(wqe + 1);
 295         inner_iova = (rte_iova_t *)*(wqe + 9);
 296
 297         /* Update only the upper 28-bits from meta pkt parse info */
 298         *((uint64_t *)inner_rx) = ((*((uint64_t *)inner_rx) & ((1ULL << 36) - 1)) |
 299                                 (cq_w1 & ~((1ULL << 36) - 1)));
 300
 301         rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;
 302         frag_size = rlen + ((cq_w5 >> 16) & 0xFF) - (cq_w5 & 0xFF);
 303         fragx_sum = rte_be_to_cpu_16(finfo->w1.frag_size0);
 304         pkt_hdr_len = frag_size - fragx_sum;
 305
 306         mbuf = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));
 307         *(uint64_t *)(&mbuf->rearm_data) = mbuf_init | b_off;
 308         mbuf->data_len = frag_size;
 309         head = mbuf;
 310
 311         if (inner_rx->lctype == NPC_LT_LC_IP) {
 312                 struct rte_ipv4_hdr *hdr = (struct rte_ipv4_hdr *)
 313                                 RTE_PTR_ADD(inner_iova, inner_rx->lcptr);
 314
 315                 l3_hdr_size = (hdr->version_ihl & 0xf) << 2;
 316         } else {
 317                 struct rte_ipv6_hdr *hdr = (struct rte_ipv6_hdr *)
 318                                 RTE_PTR_ADD(inner_iova, inner_rx->lcptr);
 319                 size_t ext_len = sizeof(struct rte_ipv6_hdr);
 320                 uint8_t *nxt_hdr = (uint8_t *)hdr;
 321                 int nh = hdr->proto;
 322
 323                 l3_hdr_size = 0;
 324                 while (nh != -EINVAL) {
 325                         nxt_hdr += ext_len;
 326                         l3_hdr_size += ext_len;
 327                         nh = rte_ipv6_get_next_ext(nxt_hdr, nh, &ext_len);
 328                 }
 329         }
 330
 331         /* Frag-1: */
 332         wqe = (uint64_t *)(rte_be_to_cpu_64(hdr->frag1_wqe_ptr));
 333         frag_size = rte_be_to_cpu_16(finfo->w1.frag_size1);
 334         frag_rx = (union nix_rx_parse_u *)(wqe + 1);
 335
 336         mbuf->next = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));
 337         mbuf = mbuf->next;
 338         data_off = b_off + frag_rx->lcptr + l3_hdr_size;
 339         *(uint64_t *)(&mbuf->rearm_data) = mbuf_init | data_off;
 340         mbuf->data_len = frag_size;
 341         fragx_sum += frag_size;
 342
 343         /* Frag-2: */
 344         if (hdr->w0.num_frags > 2) {
 345                 frag_ptr = (uint64_t *)(finfo + 1);
 346                 wqe = (uint64_t *)(rte_be_to_cpu_64(*frag_ptr));
 347                 frag_size = rte_be_to_cpu_16(finfo->w1.frag_size2);
 348                 frag_rx = (union nix_rx_parse_u *)(wqe + 1);
 349
 350                 mbuf->next = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));
 351                 mbuf = mbuf->next;
 352                 data_off = b_off + frag_rx->lcptr + l3_hdr_size;
 353                 *(uint64_t *)(&mbuf->rearm_data) = mbuf_init | data_off;
 354                 mbuf->data_len = frag_size;
 355                 fragx_sum += frag_size;
 356         }
 357
 358         /* Frag-3: */
 359         if (hdr->w0.num_frags > 3) {
 360                 wqe = (uint64_t *)(rte_be_to_cpu_64(*(frag_ptr + 1)));
 361                 frag_size = rte_be_to_cpu_16(finfo->w1.frag_size3);
 362                 frag_rx = (union nix_rx_parse_u *)(wqe + 1);
 363
 364                 mbuf->next = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));
 365                 mbuf = mbuf->next;
 366                 data_off = b_off + frag_rx->lcptr + l3_hdr_size;
 367                 *(uint64_t *)(&mbuf->rearm_data) = mbuf_init | data_off;
 368                 mbuf->data_len = frag_size;
 369                 fragx_sum += frag_size;
 370         }
 371
 372         if (inner_rx->lctype == NPC_LT_LC_IP) {
 373                 struct rte_ipv4_hdr *hdr = (struct rte_ipv4_hdr *)
 374                                 RTE_PTR_ADD(inner_iova, inner_rx->lcptr);
 375
 376                 hdr->fragment_offset = 0;
 377                 hdr->total_length = rte_cpu_to_be_16(fragx_sum + l3_hdr_size);
 378                 hdr->hdr_checksum = 0;
 379                 hdr->hdr_checksum = rte_ipv4_cksum(hdr);
 380
 381                 inner_rx->pkt_lenm1 = pkt_hdr_len + fragx_sum - 1;
 382         } else {
 383                 /* Remove the frag header by moving header 8 bytes forward */
 384                 struct rte_ipv6_hdr *hdr = (struct rte_ipv6_hdr *)
 385                                 RTE_PTR_ADD(inner_iova, inner_rx->lcptr);
 386
 387                 hdr->payload_len = rte_cpu_to_be_16(fragx_sum + l3_hdr_size -
 388                                         8 - sizeof(struct rte_ipv6_hdr));
 389
 390                 rte_memcpy(rte_pktmbuf_mtod_offset(head, void *, 8),
 391                            rte_pktmbuf_mtod(head, void *),
 392                            inner_rx->lcptr + sizeof(struct rte_ipv6_hdr));
 393
 394                 inner_rx->pkt_lenm1 = pkt_hdr_len + fragx_sum - 8 - 1;
 395                 head->data_len -= 8;
 396                 head->data_off += 8;
 397         }
 398         mbuf->next = NULL;
 399         head->pkt_len = inner_rx->pkt_lenm1 + 1;
 400         head->nb_segs = hdr->w0.num_frags;
 401
 402         return head;
 403 }
 404
 405 static __rte_always_inline struct rte_mbuf *
 406 nix_sec_meta_to_mbuf_sc(uint64_t cq_w1, uint64_t cq_w5, const uint64_t sa_base,
 407                         uintptr_t laddr, uint8_t *loff, struct rte_mbuf *mbuf,
 408                         uint16_t data_off, const uint16_t flags,
 409                         const uint64_t mbuf_init)
 410 {
 411         const void *__p = (void *)((uintptr_t)mbuf + (uint16_t)data_off);
 412         const struct cpt_parse_hdr_s *hdr = (const struct cpt_parse_hdr_s *)__p;
 413         struct cn10k_inb_priv_data *inb_priv;
 414         struct rte_mbuf *inner = NULL;
 415         uint64_t res_w1;
 416         uint32_t sa_idx;
 417         uint16_t uc_cc;
 418         uint32_t len;
 419         void *inb_sa;
 420         uint64_t w0;
 421
 422         if ((flags & NIX_RX_REAS_F) && (cq_w1 & BIT(11))) {
 423                 /* Get SPI from CPT_PARSE_S's cookie(already swapped) */
 424                 w0 = hdr->w0.u64;
 425                 sa_idx = w0 >> 32;
 426
 427                 inb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);
 428                 inb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);
 429
 430                 if (!hdr->w0.num_frags) {
 431                         /* No Reassembly or inbound error */
 432                         inner = (struct rte_mbuf *)
 433                                 (rte_be_to_cpu_64(hdr->wqe_ptr) -
 434                                  sizeof(struct rte_mbuf));
 435
 436                         /* Update dynamic field with userdata */
 437                         *rte_security_dynfield(inner) =
 438                                 (uint64_t)inb_priv->userdata;
 439
 440                         /* CPT result(struct cpt_cn10k_res_s) is at
 441                          * after first IOVA in meta
 442                          */
 443                         res_w1 = *((uint64_t *)(&inner[1]) + 10);
 444                         uc_cc = res_w1 & 0xFF;
 445
 446                         /* Calculate inner packet length */
 447                         len = ((res_w1 >> 16) & 0xFFFF) + hdr->w2.il3_off -
 448                                 sizeof(struct cpt_parse_hdr_s) - (w0 & 0x7);
 449                         inner->pkt_len = len;
 450                         inner->data_len = len;
 451                         *(uint64_t *)(&inner->rearm_data) = mbuf_init;
 452
 453                         inner->ol_flags = ((uc_cc == CPT_COMP_WARN) ?
 454                                            RTE_MBUF_F_RX_SEC_OFFLOAD :
 455                                            (RTE_MBUF_F_RX_SEC_OFFLOAD |
 456                                             RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));
 457                 } else if (!(hdr->w0.err_sum) && !(hdr->w0.reas_sts)) {
 458                         /* Reassembly success */
 459                         inner = nix_sec_reassemble_frags(hdr, cq_w1, cq_w5,
 460                                                          mbuf_init);
 461
 462                         /* Update dynamic field with userdata */
 463                         *rte_security_dynfield(inner) =
 464                                 (uint64_t)inb_priv->userdata;
 465
 466                         /* Assume success */
 467                         inner->ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD;
 468                 } else {
 469                         /* Reassembly failure */
 470                         inner = nix_sec_attach_frags(hdr, inb_priv, mbuf_init);
 471                 }
 472
 473                 /* Store meta in lmtline to free
 474                  * Assume all meta's from same aura.
 475                  */
 476                 *(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
 477                 *loff = *loff + 1;
 478
 479                 return inner;
 480         } else if (cq_w1 & BIT(11)) {
 481                 inner = (struct rte_mbuf *)(rte_be_to_cpu_64(hdr->wqe_ptr) -
 482                                             sizeof(struct rte_mbuf));
 483
 484                 /* Get SPI from CPT_PARSE_S's cookie(already swapped) */
 485                 w0 = hdr->w0.u64;
 486                 sa_idx = w0 >> 32;
 487
 488                 inb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);
 489                 inb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);
 490
 491                 /* Update dynamic field with userdata */
 492                 *rte_security_dynfield(inner) = (uint64_t)inb_priv->userdata;
 493
 494                 /* Update l2 hdr length first */
 495
 496                 /* CPT result(struct cpt_cn10k_res_s) is at
 497                  * after first IOVA in meta
 498                  */
 499                 res_w1 = *((uint64_t *)(&inner[1]) + 10);
 500                 uc_cc = res_w1 & 0xFF;
 501
 502                 /* Calculate inner packet length */
 503                 len = ((res_w1 >> 16) & 0xFFFF) + hdr->w2.il3_off -
 504                         sizeof(struct cpt_parse_hdr_s) - (w0 & 0x7);
 505                 inner->pkt_len = len;
 506                 inner->data_len = len;
 507                 *(uint64_t *)(&inner->rearm_data) = mbuf_init;
 508
 509                 inner->ol_flags = ((uc_cc == CPT_COMP_WARN) ?
 510                                    RTE_MBUF_F_RX_SEC_OFFLOAD :
 511                                    (RTE_MBUF_F_RX_SEC_OFFLOAD |
 512                                     RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));
 513
 514                 /* Store meta in lmtline to free
 515                  * Assume all meta's from same aura.
 516                  */
 517                 *(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
 518                 *loff = *loff + 1;
 519
 520                 /* Mark meta mbuf as put */
 521                 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 0);
 522
 523                 /* Mark inner mbuf as get */
 524                 RTE_MEMPOOL_CHECK_COOKIES(inner->pool, (void **)&inner, 1, 1);
 525
 526                 return inner;
 527         }
 528
 529         return mbuf;
 530 }
 531
 532 #if defined(RTE_ARCH_ARM64)
 533
 534 static __rte_always_inline struct rte_mbuf *
 535 nix_sec_meta_to_mbuf(uint64_t cq_w1, uint64_t cq_w5, uintptr_t sa_base,
 536                      uintptr_t laddr, uint8_t *loff, struct rte_mbuf *mbuf,
 537                      uint16_t data_off, uint8x16_t *rx_desc_field1,
 538                      uint64_t *ol_flags, const uint16_t flags,
 539                      uint64x2_t *rearm)
 540 {
 541         const void *__p = (void *)((uintptr_t)mbuf + (uint16_t)data_off);
 542         const struct cpt_parse_hdr_s *hdr = (const struct cpt_parse_hdr_s *)__p;
 543         uint64_t mbuf_init = vgetq_lane_u64(*rearm, 0);
 544         struct cn10k_inb_priv_data *inb_priv;
 545         struct rte_mbuf *inner;
 546         uint64_t *sg, res_w1;
 547         uint32_t sa_idx;
 548         void *inb_sa;
 549         uint16_t len;
 550         uint64_t w0;
 551
 552         if ((flags & NIX_RX_REAS_F) && (cq_w1 & BIT(11))) {
 553                 w0 = hdr->w0.u64;
 554                 sa_idx = w0 >> 32;
 555
 556                 /* Get SPI from CPT_PARSE_S's cookie(already swapped) */
 557                 w0 = hdr->w0.u64;
 558                 sa_idx = w0 >> 32;
 559
 560                 inb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);
 561                 inb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);
 562
 563                 /* Clear checksum flags */
 564                 *ol_flags &= ~(RTE_MBUF_F_RX_L4_CKSUM_MASK |
 565                                RTE_MBUF_F_RX_IP_CKSUM_MASK);
 566
 567                 if (!hdr->w0.num_frags) {
 568                         /* No Reassembly or inbound error */
 569                         inner = (struct rte_mbuf *)
 570                                 (rte_be_to_cpu_64(hdr->wqe_ptr) -
 571                                  sizeof(struct rte_mbuf));
 572                         /* Update dynamic field with userdata */
 573                         *rte_security_dynfield(inner) =
 574                                 (uint64_t)inb_priv->userdata;
 575
 576                         /* CPT result(struct cpt_cn10k_res_s) is at
 577                          * after first IOVA in meta
 578                          */
 579                         sg = (uint64_t *)(inner + 1);
 580                         res_w1 = sg[10];
 581
 582                         /* Clear checksum flags and update security flag */
 583                         *ol_flags &= ~(RTE_MBUF_F_RX_L4_CKSUM_MASK |
 584                                        RTE_MBUF_F_RX_IP_CKSUM_MASK);
 585                         *ol_flags |=
 586                                 (((res_w1 & 0xFF) == CPT_COMP_WARN) ?
 587                                  RTE_MBUF_F_RX_SEC_OFFLOAD :
 588                                  (RTE_MBUF_F_RX_SEC_OFFLOAD |
 589                                   RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));
 590                         /* Calculate inner packet length */
 591                         len = ((res_w1 >> 16) & 0xFFFF) +
 592                                 hdr->w2.il3_off -
 593                                 sizeof(struct cpt_parse_hdr_s) -
 594                                 (w0 & 0x7);
 595                         /* Update pkt_len and data_len */
 596                         *rx_desc_field1 =
 597                                 vsetq_lane_u16(len, *rx_desc_field1, 2);
 598                         *rx_desc_field1 =
 599                                 vsetq_lane_u16(len, *rx_desc_field1, 4);
 600
 601                 } else if (!(hdr->w0.err_sum) && !(hdr->w0.reas_sts)) {
 602                         /* Reassembly success */
 603                         inner = nix_sec_reassemble_frags(hdr, cq_w1, cq_w5,
 604                                                          mbuf_init);
 605                         sg = (uint64_t *)(inner + 1);
 606                         res_w1 = sg[10];
 607
 608                         /* Update dynamic field with userdata */
 609                         *rte_security_dynfield(inner) =
 610                                 (uint64_t)inb_priv->userdata;
 611
 612                         /* Assume success */
 613                         *ol_flags |= RTE_MBUF_F_RX_SEC_OFFLOAD;
 614
 615                         /* Update pkt_len and data_len */
 616                         *rx_desc_field1 = vsetq_lane_u16(inner->pkt_len,
 617                                                          *rx_desc_field1, 2);
 618                         *rx_desc_field1 = vsetq_lane_u16(inner->data_len,
 619                                                          *rx_desc_field1, 4);
 620
 621                         /* Data offset might be updated */
 622                         mbuf_init = *(uint64_t *)(&inner->rearm_data);
 623                         *rearm = vsetq_lane_u64(mbuf_init, *rearm, 0);
 624                 } else {
 625                         /* Reassembly failure */
 626                         inner = nix_sec_attach_frags(hdr, inb_priv, mbuf_init);
 627                         *ol_flags |= inner->ol_flags;
 628
 629                         /* Update pkt_len and data_len */
 630                         *rx_desc_field1 = vsetq_lane_u16(inner->pkt_len,
 631                                                          *rx_desc_field1, 2);
 632                         *rx_desc_field1 = vsetq_lane_u16(inner->data_len,
 633                                                          *rx_desc_field1, 4);
 634                 }
 635
 636                 /* Store meta in lmtline to free
 637                  * Assume all meta's from same aura.
 638                  */
 639                 *(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
 640                 *loff = *loff + 1;
 641
 642                 /* Return inner mbuf */
 643                 return inner;
 644
 645         } else if (cq_w1 & BIT(11)) {
 646                 inner = (struct rte_mbuf *)(rte_be_to_cpu_64(hdr->wqe_ptr) -
 647                                             sizeof(struct rte_mbuf));
 648                 /* Get SPI from CPT_PARSE_S's cookie(already swapped) */
 649                 w0 = hdr->w0.u64;
 650                 sa_idx = w0 >> 32;
 651
 652                 inb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);
 653                 inb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);
 654
 655                 /* Update dynamic field with userdata */
 656                 *rte_security_dynfield(inner) = (uint64_t)inb_priv->userdata;
 657
 658                 /* CPT result(struct cpt_cn10k_res_s) is at
 659                  * after first IOVA in meta
 660                  */
 661                 sg = (uint64_t *)(inner + 1);
 662                 res_w1 = sg[10];
 663
 664                 /* Clear checksum flags and update security flag */
 665                 *ol_flags &= ~(RTE_MBUF_F_RX_L4_CKSUM_MASK | RTE_MBUF_F_RX_IP_CKSUM_MASK);
 666                 *ol_flags |= (((res_w1 & 0xFF) == CPT_COMP_WARN) ?
 667                               RTE_MBUF_F_RX_SEC_OFFLOAD :
 668                               (RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));
 669                 /* Calculate inner packet length */
 670                 len = ((res_w1 >> 16) & 0xFFFF) + hdr->w2.il3_off -
 671                         sizeof(struct cpt_parse_hdr_s) - (w0 & 0x7);
 672                 /* Update pkt_len and data_len */
 673                 *rx_desc_field1 = vsetq_lane_u16(len, *rx_desc_field1, 2);
 674                 *rx_desc_field1 = vsetq_lane_u16(len, *rx_desc_field1, 4);
 675
 676                 /* Store meta in lmtline to free
 677                  * Assume all meta's from same aura.
 678                  */
 679                 *(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
 680                 *loff = *loff + 1;
 681
 682                 /* Mark meta mbuf as put */
 683                 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 0);
 684
 685                 /* Mark inner mbuf as get */
 686                 RTE_MEMPOOL_CHECK_COOKIES(inner->pool, (void **)&inner, 1, 1);
 687
 688                 /* Return inner mbuf */
 689                 return inner;
 690         }
 691
 692         /* Return same mbuf as it is not a decrypted pkt */
 693         return mbuf;
 694 }
 695 #endif
 696
 697 static __rte_always_inline uint32_t
 698 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
 699 {
 700         const uint16_t *const ptype = lookup_mem;
 701         const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
 702         const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
 703         const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
 704
 705         return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
 706 }
 707
 708 static __rte_always_inline uint32_t
 709 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
 710 {
 711         const uint32_t *const ol_flags =
 712                 (const uint32_t *)((const uint8_t *)lookup_mem +
 713                                    PTYPE_ARRAY_SZ);
 714
 715         return ol_flags[(in & 0xfff00000) >> 20];
 716 }
 717
 718 static inline uint64_t
 719 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
 720                     struct rte_mbuf *mbuf)
 721 {
 722         /* There is no separate bit to check match_id
 723          * is valid or not? and no flag to identify it is an
 724          * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
 725          * action. The former case addressed through 0 being invalid
 726          * value and inc/dec match_id pair when MARK is activated.
 727          * The later case addressed through defining
 728          * CNXK_FLOW_MARK_DEFAULT as value for
 729          * RTE_FLOW_ACTION_TYPE_MARK.
 730          * This would translate to not use
 731          * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
 732          * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
 733          * i.e valid mark_id's are from
 734          * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
 735          */
 736         if (likely(match_id)) {
 737                 ol_flags |= RTE_MBUF_F_RX_FDIR;
 738                 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
 739                         ol_flags |= RTE_MBUF_F_RX_FDIR_ID;
 740                         mbuf->hash.fdir.hi = match_id - 1;
 741                 }
 742         }
 743
 744         return ol_flags;
 745 }
 746
 747 static __rte_always_inline void
 748 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
 749                     uint64_t rearm, const uint16_t flags)
 750 {
 751         const rte_iova_t *iova_list;
 752         struct rte_mbuf *head;
 753         const rte_iova_t *eol;
 754         uint8_t nb_segs;
 755         uint64_t sg;
 756
 757         sg = *(const uint64_t *)(rx + 1);
 758         nb_segs = (sg >> 48) & 0x3;
 759
 760         if (nb_segs == 1 && !(flags & NIX_RX_SEC_REASSEMBLY_F)) {
 761                 mbuf->next = NULL;
 762                 return;
 763         }
 764
 765         mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
 766                                                CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
 767         mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
 768                                           CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
 769         mbuf->nb_segs = nb_segs;
 770         sg = sg >> 16;
 771
 772         eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
 773         /* Skip SG_S and first IOVA*/
 774         iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
 775         nb_segs--;
 776
 777         rearm = rearm & ~0xFFFF;
 778
 779         head = mbuf;
 780         while (nb_segs) {
 781                 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
 782                 mbuf = mbuf->next;
 783
 784                 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
 785
 786                 mbuf->data_len = sg & 0xFFFF;
 787                 sg = sg >> 16;
 788                 *(uint64_t *)(&mbuf->rearm_data) = rearm;
 789                 nb_segs--;
 790                 iova_list++;
 791
 792                 if (!nb_segs && (iova_list + 1 < eol)) {
 793                         sg = *(const uint64_t *)(iova_list);
 794                         nb_segs = (sg >> 48) & 0x3;
 795                         head->nb_segs += nb_segs;
 796                         iova_list = (const rte_iova_t *)(iova_list + 1);
 797                 }
 798         }
 799         mbuf->next = NULL;
 800 }
 801
 802 static __rte_always_inline void
 803 cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
 804                       struct rte_mbuf *mbuf, const void *lookup_mem,
 805                       const uint64_t val, const uint16_t flag)
 806 {
 807         const union nix_rx_parse_u *rx =
 808                 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
 809         const uint64_t w1 = *(const uint64_t *)rx;
 810         uint16_t len = rx->pkt_lenm1 + 1;
 811         uint64_t ol_flags = 0;
 812
 813         if (flag & NIX_RX_OFFLOAD_PTYPE_F)
 814                 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
 815         else
 816                 mbuf->packet_type = 0;
 817
 818         if (flag & NIX_RX_OFFLOAD_RSS_F) {
 819                 mbuf->hash.rss = tag;
 820                 ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
 821         }
 822
 823         /* Skip rx ol flags extraction for Security packets */
 824         if ((!(flag & NIX_RX_SEC_REASSEMBLY_F) || !(w1 & BIT(11))) &&
 825                         flag & NIX_RX_OFFLOAD_CHECKSUM_F)
 826                 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
 827
 828         if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
 829                 if (rx->vtag0_gone) {
 830                         ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
 831                         mbuf->vlan_tci = rx->vtag0_tci;
 832                 }
 833                 if (rx->vtag1_gone) {
 834                         ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
 835                         mbuf->vlan_tci_outer = rx->vtag1_tci;
 836                 }
 837         }
 838
 839         if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
 840                 ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
 841
 842         /* Packet data length and ol flags is already updated for sec */
 843         if (flag & NIX_RX_SEC_REASSEMBLY_F && w1 & BIT_ULL(11)) {
 844                 mbuf->ol_flags |= ol_flags;
 845         } else {
 846                 mbuf->ol_flags = ol_flags;
 847                 mbuf->pkt_len = len;
 848                 mbuf->data_len = len;
 849                 *(uint64_t *)(&mbuf->rearm_data) = val;
 850         }
 851
 852         if (flag & NIX_RX_MULTI_SEG_F)
 853                 /*
 854                  * For multi segment packets, mbuf length correction according
 855                  * to Rx timestamp length will be handled later during
 856                  * timestamp data process.
 857                  * Hence, flag argument is not required.
 858                  */
 859                 nix_cqe_xtract_mseg(rx, mbuf, val, 0);
 860 }
 861
 862 static inline uint16_t
 863 nix_rx_nb_pkts(struct cn10k_eth_rxq *rxq, const uint64_t wdata,
 864                const uint16_t pkts, const uint32_t qmask)
 865 {
 866         uint32_t available = rxq->available;
 867
 868         /* Update the available count if cached value is not enough */
 869         if (unlikely(available < pkts)) {
 870                 uint64_t reg, head, tail;
 871
 872                 /* Use LDADDA version to avoid reorder */
 873                 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
 874                 /* CQ_OP_STATUS operation error */
 875                 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
 876                     reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
 877                         return 0;
 878
 879                 tail = reg & 0xFFFFF;
 880                 head = (reg >> 20) & 0xFFFFF;
 881                 if (tail < head)
 882                         available = tail - head + qmask + 1;
 883                 else
 884                         available = tail - head;
 885
 886                 rxq->available = available;
 887         }
 888
 889         return RTE_MIN(pkts, available);
 890 }
 891
 892 static __rte_always_inline void
 893 cn10k_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
 894                         struct cnxk_timesync_info *tstamp,
 895                         const uint8_t ts_enable, uint64_t *tstamp_ptr)
 896 {
 897         if (ts_enable) {
 898                 mbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
 899                 mbuf->data_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
 900
 901                 /* Reading the rx timestamp inserted by CGX, viz at
 902                  * starting of the packet data.
 903                  */
 904                 *tstamp_ptr = ((*tstamp_ptr >> 32) * NSEC_PER_SEC) +
 905                         (*tstamp_ptr & 0xFFFFFFFFUL);
 906                 *cnxk_nix_timestamp_dynfield(mbuf, tstamp) =
 907                         rte_be_to_cpu_64(*tstamp_ptr);
 908                 /* RTE_MBUF_F_RX_IEEE1588_TMST flag needs to be set only in case
 909                  * PTP packets are received.
 910                  */
 911                 if (mbuf->packet_type == RTE_PTYPE_L2_ETHER_TIMESYNC) {
 912                         tstamp->rx_tstamp =
 913                                 *cnxk_nix_timestamp_dynfield(mbuf, tstamp);
 914                         tstamp->rx_ready = 1;
 915                         mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP |
 916                                 RTE_MBUF_F_RX_IEEE1588_TMST |
 917                                 tstamp->rx_tstamp_dynflag;
 918                 }
 919         }
 920 }
 921
 922 static __rte_always_inline uint16_t
 923 cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
 924                     const uint16_t flags)
 925 {
 926         struct cn10k_eth_rxq *rxq = rx_queue;
 927         const uint64_t mbuf_init = rxq->mbuf_initializer;
 928         const void *lookup_mem = rxq->lookup_mem;
 929         const uint64_t data_off = rxq->data_off;
 930         const uintptr_t desc = rxq->desc;
 931         const uint64_t wdata = rxq->wdata;
 932         const uint32_t qmask = rxq->qmask;
 933         uint64_t lbase = rxq->lmt_base;
 934         uint16_t packets = 0, nb_pkts;
 935         uint8_t loff = 0, lnum = 0;
 936         uint32_t head = rxq->head;
 937         struct nix_cqe_hdr_s *cq;
 938         struct rte_mbuf *mbuf;
 939         uint64_t aura_handle;
 940         uint64_t sa_base;
 941         uint16_t lmt_id;
 942         uint64_t laddr;
 943
 944         nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
 945
 946         if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
 947                 aura_handle = rxq->aura_handle;
 948                 sa_base = rxq->sa_base;
 949                 sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
 950                 ROC_LMT_BASE_ID_GET(lbase, lmt_id);
 951                 laddr = lbase;
 952                 laddr += 8;
 953         }
 954
 955         while (packets < nb_pkts) {
 956                 /* Prefetch N desc ahead */
 957                 rte_prefetch_non_temporal(
 958                         (void *)(desc + (CQE_SZ((head + 2) & qmask))));
 959                 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
 960
 961                 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
 962
 963                 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
 964                 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
 965
 966                 /* Translate meta to mbuf */
 967                 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
 968                         const uint64_t cq_w1 = *((const uint64_t *)cq + 1);
 969                         const uint64_t cq_w5 = *((const uint64_t *)cq + 5);
 970
 971                         mbuf = nix_sec_meta_to_mbuf_sc(cq_w1, cq_w5, sa_base, laddr,
 972                                                        &loff, mbuf, data_off,
 973                                                        flags, mbuf_init);
 974                 }
 975
 976                 cn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
 977                                       flags);
 978                 cn10k_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
 979                                         (flags & NIX_RX_OFFLOAD_TSTAMP_F),
 980                                         (uint64_t *)((uint8_t *)mbuf
 981                                                                 + data_off));
 982                 rx_pkts[packets++] = mbuf;
 983                 roc_prefetch_store_keep(mbuf);
 984                 head++;
 985                 head &= qmask;
 986
 987                 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
 988                         /* Flush when we don't have space for 4 meta */
 989                         if ((15 - loff) < 1) {
 990                                 nix_sec_flush_meta(laddr, lmt_id + lnum, loff,
 991                                                    aura_handle);
 992                                 lnum++;
 993                                 lnum &= BIT_ULL(ROC_LMT_LINES_PER_CORE_LOG2) -
 994                                         1;
 995                                 /* First pointer starts at 8B offset */
 996                                 laddr = (uintptr_t)LMT_OFF(lbase, lnum, 8);
 997                                 loff = 0;
 998                         }
 999                 }
1000         }
1001
1002         rxq->head = head;
1003         rxq->available -= nb_pkts;
1004
1005         /* Free all the CQs that we've processed */
1006         plt_write64((wdata | nb_pkts), rxq->cq_door);
1007
1008         /* Free remaining meta buffers if any */
1009         if (flags & NIX_RX_OFFLOAD_SECURITY_F && loff) {
1010                 nix_sec_flush_meta(laddr, lmt_id + lnum, loff, aura_handle);
1011                 plt_io_wmb();
1012         }
1013
1014         return nb_pkts;
1015 }
1016
1017 #if defined(RTE_ARCH_ARM64)
1018
1019 static __rte_always_inline uint64_t
1020 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
1021 {
1022         if (w2 & BIT_ULL(21) /* vtag0_gone */) {
1023                 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
1024                 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
1025         }
1026
1027         return ol_flags;
1028 }
1029
1030 static __rte_always_inline uint64_t
1031 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
1032 {
1033         if (w2 & BIT_ULL(23) /* vtag1_gone */) {
1034                 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
1035                 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
1036         }
1037
1038         return ol_flags;
1039 }
1040
1041 static __rte_always_inline uint16_t
1042 cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,
1043                            const uint16_t flags, void *lookup_mem,
1044                            struct cnxk_timesync_info *tstamp,
1045                            uintptr_t lmt_base)
1046 {
1047         struct cn10k_eth_rxq *rxq = args;
1048         const uint64_t mbuf_initializer = (flags & NIX_RX_VWQE_F) ?
1049                                                         *(uint64_t *)args :
1050                                                         rxq->mbuf_initializer;
1051         const uint64x2_t data_off = flags & NIX_RX_VWQE_F ?
1052                                         vdupq_n_u64(RTE_PKTMBUF_HEADROOM) :
1053                                         vdupq_n_u64(rxq->data_off);
1054         const uint32_t qmask = flags & NIX_RX_VWQE_F ? 0 : rxq->qmask;
1055         const uint64_t wdata = flags & NIX_RX_VWQE_F ? 0 : rxq->wdata;
1056         const uintptr_t desc = flags & NIX_RX_VWQE_F ? 0 : rxq->desc;
1057         uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
1058         uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
1059         uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
1060         uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
1061         uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
1062         uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
1063         struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
1064         uint64_t aura_handle, lbase, laddr;
1065         uint8_t loff = 0, lnum = 0, shft = 0;
1066         uint8x16_t f0, f1, f2, f3;
1067         uint16_t lmt_id, d_off;
1068         uint16_t packets = 0;
1069         uint16_t pkts_left;
1070         uintptr_t sa_base;
1071         uint32_t head;
1072         uintptr_t cq0;
1073
1074         if (!(flags & NIX_RX_VWQE_F)) {
1075                 lookup_mem = rxq->lookup_mem;
1076                 head = rxq->head;
1077
1078                 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
1079                 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
1080                 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
1081                 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
1082                 if (flags & NIX_RX_OFFLOAD_TSTAMP_F)
1083                         tstamp = rxq->tstamp;
1084         } else {
1085                 RTE_SET_USED(head);
1086         }
1087
1088         if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
1089                 if (flags & NIX_RX_VWQE_F) {
1090                         uint16_t port;
1091
1092                         mbuf0 = (struct rte_mbuf *)((uintptr_t)mbufs[0] -
1093                                                     sizeof(struct rte_mbuf));
1094                         /* Pick first mbuf's aura handle assuming all
1095                          * mbufs are from a vec and are from same RQ.
1096                          */
1097                         aura_handle = mbuf0->pool->pool_id;
1098                         /* Calculate offset from mbuf to actual data area */
1099                         d_off = ((uintptr_t)mbuf0->buf_addr - (uintptr_t)mbuf0);
1100                         d_off += (mbuf_initializer & 0xFFFF);
1101
1102                         /* Get SA Base from lookup tbl using port_id */
1103                         port = mbuf_initializer >> 48;
1104                         sa_base = cnxk_nix_sa_base_get(port, lookup_mem);
1105
1106                         lbase = lmt_base;
1107                 } else {
1108                         aura_handle = rxq->aura_handle;
1109                         d_off = rxq->data_off;
1110                         sa_base = rxq->sa_base;
1111                         lbase = rxq->lmt_base;
1112                 }
1113                 sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
1114                 ROC_LMT_BASE_ID_GET(lbase, lmt_id);
1115                 lnum = 0;
1116                 laddr = lbase;
1117                 laddr += 8;
1118         }
1119
1120         while (packets < pkts) {
1121                 if (!(flags & NIX_RX_VWQE_F)) {
1122                         /* Exit loop if head is about to wrap and become
1123                          * unaligned.
1124                          */
1125                         if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
1126                             NIX_DESCS_PER_LOOP) {
1127                                 pkts_left += (pkts - packets);
1128                                 break;
1129                         }
1130
1131                         cq0 = desc + CQE_SZ(head);
1132                 } else {
1133                         cq0 = (uintptr_t)&mbufs[packets];
1134                 }
1135
1136                 if (flags & NIX_RX_VWQE_F) {
1137                         if (pkts - packets > 4) {
1138                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0,
1139                                         4, 0, flags));
1140                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0,
1141                                         5, 0, flags));
1142                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0,
1143                                         6, 0, flags));
1144                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0,
1145                                         7, 0, flags));
1146
1147                                 if (likely(pkts - packets > 8)) {
1148                                         rte_prefetch1(CQE_PTR_OFF(cq0,
1149                                                 8, 0, flags));
1150                                         rte_prefetch1(CQE_PTR_OFF(cq0,
1151                                                 9, 0, flags));
1152                                         rte_prefetch1(CQE_PTR_OFF(cq0,
1153                                                 10, 0, flags));
1154                                         rte_prefetch1(CQE_PTR_OFF(cq0,
1155                                                 11, 0, flags));
1156                                         if (pkts - packets > 12) {
1157                                                 rte_prefetch1(CQE_PTR_OFF(cq0,
1158                                                         12, 0, flags));
1159                                                 rte_prefetch1(CQE_PTR_OFF(cq0,
1160                                                         13, 0, flags));
1161                                                 rte_prefetch1(CQE_PTR_OFF(cq0,
1162                                                         14, 0, flags));
1163                                                 rte_prefetch1(CQE_PTR_OFF(cq0,
1164                                                         15, 0, flags));
1165                                         }
1166                                 }
1167
1168                                 rte_prefetch0(CQE_PTR_DIFF(cq0,
1169                                         4, RTE_PKTMBUF_HEADROOM, flags));
1170                                 rte_prefetch0(CQE_PTR_DIFF(cq0,
1171                                         5, RTE_PKTMBUF_HEADROOM, flags));
1172                                 rte_prefetch0(CQE_PTR_DIFF(cq0,
1173                                         6, RTE_PKTMBUF_HEADROOM, flags));
1174                                 rte_prefetch0(CQE_PTR_DIFF(cq0,
1175                                         7, RTE_PKTMBUF_HEADROOM, flags));
1176
1177                                 if (likely(pkts - packets > 8)) {
1178                                         rte_prefetch0(CQE_PTR_DIFF(cq0,
1179                                                 8, RTE_PKTMBUF_HEADROOM, flags));
1180                                         rte_prefetch0(CQE_PTR_DIFF(cq0,
1181                                                 9, RTE_PKTMBUF_HEADROOM, flags));
1182                                         rte_prefetch0(CQE_PTR_DIFF(cq0,
1183                                                 10, RTE_PKTMBUF_HEADROOM, flags));
1184                                         rte_prefetch0(CQE_PTR_DIFF(cq0,
1185                                                 11, RTE_PKTMBUF_HEADROOM, flags));
1186                                 }
1187                         }
1188                 } else {
1189                         if (pkts - packets > 4) {
1190                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 4, 64, flags));
1191                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 5, 64, flags));
1192                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 6, 64, flags));
1193                                 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 7, 64, flags));
1194                         }
1195                 }
1196
1197                 if (!(flags & NIX_RX_VWQE_F)) {
1198                         /* Get NIX_RX_SG_S for size and buffer pointer */
1199                         cq0_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 0, 64, flags));
1200                         cq1_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 1, 64, flags));
1201                         cq2_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 2, 64, flags));
1202                         cq3_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 3, 64, flags));
1203
1204                         /* Extract mbuf from NIX_RX_SG_S */
1205                         mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
1206                         mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
1207                         mbuf01 = vqsubq_u64(mbuf01, data_off);
1208                         mbuf23 = vqsubq_u64(mbuf23, data_off);
1209                 } else {
1210                         mbuf01 =
1211                                 vsubq_u64(vld1q_u64((uint64_t *)cq0), data_off);
1212                         mbuf23 = vsubq_u64(vld1q_u64((uint64_t *)(cq0 + 16)),
1213                                            data_off);
1214                 }
1215
1216                 /* Move mbufs to scalar registers for future use */
1217                 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
1218                 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
1219                 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
1220                 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
1221
1222                 if (!(flags & NIX_RX_VWQE_F)) {
1223                         /* Mask to get packet len from NIX_RX_SG_S */
1224                         const uint8x16_t shuf_msk = {
1225                                 0xFF, 0xFF, /* pkt_type set as unknown */
1226                                 0xFF, 0xFF, /* pkt_type set as unknown */
1227                                 0,    1,    /* octet 1~0, low 16 bits pkt_len */
1228                                 0xFF, 0xFF, /* skip high 16it pkt_len, zero out */
1229                                 0,    1,    /* octet 1~0, 16 bits data_len */
1230                                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1231
1232                         /* Form the rx_descriptor_fields1 with pkt_len and data_len */
1233                         f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
1234                         f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
1235                         f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
1236                         f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
1237                 }
1238                 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
1239                         /* Prefetch probable CPT parse header area */
1240                         rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf0, d_off));
1241                         rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf1, d_off));
1242                         rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf2, d_off));
1243                         rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf3, d_off));
1244                 }
1245
1246                 /* Load CQE word0 and word 1 */
1247                 const uint64_t cq0_w0 = *CQE_PTR_OFF(cq0, 0, 0, flags);
1248                 const uint64_t cq0_w1 = *CQE_PTR_OFF(cq0, 0, 8, flags);
1249                 const uint64_t cq0_w2 = *CQE_PTR_OFF(cq0, 0, 16, flags);
1250                 const uint64_t cq1_w0 = *CQE_PTR_OFF(cq0, 1, 0, flags);
1251                 const uint64_t cq1_w1 = *CQE_PTR_OFF(cq0, 1, 8, flags);
1252                 const uint64_t cq1_w2 = *CQE_PTR_OFF(cq0, 1, 16, flags);
1253                 const uint64_t cq2_w0 = *CQE_PTR_OFF(cq0, 2, 0, flags);
1254                 const uint64_t cq2_w1 = *CQE_PTR_OFF(cq0, 2, 8, flags);
1255                 const uint64_t cq2_w2 = *CQE_PTR_OFF(cq0, 2, 16, flags);
1256                 const uint64_t cq3_w0 = *CQE_PTR_OFF(cq0, 3, 0, flags);
1257                 const uint64_t cq3_w1 = *CQE_PTR_OFF(cq0, 3, 8, flags);
1258                 const uint64_t cq3_w2 = *CQE_PTR_OFF(cq0, 3, 16, flags);
1259
1260                 if (flags & NIX_RX_VWQE_F) {
1261                         uint16_t psize0, psize1, psize2, psize3;
1262
1263                         psize0 = (cq0_w2 & 0xFFFF) + 1;
1264                         psize1 = (cq1_w2 & 0xFFFF) + 1;
1265                         psize2 = (cq2_w2 & 0xFFFF) + 1;
1266                         psize3 = (cq3_w2 & 0xFFFF) + 1;
1267
1268                         f0 = vdupq_n_u64(0);
1269                         f1 = vdupq_n_u64(0);
1270                         f2 = vdupq_n_u64(0);
1271                         f3 = vdupq_n_u64(0);
1272
1273                         f0 = vsetq_lane_u16(psize0, f0, 2);
1274                         f0 = vsetq_lane_u16(psize0, f0, 4);
1275
1276                         f1 = vsetq_lane_u16(psize1, f1, 2);
1277                         f1 = vsetq_lane_u16(psize1, f1, 4);
1278
1279                         f2 = vsetq_lane_u16(psize2, f2, 2);
1280                         f2 = vsetq_lane_u16(psize2, f2, 4);
1281
1282                         f3 = vsetq_lane_u16(psize3, f3, 2);
1283                         f3 = vsetq_lane_u16(psize3, f3, 4);
1284                 }
1285
1286                 if (flags & NIX_RX_OFFLOAD_RSS_F) {
1287                         /* Fill rss in the rx_descriptor_fields1 */
1288                         f0 = vsetq_lane_u32(cq0_w0, f0, 3);
1289                         f1 = vsetq_lane_u32(cq1_w0, f1, 3);
1290                         f2 = vsetq_lane_u32(cq2_w0, f2, 3);
1291                         f3 = vsetq_lane_u32(cq3_w0, f3, 3);
1292                         ol_flags0 = RTE_MBUF_F_RX_RSS_HASH;
1293                         ol_flags1 = RTE_MBUF_F_RX_RSS_HASH;
1294                         ol_flags2 = RTE_MBUF_F_RX_RSS_HASH;
1295                         ol_flags3 = RTE_MBUF_F_RX_RSS_HASH;
1296                 } else {
1297                         ol_flags0 = 0;
1298                         ol_flags1 = 0;
1299                         ol_flags2 = 0;
1300                         ol_flags3 = 0;
1301                 }
1302
1303                 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
1304                         /* Fill packet_type in the rx_descriptor_fields1 */
1305                         f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
1306                                             f0, 0);
1307                         f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
1308                                             f1, 0);
1309                         f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
1310                                             f2, 0);
1311                         f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
1312                                             f3, 0);
1313                 }
1314
1315                 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
1316                         ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
1317                         ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
1318                         ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
1319                         ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
1320                 }
1321
1322                 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
1323                 RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1);
1324                 RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1);
1325                 RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1);
1326                 RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1);
1327
1328                 /* Translate meta to mbuf */
1329                 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
1330                         uint64_t cq0_w5 = *(uint64_t *)(cq0 + CQE_SZ(0) + 40);
1331                         uint64_t cq1_w5 = *(uint64_t *)(cq0 + CQE_SZ(1) + 40);
1332                         uint64_t cq2_w5 = *(uint64_t *)(cq0 + CQE_SZ(2) + 40);
1333                         uint64_t cq3_w5 = *(uint64_t *)(cq0 + CQE_SZ(3) + 40);
1334
1335                         /* Initialize rearm data when reassembly is enabled as
1336                          * data offset might change.
1337                          */
1338                         if (flags & NIX_RX_REAS_F) {
1339                                 rearm0 = vdupq_n_u64(mbuf_initializer);
1340                                 rearm1 = vdupq_n_u64(mbuf_initializer);
1341                                 rearm2 = vdupq_n_u64(mbuf_initializer);
1342                                 rearm3 = vdupq_n_u64(mbuf_initializer);
1343                         }
1344
1345                         /* Checksum ol_flags will be cleared if mbuf is meta */
1346                         mbuf0 = nix_sec_meta_to_mbuf(cq0_w1, cq0_w5, sa_base, laddr,
1347                                                      &loff, mbuf0, d_off, &f0,
1348                                                      &ol_flags0, flags, &rearm0);
1349                         mbuf01 = vsetq_lane_u64((uint64_t)mbuf0, mbuf01, 0);
1350
1351                         mbuf1 = nix_sec_meta_to_mbuf(cq1_w1, cq1_w5, sa_base, laddr,
1352                                                      &loff, mbuf1, d_off, &f1,
1353                                                      &ol_flags1, flags, &rearm1);
1354                         mbuf01 = vsetq_lane_u64((uint64_t)mbuf1, mbuf01, 1);
1355
1356                         mbuf2 = nix_sec_meta_to_mbuf(cq2_w1, cq2_w5, sa_base, laddr,
1357                                                      &loff, mbuf2, d_off, &f2,
1358                                                      &ol_flags2, flags, &rearm2);
1359                         mbuf23 = vsetq_lane_u64((uint64_t)mbuf2, mbuf23, 0);
1360
1361                         mbuf3 = nix_sec_meta_to_mbuf(cq3_w1, cq3_w5, sa_base, laddr,
1362                                                      &loff, mbuf3, d_off, &f3,
1363                                                      &ol_flags3, flags, &rearm3);
1364                         mbuf23 = vsetq_lane_u64((uint64_t)mbuf3, mbuf23, 1);
1365                 }
1366
1367                 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
1368
1369                         ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
1370                         ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
1371                         ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
1372                         ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
1373
1374                         ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
1375                         ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
1376                         ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
1377                         ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
1378                 }
1379
1380                 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
1381                         ol_flags0 = nix_update_match_id(
1382                                 *(uint16_t *)CQE_PTR_OFF(cq0, 0, 38, flags),
1383                                 ol_flags0, mbuf0);
1384                         ol_flags1 = nix_update_match_id(
1385                                 *(uint16_t *)CQE_PTR_OFF(cq0, 1, 38, flags),
1386                                 ol_flags1, mbuf1);
1387                         ol_flags2 = nix_update_match_id(
1388                                 *(uint16_t *)CQE_PTR_OFF(cq0, 2, 38, flags),
1389                                 ol_flags2, mbuf2);
1390                         ol_flags3 = nix_update_match_id(
1391                                 *(uint16_t *)CQE_PTR_OFF(cq0, 3, 38, flags),
1392                                 ol_flags3, mbuf3);
1393                 }
1394
1395                 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
1396                         const uint16x8_t len_off = {
1397                                 0,                           /* ptype   0:15 */
1398                                 0,                           /* ptype  16:32 */
1399                                 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen  0:15*/
1400                                 0,                           /* pktlen 16:32 */
1401                                 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
1402                                 0,
1403                                 0,
1404                                 0};
1405                         const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
1406                                                   RTE_PTYPE_L2_ETHER_TIMESYNC,
1407                                                   RTE_PTYPE_L2_ETHER_TIMESYNC,
1408                                                   RTE_PTYPE_L2_ETHER_TIMESYNC};
1409                         const uint64_t ts_olf = RTE_MBUF_F_RX_IEEE1588_PTP |
1410                                                 RTE_MBUF_F_RX_IEEE1588_TMST |
1411                                                 tstamp->rx_tstamp_dynflag;
1412                         const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
1413                         uint64x2_t ts01, ts23, mask;
1414                         uint64_t ts[4];
1415                         uint8_t res;
1416
1417                         /* Subtract timesync length from total pkt length. */
1418                         f0 = vsubq_u16(f0, len_off);
1419                         f1 = vsubq_u16(f1, len_off);
1420                         f2 = vsubq_u16(f2, len_off);
1421                         f3 = vsubq_u16(f3, len_off);
1422
1423                         /* Get the address of actual timestamp. */
1424                         ts01 = vaddq_u64(mbuf01, data_off);
1425                         ts23 = vaddq_u64(mbuf23, data_off);
1426                         /* Load timestamp from address. */
1427                         ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
1428                                                                           0),
1429                                               ts01, 0);
1430                         ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
1431                                                                           1),
1432                                               ts01, 1);
1433                         ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
1434                                                                           0),
1435                                               ts23, 0);
1436                         ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
1437                                                                           1),
1438                                               ts23, 1);
1439                         /* Convert from be to cpu byteorder. */
1440                         ts01 = vrev64q_u8(ts01);
1441                         ts23 = vrev64q_u8(ts23);
1442                         /* Store timestamp into scalar for later use. */
1443                         ts[0] = vgetq_lane_u64(ts01, 0);
1444                         ts[1] = vgetq_lane_u64(ts01, 1);
1445                         ts[2] = vgetq_lane_u64(ts23, 0);
1446                         ts[3] = vgetq_lane_u64(ts23, 1);
1447
1448                         /* Store timestamp into dynfield. */
1449                         *cnxk_nix_timestamp_dynfield(mbuf0, tstamp) = ts[0];
1450                         *cnxk_nix_timestamp_dynfield(mbuf1, tstamp) = ts[1];
1451                         *cnxk_nix_timestamp_dynfield(mbuf2, tstamp) = ts[2];
1452                         *cnxk_nix_timestamp_dynfield(mbuf3, tstamp) = ts[3];
1453
1454                         /* Generate ptype mask to filter L2 ether timesync */
1455                         mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
1456                         mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
1457                         mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
1458                         mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
1459
1460                         /* Match against L2 ether timesync. */
1461                         mask = vceqq_u32(mask, ptype);
1462                         /* Convert from vector from scalar mask */
1463                         res = vaddvq_u32(vandq_u32(mask, and_mask));
1464                         res &= 0xF;
1465
1466                         if (res) {
1467                                 /* Fill in the ol_flags for any packets that
1468                                  * matched.
1469                                  */
1470                                 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
1471                                 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
1472                                 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
1473                                 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
1474
1475                                 /* Update Rxq timestamp with the latest
1476                                  * timestamp.
1477                                  */
1478                                 tstamp->rx_ready = 1;
1479                                 tstamp->rx_tstamp = ts[31 - __builtin_clz(res)];
1480                         }
1481                 }
1482
1483                 /* Form rearm_data with ol_flags */
1484                 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
1485                 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
1486                 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
1487                 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
1488
1489                 /* Update rx_descriptor_fields1 */
1490                 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
1491                 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
1492                 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
1493                 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
1494
1495                 /* Update rearm_data */
1496                 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
1497                 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
1498                 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
1499                 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
1500
1501                 /* Store the mbufs to rx_pkts */
1502                 vst1q_u64((uint64_t *)&mbufs[packets], mbuf01);
1503                 vst1q_u64((uint64_t *)&mbufs[packets + 2], mbuf23);
1504
1505                 if (flags & NIX_RX_MULTI_SEG_F) {
1506                         /* Multi segment is enable build mseg list for
1507                          * individual mbufs in scalar mode.
1508                          */
1509                         nix_cqe_xtract_mseg((union nix_rx_parse_u *)
1510                                             (CQE_PTR_OFF(cq0, 0, 8, flags)),
1511                                             mbuf0, mbuf_initializer, flags);
1512                         nix_cqe_xtract_mseg((union nix_rx_parse_u *)
1513                                             (CQE_PTR_OFF(cq0, 1, 8, flags)),
1514                                             mbuf1, mbuf_initializer, flags);
1515                         nix_cqe_xtract_mseg((union nix_rx_parse_u *)
1516                                             (CQE_PTR_OFF(cq0, 2, 8, flags)),
1517                                             mbuf2, mbuf_initializer, flags);
1518                         nix_cqe_xtract_mseg((union nix_rx_parse_u *)
1519                                             (CQE_PTR_OFF(cq0, 3, 8, flags)),
1520                                             mbuf3, mbuf_initializer, flags);
1521                 }
1522
1523                 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
1524                 RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1);
1525                 RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1);
1526                 RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1);
1527                 RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1);
1528
1529                 nix_mbuf_validate_next(mbuf0);
1530                 nix_mbuf_validate_next(mbuf1);
1531                 nix_mbuf_validate_next(mbuf2);
1532                 nix_mbuf_validate_next(mbuf3);
1533
1534                 packets += NIX_DESCS_PER_LOOP;
1535
1536                 if (!(flags & NIX_RX_VWQE_F)) {
1537                         /* Advance head pointer and packets */
1538                         head += NIX_DESCS_PER_LOOP;
1539                         head &= qmask;
1540                 }
1541
1542                 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
1543                         /* Check if lmtline border is crossed and adjust lnum */
1544                         if (loff > 15) {
1545                                 /* Update aura handle */
1546                                 *(uint64_t *)(laddr - 8) =
1547                                         (((uint64_t)(15 & 0x1) << 32) |
1548                                     roc_npa_aura_handle_to_aura(aura_handle));
1549                                 loff = loff - 15;
1550                                 shft += 3;
1551
1552                                 lnum++;
1553                                 laddr = (uintptr_t)LMT_OFF(lbase, lnum, 8);
1554                                 /* Pick the pointer from 16th index and put it
1555                                  * at end of this new line.
1556                                  */
1557                                 *(uint64_t *)(laddr + (loff << 3) - 8) =
1558                                         *(uint64_t *)(laddr - 8);
1559                         }
1560
1561                         /* Flush it when we are in 16th line and might
1562                          * overflow it
1563                          */
1564                         if (lnum >= 15 && loff >= 12) {
1565                                 /* 16 LMT Line size m1 */
1566                                 uint64_t data = BIT_ULL(48) - 1;
1567
1568                                 /* Update aura handle */
1569                                 *(uint64_t *)(laddr - 8) =
1570                                         (((uint64_t)(loff & 0x1) << 32) |
1571                                     roc_npa_aura_handle_to_aura(aura_handle));
1572
1573                                 data = (data & ~(0x7UL << shft)) |
1574                                        (((uint64_t)loff >> 1) << shft);
1575
1576                                 /* Send up to 16 lmt lines of pointers */
1577                                 nix_sec_flush_meta_burst(lmt_id, data, lnum + 1,
1578                                                          aura_handle);
1579                                 rte_io_wmb();
1580                                 lnum = 0;
1581                                 loff = 0;
1582                                 shft = 0;
1583                                 /* First pointer starts at 8B offset */
1584                                 laddr = (uintptr_t)LMT_OFF(lbase, lnum, 8);
1585                         }
1586                 }
1587         }
1588
1589         if (flags & NIX_RX_OFFLOAD_SECURITY_F && loff) {
1590                 /* 16 LMT Line size m1 */
1591                 uint64_t data = BIT_ULL(48) - 1;
1592
1593                 /* Update aura handle */
1594                 *(uint64_t *)(laddr - 8) =
1595                         (((uint64_t)(loff & 0x1) << 32) |
1596                          roc_npa_aura_handle_to_aura(aura_handle));
1597
1598                 data = (data & ~(0x7UL << shft)) |
1599                        (((uint64_t)loff >> 1) << shft);
1600
1601                 /* Send up to 16 lmt lines of pointers */
1602                 nix_sec_flush_meta_burst(lmt_id, data, lnum + 1, aura_handle);
1603                 if (flags & NIX_RX_VWQE_F)
1604                         plt_io_wmb();
1605         }
1606
1607         if (flags & NIX_RX_VWQE_F)
1608                 return packets;
1609
1610         rxq->head = head;
1611         rxq->available -= packets;
1612
1613         rte_io_wmb();
1614         /* Free all the CQs that we've processed */
1615         plt_write64((rxq->wdata | packets), rxq->cq_door);
1616
1617         if (unlikely(pkts_left))
1618                 packets += cn10k_nix_recv_pkts(args, &mbufs[packets], pkts_left,
1619                                                flags);
1620
1621         return packets;
1622 }
1623
1624 #else
1625
1626 static inline uint16_t
1627 cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,
1628                            const uint16_t flags, void *lookup_mem,
1629                            struct cnxk_timesync_info *tstamp,
1630                            uintptr_t lmt_base)
1631 {
1632         RTE_SET_USED(args);
1633         RTE_SET_USED(mbufs);
1634         RTE_SET_USED(pkts);
1635         RTE_SET_USED(flags);
1636         RTE_SET_USED(lookup_mem);
1637         RTE_SET_USED(tstamp);
1638         RTE_SET_USED(lmt_base);
1639
1640         return 0;
1641 }
1642
1643 #endif
1644
1645
1646 #define RSS_F     NIX_RX_OFFLOAD_RSS_F
1647 #define PTYPE_F   NIX_RX_OFFLOAD_PTYPE_F
1648 #define CKSUM_F   NIX_RX_OFFLOAD_CHECKSUM_F
1649 #define MARK_F    NIX_RX_OFFLOAD_MARK_UPDATE_F
1650 #define TS_F      NIX_RX_OFFLOAD_TSTAMP_F
1651 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
1652 #define R_SEC_F   NIX_RX_OFFLOAD_SECURITY_F
1653
1654 /* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
1655 #define NIX_RX_FASTPATH_MODES_0_15                                             \
1656         R(no_offload, NIX_RX_OFFLOAD_NONE)                                     \
1657         R(rss, RSS_F)                                                          \
1658         R(ptype, PTYPE_F)                                                      \
1659         R(ptype_rss, PTYPE_F | RSS_F)                                          \
1660         R(cksum, CKSUM_F)                                                      \
1661         R(cksum_rss, CKSUM_F | RSS_F)                                          \
1662         R(cksum_ptype, CKSUM_F | PTYPE_F)                                      \
1663         R(cksum_ptype_rss, CKSUM_F | PTYPE_F | RSS_F)                          \
1664         R(mark, MARK_F)                                                        \
1665         R(mark_rss, MARK_F | RSS_F)                                            \
1666         R(mark_ptype, MARK_F | PTYPE_F)                                        \
1667         R(mark_ptype_rss, MARK_F | PTYPE_F | RSS_F)                            \
1668         R(mark_cksum, MARK_F | CKSUM_F)                                        \
1669         R(mark_cksum_rss, MARK_F | CKSUM_F | RSS_F)                            \
1670         R(mark_cksum_ptype, MARK_F | CKSUM_F | PTYPE_F)                        \
1671         R(mark_cksum_ptype_rss, MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1672
1673 #define NIX_RX_FASTPATH_MODES_16_31                                            \
1674         R(ts, TS_F)                                                            \
1675         R(ts_rss, TS_F | RSS_F)                                                \
1676         R(ts_ptype, TS_F | PTYPE_F)                                            \
1677         R(ts_ptype_rss, TS_F | PTYPE_F | RSS_F)                                \
1678         R(ts_cksum, TS_F | CKSUM_F)                                            \
1679         R(ts_cksum_rss, TS_F | CKSUM_F | RSS_F)                                \
1680         R(ts_cksum_ptype, TS_F | CKSUM_F | PTYPE_F)                            \
1681         R(ts_cksum_ptype_rss, TS_F | CKSUM_F | PTYPE_F | RSS_F)                \
1682         R(ts_mark, TS_F | MARK_F)                                              \
1683         R(ts_mark_rss, TS_F | MARK_F | RSS_F)                                  \
1684         R(ts_mark_ptype, TS_F | MARK_F | PTYPE_F)                              \
1685         R(ts_mark_ptype_rss, TS_F | MARK_F | PTYPE_F | RSS_F)                  \
1686         R(ts_mark_cksum, TS_F | MARK_F | CKSUM_F)                              \
1687         R(ts_mark_cksum_rss, TS_F | MARK_F | CKSUM_F | RSS_F)                  \
1688         R(ts_mark_cksum_ptype, TS_F | MARK_F | CKSUM_F | PTYPE_F)              \
1689         R(ts_mark_cksum_ptype_rss, TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1690
1691 #define NIX_RX_FASTPATH_MODES_32_47                                            \
1692         R(vlan, RX_VLAN_F)                                                     \
1693         R(vlan_rss, RX_VLAN_F | RSS_F)                                         \
1694         R(vlan_ptype, RX_VLAN_F | PTYPE_F)                                     \
1695         R(vlan_ptype_rss, RX_VLAN_F | PTYPE_F | RSS_F)                         \
1696         R(vlan_cksum, RX_VLAN_F | CKSUM_F)                                     \
1697         R(vlan_cksum_rss, RX_VLAN_F | CKSUM_F | RSS_F)                         \
1698         R(vlan_cksum_ptype, RX_VLAN_F | CKSUM_F | PTYPE_F)                     \
1699         R(vlan_cksum_ptype_rss, RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)         \
1700         R(vlan_mark, RX_VLAN_F | MARK_F)                                       \
1701         R(vlan_mark_rss, RX_VLAN_F | MARK_F | RSS_F)                           \
1702         R(vlan_mark_ptype, RX_VLAN_F | MARK_F | PTYPE_F)                       \
1703         R(vlan_mark_ptype_rss, RX_VLAN_F | MARK_F | PTYPE_F | RSS_F)           \
1704         R(vlan_mark_cksum, RX_VLAN_F | MARK_F | CKSUM_F)                       \
1705         R(vlan_mark_cksum_rss, RX_VLAN_F | MARK_F | CKSUM_F | RSS_F)           \
1706         R(vlan_mark_cksum_ptype, RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F)       \
1707         R(vlan_mark_cksum_ptype_rss,                                           \
1708           RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1709
1710 #define NIX_RX_FASTPATH_MODES_48_63                                            \
1711         R(vlan_ts, RX_VLAN_F | TS_F)                                           \
1712         R(vlan_ts_rss, RX_VLAN_F | TS_F | RSS_F)                               \
1713         R(vlan_ts_ptype, RX_VLAN_F | TS_F | PTYPE_F)                           \
1714         R(vlan_ts_ptype_rss, RX_VLAN_F | TS_F | PTYPE_F | RSS_F)               \
1715         R(vlan_ts_cksum, RX_VLAN_F | TS_F | CKSUM_F)                           \
1716         R(vlan_ts_cksum_rss, RX_VLAN_F | TS_F | CKSUM_F | RSS_F)               \
1717         R(vlan_ts_cksum_ptype, RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F)           \
1718         R(vlan_ts_cksum_ptype_rss,                                             \
1719           RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)                        \
1720         R(vlan_ts_mark, RX_VLAN_F | TS_F | MARK_F)                             \
1721         R(vlan_ts_mark_rss, RX_VLAN_F | TS_F | MARK_F | RSS_F)                 \
1722         R(vlan_ts_mark_ptype, RX_VLAN_F | TS_F | MARK_F | PTYPE_F)             \
1723         R(vlan_ts_mark_ptype_rss, RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1724         R(vlan_ts_mark_cksum, RX_VLAN_F | TS_F | MARK_F | CKSUM_F)             \
1725         R(vlan_ts_mark_cksum_rss, RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1726         R(vlan_ts_mark_cksum_ptype,                                            \
1727           RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)                       \
1728         R(vlan_ts_mark_cksum_ptype_rss,                                        \
1729           RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1730
1731 #define NIX_RX_FASTPATH_MODES_64_79                                            \
1732         R(sec, R_SEC_F)                                                        \
1733         R(sec_rss, R_SEC_F | RSS_F)                                            \
1734         R(sec_ptype, R_SEC_F | PTYPE_F)                                        \
1735         R(sec_ptype_rss, R_SEC_F | PTYPE_F | RSS_F)                            \
1736         R(sec_cksum, R_SEC_F | CKSUM_F)                                        \
1737         R(sec_cksum_rss, R_SEC_F | CKSUM_F | RSS_F)                            \
1738         R(sec_cksum_ptype, R_SEC_F | CKSUM_F | PTYPE_F)                        \
1739         R(sec_cksum_ptype_rss, R_SEC_F | CKSUM_F | PTYPE_F | RSS_F)            \
1740         R(sec_mark, R_SEC_F | MARK_F)                                          \
1741         R(sec_mark_rss, R_SEC_F | MARK_F | RSS_F)                              \
1742         R(sec_mark_ptype, R_SEC_F | MARK_F | PTYPE_F)                          \
1743         R(sec_mark_ptype_rss, R_SEC_F | MARK_F | PTYPE_F | RSS_F)              \
1744         R(sec_mark_cksum, R_SEC_F | MARK_F | CKSUM_F)                          \
1745         R(sec_mark_cksum_rss, R_SEC_F | MARK_F | CKSUM_F | RSS_F)              \
1746         R(sec_mark_cksum_ptype, R_SEC_F | MARK_F | CKSUM_F | PTYPE_F)          \
1747         R(sec_mark_cksum_ptype_rss,                                            \
1748           R_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1749
1750 #define NIX_RX_FASTPATH_MODES_80_95                                            \
1751         R(sec_ts, R_SEC_F | TS_F)                                              \
1752         R(sec_ts_rss, R_SEC_F | TS_F | RSS_F)                                  \
1753         R(sec_ts_ptype, R_SEC_F | TS_F | PTYPE_F)                              \
1754         R(sec_ts_ptype_rss, R_SEC_F | TS_F | PTYPE_F | RSS_F)                  \
1755         R(sec_ts_cksum, R_SEC_F | TS_F | CKSUM_F)                              \
1756         R(sec_ts_cksum_rss, R_SEC_F | TS_F | CKSUM_F | RSS_F)                  \
1757         R(sec_ts_cksum_ptype, R_SEC_F | TS_F | CKSUM_F | PTYPE_F)              \
1758         R(sec_ts_cksum_ptype_rss, R_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)  \
1759         R(sec_ts_mark, R_SEC_F | TS_F | MARK_F)                                \
1760         R(sec_ts_mark_rss, R_SEC_F | TS_F | MARK_F | RSS_F)                    \
1761         R(sec_ts_mark_ptype, R_SEC_F | TS_F | MARK_F | PTYPE_F)                \
1762         R(sec_ts_mark_ptype_rss, R_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F)    \
1763         R(sec_ts_mark_cksum, R_SEC_F | TS_F | MARK_F | CKSUM_F)                \
1764         R(sec_ts_mark_cksum_rss, R_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F)    \
1765         R(sec_ts_mark_cksum_ptype,                                             \
1766           R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)                         \
1767         R(sec_ts_mark_cksum_ptype_rss,                                         \
1768           R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1769
1770 #define NIX_RX_FASTPATH_MODES_96_111                                           \
1771         R(sec_vlan, R_SEC_F | RX_VLAN_F)                                       \
1772         R(sec_vlan_rss, R_SEC_F | RX_VLAN_F | RSS_F)                           \
1773         R(sec_vlan_ptype, R_SEC_F | RX_VLAN_F | PTYPE_F)                       \
1774         R(sec_vlan_ptype_rss, R_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F)           \
1775         R(sec_vlan_cksum, R_SEC_F | RX_VLAN_F | CKSUM_F)                       \
1776         R(sec_vlan_cksum_rss, R_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F)           \
1777         R(sec_vlan_cksum_ptype, R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F)       \
1778         R(sec_vlan_cksum_ptype_rss,                                            \
1779           R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)                     \
1780         R(sec_vlan_mark, R_SEC_F | RX_VLAN_F | MARK_F)                         \
1781         R(sec_vlan_mark_rss, R_SEC_F | RX_VLAN_F | MARK_F | RSS_F)             \
1782         R(sec_vlan_mark_ptype, R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F)         \
1783         R(sec_vlan_mark_ptype_rss,                                             \
1784           R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F)                      \
1785         R(sec_vlan_mark_cksum, R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F)         \
1786         R(sec_vlan_mark_cksum_rss,                                             \
1787           R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F)                      \
1788         R(sec_vlan_mark_cksum_ptype,                                           \
1789           R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F)                    \
1790         R(sec_vlan_mark_cksum_ptype_rss,                                       \
1791           R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1792
1793 #define NIX_RX_FASTPATH_MODES_112_127                                          \
1794         R(sec_vlan_ts, R_SEC_F | RX_VLAN_F | TS_F)                             \
1795         R(sec_vlan_ts_rss, R_SEC_F | RX_VLAN_F | TS_F | RSS_F)                 \
1796         R(sec_vlan_ts_ptype, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F)             \
1797         R(sec_vlan_ts_ptype_rss, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
1798         R(sec_vlan_ts_cksum, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F)             \
1799         R(sec_vlan_ts_cksum_rss, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
1800         R(sec_vlan_ts_cksum_ptype,                                             \
1801           R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F)                      \
1802         R(sec_vlan_ts_cksum_ptype_rss,                                         \
1803           R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)              \
1804         R(sec_vlan_ts_mark, R_SEC_F | RX_VLAN_F | TS_F | MARK_F)               \
1805         R(sec_vlan_ts_mark_rss, R_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F)   \
1806         R(sec_vlan_ts_mark_ptype,                                              \
1807           R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F)                       \
1808         R(sec_vlan_ts_mark_ptype_rss,                                          \
1809           R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F)               \
1810         R(sec_vlan_ts_mark_cksum,                                              \
1811           R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F)                       \
1812         R(sec_vlan_ts_mark_cksum_rss,                                          \
1813           R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F)               \
1814         R(sec_vlan_ts_mark_cksum_ptype,                                        \
1815           R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)             \
1816         R(sec_vlan_ts_mark_cksum_ptype_rss,                                    \
1817           R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1818
1819
1820 #define NIX_RX_FASTPATH_MODES                                                  \
1821         NIX_RX_FASTPATH_MODES_0_15                                             \
1822         NIX_RX_FASTPATH_MODES_16_31                                            \
1823         NIX_RX_FASTPATH_MODES_32_47                                            \
1824         NIX_RX_FASTPATH_MODES_48_63                                            \
1825         NIX_RX_FASTPATH_MODES_64_79                                            \
1826         NIX_RX_FASTPATH_MODES_80_95                                            \
1827         NIX_RX_FASTPATH_MODES_96_111                                           \
1828         NIX_RX_FASTPATH_MODES_112_127                                          \
1829
1830 #define R(name, flags)                                                         \
1831         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name(          \
1832                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);     \
1833         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name(     \
1834                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);     \
1835         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name(      \
1836                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);     \
1837         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_mseg_##name( \
1838                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);     \
1839         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_reas_##name(     \
1840                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);     \
1841         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_reas_mseg_##name(\
1842                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);     \
1843         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_reas_vec_##name( \
1844                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);     \
1845         uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_reas_vec_mseg_##name( \
1846                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
1847
1848 NIX_RX_FASTPATH_MODES
1849 #undef R
1850
1851 #define NIX_RX_RECV(fn, flags)                                                 \
1852         uint16_t __rte_noinline __rte_hot fn(                                  \
1853                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts)      \
1854         {                                                                      \
1855                 return cn10k_nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags));  \
1856         }
1857
1858 #define NIX_RX_RECV_MSEG(fn, flags) NIX_RX_RECV(fn, flags | NIX_RX_MULTI_SEG_F)
1859
1860 #define NIX_RX_RECV_VEC(fn, flags)                                             \
1861         uint16_t __rte_noinline __rte_hot fn(                                  \
1862                 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts)      \
1863         {                                                                      \
1864                 return cn10k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts,     \
1865                                                   (flags), NULL, NULL, 0);     \
1866         }
1867
1868 #define NIX_RX_RECV_VEC_MSEG(fn, flags)                                        \
1869         NIX_RX_RECV_VEC(fn, flags | NIX_RX_MULTI_SEG_F)
1870
1871 #endif /* __CN10K_RX_H__ */