1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
10 #include <cnxk_ethdev.h>
12 #define NIX_RX_OFFLOAD_NONE (0)
13 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
14 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
15 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
16 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
17 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
18 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
19 #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)
20 #define NIX_RX_OFFLOAD_MAX (NIX_RX_OFFLOAD_SECURITY_F << 1)
22 /* Flags to control cqe_to_mbuf conversion function.
23 * Defining it from backwards to denote its been
24 * not used as offload flags to pick function
26 #define NIX_RX_VWQE_F BIT(13)
27 #define NIX_RX_MULTI_SEG_F BIT(14)
28 #define CPT_RX_WQE_F BIT(15)
30 #define CNXK_NIX_CQ_ENTRY_SZ 128
31 #define NIX_DESCS_PER_LOOP 4
32 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
33 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
35 #define CQE_PTR_OFF(b, i, o, f) \
36 (((f) & NIX_RX_VWQE_F) ? \
37 (uint64_t *)(((uintptr_t)((uint64_t *)(b))[i]) + (o)) : \
38 (uint64_t *)(((uintptr_t)(b)) + CQE_SZ(i) + (o)))
40 union mbuf_initializer {
50 static __rte_always_inline uint64_t
51 nix_clear_data_off(uint64_t oldval)
53 union mbuf_initializer mbuf_init = {.value = oldval};
55 mbuf_init.fields.data_off = 0;
56 return mbuf_init.value;
59 static __rte_always_inline struct rte_mbuf *
60 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
64 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
65 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
66 return (struct rte_mbuf *)(buff - data_off);
69 static __rte_always_inline void
70 nix_sec_flush_meta_burst(uint16_t lmt_id, uint64_t data, uint16_t lnum,
71 uintptr_t aura_handle)
75 /* Prepare PA and Data */
76 pa = roc_npa_aura_handle_to_base(aura_handle) + NPA_LF_AURA_BATCH_FREE0;
77 pa |= ((data & 0x7) << 4);
81 data |= (uint64_t)lmt_id;
82 data |= (uint64_t)(lnum - 1) << 12;
84 roc_lmt_submit_steorl(data, pa);
87 static __rte_always_inline void
88 nix_sec_flush_meta(uintptr_t laddr, uint16_t lmt_id, uint8_t loff,
89 uintptr_t aura_handle)
93 /* laddr is pointing to first pointer */
96 /* Trigger free either on lmtline full or different aura handle */
97 pa = roc_npa_aura_handle_to_base(aura_handle) + NPA_LF_AURA_BATCH_FREE0;
99 /* Update aura handle */
100 *(uint64_t *)laddr = (((uint64_t)(loff & 0x1) << 32) |
101 roc_npa_aura_handle_to_aura(aura_handle));
103 pa |= ((uint64_t)(loff >> 1) << 4);
104 roc_lmt_submit_steorl(lmt_id, pa);
107 static __rte_always_inline struct rte_mbuf *
108 nix_sec_meta_to_mbuf_sc(uint64_t cq_w1, const uint64_t sa_base, uintptr_t laddr,
109 uint8_t *loff, struct rte_mbuf *mbuf, uint16_t data_off)
111 const void *__p = (void *)((uintptr_t)mbuf + (uint16_t)data_off);
112 const struct cpt_parse_hdr_s *hdr = (const struct cpt_parse_hdr_s *)__p;
113 struct cn10k_inb_priv_data *inb_priv;
114 struct rte_mbuf *inner;
119 if (cq_w1 & BIT(11)) {
120 inner = (struct rte_mbuf *)(rte_be_to_cpu_64(hdr->wqe_ptr) -
121 sizeof(struct rte_mbuf));
123 /* Get SPI from CPT_PARSE_S's cookie(already swapped) */
127 inb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);
128 inb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);
130 /* Update dynamic field with userdata */
131 *rte_security_dynfield(inner) = (uint64_t)inb_priv->userdata;
133 /* Update l2 hdr length first */
134 inner->pkt_len = (hdr->w2.il3_off -
135 sizeof(struct cpt_parse_hdr_s) - (w0 & 0x7));
137 /* Store meta in lmtline to free
138 * Assume all meta's from same aura.
140 *(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
143 /* Mark meta mbuf as put */
144 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 0);
146 /* Mark inner mbuf as get */
147 RTE_MEMPOOL_CHECK_COOKIES(inner->pool, (void **)&inner, 1, 1);
154 #if defined(RTE_ARCH_ARM64)
156 static __rte_always_inline struct rte_mbuf *
157 nix_sec_meta_to_mbuf(uint64_t cq_w1, uintptr_t sa_base, uintptr_t laddr,
158 uint8_t *loff, struct rte_mbuf *mbuf, uint16_t data_off,
159 uint8x16_t *rx_desc_field1, uint64_t *ol_flags)
161 const void *__p = (void *)((uintptr_t)mbuf + (uint16_t)data_off);
162 const struct cpt_parse_hdr_s *hdr = (const struct cpt_parse_hdr_s *)__p;
163 struct cn10k_inb_priv_data *inb_priv;
164 struct rte_mbuf *inner;
165 uint64_t *sg, res_w1;
171 if (cq_w1 & BIT(11)) {
172 inner = (struct rte_mbuf *)(rte_be_to_cpu_64(hdr->wqe_ptr) -
173 sizeof(struct rte_mbuf));
174 /* Get SPI from CPT_PARSE_S's cookie(already swapped) */
178 inb_sa = roc_nix_inl_ot_ipsec_inb_sa(sa_base, sa_idx);
179 inb_priv = roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(inb_sa);
181 /* Update dynamic field with userdata */
182 *rte_security_dynfield(inner) = (uint64_t)inb_priv->userdata;
184 /* CPT result(struct cpt_cn10k_res_s) is at
185 * after first IOVA in meta
187 sg = (uint64_t *)(inner + 1);
190 /* Clear checksum flags and update security flag */
191 *ol_flags &= ~(RTE_MBUF_F_RX_L4_CKSUM_MASK | RTE_MBUF_F_RX_IP_CKSUM_MASK);
192 *ol_flags |= (((res_w1 & 0xFF) == CPT_COMP_WARN) ?
193 RTE_MBUF_F_RX_SEC_OFFLOAD :
194 (RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));
195 /* Calculate inner packet length */
196 len = ((res_w1 >> 16) & 0xFFFF) + hdr->w2.il3_off -
197 sizeof(struct cpt_parse_hdr_s) - (w0 & 0x7);
198 /* Update pkt_len and data_len */
199 *rx_desc_field1 = vsetq_lane_u16(len, *rx_desc_field1, 2);
200 *rx_desc_field1 = vsetq_lane_u16(len, *rx_desc_field1, 4);
202 /* Store meta in lmtline to free
203 * Assume all meta's from same aura.
205 *(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
208 /* Mark meta mbuf as put */
209 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 0);
211 /* Mark inner mbuf as get */
212 RTE_MEMPOOL_CHECK_COOKIES(inner->pool, (void **)&inner, 1, 1);
214 /* Return inner mbuf */
218 /* Return same mbuf as it is not a decrypted pkt */
223 static __rte_always_inline uint32_t
224 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
226 const uint16_t *const ptype = lookup_mem;
227 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
228 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
229 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
231 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
234 static __rte_always_inline uint32_t
235 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
237 const uint32_t *const ol_flags =
238 (const uint32_t *)((const uint8_t *)lookup_mem +
241 return ol_flags[(in & 0xfff00000) >> 20];
244 static inline uint64_t
245 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
246 struct rte_mbuf *mbuf)
248 /* There is no separate bit to check match_id
249 * is valid or not? and no flag to identify it is an
250 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
251 * action. The former case addressed through 0 being invalid
252 * value and inc/dec match_id pair when MARK is activated.
253 * The later case addressed through defining
254 * CNXK_FLOW_MARK_DEFAULT as value for
255 * RTE_FLOW_ACTION_TYPE_MARK.
256 * This would translate to not use
257 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
258 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
259 * i.e valid mark_id's are from
260 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
262 if (likely(match_id)) {
263 ol_flags |= RTE_MBUF_F_RX_FDIR;
264 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
265 ol_flags |= RTE_MBUF_F_RX_FDIR_ID;
266 mbuf->hash.fdir.hi = match_id - 1;
273 static __rte_always_inline void
274 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
275 uint64_t rearm, const uint16_t flags)
277 const rte_iova_t *iova_list;
278 struct rte_mbuf *head;
279 const rte_iova_t *eol;
283 sg = *(const uint64_t *)(rx + 1);
284 nb_segs = (sg >> 48) & 0x3;
291 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
292 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
293 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
294 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
295 mbuf->nb_segs = nb_segs;
298 eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
299 /* Skip SG_S and first IOVA*/
300 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
303 rearm = rearm & ~0xFFFF;
307 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
310 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
312 mbuf->data_len = sg & 0xFFFF;
314 *(uint64_t *)(&mbuf->rearm_data) = rearm;
318 if (!nb_segs && (iova_list + 1 < eol)) {
319 sg = *(const uint64_t *)(iova_list);
320 nb_segs = (sg >> 48) & 0x3;
321 head->nb_segs += nb_segs;
322 iova_list = (const rte_iova_t *)(iova_list + 1);
328 static __rte_always_inline void
329 cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
330 struct rte_mbuf *mbuf, const void *lookup_mem,
331 const uint64_t val, const uint16_t flag)
333 const union nix_rx_parse_u *rx =
334 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
335 const uint64_t w1 = *(const uint64_t *)rx;
336 uint16_t len = rx->pkt_lenm1 + 1;
337 uint64_t ol_flags = 0;
339 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
340 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
342 mbuf->packet_type = 0;
344 if (flag & NIX_RX_OFFLOAD_RSS_F) {
345 mbuf->hash.rss = tag;
346 ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
349 /* Process Security packets */
350 if (flag & NIX_RX_OFFLOAD_SECURITY_F) {
352 /* CPT result(struct cpt_cn10k_res_s) is at
353 * after first IOVA in meta
355 const uint64_t *sg = (const uint64_t *)(mbuf + 1);
356 const uint64_t res_w1 = sg[10];
357 const uint16_t uc_cc = res_w1 & 0xFF;
360 len = ((res_w1 >> 16) & 0xFFFF) + mbuf->pkt_len;
361 ol_flags |= ((uc_cc == CPT_COMP_WARN) ?
362 RTE_MBUF_F_RX_SEC_OFFLOAD :
363 (RTE_MBUF_F_RX_SEC_OFFLOAD |
364 RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED));
366 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
367 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
370 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
371 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
374 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
375 if (rx->vtag0_gone) {
376 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
377 mbuf->vlan_tci = rx->vtag0_tci;
379 if (rx->vtag1_gone) {
380 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
381 mbuf->vlan_tci_outer = rx->vtag1_tci;
385 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
386 ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
388 mbuf->ol_flags = ol_flags;
390 mbuf->data_len = len;
391 *(uint64_t *)(&mbuf->rearm_data) = val;
393 if (flag & NIX_RX_MULTI_SEG_F)
395 * For multi segment packets, mbuf length correction according
396 * to Rx timestamp length will be handled later during
397 * timestamp data process.
398 * Hence, flag argument is not required.
400 nix_cqe_xtract_mseg(rx, mbuf, val, 0);
405 static inline uint16_t
406 nix_rx_nb_pkts(struct cn10k_eth_rxq *rxq, const uint64_t wdata,
407 const uint16_t pkts, const uint32_t qmask)
409 uint32_t available = rxq->available;
411 /* Update the available count if cached value is not enough */
412 if (unlikely(available < pkts)) {
413 uint64_t reg, head, tail;
415 /* Use LDADDA version to avoid reorder */
416 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
417 /* CQ_OP_STATUS operation error */
418 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
419 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
422 tail = reg & 0xFFFFF;
423 head = (reg >> 20) & 0xFFFFF;
425 available = tail - head + qmask + 1;
427 available = tail - head;
429 rxq->available = available;
432 return RTE_MIN(pkts, available);
435 static __rte_always_inline void
436 cn10k_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
437 struct cnxk_timesync_info *tstamp,
438 const uint8_t ts_enable, uint64_t *tstamp_ptr)
441 mbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
442 mbuf->data_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
444 /* Reading the rx timestamp inserted by CGX, viz at
445 * starting of the packet data.
447 *tstamp_ptr = ((*tstamp_ptr >> 32) * NSEC_PER_SEC) +
448 (*tstamp_ptr & 0xFFFFFFFFUL);
449 *cnxk_nix_timestamp_dynfield(mbuf, tstamp) =
450 rte_be_to_cpu_64(*tstamp_ptr);
451 /* RTE_MBUF_F_RX_IEEE1588_TMST flag needs to be set only in case
452 * PTP packets are received.
454 if (mbuf->packet_type == RTE_PTYPE_L2_ETHER_TIMESYNC) {
456 *cnxk_nix_timestamp_dynfield(mbuf, tstamp);
457 tstamp->rx_ready = 1;
458 mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP |
459 RTE_MBUF_F_RX_IEEE1588_TMST |
460 tstamp->rx_tstamp_dynflag;
465 static __rte_always_inline uint16_t
466 cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
467 const uint16_t flags)
469 struct cn10k_eth_rxq *rxq = rx_queue;
470 const uint64_t mbuf_init = rxq->mbuf_initializer;
471 const void *lookup_mem = rxq->lookup_mem;
472 const uint64_t data_off = rxq->data_off;
473 const uintptr_t desc = rxq->desc;
474 const uint64_t wdata = rxq->wdata;
475 const uint32_t qmask = rxq->qmask;
476 uint64_t lbase = rxq->lmt_base;
477 uint16_t packets = 0, nb_pkts;
478 uint8_t loff = 0, lnum = 0;
479 uint32_t head = rxq->head;
480 struct nix_cqe_hdr_s *cq;
481 struct rte_mbuf *mbuf;
482 uint64_t aura_handle;
487 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
489 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
490 aura_handle = rxq->aura_handle;
491 sa_base = rxq->sa_base;
492 sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
493 ROC_LMT_BASE_ID_GET(lbase, lmt_id);
498 while (packets < nb_pkts) {
499 /* Prefetch N desc ahead */
500 rte_prefetch_non_temporal(
501 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
502 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
504 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
506 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
507 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
509 /* Translate meta to mbuf */
510 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
511 const uint64_t cq_w1 = *((const uint64_t *)cq + 1);
513 mbuf = nix_sec_meta_to_mbuf_sc(cq_w1, sa_base, laddr,
514 &loff, mbuf, data_off);
517 cn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
519 cn10k_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
520 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
521 (uint64_t *)((uint8_t *)mbuf
523 rx_pkts[packets++] = mbuf;
524 roc_prefetch_store_keep(mbuf);
528 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
529 /* Flush when we don't have space for 4 meta */
530 if ((15 - loff) < 1) {
531 nix_sec_flush_meta(laddr, lmt_id + lnum, loff,
534 lnum &= BIT_ULL(ROC_LMT_LINES_PER_CORE_LOG2) -
536 /* First pointer starts at 8B offset */
537 laddr = (uintptr_t)LMT_OFF(lbase, lnum, 8);
544 rxq->available -= nb_pkts;
546 /* Free all the CQs that we've processed */
547 plt_write64((wdata | nb_pkts), rxq->cq_door);
549 /* Free remaining meta buffers if any */
550 if (flags & NIX_RX_OFFLOAD_SECURITY_F && loff) {
551 nix_sec_flush_meta(laddr, lmt_id + lnum, loff, aura_handle);
558 #if defined(RTE_ARCH_ARM64)
560 static __rte_always_inline uint64_t
561 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
563 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
564 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
565 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
571 static __rte_always_inline uint64_t
572 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
574 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
575 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
576 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
582 static __rte_always_inline uint16_t
583 cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,
584 const uint16_t flags, void *lookup_mem,
585 struct cnxk_timesync_info *tstamp,
588 struct cn10k_eth_rxq *rxq = args;
589 const uint64_t mbuf_initializer = (flags & NIX_RX_VWQE_F) ?
591 rxq->mbuf_initializer;
592 const uint64x2_t data_off = flags & NIX_RX_VWQE_F ?
593 vdupq_n_u64(0x80ULL) :
594 vdupq_n_u64(rxq->data_off);
595 const uint32_t qmask = flags & NIX_RX_VWQE_F ? 0 : rxq->qmask;
596 const uint64_t wdata = flags & NIX_RX_VWQE_F ? 0 : rxq->wdata;
597 const uintptr_t desc = flags & NIX_RX_VWQE_F ? 0 : rxq->desc;
598 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
599 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
600 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
601 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
602 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
603 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
604 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
605 uint64_t aura_handle, lbase, laddr;
606 uint8_t loff = 0, lnum = 0, shft = 0;
607 uint8x16_t f0, f1, f2, f3;
608 uint16_t lmt_id, d_off;
609 uint16_t packets = 0;
615 if (!(flags & NIX_RX_VWQE_F)) {
616 lookup_mem = rxq->lookup_mem;
619 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
620 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
621 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
622 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
623 if (flags & NIX_RX_OFFLOAD_TSTAMP_F)
624 tstamp = rxq->tstamp;
629 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
630 if (flags & NIX_RX_VWQE_F) {
633 mbuf0 = (struct rte_mbuf *)((uintptr_t)mbufs[0] -
634 sizeof(struct rte_mbuf));
635 /* Pick first mbuf's aura handle assuming all
636 * mbufs are from a vec and are from same RQ.
638 aura_handle = mbuf0->pool->pool_id;
639 /* Calculate offset from mbuf to actual data area */
640 d_off = ((uintptr_t)mbuf0->buf_addr - (uintptr_t)mbuf0);
641 d_off += (mbuf_initializer & 0xFFFF);
643 /* Get SA Base from lookup tbl using port_id */
644 port = mbuf_initializer >> 48;
645 sa_base = cnxk_nix_sa_base_get(port, lookup_mem);
649 aura_handle = rxq->aura_handle;
650 d_off = rxq->data_off;
651 sa_base = rxq->sa_base;
652 lbase = rxq->lmt_base;
654 sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
655 ROC_LMT_BASE_ID_GET(lbase, lmt_id);
661 while (packets < pkts) {
662 if (!(flags & NIX_RX_VWQE_F)) {
663 /* Exit loop if head is about to wrap and become
666 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
667 NIX_DESCS_PER_LOOP) {
668 pkts_left += (pkts - packets);
672 cq0 = desc + CQE_SZ(head);
674 cq0 = (uintptr_t)&mbufs[packets];
677 /* Prefetch N desc ahead */
678 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 4, 64, flags));
679 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 5, 64, flags));
680 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 6, 64, flags));
681 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 7, 64, flags));
683 /* Get NIX_RX_SG_S for size and buffer pointer */
684 cq0_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 0, 64, flags));
685 cq1_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 1, 64, flags));
686 cq2_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 2, 64, flags));
687 cq3_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 3, 64, flags));
689 if (!(flags & NIX_RX_VWQE_F)) {
690 /* Extract mbuf from NIX_RX_SG_S */
691 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
692 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
693 mbuf01 = vqsubq_u64(mbuf01, data_off);
694 mbuf23 = vqsubq_u64(mbuf23, data_off);
697 vsubq_u64(vld1q_u64((uint64_t *)cq0), data_off);
698 mbuf23 = vsubq_u64(vld1q_u64((uint64_t *)(cq0 + 16)),
702 /* Move mbufs to scalar registers for future use */
703 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
704 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
705 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
706 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
708 /* Mask to get packet len from NIX_RX_SG_S */
709 const uint8x16_t shuf_msk = {
710 0xFF, 0xFF, /* pkt_type set as unknown */
711 0xFF, 0xFF, /* pkt_type set as unknown */
712 0, 1, /* octet 1~0, low 16 bits pkt_len */
713 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
714 0, 1, /* octet 1~0, 16 bits data_len */
715 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
717 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
718 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
719 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
720 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
721 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
723 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
724 /* Prefetch probable CPT parse header area */
725 rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf0, d_off));
726 rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf1, d_off));
727 rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf2, d_off));
728 rte_prefetch_non_temporal(RTE_PTR_ADD(mbuf3, d_off));
731 /* Load CQE word0 and word 1 */
732 const uint64_t cq0_w0 = *CQE_PTR_OFF(cq0, 0, 0, flags);
733 const uint64_t cq0_w1 = *CQE_PTR_OFF(cq0, 0, 8, flags);
734 const uint64_t cq1_w0 = *CQE_PTR_OFF(cq0, 1, 0, flags);
735 const uint64_t cq1_w1 = *CQE_PTR_OFF(cq0, 1, 8, flags);
736 const uint64_t cq2_w0 = *CQE_PTR_OFF(cq0, 2, 0, flags);
737 const uint64_t cq2_w1 = *CQE_PTR_OFF(cq0, 2, 8, flags);
738 const uint64_t cq3_w0 = *CQE_PTR_OFF(cq0, 3, 0, flags);
739 const uint64_t cq3_w1 = *CQE_PTR_OFF(cq0, 3, 8, flags);
741 if (flags & NIX_RX_OFFLOAD_RSS_F) {
742 /* Fill rss in the rx_descriptor_fields1 */
743 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
744 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
745 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
746 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
747 ol_flags0 = RTE_MBUF_F_RX_RSS_HASH;
748 ol_flags1 = RTE_MBUF_F_RX_RSS_HASH;
749 ol_flags2 = RTE_MBUF_F_RX_RSS_HASH;
750 ol_flags3 = RTE_MBUF_F_RX_RSS_HASH;
758 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
759 /* Fill packet_type in the rx_descriptor_fields1 */
760 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
762 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
764 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
766 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
770 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
771 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
772 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
773 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
774 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
777 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
778 RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1);
779 RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1);
780 RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1);
781 RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1);
783 /* Translate meta to mbuf */
784 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
785 /* Checksum ol_flags will be cleared if mbuf is meta */
786 mbuf0 = nix_sec_meta_to_mbuf(cq0_w1, sa_base, laddr,
787 &loff, mbuf0, d_off, &f0,
789 mbuf01 = vsetq_lane_u64((uint64_t)mbuf0, mbuf01, 0);
791 mbuf1 = nix_sec_meta_to_mbuf(cq1_w1, sa_base, laddr,
792 &loff, mbuf1, d_off, &f1,
794 mbuf01 = vsetq_lane_u64((uint64_t)mbuf1, mbuf01, 1);
796 mbuf2 = nix_sec_meta_to_mbuf(cq2_w1, sa_base, laddr,
797 &loff, mbuf2, d_off, &f2,
799 mbuf23 = vsetq_lane_u64((uint64_t)mbuf2, mbuf23, 0);
801 mbuf3 = nix_sec_meta_to_mbuf(cq3_w1, sa_base, laddr,
802 &loff, mbuf3, d_off, &f3,
804 mbuf23 = vsetq_lane_u64((uint64_t)mbuf3, mbuf23, 1);
807 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
808 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
809 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
810 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
811 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
813 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
814 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
815 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
816 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
818 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
819 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
820 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
821 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
824 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
825 ol_flags0 = nix_update_match_id(
826 *(uint16_t *)CQE_PTR_OFF(cq0, 0, 38, flags),
828 ol_flags1 = nix_update_match_id(
829 *(uint16_t *)CQE_PTR_OFF(cq0, 1, 38, flags),
831 ol_flags2 = nix_update_match_id(
832 *(uint16_t *)CQE_PTR_OFF(cq0, 2, 38, flags),
834 ol_flags3 = nix_update_match_id(
835 *(uint16_t *)CQE_PTR_OFF(cq0, 3, 38, flags),
839 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
840 const uint16x8_t len_off = {
843 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
844 0, /* pktlen 16:32 */
845 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
849 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
850 RTE_PTYPE_L2_ETHER_TIMESYNC,
851 RTE_PTYPE_L2_ETHER_TIMESYNC,
852 RTE_PTYPE_L2_ETHER_TIMESYNC};
853 const uint64_t ts_olf = RTE_MBUF_F_RX_IEEE1588_PTP |
854 RTE_MBUF_F_RX_IEEE1588_TMST |
855 tstamp->rx_tstamp_dynflag;
856 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
857 uint64x2_t ts01, ts23, mask;
861 /* Subtract timesync length from total pkt length. */
862 f0 = vsubq_u16(f0, len_off);
863 f1 = vsubq_u16(f1, len_off);
864 f2 = vsubq_u16(f2, len_off);
865 f3 = vsubq_u16(f3, len_off);
867 /* Get the address of actual timestamp. */
868 ts01 = vaddq_u64(mbuf01, data_off);
869 ts23 = vaddq_u64(mbuf23, data_off);
870 /* Load timestamp from address. */
871 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
874 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
877 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
880 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
883 /* Convert from be to cpu byteorder. */
884 ts01 = vrev64q_u8(ts01);
885 ts23 = vrev64q_u8(ts23);
886 /* Store timestamp into scalar for later use. */
887 ts[0] = vgetq_lane_u64(ts01, 0);
888 ts[1] = vgetq_lane_u64(ts01, 1);
889 ts[2] = vgetq_lane_u64(ts23, 0);
890 ts[3] = vgetq_lane_u64(ts23, 1);
892 /* Store timestamp into dynfield. */
893 *cnxk_nix_timestamp_dynfield(mbuf0, tstamp) = ts[0];
894 *cnxk_nix_timestamp_dynfield(mbuf1, tstamp) = ts[1];
895 *cnxk_nix_timestamp_dynfield(mbuf2, tstamp) = ts[2];
896 *cnxk_nix_timestamp_dynfield(mbuf3, tstamp) = ts[3];
898 /* Generate ptype mask to filter L2 ether timesync */
899 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
900 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
901 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
902 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
904 /* Match against L2 ether timesync. */
905 mask = vceqq_u32(mask, ptype);
906 /* Convert from vector from scalar mask */
907 res = vaddvq_u32(vandq_u32(mask, and_mask));
911 /* Fill in the ol_flags for any packets that
914 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
915 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
916 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
917 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
919 /* Update Rxq timestamp with the latest
922 tstamp->rx_ready = 1;
923 tstamp->rx_tstamp = ts[31 - __builtin_clz(res)];
927 /* Form rearm_data with ol_flags */
928 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
929 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
930 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
931 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
933 /* Update rx_descriptor_fields1 */
934 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
935 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
936 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
937 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
939 /* Update rearm_data */
940 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
941 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
942 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
943 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
945 /* Store the mbufs to rx_pkts */
946 vst1q_u64((uint64_t *)&mbufs[packets], mbuf01);
947 vst1q_u64((uint64_t *)&mbufs[packets + 2], mbuf23);
949 if (flags & NIX_RX_MULTI_SEG_F) {
950 /* Multi segment is enable build mseg list for
951 * individual mbufs in scalar mode.
953 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
954 (CQE_PTR_OFF(cq0, 0, 8, flags)),
955 mbuf0, mbuf_initializer, flags);
956 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
957 (CQE_PTR_OFF(cq0, 1, 8, flags)),
958 mbuf1, mbuf_initializer, flags);
959 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
960 (CQE_PTR_OFF(cq0, 2, 8, flags)),
961 mbuf2, mbuf_initializer, flags);
962 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
963 (CQE_PTR_OFF(cq0, 3, 8, flags)),
964 mbuf3, mbuf_initializer, flags);
966 /* Update that no more segments */
974 roc_prefetch_store_keep(mbuf0);
975 roc_prefetch_store_keep(mbuf1);
976 roc_prefetch_store_keep(mbuf2);
977 roc_prefetch_store_keep(mbuf3);
979 packets += NIX_DESCS_PER_LOOP;
981 if (!(flags & NIX_RX_VWQE_F)) {
982 /* Advance head pointer and packets */
983 head += NIX_DESCS_PER_LOOP;
987 if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
988 /* Check if lmtline border is crossed and adjust lnum */
990 /* Update aura handle */
991 *(uint64_t *)(laddr - 8) =
992 (((uint64_t)(15 & 0x1) << 32) |
993 roc_npa_aura_handle_to_aura(aura_handle));
998 laddr = (uintptr_t)LMT_OFF(lbase, lnum, 8);
999 /* Pick the pointer from 16th index and put it
1000 * at end of this new line.
1002 *(uint64_t *)(laddr + (loff << 3) - 8) =
1003 *(uint64_t *)(laddr - 8);
1006 /* Flush it when we are in 16th line and might
1009 if (lnum >= 15 && loff >= 12) {
1010 /* 16 LMT Line size m1 */
1011 uint64_t data = BIT_ULL(48) - 1;
1013 /* Update aura handle */
1014 *(uint64_t *)(laddr - 8) =
1015 (((uint64_t)(loff & 0x1) << 32) |
1016 roc_npa_aura_handle_to_aura(aura_handle));
1018 data = (data & ~(0x7UL << shft)) |
1019 (((uint64_t)loff >> 1) << shft);
1021 /* Send up to 16 lmt lines of pointers */
1022 nix_sec_flush_meta_burst(lmt_id, data, lnum + 1,
1028 /* First pointer starts at 8B offset */
1029 laddr = (uintptr_t)LMT_OFF(lbase, lnum, 8);
1034 if (flags & NIX_RX_OFFLOAD_SECURITY_F && loff) {
1035 /* 16 LMT Line size m1 */
1036 uint64_t data = BIT_ULL(48) - 1;
1038 /* Update aura handle */
1039 *(uint64_t *)(laddr - 8) =
1040 (((uint64_t)(loff & 0x1) << 32) |
1041 roc_npa_aura_handle_to_aura(aura_handle));
1043 data = (data & ~(0x7UL << shft)) |
1044 (((uint64_t)loff >> 1) << shft);
1046 /* Send up to 16 lmt lines of pointers */
1047 nix_sec_flush_meta_burst(lmt_id, data, lnum + 1, aura_handle);
1048 if (flags & NIX_RX_VWQE_F)
1052 if (flags & NIX_RX_VWQE_F)
1056 rxq->available -= packets;
1059 /* Free all the CQs that we've processed */
1060 plt_write64((rxq->wdata | packets), rxq->cq_door);
1062 if (unlikely(pkts_left))
1063 packets += cn10k_nix_recv_pkts(args, &mbufs[packets], pkts_left,
1071 static inline uint16_t
1072 cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,
1073 const uint16_t flags, void *lookup_mem,
1074 struct cnxk_timesync_info *tstamp,
1078 RTE_SET_USED(mbufs);
1080 RTE_SET_USED(flags);
1081 RTE_SET_USED(lookup_mem);
1082 RTE_SET_USED(tstamp);
1083 RTE_SET_USED(lmt_base);
1091 #define RSS_F NIX_RX_OFFLOAD_RSS_F
1092 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
1093 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
1094 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
1095 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
1096 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
1097 #define R_SEC_F NIX_RX_OFFLOAD_SECURITY_F
1099 /* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
1100 #define NIX_RX_FASTPATH_MODES_0_15 \
1101 R(no_offload, NIX_RX_OFFLOAD_NONE) \
1104 R(ptype_rss, PTYPE_F | RSS_F) \
1106 R(cksum_rss, CKSUM_F | RSS_F) \
1107 R(cksum_ptype, CKSUM_F | PTYPE_F) \
1108 R(cksum_ptype_rss, CKSUM_F | PTYPE_F | RSS_F) \
1110 R(mark_rss, MARK_F | RSS_F) \
1111 R(mark_ptype, MARK_F | PTYPE_F) \
1112 R(mark_ptype_rss, MARK_F | PTYPE_F | RSS_F) \
1113 R(mark_cksum, MARK_F | CKSUM_F) \
1114 R(mark_cksum_rss, MARK_F | CKSUM_F | RSS_F) \
1115 R(mark_cksum_ptype, MARK_F | CKSUM_F | PTYPE_F) \
1116 R(mark_cksum_ptype_rss, MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1118 #define NIX_RX_FASTPATH_MODES_16_31 \
1120 R(ts_rss, TS_F | RSS_F) \
1121 R(ts_ptype, TS_F | PTYPE_F) \
1122 R(ts_ptype_rss, TS_F | PTYPE_F | RSS_F) \
1123 R(ts_cksum, TS_F | CKSUM_F) \
1124 R(ts_cksum_rss, TS_F | CKSUM_F | RSS_F) \
1125 R(ts_cksum_ptype, TS_F | CKSUM_F | PTYPE_F) \
1126 R(ts_cksum_ptype_rss, TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1127 R(ts_mark, TS_F | MARK_F) \
1128 R(ts_mark_rss, TS_F | MARK_F | RSS_F) \
1129 R(ts_mark_ptype, TS_F | MARK_F | PTYPE_F) \
1130 R(ts_mark_ptype_rss, TS_F | MARK_F | PTYPE_F | RSS_F) \
1131 R(ts_mark_cksum, TS_F | MARK_F | CKSUM_F) \
1132 R(ts_mark_cksum_rss, TS_F | MARK_F | CKSUM_F | RSS_F) \
1133 R(ts_mark_cksum_ptype, TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1134 R(ts_mark_cksum_ptype_rss, TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1136 #define NIX_RX_FASTPATH_MODES_32_47 \
1137 R(vlan, RX_VLAN_F) \
1138 R(vlan_rss, RX_VLAN_F | RSS_F) \
1139 R(vlan_ptype, RX_VLAN_F | PTYPE_F) \
1140 R(vlan_ptype_rss, RX_VLAN_F | PTYPE_F | RSS_F) \
1141 R(vlan_cksum, RX_VLAN_F | CKSUM_F) \
1142 R(vlan_cksum_rss, RX_VLAN_F | CKSUM_F | RSS_F) \
1143 R(vlan_cksum_ptype, RX_VLAN_F | CKSUM_F | PTYPE_F) \
1144 R(vlan_cksum_ptype_rss, RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
1145 R(vlan_mark, RX_VLAN_F | MARK_F) \
1146 R(vlan_mark_rss, RX_VLAN_F | MARK_F | RSS_F) \
1147 R(vlan_mark_ptype, RX_VLAN_F | MARK_F | PTYPE_F) \
1148 R(vlan_mark_ptype_rss, RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
1149 R(vlan_mark_cksum, RX_VLAN_F | MARK_F | CKSUM_F) \
1150 R(vlan_mark_cksum_rss, RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
1151 R(vlan_mark_cksum_ptype, RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
1152 R(vlan_mark_cksum_ptype_rss, \
1153 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1155 #define NIX_RX_FASTPATH_MODES_48_63 \
1156 R(vlan_ts, RX_VLAN_F | TS_F) \
1157 R(vlan_ts_rss, RX_VLAN_F | TS_F | RSS_F) \
1158 R(vlan_ts_ptype, RX_VLAN_F | TS_F | PTYPE_F) \
1159 R(vlan_ts_ptype_rss, RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
1160 R(vlan_ts_cksum, RX_VLAN_F | TS_F | CKSUM_F) \
1161 R(vlan_ts_cksum_rss, RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
1162 R(vlan_ts_cksum_ptype, RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
1163 R(vlan_ts_cksum_ptype_rss, \
1164 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1165 R(vlan_ts_mark, RX_VLAN_F | TS_F | MARK_F) \
1166 R(vlan_ts_mark_rss, RX_VLAN_F | TS_F | MARK_F | RSS_F) \
1167 R(vlan_ts_mark_ptype, RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
1168 R(vlan_ts_mark_ptype_rss, RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1169 R(vlan_ts_mark_cksum, RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
1170 R(vlan_ts_mark_cksum_rss, RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1171 R(vlan_ts_mark_cksum_ptype, \
1172 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1173 R(vlan_ts_mark_cksum_ptype_rss, \
1174 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1176 #define NIX_RX_FASTPATH_MODES_64_79 \
1178 R(sec_rss, R_SEC_F | RSS_F) \
1179 R(sec_ptype, R_SEC_F | PTYPE_F) \
1180 R(sec_ptype_rss, R_SEC_F | PTYPE_F | RSS_F) \
1181 R(sec_cksum, R_SEC_F | CKSUM_F) \
1182 R(sec_cksum_rss, R_SEC_F | CKSUM_F | RSS_F) \
1183 R(sec_cksum_ptype, R_SEC_F | CKSUM_F | PTYPE_F) \
1184 R(sec_cksum_ptype_rss, R_SEC_F | CKSUM_F | PTYPE_F | RSS_F) \
1185 R(sec_mark, R_SEC_F | MARK_F) \
1186 R(sec_mark_rss, R_SEC_F | MARK_F | RSS_F) \
1187 R(sec_mark_ptype, R_SEC_F | MARK_F | PTYPE_F) \
1188 R(sec_mark_ptype_rss, R_SEC_F | MARK_F | PTYPE_F | RSS_F) \
1189 R(sec_mark_cksum, R_SEC_F | MARK_F | CKSUM_F) \
1190 R(sec_mark_cksum_rss, R_SEC_F | MARK_F | CKSUM_F | RSS_F) \
1191 R(sec_mark_cksum_ptype, R_SEC_F | MARK_F | CKSUM_F | PTYPE_F) \
1192 R(sec_mark_cksum_ptype_rss, \
1193 R_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1195 #define NIX_RX_FASTPATH_MODES_80_95 \
1196 R(sec_ts, R_SEC_F | TS_F) \
1197 R(sec_ts_rss, R_SEC_F | TS_F | RSS_F) \
1198 R(sec_ts_ptype, R_SEC_F | TS_F | PTYPE_F) \
1199 R(sec_ts_ptype_rss, R_SEC_F | TS_F | PTYPE_F | RSS_F) \
1200 R(sec_ts_cksum, R_SEC_F | TS_F | CKSUM_F) \
1201 R(sec_ts_cksum_rss, R_SEC_F | TS_F | CKSUM_F | RSS_F) \
1202 R(sec_ts_cksum_ptype, R_SEC_F | TS_F | CKSUM_F | PTYPE_F) \
1203 R(sec_ts_cksum_ptype_rss, R_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1204 R(sec_ts_mark, R_SEC_F | TS_F | MARK_F) \
1205 R(sec_ts_mark_rss, R_SEC_F | TS_F | MARK_F | RSS_F) \
1206 R(sec_ts_mark_ptype, R_SEC_F | TS_F | MARK_F | PTYPE_F) \
1207 R(sec_ts_mark_ptype_rss, R_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1208 R(sec_ts_mark_cksum, R_SEC_F | TS_F | MARK_F | CKSUM_F) \
1209 R(sec_ts_mark_cksum_rss, R_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1210 R(sec_ts_mark_cksum_ptype, \
1211 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1212 R(sec_ts_mark_cksum_ptype_rss, \
1213 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1215 #define NIX_RX_FASTPATH_MODES_96_111 \
1216 R(sec_vlan, R_SEC_F | RX_VLAN_F) \
1217 R(sec_vlan_rss, R_SEC_F | RX_VLAN_F | RSS_F) \
1218 R(sec_vlan_ptype, R_SEC_F | RX_VLAN_F | PTYPE_F) \
1219 R(sec_vlan_ptype_rss, R_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F) \
1220 R(sec_vlan_cksum, R_SEC_F | RX_VLAN_F | CKSUM_F) \
1221 R(sec_vlan_cksum_rss, R_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F) \
1222 R(sec_vlan_cksum_ptype, R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
1223 R(sec_vlan_cksum_ptype_rss, \
1224 R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
1225 R(sec_vlan_mark, R_SEC_F | RX_VLAN_F | MARK_F) \
1226 R(sec_vlan_mark_rss, R_SEC_F | RX_VLAN_F | MARK_F | RSS_F) \
1227 R(sec_vlan_mark_ptype, R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F) \
1228 R(sec_vlan_mark_ptype_rss, \
1229 R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
1230 R(sec_vlan_mark_cksum, R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F) \
1231 R(sec_vlan_mark_cksum_rss, \
1232 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
1233 R(sec_vlan_mark_cksum_ptype, \
1234 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
1235 R(sec_vlan_mark_cksum_ptype_rss, \
1236 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1238 #define NIX_RX_FASTPATH_MODES_112_127 \
1239 R(sec_vlan_ts, R_SEC_F | RX_VLAN_F | TS_F) \
1240 R(sec_vlan_ts_rss, R_SEC_F | RX_VLAN_F | TS_F | RSS_F) \
1241 R(sec_vlan_ts_ptype, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F) \
1242 R(sec_vlan_ts_ptype_rss, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
1243 R(sec_vlan_ts_cksum, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F) \
1244 R(sec_vlan_ts_cksum_rss, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
1245 R(sec_vlan_ts_cksum_ptype, \
1246 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
1247 R(sec_vlan_ts_cksum_ptype_rss, \
1248 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1249 R(sec_vlan_ts_mark, R_SEC_F | RX_VLAN_F | TS_F | MARK_F) \
1250 R(sec_vlan_ts_mark_rss, R_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F) \
1251 R(sec_vlan_ts_mark_ptype, \
1252 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
1253 R(sec_vlan_ts_mark_ptype_rss, \
1254 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1255 R(sec_vlan_ts_mark_cksum, \
1256 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
1257 R(sec_vlan_ts_mark_cksum_rss, \
1258 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1259 R(sec_vlan_ts_mark_cksum_ptype, \
1260 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1261 R(sec_vlan_ts_mark_cksum_ptype_rss, \
1262 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1264 #define NIX_RX_FASTPATH_MODES \
1265 NIX_RX_FASTPATH_MODES_0_15 \
1266 NIX_RX_FASTPATH_MODES_16_31 \
1267 NIX_RX_FASTPATH_MODES_32_47 \
1268 NIX_RX_FASTPATH_MODES_48_63 \
1269 NIX_RX_FASTPATH_MODES_64_79 \
1270 NIX_RX_FASTPATH_MODES_80_95 \
1271 NIX_RX_FASTPATH_MODES_96_111 \
1272 NIX_RX_FASTPATH_MODES_112_127
1274 #define R(name, flags) \
1275 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \
1276 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1277 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
1278 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1279 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name( \
1280 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1281 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_mseg_##name( \
1282 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
1284 NIX_RX_FASTPATH_MODES
1287 #define NIX_RX_RECV(fn, flags) \
1288 uint16_t __rte_noinline __rte_hot fn( \
1289 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
1291 return cn10k_nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags)); \
1294 #define NIX_RX_RECV_MSEG(fn, flags) NIX_RX_RECV(fn, flags | NIX_RX_MULTI_SEG_F)
1296 #define NIX_RX_RECV_VEC(fn, flags) \
1297 uint16_t __rte_noinline __rte_hot fn( \
1298 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \
1300 return cn10k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts, \
1301 (flags), NULL, NULL, 0); \
1304 #define NIX_RX_RECV_VEC_MSEG(fn, flags) \
1305 NIX_RX_RECV_VEC(fn, flags | NIX_RX_MULTI_SEG_F)
1307 #endif /* __CN10K_RX_H__ */