1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
10 #include <cnxk_ethdev.h>
12 #define NIX_RX_OFFLOAD_NONE (0)
13 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
14 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
15 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
16 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
17 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
18 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
19 #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)
21 /* Flags to control cqe_to_mbuf conversion function.
22 * Defining it from backwards to denote its been
23 * not used as offload flags to pick function
25 #define NIX_RX_VWQE_F BIT(13)
26 #define NIX_RX_MULTI_SEG_F BIT(14)
27 #define CPT_RX_WQE_F BIT(15)
29 #define CNXK_NIX_CQ_ENTRY_SZ 128
30 #define NIX_DESCS_PER_LOOP 4
31 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
32 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
34 #define CQE_PTR_OFF(b, i, o, f) \
35 (((f) & NIX_RX_VWQE_F) ? \
36 (uint64_t *)(((uintptr_t)((uint64_t *)(b))[i]) + (o)) : \
37 (uint64_t *)(((uintptr_t)(b)) + CQE_SZ(i) + (o)))
39 union mbuf_initializer {
49 static __rte_always_inline uint64_t
50 nix_clear_data_off(uint64_t oldval)
52 union mbuf_initializer mbuf_init = {.value = oldval};
54 mbuf_init.fields.data_off = 0;
55 return mbuf_init.value;
58 static __rte_always_inline struct rte_mbuf *
59 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
63 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
64 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
65 return (struct rte_mbuf *)(buff - data_off);
68 static __rte_always_inline uint32_t
69 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
71 const uint16_t *const ptype = lookup_mem;
72 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
73 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
74 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
76 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
79 static __rte_always_inline uint32_t
80 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
82 const uint32_t *const ol_flags =
83 (const uint32_t *)((const uint8_t *)lookup_mem +
86 return ol_flags[(in & 0xfff00000) >> 20];
89 static inline uint64_t
90 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
91 struct rte_mbuf *mbuf)
93 /* There is no separate bit to check match_id
94 * is valid or not? and no flag to identify it is an
95 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
96 * action. The former case addressed through 0 being invalid
97 * value and inc/dec match_id pair when MARK is activated.
98 * The later case addressed through defining
99 * CNXK_FLOW_MARK_DEFAULT as value for
100 * RTE_FLOW_ACTION_TYPE_MARK.
101 * This would translate to not use
102 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
103 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
104 * i.e valid mark_id's are from
105 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
107 if (likely(match_id)) {
108 ol_flags |= PKT_RX_FDIR;
109 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
110 ol_flags |= PKT_RX_FDIR_ID;
111 mbuf->hash.fdir.hi = match_id - 1;
118 static __rte_always_inline void
119 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
120 uint64_t rearm, const uint16_t flags)
122 const rte_iova_t *iova_list;
123 struct rte_mbuf *head;
124 const rte_iova_t *eol;
128 sg = *(const uint64_t *)(rx + 1);
129 nb_segs = (sg >> 48) & 0x3;
136 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
137 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
138 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
139 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
140 mbuf->nb_segs = nb_segs;
143 eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
144 /* Skip SG_S and first IOVA*/
145 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
148 rearm = rearm & ~0xFFFF;
152 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
155 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
157 mbuf->data_len = sg & 0xFFFF;
159 *(uint64_t *)(&mbuf->rearm_data) = rearm;
163 if (!nb_segs && (iova_list + 1 < eol)) {
164 sg = *(const uint64_t *)(iova_list);
165 nb_segs = (sg >> 48) & 0x3;
166 head->nb_segs += nb_segs;
167 iova_list = (const rte_iova_t *)(iova_list + 1);
173 static __rte_always_inline void
174 cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
175 struct rte_mbuf *mbuf, const void *lookup_mem,
176 const uint64_t val, const uint16_t flag)
178 const union nix_rx_parse_u *rx =
179 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
180 const uint16_t len = rx->pkt_lenm1 + 1;
181 const uint64_t w1 = *(const uint64_t *)rx;
182 uint64_t ol_flags = 0;
184 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
185 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
187 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
188 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
190 mbuf->packet_type = 0;
192 if (flag & NIX_RX_OFFLOAD_RSS_F) {
193 mbuf->hash.rss = tag;
194 ol_flags |= PKT_RX_RSS_HASH;
197 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
198 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
200 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
201 if (rx->vtag0_gone) {
202 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
203 mbuf->vlan_tci = rx->vtag0_tci;
205 if (rx->vtag1_gone) {
206 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
207 mbuf->vlan_tci_outer = rx->vtag1_tci;
211 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
212 ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
214 mbuf->ol_flags = ol_flags;
216 mbuf->data_len = len;
217 *(uint64_t *)(&mbuf->rearm_data) = val;
219 if (flag & NIX_RX_MULTI_SEG_F)
220 nix_cqe_xtract_mseg(rx, mbuf, val, flag);
225 static inline uint16_t
226 nix_rx_nb_pkts(struct cn10k_eth_rxq *rxq, const uint64_t wdata,
227 const uint16_t pkts, const uint32_t qmask)
229 uint32_t available = rxq->available;
231 /* Update the available count if cached value is not enough */
232 if (unlikely(available < pkts)) {
233 uint64_t reg, head, tail;
235 /* Use LDADDA version to avoid reorder */
236 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
237 /* CQ_OP_STATUS operation error */
238 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
239 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
242 tail = reg & 0xFFFFF;
243 head = (reg >> 20) & 0xFFFFF;
245 available = tail - head + qmask + 1;
247 available = tail - head;
249 rxq->available = available;
252 return RTE_MIN(pkts, available);
255 static __rte_always_inline uint16_t
256 cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
257 const uint16_t flags)
259 struct cn10k_eth_rxq *rxq = rx_queue;
260 const uint64_t mbuf_init = rxq->mbuf_initializer;
261 const void *lookup_mem = rxq->lookup_mem;
262 const uint64_t data_off = rxq->data_off;
263 const uintptr_t desc = rxq->desc;
264 const uint64_t wdata = rxq->wdata;
265 const uint32_t qmask = rxq->qmask;
266 uint16_t packets = 0, nb_pkts;
267 uint32_t head = rxq->head;
268 struct nix_cqe_hdr_s *cq;
269 struct rte_mbuf *mbuf;
271 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
273 while (packets < nb_pkts) {
274 /* Prefetch N desc ahead */
275 rte_prefetch_non_temporal(
276 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
277 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
279 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
281 cn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
283 cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
284 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
285 (flags & NIX_RX_MULTI_SEG_F),
286 (uint64_t *)((uint8_t *)mbuf
288 rx_pkts[packets++] = mbuf;
289 roc_prefetch_store_keep(mbuf);
295 rxq->available -= nb_pkts;
297 /* Free all the CQs that we've processed */
298 plt_write64((wdata | nb_pkts), rxq->cq_door);
303 #if defined(RTE_ARCH_ARM64)
305 static __rte_always_inline uint64_t
306 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
308 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
309 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
310 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
316 static __rte_always_inline uint64_t
317 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
319 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
320 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
321 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
327 static __rte_always_inline uint16_t
328 cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,
329 const uint16_t flags, void *lookup_mem,
330 struct cnxk_timesync_info *tstamp)
332 struct cn10k_eth_rxq *rxq = args;
333 const uint64_t mbuf_initializer = (flags & NIX_RX_VWQE_F) ?
335 rxq->mbuf_initializer;
336 const uint64x2_t data_off = flags & NIX_RX_VWQE_F ?
337 vdupq_n_u64(0x80ULL) :
338 vdupq_n_u64(rxq->data_off);
339 const uint32_t qmask = flags & NIX_RX_VWQE_F ? 0 : rxq->qmask;
340 const uint64_t wdata = flags & NIX_RX_VWQE_F ? 0 : rxq->wdata;
341 const uintptr_t desc = flags & NIX_RX_VWQE_F ? 0 : rxq->desc;
342 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
343 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
344 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
345 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
346 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
347 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
348 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
349 uint8x16_t f0, f1, f2, f3;
350 uint16_t packets = 0;
355 if (!(flags & NIX_RX_VWQE_F)) {
356 lookup_mem = rxq->lookup_mem;
359 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
360 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
361 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
362 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
363 if (flags & NIX_RX_OFFLOAD_TSTAMP_F)
364 tstamp = rxq->tstamp;
369 while (packets < pkts) {
370 if (!(flags & NIX_RX_VWQE_F)) {
371 /* Exit loop if head is about to wrap and become
374 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
375 NIX_DESCS_PER_LOOP) {
376 pkts_left += (pkts - packets);
380 cq0 = desc + CQE_SZ(head);
382 cq0 = (uintptr_t)&mbufs[packets];
385 /* Prefetch N desc ahead */
386 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 8, 0, flags));
387 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 9, 0, flags));
388 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 10, 0, flags));
389 rte_prefetch_non_temporal(CQE_PTR_OFF(cq0, 11, 0, flags));
391 /* Get NIX_RX_SG_S for size and buffer pointer */
392 cq0_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 0, 64, flags));
393 cq1_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 1, 64, flags));
394 cq2_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 2, 64, flags));
395 cq3_w8 = vld1q_u64(CQE_PTR_OFF(cq0, 3, 64, flags));
397 if (!(flags & NIX_RX_VWQE_F)) {
398 /* Extract mbuf from NIX_RX_SG_S */
399 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
400 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
401 mbuf01 = vqsubq_u64(mbuf01, data_off);
402 mbuf23 = vqsubq_u64(mbuf23, data_off);
405 vsubq_u64(vld1q_u64((uint64_t *)cq0), data_off);
406 mbuf23 = vsubq_u64(vld1q_u64((uint64_t *)(cq0 + 16)),
410 /* Move mbufs to scalar registers for future use */
411 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
412 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
413 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
414 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
416 /* Mask to get packet len from NIX_RX_SG_S */
417 const uint8x16_t shuf_msk = {
418 0xFF, 0xFF, /* pkt_type set as unknown */
419 0xFF, 0xFF, /* pkt_type set as unknown */
420 0, 1, /* octet 1~0, low 16 bits pkt_len */
421 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
422 0, 1, /* octet 1~0, 16 bits data_len */
423 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
425 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
426 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
427 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
428 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
429 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
431 /* Load CQE word0 and word 1 */
432 const uint64_t cq0_w0 = *CQE_PTR_OFF(cq0, 0, 0, flags);
433 const uint64_t cq0_w1 = *CQE_PTR_OFF(cq0, 0, 8, flags);
434 const uint64_t cq1_w0 = *CQE_PTR_OFF(cq0, 1, 0, flags);
435 const uint64_t cq1_w1 = *CQE_PTR_OFF(cq0, 1, 8, flags);
436 const uint64_t cq2_w0 = *CQE_PTR_OFF(cq0, 2, 0, flags);
437 const uint64_t cq2_w1 = *CQE_PTR_OFF(cq0, 2, 8, flags);
438 const uint64_t cq3_w0 = *CQE_PTR_OFF(cq0, 3, 0, flags);
439 const uint64_t cq3_w1 = *CQE_PTR_OFF(cq0, 3, 8, flags);
441 if (flags & NIX_RX_OFFLOAD_RSS_F) {
442 /* Fill rss in the rx_descriptor_fields1 */
443 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
444 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
445 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
446 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
447 ol_flags0 = PKT_RX_RSS_HASH;
448 ol_flags1 = PKT_RX_RSS_HASH;
449 ol_flags2 = PKT_RX_RSS_HASH;
450 ol_flags3 = PKT_RX_RSS_HASH;
458 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
459 /* Fill packet_type in the rx_descriptor_fields1 */
460 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
462 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
464 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
466 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
470 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
471 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
472 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
473 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
474 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
477 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
478 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
479 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
480 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
481 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
483 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
484 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
485 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
486 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
488 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
489 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
490 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
491 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
494 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
495 ol_flags0 = nix_update_match_id(
496 *(uint16_t *)CQE_PTR_OFF(cq0, 0, 38, flags),
498 ol_flags1 = nix_update_match_id(
499 *(uint16_t *)CQE_PTR_OFF(cq0, 1, 38, flags),
501 ol_flags2 = nix_update_match_id(
502 *(uint16_t *)CQE_PTR_OFF(cq0, 2, 38, flags),
504 ol_flags3 = nix_update_match_id(
505 *(uint16_t *)CQE_PTR_OFF(cq0, 3, 38, flags),
509 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
510 const uint16x8_t len_off = {
513 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
514 0, /* pktlen 16:32 */
515 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
519 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
520 RTE_PTYPE_L2_ETHER_TIMESYNC,
521 RTE_PTYPE_L2_ETHER_TIMESYNC,
522 RTE_PTYPE_L2_ETHER_TIMESYNC};
523 const uint64_t ts_olf = PKT_RX_IEEE1588_PTP |
524 PKT_RX_IEEE1588_TMST |
525 tstamp->rx_tstamp_dynflag;
526 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
527 uint64x2_t ts01, ts23, mask;
531 /* Subtract timesync length from total pkt length. */
532 f0 = vsubq_u16(f0, len_off);
533 f1 = vsubq_u16(f1, len_off);
534 f2 = vsubq_u16(f2, len_off);
535 f3 = vsubq_u16(f3, len_off);
537 /* Get the address of actual timestamp. */
538 ts01 = vaddq_u64(mbuf01, data_off);
539 ts23 = vaddq_u64(mbuf23, data_off);
540 /* Load timestamp from address. */
541 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
544 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
547 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
550 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
553 /* Convert from be to cpu byteorder. */
554 ts01 = vrev64q_u8(ts01);
555 ts23 = vrev64q_u8(ts23);
556 /* Store timestamp into scalar for later use. */
557 ts[0] = vgetq_lane_u64(ts01, 0);
558 ts[1] = vgetq_lane_u64(ts01, 1);
559 ts[2] = vgetq_lane_u64(ts23, 0);
560 ts[3] = vgetq_lane_u64(ts23, 1);
562 /* Store timestamp into dynfield. */
563 *cnxk_nix_timestamp_dynfield(mbuf0, tstamp) = ts[0];
564 *cnxk_nix_timestamp_dynfield(mbuf1, tstamp) = ts[1];
565 *cnxk_nix_timestamp_dynfield(mbuf2, tstamp) = ts[2];
566 *cnxk_nix_timestamp_dynfield(mbuf3, tstamp) = ts[3];
568 /* Generate ptype mask to filter L2 ether timesync */
569 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
570 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
571 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
572 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
574 /* Match against L2 ether timesync. */
575 mask = vceqq_u32(mask, ptype);
576 /* Convert from vector from scalar mask */
577 res = vaddvq_u32(vandq_u32(mask, and_mask));
581 /* Fill in the ol_flags for any packets that
584 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
585 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
586 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
587 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
589 /* Update Rxq timestamp with the latest
592 tstamp->rx_ready = 1;
593 tstamp->rx_tstamp = ts[31 - __builtin_clz(res)];
597 /* Form rearm_data with ol_flags */
598 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
599 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
600 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
601 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
603 /* Update rx_descriptor_fields1 */
604 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
605 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
606 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
607 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
609 /* Update rearm_data */
610 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
611 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
612 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
613 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
615 /* Store the mbufs to rx_pkts */
616 vst1q_u64((uint64_t *)&mbufs[packets], mbuf01);
617 vst1q_u64((uint64_t *)&mbufs[packets + 2], mbuf23);
619 if (flags & NIX_RX_MULTI_SEG_F) {
620 /* Multi segment is enable build mseg list for
621 * individual mbufs in scalar mode.
623 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
624 (CQE_PTR_OFF(cq0, 0, 8, flags)),
625 mbuf0, mbuf_initializer, flags);
626 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
627 (CQE_PTR_OFF(cq0, 1, 8, flags)),
628 mbuf1, mbuf_initializer, flags);
629 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
630 (CQE_PTR_OFF(cq0, 2, 8, flags)),
631 mbuf2, mbuf_initializer, flags);
632 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
633 (CQE_PTR_OFF(cq0, 3, 8, flags)),
634 mbuf3, mbuf_initializer, flags);
636 /* Update that no more segments */
644 roc_prefetch_store_keep(mbuf0);
645 roc_prefetch_store_keep(mbuf1);
646 roc_prefetch_store_keep(mbuf2);
647 roc_prefetch_store_keep(mbuf3);
649 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
650 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
651 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
652 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
653 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
655 packets += NIX_DESCS_PER_LOOP;
657 if (!(flags & NIX_RX_VWQE_F)) {
658 /* Advance head pointer and packets */
659 head += NIX_DESCS_PER_LOOP;
664 if (flags & NIX_RX_VWQE_F)
668 rxq->available -= packets;
671 /* Free all the CQs that we've processed */
672 plt_write64((rxq->wdata | packets), rxq->cq_door);
674 if (unlikely(pkts_left))
675 packets += cn10k_nix_recv_pkts(args, &mbufs[packets], pkts_left,
683 static inline uint16_t
684 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
685 uint16_t pkts, const uint16_t flags,
686 void *lookup_mem, void *tstamp)
688 RTE_SET_USED(lookup_mem);
689 RTE_SET_USED(rx_queue);
690 RTE_SET_USED(rx_pkts);
693 RTE_SET_USED(tstamp);
701 #define RSS_F NIX_RX_OFFLOAD_RSS_F
702 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
703 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
704 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
705 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
706 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
708 /* [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
709 #define NIX_RX_FASTPATH_MODES \
710 R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
711 R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
712 R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
713 R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
714 R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
715 R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
716 R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
717 R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
718 R(mark, 0, 0, 1, 0, 0, 0, MARK_F) \
719 R(mark_rss, 0, 0, 1, 0, 0, 1, MARK_F | RSS_F) \
720 R(mark_ptype, 0, 0, 1, 0, 1, 0, MARK_F | PTYPE_F) \
721 R(mark_ptype_rss, 0, 0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
722 R(mark_cksum, 0, 0, 1, 1, 0, 0, MARK_F | CKSUM_F) \
723 R(mark_cksum_rss, 0, 0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
724 R(mark_cksum_ptype, 0, 0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \
725 R(mark_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
726 MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
727 R(ts, 0, 1, 0, 0, 0, 0, TS_F) \
728 R(ts_rss, 0, 1, 0, 0, 0, 1, TS_F | RSS_F) \
729 R(ts_ptype, 0, 1, 0, 0, 1, 0, TS_F | PTYPE_F) \
730 R(ts_ptype_rss, 0, 1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \
731 R(ts_cksum, 0, 1, 0, 1, 0, 0, TS_F | CKSUM_F) \
732 R(ts_cksum_rss, 0, 1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \
733 R(ts_cksum_ptype, 0, 1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \
734 R(ts_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
735 TS_F | CKSUM_F | PTYPE_F | RSS_F) \
736 R(ts_mark, 0, 1, 1, 0, 0, 0, TS_F | MARK_F) \
737 R(ts_mark_rss, 0, 1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F) \
738 R(ts_mark_ptype, 0, 1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \
739 R(ts_mark_ptype_rss, 0, 1, 1, 0, 1, 1, \
740 TS_F | MARK_F | PTYPE_F | RSS_F) \
741 R(ts_mark_cksum, 0, 1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \
742 R(ts_mark_cksum_rss, 0, 1, 1, 1, 0, 1, \
743 TS_F | MARK_F | CKSUM_F | RSS_F) \
744 R(ts_mark_cksum_ptype, 0, 1, 1, 1, 1, 0, \
745 TS_F | MARK_F | CKSUM_F | PTYPE_F) \
746 R(ts_mark_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
747 TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
748 R(vlan, 1, 0, 0, 0, 0, 0, RX_VLAN_F) \
749 R(vlan_rss, 1, 0, 0, 0, 0, 1, RX_VLAN_F | RSS_F) \
750 R(vlan_ptype, 1, 0, 0, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
751 R(vlan_ptype_rss, 1, 0, 0, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F) \
752 R(vlan_cksum, 1, 0, 0, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
753 R(vlan_cksum_rss, 1, 0, 0, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F) \
754 R(vlan_cksum_ptype, 1, 0, 0, 1, 1, 0, \
755 RX_VLAN_F | CKSUM_F | PTYPE_F) \
756 R(vlan_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
757 RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
758 R(vlan_mark, 1, 0, 1, 0, 0, 0, RX_VLAN_F | MARK_F) \
759 R(vlan_mark_rss, 1, 0, 1, 0, 0, 1, RX_VLAN_F | MARK_F | RSS_F) \
760 R(vlan_mark_ptype, 1, 0, 1, 0, 1, 0, RX_VLAN_F | MARK_F | PTYPE_F)\
761 R(vlan_mark_ptype_rss, 1, 0, 1, 0, 1, 1, \
762 RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
763 R(vlan_mark_cksum, 1, 0, 1, 1, 0, 0, RX_VLAN_F | MARK_F | CKSUM_F)\
764 R(vlan_mark_cksum_rss, 1, 0, 1, 1, 0, 1, \
765 RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
766 R(vlan_mark_cksum_ptype, 1, 0, 1, 1, 1, 0, \
767 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
768 R(vlan_mark_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
769 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
770 R(vlan_ts, 1, 1, 0, 0, 0, 0, RX_VLAN_F | TS_F) \
771 R(vlan_ts_rss, 1, 1, 0, 0, 0, 1, RX_VLAN_F | TS_F | RSS_F) \
772 R(vlan_ts_ptype, 1, 1, 0, 0, 1, 0, RX_VLAN_F | TS_F | PTYPE_F) \
773 R(vlan_ts_ptype_rss, 1, 1, 0, 0, 1, 1, \
774 RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
775 R(vlan_ts_cksum, 1, 1, 0, 1, 0, 0, RX_VLAN_F | TS_F | CKSUM_F) \
776 R(vlan_ts_cksum_rss, 1, 1, 0, 1, 0, 1, \
777 RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
778 R(vlan_ts_cksum_ptype, 1, 1, 0, 1, 1, 0, \
779 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
780 R(vlan_ts_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
781 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
782 R(vlan_ts_mark, 1, 1, 1, 0, 0, 0, RX_VLAN_F | TS_F | MARK_F) \
783 R(vlan_ts_mark_rss, 1, 1, 1, 0, 0, 1, \
784 RX_VLAN_F | TS_F | MARK_F | RSS_F) \
785 R(vlan_ts_mark_ptype, 1, 1, 1, 0, 1, 0, \
786 RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
787 R(vlan_ts_mark_ptype_rss, 1, 1, 1, 0, 1, 1, \
788 RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
789 R(vlan_ts_mark_cksum, 1, 1, 1, 1, 0, 0, \
790 RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
791 R(vlan_ts_mark_cksum_rss, 1, 1, 1, 1, 0, 1, \
792 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
793 R(vlan_ts_mark_cksum_ptype, 1, 1, 1, 1, 1, 0, \
794 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
795 R(vlan_ts_mark_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
796 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
798 #define R(name, f5, f4, f3, f2, f1, f0, flags) \
799 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \
800 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
802 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
803 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
805 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name( \
806 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
808 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_mseg_##name( \
809 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
811 NIX_RX_FASTPATH_MODES
814 #endif /* __CN10K_RX_H__ */