1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
10 #include <cnxk_ethdev.h>
12 #define NIX_RX_OFFLOAD_NONE (0)
13 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
14 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
15 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
16 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
17 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
18 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
20 /* Flags to control cqe_to_mbuf conversion function.
21 * Defining it from backwards to denote its been
22 * not used as offload flags to pick function
24 #define NIX_RX_MULTI_SEG_F BIT(15)
26 #define CNXK_NIX_CQ_ENTRY_SZ 128
27 #define NIX_DESCS_PER_LOOP 4
28 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
29 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
31 union mbuf_initializer {
41 static __rte_always_inline uint64_t
42 nix_clear_data_off(uint64_t oldval)
44 union mbuf_initializer mbuf_init = {.value = oldval};
46 mbuf_init.fields.data_off = 0;
47 return mbuf_init.value;
50 static __rte_always_inline struct rte_mbuf *
51 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
55 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
56 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
57 return (struct rte_mbuf *)(buff - data_off);
60 static __rte_always_inline uint32_t
61 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
63 const uint16_t *const ptype = lookup_mem;
64 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
65 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
66 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
68 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
71 static __rte_always_inline uint32_t
72 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
74 const uint32_t *const ol_flags =
75 (const uint32_t *)((const uint8_t *)lookup_mem +
78 return ol_flags[(in & 0xfff00000) >> 20];
81 static inline uint64_t
82 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
83 struct rte_mbuf *mbuf)
85 /* There is no separate bit to check match_id
86 * is valid or not? and no flag to identify it is an
87 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
88 * action. The former case addressed through 0 being invalid
89 * value and inc/dec match_id pair when MARK is activated.
90 * The later case addressed through defining
91 * CNXK_FLOW_MARK_DEFAULT as value for
92 * RTE_FLOW_ACTION_TYPE_MARK.
93 * This would translate to not use
94 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
95 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
96 * i.e valid mark_id's are from
97 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
99 if (likely(match_id)) {
100 ol_flags |= PKT_RX_FDIR;
101 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
102 ol_flags |= PKT_RX_FDIR_ID;
103 mbuf->hash.fdir.hi = match_id - 1;
110 static __rte_always_inline void
111 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
112 uint64_t rearm, const uint16_t flags)
114 const rte_iova_t *iova_list;
115 struct rte_mbuf *head;
116 const rte_iova_t *eol;
120 sg = *(const uint64_t *)(rx + 1);
121 nb_segs = (sg >> 48) & 0x3;
128 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
129 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
130 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
131 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
132 mbuf->nb_segs = nb_segs;
135 eol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));
136 /* Skip SG_S and first IOVA*/
137 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
140 rearm = rearm & ~0xFFFF;
144 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
147 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
149 mbuf->data_len = sg & 0xFFFF;
151 *(uint64_t *)(&mbuf->rearm_data) = rearm;
155 if (!nb_segs && (iova_list + 1 < eol)) {
156 sg = *(const uint64_t *)(iova_list);
157 nb_segs = (sg >> 48) & 0x3;
158 head->nb_segs += nb_segs;
159 iova_list = (const rte_iova_t *)(iova_list + 1);
165 static __rte_always_inline void
166 cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
167 struct rte_mbuf *mbuf, const void *lookup_mem,
168 const uint64_t val, const uint16_t flag)
170 const union nix_rx_parse_u *rx =
171 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
172 const uint16_t len = rx->pkt_lenm1 + 1;
173 const uint64_t w1 = *(const uint64_t *)rx;
174 uint64_t ol_flags = 0;
176 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
177 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
179 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
180 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
182 mbuf->packet_type = 0;
184 if (flag & NIX_RX_OFFLOAD_RSS_F) {
185 mbuf->hash.rss = tag;
186 ol_flags |= PKT_RX_RSS_HASH;
189 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
190 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
192 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
193 if (rx->vtag0_gone) {
194 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
195 mbuf->vlan_tci = rx->vtag0_tci;
197 if (rx->vtag1_gone) {
198 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
199 mbuf->vlan_tci_outer = rx->vtag1_tci;
203 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
204 ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
206 mbuf->ol_flags = ol_flags;
208 mbuf->data_len = len;
209 *(uint64_t *)(&mbuf->rearm_data) = val;
211 if (flag & NIX_RX_MULTI_SEG_F)
212 nix_cqe_xtract_mseg(rx, mbuf, val, flag);
217 static inline uint16_t
218 nix_rx_nb_pkts(struct cn10k_eth_rxq *rxq, const uint64_t wdata,
219 const uint16_t pkts, const uint32_t qmask)
221 uint32_t available = rxq->available;
223 /* Update the available count if cached value is not enough */
224 if (unlikely(available < pkts)) {
225 uint64_t reg, head, tail;
227 /* Use LDADDA version to avoid reorder */
228 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
229 /* CQ_OP_STATUS operation error */
230 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
231 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
234 tail = reg & 0xFFFFF;
235 head = (reg >> 20) & 0xFFFFF;
237 available = tail - head + qmask + 1;
239 available = tail - head;
241 rxq->available = available;
244 return RTE_MIN(pkts, available);
247 static __rte_always_inline uint16_t
248 cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
249 const uint16_t flags)
251 struct cn10k_eth_rxq *rxq = rx_queue;
252 const uint64_t mbuf_init = rxq->mbuf_initializer;
253 const void *lookup_mem = rxq->lookup_mem;
254 const uint64_t data_off = rxq->data_off;
255 const uintptr_t desc = rxq->desc;
256 const uint64_t wdata = rxq->wdata;
257 const uint32_t qmask = rxq->qmask;
258 uint16_t packets = 0, nb_pkts;
259 uint32_t head = rxq->head;
260 struct nix_cqe_hdr_s *cq;
261 struct rte_mbuf *mbuf;
263 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
265 while (packets < nb_pkts) {
266 /* Prefetch N desc ahead */
267 rte_prefetch_non_temporal(
268 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
269 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
271 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
273 cn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
275 cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
276 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
277 (flags & NIX_RX_MULTI_SEG_F),
278 (uint64_t *)((uint8_t *)mbuf
280 rx_pkts[packets++] = mbuf;
281 roc_prefetch_store_keep(mbuf);
287 rxq->available -= nb_pkts;
289 /* Free all the CQs that we've processed */
290 plt_write64((wdata | nb_pkts), rxq->cq_door);
295 #if defined(RTE_ARCH_ARM64)
297 static __rte_always_inline uint64_t
298 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
300 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
301 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
302 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
308 static __rte_always_inline uint64_t
309 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
311 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
312 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
313 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
319 static __rte_always_inline uint16_t
320 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
321 uint16_t pkts, const uint16_t flags)
323 struct cn10k_eth_rxq *rxq = rx_queue;
324 uint16_t packets = 0;
325 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
326 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
327 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
328 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
329 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
330 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
331 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
332 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
333 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
334 const uint16_t *lookup_mem = rxq->lookup_mem;
335 const uint32_t qmask = rxq->qmask;
336 const uint64_t wdata = rxq->wdata;
337 const uintptr_t desc = rxq->desc;
338 uint8x16_t f0, f1, f2, f3;
339 uint32_t head = rxq->head;
342 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
343 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
345 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
346 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
348 while (packets < pkts) {
349 /* Exit loop if head is about to wrap and become unaligned */
350 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
351 NIX_DESCS_PER_LOOP) {
352 pkts_left += (pkts - packets);
356 const uintptr_t cq0 = desc + CQE_SZ(head);
358 /* Prefetch N desc ahead */
359 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
360 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
361 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
362 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
364 /* Get NIX_RX_SG_S for size and buffer pointer */
365 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
366 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
367 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
368 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
370 /* Extract mbuf from NIX_RX_SG_S */
371 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
372 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
373 mbuf01 = vqsubq_u64(mbuf01, data_off);
374 mbuf23 = vqsubq_u64(mbuf23, data_off);
376 /* Move mbufs to scalar registers for future use */
377 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
378 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
379 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
380 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
382 /* Mask to get packet len from NIX_RX_SG_S */
383 const uint8x16_t shuf_msk = {
384 0xFF, 0xFF, /* pkt_type set as unknown */
385 0xFF, 0xFF, /* pkt_type set as unknown */
386 0, 1, /* octet 1~0, low 16 bits pkt_len */
387 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
388 0, 1, /* octet 1~0, 16 bits data_len */
389 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
391 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
392 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
393 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
394 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
395 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
397 /* Load CQE word0 and word 1 */
398 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
399 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
400 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
401 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
402 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
403 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
404 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
405 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
407 if (flags & NIX_RX_OFFLOAD_RSS_F) {
408 /* Fill rss in the rx_descriptor_fields1 */
409 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
410 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
411 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
412 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
413 ol_flags0 = PKT_RX_RSS_HASH;
414 ol_flags1 = PKT_RX_RSS_HASH;
415 ol_flags2 = PKT_RX_RSS_HASH;
416 ol_flags3 = PKT_RX_RSS_HASH;
424 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
425 /* Fill packet_type in the rx_descriptor_fields1 */
426 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
428 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
430 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
432 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
436 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
437 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
438 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
439 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
440 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
443 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
444 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
445 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
446 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
447 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
449 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
450 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
451 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
452 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
454 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
455 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
456 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
457 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
460 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
461 ol_flags0 = nix_update_match_id(
462 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
464 ol_flags1 = nix_update_match_id(
465 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
467 ol_flags2 = nix_update_match_id(
468 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
470 ol_flags3 = nix_update_match_id(
471 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
475 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
476 const uint16x8_t len_off = {
479 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
480 0, /* pktlen 16:32 */
481 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
485 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
486 RTE_PTYPE_L2_ETHER_TIMESYNC,
487 RTE_PTYPE_L2_ETHER_TIMESYNC,
488 RTE_PTYPE_L2_ETHER_TIMESYNC};
489 const uint64_t ts_olf = PKT_RX_IEEE1588_PTP |
490 PKT_RX_IEEE1588_TMST |
491 rxq->tstamp->rx_tstamp_dynflag;
492 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
493 uint64x2_t ts01, ts23, mask;
497 /* Subtract timesync length from total pkt length. */
498 f0 = vsubq_u16(f0, len_off);
499 f1 = vsubq_u16(f1, len_off);
500 f2 = vsubq_u16(f2, len_off);
501 f3 = vsubq_u16(f3, len_off);
503 /* Get the address of actual timestamp. */
504 ts01 = vaddq_u64(mbuf01, data_off);
505 ts23 = vaddq_u64(mbuf23, data_off);
506 /* Load timestamp from address. */
507 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
510 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
513 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
516 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
519 /* Convert from be to cpu byteorder. */
520 ts01 = vrev64q_u8(ts01);
521 ts23 = vrev64q_u8(ts23);
522 /* Store timestamp into scalar for later use. */
523 ts[0] = vgetq_lane_u64(ts01, 0);
524 ts[1] = vgetq_lane_u64(ts01, 1);
525 ts[2] = vgetq_lane_u64(ts23, 0);
526 ts[3] = vgetq_lane_u64(ts23, 1);
528 /* Store timestamp into dynfield. */
529 *cnxk_nix_timestamp_dynfield(mbuf0, rxq->tstamp) =
531 *cnxk_nix_timestamp_dynfield(mbuf1, rxq->tstamp) =
533 *cnxk_nix_timestamp_dynfield(mbuf2, rxq->tstamp) =
535 *cnxk_nix_timestamp_dynfield(mbuf3, rxq->tstamp) =
538 /* Generate ptype mask to filter L2 ether timesync */
539 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
540 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
541 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
542 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
544 /* Match against L2 ether timesync. */
545 mask = vceqq_u32(mask, ptype);
546 /* Convert from vector from scalar mask */
547 res = vaddvq_u32(vandq_u32(mask, and_mask));
551 /* Fill in the ol_flags for any packets that
554 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
555 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
556 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
557 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
559 /* Update Rxq timestamp with the latest
562 rxq->tstamp->rx_ready = 1;
563 rxq->tstamp->rx_tstamp =
564 ts[31 - __builtin_clz(res)];
568 /* Form rearm_data with ol_flags */
569 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
570 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
571 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
572 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
574 /* Update rx_descriptor_fields1 */
575 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
576 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
577 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
578 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
580 /* Update rearm_data */
581 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
582 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
583 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
584 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
586 /* Store the mbufs to rx_pkts */
587 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
588 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
590 if (flags & NIX_RX_MULTI_SEG_F) {
591 /* Multi segment is enable build mseg list for
592 * individual mbufs in scalar mode.
594 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
595 (cq0 + CQE_SZ(0) + 8), mbuf0,
596 mbuf_initializer, flags);
597 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
598 (cq0 + CQE_SZ(1) + 8), mbuf1,
599 mbuf_initializer, flags);
600 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
601 (cq0 + CQE_SZ(2) + 8), mbuf2,
602 mbuf_initializer, flags);
603 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
604 (cq0 + CQE_SZ(3) + 8), mbuf3,
605 mbuf_initializer, flags);
607 /* Update that no more segments */
615 roc_prefetch_store_keep(mbuf0);
616 roc_prefetch_store_keep(mbuf1);
617 roc_prefetch_store_keep(mbuf2);
618 roc_prefetch_store_keep(mbuf3);
620 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
621 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
622 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
623 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
624 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
626 /* Advance head pointer and packets */
627 head += NIX_DESCS_PER_LOOP;
629 packets += NIX_DESCS_PER_LOOP;
633 rxq->available -= packets;
636 /* Free all the CQs that we've processed */
637 plt_write64((rxq->wdata | packets), rxq->cq_door);
639 if (unlikely(pkts_left))
640 packets += cn10k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
648 static inline uint16_t
649 cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
650 uint16_t pkts, const uint16_t flags)
652 RTE_SET_USED(rx_queue);
653 RTE_SET_USED(rx_pkts);
663 #define RSS_F NIX_RX_OFFLOAD_RSS_F
664 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
665 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
666 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
667 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
668 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
670 /* [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
671 #define NIX_RX_FASTPATH_MODES \
672 R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
673 R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
674 R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
675 R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
676 R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
677 R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
678 R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
679 R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
680 R(mark, 0, 0, 1, 0, 0, 0, MARK_F) \
681 R(mark_rss, 0, 0, 1, 0, 0, 1, MARK_F | RSS_F) \
682 R(mark_ptype, 0, 0, 1, 0, 1, 0, MARK_F | PTYPE_F) \
683 R(mark_ptype_rss, 0, 0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
684 R(mark_cksum, 0, 0, 1, 1, 0, 0, MARK_F | CKSUM_F) \
685 R(mark_cksum_rss, 0, 0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
686 R(mark_cksum_ptype, 0, 0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \
687 R(mark_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
688 MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
689 R(ts, 0, 1, 0, 0, 0, 0, TS_F) \
690 R(ts_rss, 0, 1, 0, 0, 0, 1, TS_F | RSS_F) \
691 R(ts_ptype, 0, 1, 0, 0, 1, 0, TS_F | PTYPE_F) \
692 R(ts_ptype_rss, 0, 1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \
693 R(ts_cksum, 0, 1, 0, 1, 0, 0, TS_F | CKSUM_F) \
694 R(ts_cksum_rss, 0, 1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \
695 R(ts_cksum_ptype, 0, 1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \
696 R(ts_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
697 TS_F | CKSUM_F | PTYPE_F | RSS_F) \
698 R(ts_mark, 0, 1, 1, 0, 0, 0, TS_F | MARK_F) \
699 R(ts_mark_rss, 0, 1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F) \
700 R(ts_mark_ptype, 0, 1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \
701 R(ts_mark_ptype_rss, 0, 1, 1, 0, 1, 1, \
702 TS_F | MARK_F | PTYPE_F | RSS_F) \
703 R(ts_mark_cksum, 0, 1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \
704 R(ts_mark_cksum_rss, 0, 1, 1, 1, 0, 1, \
705 TS_F | MARK_F | CKSUM_F | RSS_F) \
706 R(ts_mark_cksum_ptype, 0, 1, 1, 1, 1, 0, \
707 TS_F | MARK_F | CKSUM_F | PTYPE_F) \
708 R(ts_mark_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
709 TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
710 R(vlan, 1, 0, 0, 0, 0, 0, RX_VLAN_F) \
711 R(vlan_rss, 1, 0, 0, 0, 0, 1, RX_VLAN_F | RSS_F) \
712 R(vlan_ptype, 1, 0, 0, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
713 R(vlan_ptype_rss, 1, 0, 0, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F) \
714 R(vlan_cksum, 1, 0, 0, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
715 R(vlan_cksum_rss, 1, 0, 0, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F) \
716 R(vlan_cksum_ptype, 1, 0, 0, 1, 1, 0, \
717 RX_VLAN_F | CKSUM_F | PTYPE_F) \
718 R(vlan_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
719 RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
720 R(vlan_mark, 1, 0, 1, 0, 0, 0, RX_VLAN_F | MARK_F) \
721 R(vlan_mark_rss, 1, 0, 1, 0, 0, 1, RX_VLAN_F | MARK_F | RSS_F) \
722 R(vlan_mark_ptype, 1, 0, 1, 0, 1, 0, RX_VLAN_F | MARK_F | PTYPE_F)\
723 R(vlan_mark_ptype_rss, 1, 0, 1, 0, 1, 1, \
724 RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
725 R(vlan_mark_cksum, 1, 0, 1, 1, 0, 0, RX_VLAN_F | MARK_F | CKSUM_F)\
726 R(vlan_mark_cksum_rss, 1, 0, 1, 1, 0, 1, \
727 RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
728 R(vlan_mark_cksum_ptype, 1, 0, 1, 1, 1, 0, \
729 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
730 R(vlan_mark_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
731 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
732 R(vlan_ts, 1, 1, 0, 0, 0, 0, RX_VLAN_F | TS_F) \
733 R(vlan_ts_rss, 1, 1, 0, 0, 0, 1, RX_VLAN_F | TS_F | RSS_F) \
734 R(vlan_ts_ptype, 1, 1, 0, 0, 1, 0, RX_VLAN_F | TS_F | PTYPE_F) \
735 R(vlan_ts_ptype_rss, 1, 1, 0, 0, 1, 1, \
736 RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
737 R(vlan_ts_cksum, 1, 1, 0, 1, 0, 0, RX_VLAN_F | TS_F | CKSUM_F) \
738 R(vlan_ts_cksum_rss, 1, 1, 0, 1, 0, 1, \
739 RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
740 R(vlan_ts_cksum_ptype, 1, 1, 0, 1, 1, 0, \
741 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
742 R(vlan_ts_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
743 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
744 R(vlan_ts_mark, 1, 1, 1, 0, 0, 0, RX_VLAN_F | TS_F | MARK_F) \
745 R(vlan_ts_mark_rss, 1, 1, 1, 0, 0, 1, \
746 RX_VLAN_F | TS_F | MARK_F | RSS_F) \
747 R(vlan_ts_mark_ptype, 1, 1, 1, 0, 1, 0, \
748 RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
749 R(vlan_ts_mark_ptype_rss, 1, 1, 1, 0, 1, 1, \
750 RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
751 R(vlan_ts_mark_cksum, 1, 1, 1, 1, 0, 0, \
752 RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
753 R(vlan_ts_mark_cksum_rss, 1, 1, 1, 1, 0, 1, \
754 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
755 R(vlan_ts_mark_cksum_ptype, 1, 1, 1, 1, 1, 0, \
756 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
757 R(vlan_ts_mark_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
758 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
760 #define R(name, f5, f4, f3, f2, f1, f0, flags) \
761 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \
762 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
764 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \
765 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
767 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name( \
768 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
770 uint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_mseg_##name( \
771 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
773 NIX_RX_FASTPATH_MODES
776 #endif /* __CN10K_RX_H__ */