1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
11 #include <cnxk_ethdev.h>
13 #define NIX_RX_OFFLOAD_NONE (0)
14 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
15 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
16 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
17 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
18 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
19 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
20 #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)
22 /* Flags to control cqe_to_mbuf conversion function.
23 * Defining it from backwards to denote its been
24 * not used as offload flags to pick function
26 #define NIX_RX_MULTI_SEG_F BIT(14)
27 #define CPT_RX_WQE_F BIT(15)
29 #define CNXK_NIX_CQ_ENTRY_SZ 128
30 #define NIX_DESCS_PER_LOOP 4
31 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
32 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
34 #define IPSEC_SQ_LO_IDX 4
35 #define IPSEC_SQ_HI_IDX 8
37 union mbuf_initializer {
47 static __rte_always_inline uint64_t
48 nix_clear_data_off(uint64_t oldval)
50 union mbuf_initializer mbuf_init = {.value = oldval};
52 mbuf_init.fields.data_off = 0;
53 return mbuf_init.value;
56 static __rte_always_inline struct rte_mbuf *
57 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
61 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
62 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
63 return (struct rte_mbuf *)(buff - data_off);
66 static __rte_always_inline uint32_t
67 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
69 const uint16_t *const ptype = lookup_mem;
70 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
71 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
72 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
74 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
77 static __rte_always_inline uint32_t
78 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
80 const uint32_t *const ol_flags =
81 (const uint32_t *)((const uint8_t *)lookup_mem +
84 return ol_flags[(in & 0xfff00000) >> 20];
87 static inline uint64_t
88 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
89 struct rte_mbuf *mbuf)
91 /* There is no separate bit to check match_id
92 * is valid or not? and no flag to identify it is an
93 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
94 * action. The former case addressed through 0 being invalid
95 * value and inc/dec match_id pair when MARK is activated.
96 * The later case addressed through defining
97 * CNXK_FLOW_MARK_DEFAULT as value for
98 * RTE_FLOW_ACTION_TYPE_MARK.
99 * This would translate to not use
100 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
101 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
102 * i.e valid mark_id's are from
103 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
105 if (likely(match_id)) {
106 ol_flags |= RTE_MBUF_F_RX_FDIR;
107 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
108 ol_flags |= RTE_MBUF_F_RX_FDIR_ID;
109 mbuf->hash.fdir.hi = match_id - 1;
116 static __rte_always_inline void
117 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
118 uint64_t rearm, const uint16_t flags)
120 const rte_iova_t *iova_list;
121 struct rte_mbuf *head;
122 const rte_iova_t *eol;
126 sg = *(const uint64_t *)(rx + 1);
127 nb_segs = (sg >> 48) & 0x3;
134 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
135 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
136 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
137 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
138 mbuf->nb_segs = nb_segs;
141 eol = ((const rte_iova_t *)(rx + 1) +
142 ((rx->cn9k.desc_sizem1 + 1) << 1));
143 /* Skip SG_S and first IOVA*/
144 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
147 rearm = rearm & ~0xFFFF;
151 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
154 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
156 mbuf->data_len = sg & 0xFFFF;
158 *(uint64_t *)(&mbuf->rearm_data) = rearm;
162 if (!nb_segs && (iova_list + 1 < eol)) {
163 sg = *(const uint64_t *)(iova_list);
164 nb_segs = (sg >> 48) & 0x3;
165 head->nb_segs += nb_segs;
166 iova_list = (const rte_iova_t *)(iova_list + 1);
173 ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,
174 struct cn9k_inb_priv_data *priv, uintptr_t data,
177 struct cnxk_on_ipsec_ar *ar = &priv->ar;
185 esn = sa->ctl.esn_en;
186 seql = rte_be_to_cpu_32(*((uint32_t *)(data + IPSEC_SQ_LO_IDX)));
189 seq = (uint64_t)seql;
191 seqh = rte_be_to_cpu_32(*((uint32_t *)(data +
193 seq = ((uint64_t)seqh << 32) | seql;
196 if (unlikely(seq == 0))
199 rte_spinlock_lock(&ar->lock);
200 rc = cnxk_on_anti_replay_check(seq, ar, win_sz);
202 seq_in_sa = ((uint64_t)rte_be_to_cpu_32(sa->esn_hi) << 32) |
203 rte_be_to_cpu_32(sa->esn_low);
204 if (seq > seq_in_sa) {
205 sa->esn_low = rte_cpu_to_be_32(seql);
206 sa->esn_hi = rte_cpu_to_be_32(seqh);
209 rte_spinlock_unlock(&ar->lock);
214 static __rte_always_inline uint64_t
215 nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
216 uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len)
218 uintptr_t res_sg0 = ((uintptr_t)cq + ROC_ONF_IPSEC_INB_RES_OFF - 8);
219 const union nix_rx_parse_u *rx =
220 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
221 struct cn9k_inb_priv_data *sa_priv;
222 struct roc_onf_ipsec_inb_sa *sa;
223 uint8_t lcptr = rx->lcptr;
224 struct rte_ipv4_hdr *ipv4;
225 uint16_t data_off, res;
226 uint32_t spi, win_sz;
232 res = *(uint64_t *)(res_sg0 + 8);
233 data_off = *rearm_val & (BIT_ULL(16) - 1);
234 data = (uintptr_t)m->buf_addr;
237 rte_prefetch0((void *)data);
239 if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ONF_UCC_SUCCESS << 8)))
240 return RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
243 /* 20 bits of tag would have the SPI */
244 spi = cq->tag & CNXK_ETHDEV_SPI_TAG_MASK;
247 sa_w = sa_base & (ROC_NIX_INL_SA_BASE_ALIGN - 1);
248 sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);
249 spi_mask = (1ULL << sa_w) - 1;
250 sa = roc_nix_inl_onf_ipsec_inb_sa(sa_base, spi & spi_mask);
252 /* Update dynamic field with userdata */
253 sa_priv = roc_nix_inl_onf_ipsec_inb_sa_sw_rsvd(sa);
254 dw = *(__uint128_t *)sa_priv;
255 *rte_security_dynfield(m) = (uint64_t)dw;
257 /* Check if anti-replay is enabled */
258 win_sz = (uint32_t)(dw >> 64);
260 if (ipsec_antireplay_check(sa, sa_priv, data, win_sz) < 0)
261 return RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
264 /* Get total length from IPv4 header. We can assume only IPv4 */
265 ipv4 = (struct rte_ipv4_hdr *)(data + ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
266 ROC_ONF_IPSEC_INB_MAX_L2_SZ);
268 /* Update data offset */
269 data_off += (ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
270 ROC_ONF_IPSEC_INB_MAX_L2_SZ);
271 *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
272 *rearm_val |= data_off;
274 *len = rte_be_to_cpu_16(ipv4->total_length) + lcptr;
275 return RTE_MBUF_F_RX_SEC_OFFLOAD;
278 static __rte_always_inline void
279 cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
280 struct rte_mbuf *mbuf, const void *lookup_mem,
281 uint64_t val, const uint16_t flag)
283 const union nix_rx_parse_u *rx =
284 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
285 uint16_t len = rx->cn9k.pkt_lenm1 + 1;
286 const uint64_t w1 = *(const uint64_t *)rx;
287 uint32_t packet_type;
288 uint64_t ol_flags = 0;
290 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
291 RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
293 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
294 packet_type = nix_ptype_get(lookup_mem, w1);
298 if ((flag & NIX_RX_OFFLOAD_SECURITY_F) &&
299 cq->cqe_type == NIX_XQE_TYPE_RX_IPSECH) {
300 uint16_t port = val >> 48;
303 /* Get SA Base from lookup mem */
304 sa_base = cnxk_nix_sa_base_get(port, lookup_mem);
306 ol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, sa_base, &val,
309 /* Only Tunnel inner IPv4 is supported */
310 packet_type = (packet_type &
311 ~(RTE_PTYPE_L3_MASK | RTE_PTYPE_TUNNEL_MASK));
312 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
313 mbuf->packet_type = packet_type;
317 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
318 mbuf->packet_type = packet_type;
320 if (flag & NIX_RX_OFFLOAD_RSS_F) {
321 mbuf->hash.rss = tag;
322 ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
325 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
326 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
329 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
330 if (rx->cn9k.vtag0_gone) {
331 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
332 mbuf->vlan_tci = rx->cn9k.vtag0_tci;
334 if (rx->cn9k.vtag1_gone) {
335 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
336 mbuf->vlan_tci_outer = rx->cn9k.vtag1_tci;
340 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
342 nix_update_match_id(rx->cn9k.match_id, ol_flags, mbuf);
345 mbuf->data_len = len;
346 *(uint64_t *)(&mbuf->rearm_data) = val;
348 mbuf->ol_flags = ol_flags;
350 if (flag & NIX_RX_MULTI_SEG_F)
351 nix_cqe_xtract_mseg(rx, mbuf, val, flag);
356 static inline uint16_t
357 nix_rx_nb_pkts(struct cn9k_eth_rxq *rxq, const uint64_t wdata,
358 const uint16_t pkts, const uint32_t qmask)
360 uint32_t available = rxq->available;
362 /* Update the available count if cached value is not enough */
363 if (unlikely(available < pkts)) {
364 uint64_t reg, head, tail;
366 /* Use LDADDA version to avoid reorder */
367 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
368 /* CQ_OP_STATUS operation error */
369 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
370 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
373 tail = reg & 0xFFFFF;
374 head = (reg >> 20) & 0xFFFFF;
376 available = tail - head + qmask + 1;
378 available = tail - head;
380 rxq->available = available;
383 return RTE_MIN(pkts, available);
386 static __rte_always_inline uint16_t
387 cn9k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
388 const uint16_t flags)
390 struct cn9k_eth_rxq *rxq = rx_queue;
391 const uint64_t mbuf_init = rxq->mbuf_initializer;
392 const void *lookup_mem = rxq->lookup_mem;
393 const uint64_t data_off = rxq->data_off;
394 const uintptr_t desc = rxq->desc;
395 const uint64_t wdata = rxq->wdata;
396 const uint32_t qmask = rxq->qmask;
397 uint16_t packets = 0, nb_pkts;
398 uint32_t head = rxq->head;
399 struct nix_cqe_hdr_s *cq;
400 struct rte_mbuf *mbuf;
402 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
404 while (packets < nb_pkts) {
405 /* Prefetch N desc ahead */
406 rte_prefetch_non_temporal(
407 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
408 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
410 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
412 cn9k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
414 cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
415 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
416 (flags & NIX_RX_MULTI_SEG_F),
417 (uint64_t *)((uint8_t *)mbuf
419 rx_pkts[packets++] = mbuf;
420 roc_prefetch_store_keep(mbuf);
426 rxq->available -= nb_pkts;
428 /* Free all the CQs that we've processed */
429 plt_write64((wdata | nb_pkts), rxq->cq_door);
434 #if defined(RTE_ARCH_ARM64)
436 static __rte_always_inline uint64_t
437 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
439 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
440 ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
441 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
447 static __rte_always_inline uint64_t
448 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
450 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
451 ol_flags |= RTE_MBUF_F_RX_QINQ | RTE_MBUF_F_RX_QINQ_STRIPPED;
452 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
458 static __rte_always_inline uint16_t
459 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
460 uint16_t pkts, const uint16_t flags)
462 struct cn9k_eth_rxq *rxq = rx_queue;
463 uint16_t packets = 0;
464 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
465 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
466 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
467 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
468 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
469 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
470 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
471 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
472 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
473 const uint16_t *lookup_mem = rxq->lookup_mem;
474 const uint32_t qmask = rxq->qmask;
475 const uint64_t wdata = rxq->wdata;
476 const uintptr_t desc = rxq->desc;
477 uint8x16_t f0, f1, f2, f3;
478 uint32_t head = rxq->head;
481 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
482 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
484 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
485 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
487 while (packets < pkts) {
488 /* Exit loop if head is about to wrap and become unaligned */
489 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
490 NIX_DESCS_PER_LOOP) {
491 pkts_left += (pkts - packets);
495 const uintptr_t cq0 = desc + CQE_SZ(head);
497 /* Prefetch N desc ahead */
498 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
499 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
500 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
501 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
503 /* Get NIX_RX_SG_S for size and buffer pointer */
504 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
505 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
506 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
507 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
509 /* Extract mbuf from NIX_RX_SG_S */
510 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
511 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
512 mbuf01 = vqsubq_u64(mbuf01, data_off);
513 mbuf23 = vqsubq_u64(mbuf23, data_off);
515 /* Move mbufs to scalar registers for future use */
516 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
517 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
518 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
519 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
521 /* Mask to get packet len from NIX_RX_SG_S */
522 const uint8x16_t shuf_msk = {
523 0xFF, 0xFF, /* pkt_type set as unknown */
524 0xFF, 0xFF, /* pkt_type set as unknown */
525 0, 1, /* octet 1~0, low 16 bits pkt_len */
526 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
527 0, 1, /* octet 1~0, 16 bits data_len */
528 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
530 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
531 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
532 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
533 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
534 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
536 /* Load CQE word0 and word 1 */
537 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
538 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
539 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
540 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
541 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
542 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
543 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
544 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
546 if (flags & NIX_RX_OFFLOAD_RSS_F) {
547 /* Fill rss in the rx_descriptor_fields1 */
548 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
549 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
550 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
551 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
552 ol_flags0 = RTE_MBUF_F_RX_RSS_HASH;
553 ol_flags1 = RTE_MBUF_F_RX_RSS_HASH;
554 ol_flags2 = RTE_MBUF_F_RX_RSS_HASH;
555 ol_flags3 = RTE_MBUF_F_RX_RSS_HASH;
563 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
564 /* Fill packet_type in the rx_descriptor_fields1 */
565 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
567 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
569 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
571 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
575 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
576 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
577 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
578 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
579 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
582 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
583 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
584 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
585 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
586 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
588 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
589 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
590 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
591 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
593 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
594 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
595 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
596 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
599 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
600 ol_flags0 = nix_update_match_id(
601 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
603 ol_flags1 = nix_update_match_id(
604 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
606 ol_flags2 = nix_update_match_id(
607 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
609 ol_flags3 = nix_update_match_id(
610 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
614 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
615 const uint16x8_t len_off = {
618 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
619 0, /* pktlen 16:32 */
620 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
624 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
625 RTE_PTYPE_L2_ETHER_TIMESYNC,
626 RTE_PTYPE_L2_ETHER_TIMESYNC,
627 RTE_PTYPE_L2_ETHER_TIMESYNC};
628 const uint64_t ts_olf = RTE_MBUF_F_RX_IEEE1588_PTP |
629 RTE_MBUF_F_RX_IEEE1588_TMST |
630 rxq->tstamp->rx_tstamp_dynflag;
631 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
632 uint64x2_t ts01, ts23, mask;
636 /* Subtract timesync length from total pkt length. */
637 f0 = vsubq_u16(f0, len_off);
638 f1 = vsubq_u16(f1, len_off);
639 f2 = vsubq_u16(f2, len_off);
640 f3 = vsubq_u16(f3, len_off);
642 /* Get the address of actual timestamp. */
643 ts01 = vaddq_u64(mbuf01, data_off);
644 ts23 = vaddq_u64(mbuf23, data_off);
645 /* Load timestamp from address. */
646 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
649 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
652 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
655 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
658 /* Convert from be to cpu byteorder. */
659 ts01 = vrev64q_u8(ts01);
660 ts23 = vrev64q_u8(ts23);
661 /* Store timestamp into scalar for later use. */
662 ts[0] = vgetq_lane_u64(ts01, 0);
663 ts[1] = vgetq_lane_u64(ts01, 1);
664 ts[2] = vgetq_lane_u64(ts23, 0);
665 ts[3] = vgetq_lane_u64(ts23, 1);
667 /* Store timestamp into dynfield. */
668 *cnxk_nix_timestamp_dynfield(mbuf0, rxq->tstamp) =
670 *cnxk_nix_timestamp_dynfield(mbuf1, rxq->tstamp) =
672 *cnxk_nix_timestamp_dynfield(mbuf2, rxq->tstamp) =
674 *cnxk_nix_timestamp_dynfield(mbuf3, rxq->tstamp) =
677 /* Generate ptype mask to filter L2 ether timesync */
678 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
679 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
680 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
681 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
683 /* Match against L2 ether timesync. */
684 mask = vceqq_u32(mask, ptype);
685 /* Convert from vector from scalar mask */
686 res = vaddvq_u32(vandq_u32(mask, and_mask));
690 /* Fill in the ol_flags for any packets that
693 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
694 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
695 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
696 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
698 /* Update Rxq timestamp with the latest
701 rxq->tstamp->rx_ready = 1;
702 rxq->tstamp->rx_tstamp =
703 ts[31 - __builtin_clz(res)];
707 /* Form rearm_data with ol_flags */
708 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
709 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
710 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
711 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
713 /* Update rx_descriptor_fields1 */
714 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
715 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
716 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
717 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
719 /* Update rearm_data */
720 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
721 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
722 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
723 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
725 /* Store the mbufs to rx_pkts */
726 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
727 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
729 if (flags & NIX_RX_MULTI_SEG_F) {
730 /* Multi segment is enable build mseg list for
731 * individual mbufs in scalar mode.
733 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
734 (cq0 + CQE_SZ(0) + 8), mbuf0,
735 mbuf_initializer, flags);
736 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
737 (cq0 + CQE_SZ(1) + 8), mbuf1,
738 mbuf_initializer, flags);
739 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
740 (cq0 + CQE_SZ(2) + 8), mbuf2,
741 mbuf_initializer, flags);
742 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
743 (cq0 + CQE_SZ(3) + 8), mbuf3,
744 mbuf_initializer, flags);
746 /* Update that no more segments */
754 roc_prefetch_store_keep(mbuf0);
755 roc_prefetch_store_keep(mbuf1);
756 roc_prefetch_store_keep(mbuf2);
757 roc_prefetch_store_keep(mbuf3);
759 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
760 RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1);
761 RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1);
762 RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1);
763 RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1);
765 /* Advance head pointer and packets */
766 head += NIX_DESCS_PER_LOOP;
768 packets += NIX_DESCS_PER_LOOP;
772 rxq->available -= packets;
775 /* Free all the CQs that we've processed */
776 plt_write64((rxq->wdata | packets), rxq->cq_door);
778 if (unlikely(pkts_left))
779 packets += cn9k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
787 static inline uint16_t
788 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
789 uint16_t pkts, const uint16_t flags)
791 RTE_SET_USED(rx_queue);
792 RTE_SET_USED(rx_pkts);
801 #define RSS_F NIX_RX_OFFLOAD_RSS_F
802 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
803 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
804 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
805 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
806 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
807 #define R_SEC_F NIX_RX_OFFLOAD_SECURITY_F
809 /* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
810 #define NIX_RX_FASTPATH_MODES \
811 R(no_offload, 0, 0, 0, 0, 0, 0, 0, \
812 NIX_RX_OFFLOAD_NONE) \
813 R(rss, 0, 0, 0, 0, 0, 0, 1, \
815 R(ptype, 0, 0, 0, 0, 0, 1, 0, \
817 R(ptype_rss, 0, 0, 0, 0, 0, 1, 1, \
819 R(cksum, 0, 0, 0, 0, 1, 0, 0, \
821 R(cksum_rss, 0, 0, 0, 0, 1, 0, 1, \
823 R(cksum_ptype, 0, 0, 0, 0, 1, 1, 0, \
825 R(cksum_ptype_rss, 0, 0, 0, 0, 1, 1, 1, \
826 CKSUM_F | PTYPE_F | RSS_F) \
827 R(mark, 0, 0, 0, 1, 0, 0, 0, \
829 R(mark_rss, 0, 0, 0, 1, 0, 0, 1, \
831 R(mark_ptype, 0, 0, 0, 1, 0, 1, 0, \
833 R(mark_ptype_rss, 0, 0, 0, 1, 0, 1, 1, \
834 MARK_F | PTYPE_F | RSS_F) \
835 R(mark_cksum, 0, 0, 0, 1, 1, 0, 0, \
837 R(mark_cksum_rss, 0, 0, 0, 1, 1, 0, 1, \
838 MARK_F | CKSUM_F | RSS_F) \
839 R(mark_cksum_ptype, 0, 0, 0, 1, 1, 1, 0, \
840 MARK_F | CKSUM_F | PTYPE_F) \
841 R(mark_cksum_ptype_rss, 0, 0, 0, 1, 1, 1, 1, \
842 MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
843 R(ts, 0, 0, 1, 0, 0, 0, 0, \
845 R(ts_rss, 0, 0, 1, 0, 0, 0, 1, \
847 R(ts_ptype, 0, 0, 1, 0, 0, 1, 0, \
849 R(ts_ptype_rss, 0, 0, 1, 0, 0, 1, 1, \
850 TS_F | PTYPE_F | RSS_F) \
851 R(ts_cksum, 0, 0, 1, 0, 1, 0, 0, \
853 R(ts_cksum_rss, 0, 0, 1, 0, 1, 0, 1, \
854 TS_F | CKSUM_F | RSS_F) \
855 R(ts_cksum_ptype, 0, 0, 1, 0, 1, 1, 0, \
856 TS_F | CKSUM_F | PTYPE_F) \
857 R(ts_cksum_ptype_rss, 0, 0, 1, 0, 1, 1, 1, \
858 TS_F | CKSUM_F | PTYPE_F | RSS_F) \
859 R(ts_mark, 0, 0, 1, 1, 0, 0, 0, \
861 R(ts_mark_rss, 0, 0, 1, 1, 0, 0, 1, \
862 TS_F | MARK_F | RSS_F) \
863 R(ts_mark_ptype, 0, 0, 1, 1, 0, 1, 0, \
864 TS_F | MARK_F | PTYPE_F) \
865 R(ts_mark_ptype_rss, 0, 0, 1, 1, 0, 1, 1, \
866 TS_F | MARK_F | PTYPE_F | RSS_F) \
867 R(ts_mark_cksum, 0, 0, 1, 1, 1, 0, 0, \
868 TS_F | MARK_F | CKSUM_F) \
869 R(ts_mark_cksum_rss, 0, 0, 1, 1, 1, 0, 1, \
870 TS_F | MARK_F | CKSUM_F | RSS_F) \
871 R(ts_mark_cksum_ptype, 0, 0, 1, 1, 1, 1, 0, \
872 TS_F | MARK_F | CKSUM_F | PTYPE_F) \
873 R(ts_mark_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, 1, \
874 TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
875 R(vlan, 0, 1, 0, 0, 0, 0, 0, \
877 R(vlan_rss, 0, 1, 0, 0, 0, 0, 1, \
879 R(vlan_ptype, 0, 1, 0, 0, 0, 1, 0, \
880 RX_VLAN_F | PTYPE_F) \
881 R(vlan_ptype_rss, 0, 1, 0, 0, 0, 1, 1, \
882 RX_VLAN_F | PTYPE_F | RSS_F) \
883 R(vlan_cksum, 0, 1, 0, 0, 1, 0, 0, \
884 RX_VLAN_F | CKSUM_F) \
885 R(vlan_cksum_rss, 0, 1, 0, 0, 1, 0, 1, \
886 RX_VLAN_F | CKSUM_F | RSS_F) \
887 R(vlan_cksum_ptype, 0, 1, 0, 0, 1, 1, 0, \
888 RX_VLAN_F | CKSUM_F | PTYPE_F) \
889 R(vlan_cksum_ptype_rss, 0, 1, 0, 0, 1, 1, 1, \
890 RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
891 R(vlan_mark, 0, 1, 0, 1, 0, 0, 0, \
892 RX_VLAN_F | MARK_F) \
893 R(vlan_mark_rss, 0, 1, 0, 1, 0, 0, 1, \
894 RX_VLAN_F | MARK_F | RSS_F) \
895 R(vlan_mark_ptype, 0, 1, 0, 1, 0, 1, 0, \
896 RX_VLAN_F | MARK_F | PTYPE_F) \
897 R(vlan_mark_ptype_rss, 0, 1, 0, 1, 0, 1, 1, \
898 RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
899 R(vlan_mark_cksum, 0, 1, 0, 1, 1, 0, 0, \
900 RX_VLAN_F | MARK_F | CKSUM_F) \
901 R(vlan_mark_cksum_rss, 0, 1, 0, 1, 1, 0, 1, \
902 RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
903 R(vlan_mark_cksum_ptype, 0, 1, 0, 1, 1, 1, 0, \
904 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
905 R(vlan_mark_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, 1, \
906 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
907 R(vlan_ts, 0, 1, 1, 0, 0, 0, 0, \
909 R(vlan_ts_rss, 0, 1, 1, 0, 0, 0, 1, \
910 RX_VLAN_F | TS_F | RSS_F) \
911 R(vlan_ts_ptype, 0, 1, 1, 0, 0, 1, 0, \
912 RX_VLAN_F | TS_F | PTYPE_F) \
913 R(vlan_ts_ptype_rss, 0, 1, 1, 0, 0, 1, 1, \
914 RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
915 R(vlan_ts_cksum, 0, 1, 1, 0, 1, 0, 0, \
916 RX_VLAN_F | TS_F | CKSUM_F) \
917 R(vlan_ts_cksum_rss, 0, 1, 1, 0, 1, 0, 1, \
918 RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
919 R(vlan_ts_cksum_ptype, 0, 1, 1, 0, 1, 1, 0, \
920 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
921 R(vlan_ts_cksum_ptype_rss, 0, 1, 1, 0, 1, 1, 1, \
922 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
923 R(vlan_ts_mark, 0, 1, 1, 1, 0, 0, 0, \
924 RX_VLAN_F | TS_F | MARK_F) \
925 R(vlan_ts_mark_rss, 0, 1, 1, 1, 0, 0, 1, \
926 RX_VLAN_F | TS_F | MARK_F | RSS_F) \
927 R(vlan_ts_mark_ptype, 0, 1, 1, 1, 0, 1, 0, \
928 RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
929 R(vlan_ts_mark_ptype_rss, 0, 1, 1, 1, 0, 1, 1, \
930 RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
931 R(vlan_ts_mark_cksum, 0, 1, 1, 1, 1, 0, 0, \
932 RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
933 R(vlan_ts_mark_cksum_rss, 0, 1, 1, 1, 1, 0, 1, \
934 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
935 R(vlan_ts_mark_cksum_ptype, 0, 1, 1, 1, 1, 1, 0, \
936 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
937 R(vlan_ts_mark_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, 1, \
938 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
939 R(sec, 1, 0, 0, 0, 0, 0, 0, \
941 R(sec_rss, 1, 0, 0, 0, 0, 0, 1, \
943 R(sec_ptype, 1, 0, 0, 0, 0, 1, 0, \
945 R(sec_ptype_rss, 1, 0, 0, 0, 0, 1, 1, \
946 R_SEC_F | PTYPE_F | RSS_F) \
947 R(sec_cksum, 1, 0, 0, 0, 1, 0, 0, \
949 R(sec_cksum_rss, 1, 0, 0, 0, 1, 0, 1, \
950 R_SEC_F | CKSUM_F | RSS_F) \
951 R(sec_cksum_ptype, 1, 0, 0, 0, 1, 1, 0, \
952 R_SEC_F | CKSUM_F | PTYPE_F) \
953 R(sec_cksum_ptype_rss, 1, 0, 0, 0, 1, 1, 1, \
954 R_SEC_F | CKSUM_F | PTYPE_F | RSS_F) \
955 R(sec_mark, 1, 0, 0, 1, 0, 0, 0, \
957 R(sec_mark_rss, 1, 0, 0, 1, 0, 0, 1, \
958 R_SEC_F | MARK_F | RSS_F) \
959 R(sec_mark_ptype, 1, 0, 0, 1, 0, 1, 0, \
960 R_SEC_F | MARK_F | PTYPE_F) \
961 R(sec_mark_ptype_rss, 1, 0, 0, 1, 0, 1, 1, \
962 R_SEC_F | MARK_F | PTYPE_F | RSS_F) \
963 R(sec_mark_cksum, 1, 0, 0, 1, 1, 0, 0, \
964 R_SEC_F | MARK_F | CKSUM_F) \
965 R(sec_mark_cksum_rss, 1, 0, 0, 1, 1, 0, 1, \
966 R_SEC_F | MARK_F | CKSUM_F | RSS_F) \
967 R(sec_mark_cksum_ptype, 1, 0, 0, 1, 1, 1, 0, \
968 R_SEC_F | MARK_F | CKSUM_F | PTYPE_F) \
969 R(sec_mark_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, 1, \
970 R_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
971 R(sec_ts, 1, 0, 1, 0, 0, 0, 0, \
973 R(sec_ts_rss, 1, 0, 1, 0, 0, 0, 1, \
974 R_SEC_F | TS_F | RSS_F) \
975 R(sec_ts_ptype, 1, 0, 1, 0, 0, 1, 0, \
976 R_SEC_F | TS_F | PTYPE_F) \
977 R(sec_ts_ptype_rss, 1, 0, 1, 0, 0, 1, 1, \
978 R_SEC_F | TS_F | PTYPE_F | RSS_F) \
979 R(sec_ts_cksum, 1, 0, 1, 0, 1, 0, 0, \
980 R_SEC_F | TS_F | CKSUM_F) \
981 R(sec_ts_cksum_rss, 1, 0, 1, 0, 1, 0, 1, \
982 R_SEC_F | TS_F | CKSUM_F | RSS_F) \
983 R(sec_ts_cksum_ptype, 1, 0, 1, 0, 1, 1, 0, \
984 R_SEC_F | TS_F | CKSUM_F | PTYPE_F) \
985 R(sec_ts_cksum_ptype_rss, 1, 0, 1, 0, 1, 1, 1, \
986 R_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
987 R(sec_ts_mark, 1, 0, 1, 1, 0, 0, 0, \
988 R_SEC_F | TS_F | MARK_F) \
989 R(sec_ts_mark_rss, 1, 0, 1, 1, 0, 0, 1, \
990 R_SEC_F | TS_F | MARK_F | RSS_F) \
991 R(sec_ts_mark_ptype, 1, 0, 1, 1, 0, 1, 0, \
992 R_SEC_F | TS_F | MARK_F | PTYPE_F) \
993 R(sec_ts_mark_ptype_rss, 1, 0, 1, 1, 0, 1, 1, \
994 R_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
995 R(sec_ts_mark_cksum, 1, 0, 1, 1, 1, 0, 0, \
996 R_SEC_F | TS_F | MARK_F | CKSUM_F) \
997 R(sec_ts_mark_cksum_rss, 1, 0, 1, 1, 1, 0, 1, \
998 R_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
999 R(sec_ts_mark_cksum_ptype, 1, 0, 1, 1, 1, 1, 0, \
1000 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1001 R(sec_ts_mark_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, 1, \
1002 R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
1003 R(sec_vlan, 1, 1, 0, 0, 0, 0, 0, \
1004 R_SEC_F | RX_VLAN_F) \
1005 R(sec_vlan_rss, 1, 1, 0, 0, 0, 0, 1, \
1006 R_SEC_F | RX_VLAN_F | RSS_F) \
1007 R(sec_vlan_ptype, 1, 1, 0, 0, 0, 1, 0, \
1008 R_SEC_F | RX_VLAN_F | PTYPE_F) \
1009 R(sec_vlan_ptype_rss, 1, 1, 0, 0, 0, 1, 1, \
1010 R_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F) \
1011 R(sec_vlan_cksum, 1, 1, 0, 0, 1, 0, 0, \
1012 R_SEC_F | RX_VLAN_F | CKSUM_F) \
1013 R(sec_vlan_cksum_rss, 1, 1, 0, 0, 1, 0, 1, \
1014 R_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F) \
1015 R(sec_vlan_cksum_ptype, 1, 1, 0, 0, 1, 1, 0, \
1016 R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
1017 R(sec_vlan_cksum_ptype_rss, 1, 1, 0, 0, 1, 1, 1, \
1018 R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
1019 R(sec_vlan_mark, 1, 1, 0, 1, 0, 0, 0, \
1020 R_SEC_F | RX_VLAN_F | MARK_F) \
1021 R(sec_vlan_mark_rss, 1, 1, 0, 1, 0, 0, 1, \
1022 R_SEC_F | RX_VLAN_F | MARK_F | RSS_F) \
1023 R(sec_vlan_mark_ptype, 1, 1, 0, 1, 0, 1, 0, \
1024 R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F) \
1025 R(sec_vlan_mark_ptype_rss, 1, 1, 0, 1, 0, 1, 1, \
1026 R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
1027 R(sec_vlan_mark_cksum, 1, 1, 0, 1, 1, 0, 0, \
1028 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F) \
1029 R(sec_vlan_mark_cksum_rss, 1, 1, 0, 1, 1, 0, 1, \
1030 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
1031 R(sec_vlan_mark_cksum_ptype, 1, 1, 0, 1, 1, 1, 0, \
1032 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
1033 R(sec_vlan_mark_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, 1, \
1034 R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
1035 R(sec_vlan_ts, 1, 1, 1, 0, 0, 0, 0, \
1036 R_SEC_F | RX_VLAN_F | TS_F) \
1037 R(sec_vlan_ts_rss, 1, 1, 1, 0, 0, 0, 1, \
1038 R_SEC_F | RX_VLAN_F | TS_F | RSS_F) \
1039 R(sec_vlan_ts_ptype, 1, 1, 1, 0, 0, 1, 0, \
1040 R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F) \
1041 R(sec_vlan_ts_ptype_rss, 1, 1, 1, 0, 0, 1, 1, \
1042 R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
1043 R(sec_vlan_ts_cksum, 1, 1, 1, 0, 1, 0, 0, \
1044 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F) \
1045 R(sec_vlan_ts_cksum_rss, 1, 1, 1, 0, 1, 0, 1, \
1046 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
1047 R(sec_vlan_ts_cksum_ptype, 1, 1, 1, 0, 1, 1, 0, \
1048 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
1049 R(sec_vlan_ts_cksum_ptype_rss, 1, 1, 1, 0, 1, 1, 1, \
1050 R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
1051 R(sec_vlan_ts_mark, 1, 1, 1, 1, 0, 0, 0, \
1052 R_SEC_F | RX_VLAN_F | TS_F | MARK_F) \
1053 R(sec_vlan_ts_mark_rss, 1, 1, 1, 1, 0, 0, 1, \
1054 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F) \
1055 R(sec_vlan_ts_mark_ptype, 1, 1, 1, 1, 0, 1, 0, \
1056 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
1057 R(sec_vlan_ts_mark_ptype_rss, 1, 1, 1, 1, 0, 1, 1, \
1058 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
1059 R(sec_vlan_ts_mark_cksum, 1, 1, 1, 1, 1, 0, 0, \
1060 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
1061 R(sec_vlan_ts_mark_cksum_rss, 1, 1, 1, 1, 1, 0, 1, \
1062 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
1063 R(sec_vlan_ts_mark_cksum_ptype, 1, 1, 1, 1, 1, 1, 0, \
1064 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
1065 R(sec_vlan_ts_mark_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, 1, \
1066 R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
1068 #define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
1069 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \
1070 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1072 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \
1073 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1075 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \
1076 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
1078 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_mseg_##name( \
1079 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
1081 NIX_RX_FASTPATH_MODES
1084 #endif /* __CN9K_RX_H__ */