1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
11 #define NIX_RX_OFFLOAD_NONE (0)
12 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
13 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
14 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
15 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
16 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
18 /* Flags to control cqe_to_mbuf conversion function.
19 * Defining it from backwards to denote its been
20 * not used as offload flags to pick function
22 #define NIX_RX_MULTI_SEG_F BIT(15)
24 #define CNXK_NIX_CQ_ENTRY_SZ 128
25 #define NIX_DESCS_PER_LOOP 4
26 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
27 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
29 union mbuf_initializer {
39 static __rte_always_inline uint64_t
40 nix_clear_data_off(uint64_t oldval)
42 union mbuf_initializer mbuf_init = {.value = oldval};
44 mbuf_init.fields.data_off = 0;
45 return mbuf_init.value;
48 static __rte_always_inline struct rte_mbuf *
49 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
53 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
54 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
55 return (struct rte_mbuf *)(buff - data_off);
58 static __rte_always_inline uint32_t
59 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
61 const uint16_t *const ptype = lookup_mem;
62 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
63 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
64 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
66 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
69 static __rte_always_inline uint32_t
70 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
72 const uint32_t *const ol_flags =
73 (const uint32_t *)((const uint8_t *)lookup_mem +
76 return ol_flags[(in & 0xfff00000) >> 20];
79 static inline uint64_t
80 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
81 struct rte_mbuf *mbuf)
83 /* There is no separate bit to check match_id
84 * is valid or not? and no flag to identify it is an
85 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
86 * action. The former case addressed through 0 being invalid
87 * value and inc/dec match_id pair when MARK is activated.
88 * The later case addressed through defining
89 * CNXK_FLOW_MARK_DEFAULT as value for
90 * RTE_FLOW_ACTION_TYPE_MARK.
91 * This would translate to not use
92 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
93 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
94 * i.e valid mark_id's are from
95 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
97 if (likely(match_id)) {
98 ol_flags |= PKT_RX_FDIR;
99 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
100 ol_flags |= PKT_RX_FDIR_ID;
101 mbuf->hash.fdir.hi = match_id - 1;
108 static __rte_always_inline void
109 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
112 const rte_iova_t *iova_list;
113 struct rte_mbuf *head;
114 const rte_iova_t *eol;
118 sg = *(const uint64_t *)(rx + 1);
119 nb_segs = (sg >> 48) & 0x3;
120 mbuf->nb_segs = nb_segs;
121 mbuf->data_len = sg & 0xFFFF;
124 eol = ((const rte_iova_t *)(rx + 1) +
125 ((rx->cn9k.desc_sizem1 + 1) << 1));
126 /* Skip SG_S and first IOVA*/
127 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
130 rearm = rearm & ~0xFFFF;
134 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
137 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
139 mbuf->data_len = sg & 0xFFFF;
141 *(uint64_t *)(&mbuf->rearm_data) = rearm;
145 if (!nb_segs && (iova_list + 1 < eol)) {
146 sg = *(const uint64_t *)(iova_list);
147 nb_segs = (sg >> 48) & 0x3;
148 head->nb_segs += nb_segs;
149 iova_list = (const rte_iova_t *)(iova_list + 1);
155 static __rte_always_inline void
156 cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
157 struct rte_mbuf *mbuf, const void *lookup_mem,
158 const uint64_t val, const uint16_t flag)
160 const union nix_rx_parse_u *rx =
161 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
162 const uint16_t len = rx->cn9k.pkt_lenm1 + 1;
163 const uint64_t w1 = *(const uint64_t *)rx;
164 uint64_t ol_flags = 0;
166 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
167 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
169 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
170 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
172 mbuf->packet_type = 0;
174 if (flag & NIX_RX_OFFLOAD_RSS_F) {
175 mbuf->hash.rss = tag;
176 ol_flags |= PKT_RX_RSS_HASH;
179 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
180 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
182 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
184 nix_update_match_id(rx->cn9k.match_id, ol_flags, mbuf);
186 mbuf->ol_flags = ol_flags;
187 *(uint64_t *)(&mbuf->rearm_data) = val;
190 if (flag & NIX_RX_MULTI_SEG_F) {
191 nix_cqe_xtract_mseg(rx, mbuf, val);
193 mbuf->data_len = len;
198 static inline uint16_t
199 nix_rx_nb_pkts(struct cn9k_eth_rxq *rxq, const uint64_t wdata,
200 const uint16_t pkts, const uint32_t qmask)
202 uint32_t available = rxq->available;
204 /* Update the available count if cached value is not enough */
205 if (unlikely(available < pkts)) {
206 uint64_t reg, head, tail;
208 /* Use LDADDA version to avoid reorder */
209 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
210 /* CQ_OP_STATUS operation error */
211 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
212 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
215 tail = reg & 0xFFFFF;
216 head = (reg >> 20) & 0xFFFFF;
218 available = tail - head + qmask + 1;
220 available = tail - head;
222 rxq->available = available;
225 return RTE_MIN(pkts, available);
228 static __rte_always_inline uint16_t
229 cn9k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
230 const uint16_t flags)
232 struct cn9k_eth_rxq *rxq = rx_queue;
233 const uint64_t mbuf_init = rxq->mbuf_initializer;
234 const void *lookup_mem = rxq->lookup_mem;
235 const uint64_t data_off = rxq->data_off;
236 const uintptr_t desc = rxq->desc;
237 const uint64_t wdata = rxq->wdata;
238 const uint32_t qmask = rxq->qmask;
239 uint16_t packets = 0, nb_pkts;
240 uint32_t head = rxq->head;
241 struct nix_cqe_hdr_s *cq;
242 struct rte_mbuf *mbuf;
244 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
246 while (packets < nb_pkts) {
247 /* Prefetch N desc ahead */
248 rte_prefetch_non_temporal(
249 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
250 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
252 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
254 cn9k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
256 rx_pkts[packets++] = mbuf;
257 roc_prefetch_store_keep(mbuf);
263 rxq->available -= nb_pkts;
265 /* Free all the CQs that we've processed */
266 plt_write64((wdata | nb_pkts), rxq->cq_door);
271 #if defined(RTE_ARCH_ARM64)
273 static __rte_always_inline uint16_t
274 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
275 uint16_t pkts, const uint16_t flags)
277 struct cn9k_eth_rxq *rxq = rx_queue;
278 uint16_t packets = 0;
279 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
280 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
281 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
282 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
283 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
284 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
285 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
286 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
287 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
288 const uint16_t *lookup_mem = rxq->lookup_mem;
289 const uint32_t qmask = rxq->qmask;
290 const uint64_t wdata = rxq->wdata;
291 const uintptr_t desc = rxq->desc;
292 uint8x16_t f0, f1, f2, f3;
293 uint32_t head = rxq->head;
296 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
297 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
299 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
300 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
302 while (packets < pkts) {
303 /* Exit loop if head is about to wrap and become unaligned */
304 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
305 NIX_DESCS_PER_LOOP) {
306 pkts_left += (pkts - packets);
310 const uintptr_t cq0 = desc + CQE_SZ(head);
312 /* Prefetch N desc ahead */
313 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
314 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
315 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
316 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
318 /* Get NIX_RX_SG_S for size and buffer pointer */
319 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
320 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
321 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
322 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
324 /* Extract mbuf from NIX_RX_SG_S */
325 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
326 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
327 mbuf01 = vqsubq_u64(mbuf01, data_off);
328 mbuf23 = vqsubq_u64(mbuf23, data_off);
330 /* Move mbufs to scalar registers for future use */
331 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
332 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
333 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
334 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
336 /* Mask to get packet len from NIX_RX_SG_S */
337 const uint8x16_t shuf_msk = {
338 0xFF, 0xFF, /* pkt_type set as unknown */
339 0xFF, 0xFF, /* pkt_type set as unknown */
340 0, 1, /* octet 1~0, low 16 bits pkt_len */
341 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
342 0, 1, /* octet 1~0, 16 bits data_len */
343 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
345 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
346 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
347 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
348 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
349 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
351 /* Load CQE word0 and word 1 */
352 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
353 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
354 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
355 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
356 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
357 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
358 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
359 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
361 if (flags & NIX_RX_OFFLOAD_RSS_F) {
362 /* Fill rss in the rx_descriptor_fields1 */
363 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
364 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
365 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
366 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
367 ol_flags0 = PKT_RX_RSS_HASH;
368 ol_flags1 = PKT_RX_RSS_HASH;
369 ol_flags2 = PKT_RX_RSS_HASH;
370 ol_flags3 = PKT_RX_RSS_HASH;
378 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
379 /* Fill packet_type in the rx_descriptor_fields1 */
380 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
382 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
384 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
386 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
390 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
391 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
392 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
393 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
394 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
397 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
398 ol_flags0 = nix_update_match_id(
399 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
401 ol_flags1 = nix_update_match_id(
402 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
404 ol_flags2 = nix_update_match_id(
405 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
407 ol_flags3 = nix_update_match_id(
408 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
412 /* Form rearm_data with ol_flags */
413 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
414 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
415 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
416 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
418 /* Update rx_descriptor_fields1 */
419 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
420 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
421 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
422 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
424 /* Update rearm_data */
425 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
426 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
427 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
428 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
430 /* Update that no more segments */
436 /* Store the mbufs to rx_pkts */
437 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
438 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
441 roc_prefetch_store_keep(mbuf0);
442 roc_prefetch_store_keep(mbuf1);
443 roc_prefetch_store_keep(mbuf2);
444 roc_prefetch_store_keep(mbuf3);
446 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
447 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
448 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
449 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
450 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
452 /* Advance head pointer and packets */
453 head += NIX_DESCS_PER_LOOP;
455 packets += NIX_DESCS_PER_LOOP;
459 rxq->available -= packets;
462 /* Free all the CQs that we've processed */
463 plt_write64((rxq->wdata | packets), rxq->cq_door);
465 if (unlikely(pkts_left))
466 packets += cn9k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
474 static inline uint16_t
475 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
476 uint16_t pkts, const uint16_t flags)
478 RTE_SET_USED(rx_queue);
479 RTE_SET_USED(rx_pkts);
488 #define RSS_F NIX_RX_OFFLOAD_RSS_F
489 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
490 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
491 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
493 /* [MARK] [CKSUM] [PTYPE] [RSS] */
494 #define NIX_RX_FASTPATH_MODES \
495 R(no_offload, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
496 R(rss, 0, 0, 0, 1, RSS_F) \
497 R(ptype, 0, 0, 1, 0, PTYPE_F) \
498 R(ptype_rss, 0, 0, 1, 1, PTYPE_F | RSS_F) \
499 R(cksum, 0, 1, 0, 0, CKSUM_F) \
500 R(cksum_rss, 0, 1, 0, 1, CKSUM_F | RSS_F) \
501 R(cksum_ptype, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
502 R(cksum_ptype_rss, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
503 R(mark, 1, 0, 0, 0, MARK_F) \
504 R(mark_rss, 1, 0, 0, 1, MARK_F | RSS_F) \
505 R(mark_ptype, 1, 0, 1, 0, MARK_F | PTYPE_F) \
506 R(mark_ptype_rss, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
507 R(mark_cksum, 1, 1, 0, 0, MARK_F | CKSUM_F) \
508 R(mark_cksum_rss, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
509 R(mark_cksum_ptype, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F)\
510 R(mark_cksum_ptype_rss, 1, 1, 1, 1, MARK_F | CKSUM_F | PTYPE_F | RSS_F)
512 #define R(name, f3, f2, f1, f0, flags) \
513 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \
514 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
516 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \
517 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
519 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \
520 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
522 NIX_RX_FASTPATH_MODES
525 #endif /* __CN9K_RX_H__ */