1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
11 #include <cnxk_ethdev.h>
13 #define NIX_RX_OFFLOAD_NONE (0)
14 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
15 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
16 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
17 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
18 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
19 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
20 #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)
22 /* Flags to control cqe_to_mbuf conversion function.
23 * Defining it from backwards to denote its been
24 * not used as offload flags to pick function
26 #define NIX_RX_MULTI_SEG_F BIT(14)
27 #define CPT_RX_WQE_F BIT(15)
29 #define CNXK_NIX_CQ_ENTRY_SZ 128
30 #define NIX_DESCS_PER_LOOP 4
31 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
32 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
34 union mbuf_initializer {
44 static __rte_always_inline uint64_t
45 nix_clear_data_off(uint64_t oldval)
47 union mbuf_initializer mbuf_init = {.value = oldval};
49 mbuf_init.fields.data_off = 0;
50 return mbuf_init.value;
53 static __rte_always_inline struct rte_mbuf *
54 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
58 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
59 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
60 return (struct rte_mbuf *)(buff - data_off);
63 static __rte_always_inline uint32_t
64 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
66 const uint16_t *const ptype = lookup_mem;
67 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
68 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
69 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
71 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
74 static __rte_always_inline uint32_t
75 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
77 const uint32_t *const ol_flags =
78 (const uint32_t *)((const uint8_t *)lookup_mem +
81 return ol_flags[(in & 0xfff00000) >> 20];
84 static inline uint64_t
85 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
86 struct rte_mbuf *mbuf)
88 /* There is no separate bit to check match_id
89 * is valid or not? and no flag to identify it is an
90 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
91 * action. The former case addressed through 0 being invalid
92 * value and inc/dec match_id pair when MARK is activated.
93 * The later case addressed through defining
94 * CNXK_FLOW_MARK_DEFAULT as value for
95 * RTE_FLOW_ACTION_TYPE_MARK.
96 * This would translate to not use
97 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
98 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
99 * i.e valid mark_id's are from
100 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
102 if (likely(match_id)) {
103 ol_flags |= PKT_RX_FDIR;
104 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
105 ol_flags |= PKT_RX_FDIR_ID;
106 mbuf->hash.fdir.hi = match_id - 1;
113 static __rte_always_inline void
114 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
115 uint64_t rearm, const uint16_t flags)
117 const rte_iova_t *iova_list;
118 struct rte_mbuf *head;
119 const rte_iova_t *eol;
123 sg = *(const uint64_t *)(rx + 1);
124 nb_segs = (sg >> 48) & 0x3;
131 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
132 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
133 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
134 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
135 mbuf->nb_segs = nb_segs;
138 eol = ((const rte_iova_t *)(rx + 1) +
139 ((rx->cn9k.desc_sizem1 + 1) << 1));
140 /* Skip SG_S and first IOVA*/
141 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
144 rearm = rearm & ~0xFFFF;
148 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
151 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
153 mbuf->data_len = sg & 0xFFFF;
155 *(uint64_t *)(&mbuf->rearm_data) = rearm;
159 if (!nb_segs && (iova_list + 1 < eol)) {
160 sg = *(const uint64_t *)(iova_list);
161 nb_segs = (sg >> 48) & 0x3;
162 head->nb_segs += nb_segs;
163 iova_list = (const rte_iova_t *)(iova_list + 1);
169 static __rte_always_inline void
170 cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
171 struct rte_mbuf *mbuf, const void *lookup_mem,
172 const uint64_t val, const uint16_t flag)
174 const union nix_rx_parse_u *rx =
175 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
176 const uint16_t len = rx->cn9k.pkt_lenm1 + 1;
177 const uint64_t w1 = *(const uint64_t *)rx;
178 uint64_t ol_flags = 0;
180 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
181 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
183 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
184 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
186 mbuf->packet_type = 0;
188 if (flag & NIX_RX_OFFLOAD_RSS_F) {
189 mbuf->hash.rss = tag;
190 ol_flags |= PKT_RX_RSS_HASH;
193 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
194 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
196 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
197 if (rx->cn9k.vtag0_gone) {
198 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
199 mbuf->vlan_tci = rx->cn9k.vtag0_tci;
201 if (rx->cn9k.vtag1_gone) {
202 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
203 mbuf->vlan_tci_outer = rx->cn9k.vtag1_tci;
207 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
209 nix_update_match_id(rx->cn9k.match_id, ol_flags, mbuf);
211 mbuf->ol_flags = ol_flags;
213 mbuf->data_len = len;
214 *(uint64_t *)(&mbuf->rearm_data) = val;
216 if (flag & NIX_RX_MULTI_SEG_F)
217 nix_cqe_xtract_mseg(rx, mbuf, val, flag);
222 static inline uint16_t
223 nix_rx_nb_pkts(struct cn9k_eth_rxq *rxq, const uint64_t wdata,
224 const uint16_t pkts, const uint32_t qmask)
226 uint32_t available = rxq->available;
228 /* Update the available count if cached value is not enough */
229 if (unlikely(available < pkts)) {
230 uint64_t reg, head, tail;
232 /* Use LDADDA version to avoid reorder */
233 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
234 /* CQ_OP_STATUS operation error */
235 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
236 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
239 tail = reg & 0xFFFFF;
240 head = (reg >> 20) & 0xFFFFF;
242 available = tail - head + qmask + 1;
244 available = tail - head;
246 rxq->available = available;
249 return RTE_MIN(pkts, available);
252 static __rte_always_inline uint16_t
253 cn9k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
254 const uint16_t flags)
256 struct cn9k_eth_rxq *rxq = rx_queue;
257 const uint64_t mbuf_init = rxq->mbuf_initializer;
258 const void *lookup_mem = rxq->lookup_mem;
259 const uint64_t data_off = rxq->data_off;
260 const uintptr_t desc = rxq->desc;
261 const uint64_t wdata = rxq->wdata;
262 const uint32_t qmask = rxq->qmask;
263 uint16_t packets = 0, nb_pkts;
264 uint32_t head = rxq->head;
265 struct nix_cqe_hdr_s *cq;
266 struct rte_mbuf *mbuf;
268 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
270 while (packets < nb_pkts) {
271 /* Prefetch N desc ahead */
272 rte_prefetch_non_temporal(
273 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
274 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
276 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
278 cn9k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
280 cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
281 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
282 (flags & NIX_RX_MULTI_SEG_F),
283 (uint64_t *)((uint8_t *)mbuf
285 rx_pkts[packets++] = mbuf;
286 roc_prefetch_store_keep(mbuf);
292 rxq->available -= nb_pkts;
294 /* Free all the CQs that we've processed */
295 plt_write64((wdata | nb_pkts), rxq->cq_door);
300 #if defined(RTE_ARCH_ARM64)
302 static __rte_always_inline uint64_t
303 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
305 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
306 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
307 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
313 static __rte_always_inline uint64_t
314 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
316 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
317 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
318 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
324 static __rte_always_inline uint16_t
325 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
326 uint16_t pkts, const uint16_t flags)
328 struct cn9k_eth_rxq *rxq = rx_queue;
329 uint16_t packets = 0;
330 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
331 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
332 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
333 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
334 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
335 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
336 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
337 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
338 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
339 const uint16_t *lookup_mem = rxq->lookup_mem;
340 const uint32_t qmask = rxq->qmask;
341 const uint64_t wdata = rxq->wdata;
342 const uintptr_t desc = rxq->desc;
343 uint8x16_t f0, f1, f2, f3;
344 uint32_t head = rxq->head;
347 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
348 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
350 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
351 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
353 while (packets < pkts) {
354 /* Exit loop if head is about to wrap and become unaligned */
355 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
356 NIX_DESCS_PER_LOOP) {
357 pkts_left += (pkts - packets);
361 const uintptr_t cq0 = desc + CQE_SZ(head);
363 /* Prefetch N desc ahead */
364 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
365 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
366 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
367 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
369 /* Get NIX_RX_SG_S for size and buffer pointer */
370 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
371 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
372 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
373 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
375 /* Extract mbuf from NIX_RX_SG_S */
376 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
377 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
378 mbuf01 = vqsubq_u64(mbuf01, data_off);
379 mbuf23 = vqsubq_u64(mbuf23, data_off);
381 /* Move mbufs to scalar registers for future use */
382 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
383 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
384 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
385 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
387 /* Mask to get packet len from NIX_RX_SG_S */
388 const uint8x16_t shuf_msk = {
389 0xFF, 0xFF, /* pkt_type set as unknown */
390 0xFF, 0xFF, /* pkt_type set as unknown */
391 0, 1, /* octet 1~0, low 16 bits pkt_len */
392 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
393 0, 1, /* octet 1~0, 16 bits data_len */
394 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
396 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
397 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
398 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
399 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
400 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
402 /* Load CQE word0 and word 1 */
403 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
404 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
405 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
406 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
407 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
408 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
409 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
410 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
412 if (flags & NIX_RX_OFFLOAD_RSS_F) {
413 /* Fill rss in the rx_descriptor_fields1 */
414 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
415 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
416 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
417 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
418 ol_flags0 = PKT_RX_RSS_HASH;
419 ol_flags1 = PKT_RX_RSS_HASH;
420 ol_flags2 = PKT_RX_RSS_HASH;
421 ol_flags3 = PKT_RX_RSS_HASH;
429 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
430 /* Fill packet_type in the rx_descriptor_fields1 */
431 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
433 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
435 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
437 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
441 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
442 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
443 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
444 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
445 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
448 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
449 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
450 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
451 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
452 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
454 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
455 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
456 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
457 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
459 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
460 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
461 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
462 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
465 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
466 ol_flags0 = nix_update_match_id(
467 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
469 ol_flags1 = nix_update_match_id(
470 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
472 ol_flags2 = nix_update_match_id(
473 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
475 ol_flags3 = nix_update_match_id(
476 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
480 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
481 const uint16x8_t len_off = {
484 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
485 0, /* pktlen 16:32 */
486 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
490 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
491 RTE_PTYPE_L2_ETHER_TIMESYNC,
492 RTE_PTYPE_L2_ETHER_TIMESYNC,
493 RTE_PTYPE_L2_ETHER_TIMESYNC};
494 const uint64_t ts_olf = PKT_RX_IEEE1588_PTP |
495 PKT_RX_IEEE1588_TMST |
496 rxq->tstamp->rx_tstamp_dynflag;
497 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
498 uint64x2_t ts01, ts23, mask;
502 /* Subtract timesync length from total pkt length. */
503 f0 = vsubq_u16(f0, len_off);
504 f1 = vsubq_u16(f1, len_off);
505 f2 = vsubq_u16(f2, len_off);
506 f3 = vsubq_u16(f3, len_off);
508 /* Get the address of actual timestamp. */
509 ts01 = vaddq_u64(mbuf01, data_off);
510 ts23 = vaddq_u64(mbuf23, data_off);
511 /* Load timestamp from address. */
512 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
515 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
518 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
521 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
524 /* Convert from be to cpu byteorder. */
525 ts01 = vrev64q_u8(ts01);
526 ts23 = vrev64q_u8(ts23);
527 /* Store timestamp into scalar for later use. */
528 ts[0] = vgetq_lane_u64(ts01, 0);
529 ts[1] = vgetq_lane_u64(ts01, 1);
530 ts[2] = vgetq_lane_u64(ts23, 0);
531 ts[3] = vgetq_lane_u64(ts23, 1);
533 /* Store timestamp into dynfield. */
534 *cnxk_nix_timestamp_dynfield(mbuf0, rxq->tstamp) =
536 *cnxk_nix_timestamp_dynfield(mbuf1, rxq->tstamp) =
538 *cnxk_nix_timestamp_dynfield(mbuf2, rxq->tstamp) =
540 *cnxk_nix_timestamp_dynfield(mbuf3, rxq->tstamp) =
543 /* Generate ptype mask to filter L2 ether timesync */
544 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
545 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
546 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
547 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
549 /* Match against L2 ether timesync. */
550 mask = vceqq_u32(mask, ptype);
551 /* Convert from vector from scalar mask */
552 res = vaddvq_u32(vandq_u32(mask, and_mask));
556 /* Fill in the ol_flags for any packets that
559 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
560 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
561 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
562 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
564 /* Update Rxq timestamp with the latest
567 rxq->tstamp->rx_ready = 1;
568 rxq->tstamp->rx_tstamp =
569 ts[31 - __builtin_clz(res)];
573 /* Form rearm_data with ol_flags */
574 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
575 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
576 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
577 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
579 /* Update rx_descriptor_fields1 */
580 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
581 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
582 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
583 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
585 /* Update rearm_data */
586 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
587 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
588 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
589 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
591 /* Store the mbufs to rx_pkts */
592 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
593 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
595 if (flags & NIX_RX_MULTI_SEG_F) {
596 /* Multi segment is enable build mseg list for
597 * individual mbufs in scalar mode.
599 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
600 (cq0 + CQE_SZ(0) + 8), mbuf0,
601 mbuf_initializer, flags);
602 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
603 (cq0 + CQE_SZ(1) + 8), mbuf1,
604 mbuf_initializer, flags);
605 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
606 (cq0 + CQE_SZ(2) + 8), mbuf2,
607 mbuf_initializer, flags);
608 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
609 (cq0 + CQE_SZ(3) + 8), mbuf3,
610 mbuf_initializer, flags);
612 /* Update that no more segments */
620 roc_prefetch_store_keep(mbuf0);
621 roc_prefetch_store_keep(mbuf1);
622 roc_prefetch_store_keep(mbuf2);
623 roc_prefetch_store_keep(mbuf3);
625 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
626 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
627 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
628 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
629 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
631 /* Advance head pointer and packets */
632 head += NIX_DESCS_PER_LOOP;
634 packets += NIX_DESCS_PER_LOOP;
638 rxq->available -= packets;
641 /* Free all the CQs that we've processed */
642 plt_write64((rxq->wdata | packets), rxq->cq_door);
644 if (unlikely(pkts_left))
645 packets += cn9k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
653 static inline uint16_t
654 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
655 uint16_t pkts, const uint16_t flags)
657 RTE_SET_USED(rx_queue);
658 RTE_SET_USED(rx_pkts);
667 #define RSS_F NIX_RX_OFFLOAD_RSS_F
668 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
669 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
670 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
671 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
672 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
674 /* [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
675 #define NIX_RX_FASTPATH_MODES \
676 R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
677 R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
678 R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
679 R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
680 R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
681 R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
682 R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
683 R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
684 R(mark, 0, 0, 1, 0, 0, 0, MARK_F) \
685 R(mark_rss, 0, 0, 1, 0, 0, 1, MARK_F | RSS_F) \
686 R(mark_ptype, 0, 0, 1, 0, 1, 0, MARK_F | PTYPE_F) \
687 R(mark_ptype_rss, 0, 0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
688 R(mark_cksum, 0, 0, 1, 1, 0, 0, MARK_F | CKSUM_F) \
689 R(mark_cksum_rss, 0, 0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
690 R(mark_cksum_ptype, 0, 0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \
691 R(mark_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
692 MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
693 R(ts, 0, 1, 0, 0, 0, 0, TS_F) \
694 R(ts_rss, 0, 1, 0, 0, 0, 1, TS_F | RSS_F) \
695 R(ts_ptype, 0, 1, 0, 0, 1, 0, TS_F | PTYPE_F) \
696 R(ts_ptype_rss, 0, 1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \
697 R(ts_cksum, 0, 1, 0, 1, 0, 0, TS_F | CKSUM_F) \
698 R(ts_cksum_rss, 0, 1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \
699 R(ts_cksum_ptype, 0, 1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \
700 R(ts_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
701 TS_F | CKSUM_F | PTYPE_F | RSS_F) \
702 R(ts_mark, 0, 1, 1, 0, 0, 0, TS_F | MARK_F) \
703 R(ts_mark_rss, 0, 1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F) \
704 R(ts_mark_ptype, 0, 1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \
705 R(ts_mark_ptype_rss, 0, 1, 1, 0, 1, 1, \
706 TS_F | MARK_F | PTYPE_F | RSS_F) \
707 R(ts_mark_cksum, 0, 1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \
708 R(ts_mark_cksum_rss, 0, 1, 1, 1, 0, 1, \
709 TS_F | MARK_F | CKSUM_F | RSS_F) \
710 R(ts_mark_cksum_ptype, 0, 1, 1, 1, 1, 0, \
711 TS_F | MARK_F | CKSUM_F | PTYPE_F) \
712 R(ts_mark_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
713 TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
714 R(vlan, 1, 0, 0, 0, 0, 0, RX_VLAN_F) \
715 R(vlan_rss, 1, 0, 0, 0, 0, 1, RX_VLAN_F | RSS_F) \
716 R(vlan_ptype, 1, 0, 0, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
717 R(vlan_ptype_rss, 1, 0, 0, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F) \
718 R(vlan_cksum, 1, 0, 0, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
719 R(vlan_cksum_rss, 1, 0, 0, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F) \
720 R(vlan_cksum_ptype, 1, 0, 0, 1, 1, 0, \
721 RX_VLAN_F | CKSUM_F | PTYPE_F) \
722 R(vlan_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
723 RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
724 R(vlan_mark, 1, 0, 1, 0, 0, 0, RX_VLAN_F | MARK_F) \
725 R(vlan_mark_rss, 1, 0, 1, 0, 0, 1, RX_VLAN_F | MARK_F | RSS_F) \
726 R(vlan_mark_ptype, 1, 0, 1, 0, 1, 0, RX_VLAN_F | MARK_F | PTYPE_F)\
727 R(vlan_mark_ptype_rss, 1, 0, 1, 0, 1, 1, \
728 RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
729 R(vlan_mark_cksum, 1, 0, 1, 1, 0, 0, RX_VLAN_F | MARK_F | CKSUM_F)\
730 R(vlan_mark_cksum_rss, 1, 0, 1, 1, 0, 1, \
731 RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
732 R(vlan_mark_cksum_ptype, 1, 0, 1, 1, 1, 0, \
733 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
734 R(vlan_mark_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
735 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
736 R(vlan_ts, 1, 1, 0, 0, 0, 0, RX_VLAN_F | TS_F) \
737 R(vlan_ts_rss, 1, 1, 0, 0, 0, 1, RX_VLAN_F | TS_F | RSS_F) \
738 R(vlan_ts_ptype, 1, 1, 0, 0, 1, 0, RX_VLAN_F | TS_F | PTYPE_F) \
739 R(vlan_ts_ptype_rss, 1, 1, 0, 0, 1, 1, \
740 RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
741 R(vlan_ts_cksum, 1, 1, 0, 1, 0, 0, RX_VLAN_F | TS_F | CKSUM_F) \
742 R(vlan_ts_cksum_rss, 1, 1, 0, 1, 0, 1, \
743 RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
744 R(vlan_ts_cksum_ptype, 1, 1, 0, 1, 1, 0, \
745 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
746 R(vlan_ts_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
747 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
748 R(vlan_ts_mark, 1, 1, 1, 0, 0, 0, RX_VLAN_F | TS_F | MARK_F) \
749 R(vlan_ts_mark_rss, 1, 1, 1, 0, 0, 1, \
750 RX_VLAN_F | TS_F | MARK_F | RSS_F) \
751 R(vlan_ts_mark_ptype, 1, 1, 1, 0, 1, 0, \
752 RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
753 R(vlan_ts_mark_ptype_rss, 1, 1, 1, 0, 1, 1, \
754 RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
755 R(vlan_ts_mark_cksum, 1, 1, 1, 1, 0, 0, \
756 RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
757 R(vlan_ts_mark_cksum_rss, 1, 1, 1, 1, 0, 1, \
758 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
759 R(vlan_ts_mark_cksum_ptype, 1, 1, 1, 1, 1, 0, \
760 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
761 R(vlan_ts_mark_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
762 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
764 #define R(name, f5, f4, f3, f2, f1, f0, flags) \
765 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \
766 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
768 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \
769 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
771 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \
772 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
774 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_mseg_##name( \
775 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
777 NIX_RX_FASTPATH_MODES
780 #endif /* __CN9K_RX_H__ */