drivers/net/cnxk/cnxk_ethdev_devargs.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include <inttypes.h>
   6 #include <math.h>
   7
   8 #include "cnxk_ethdev.h"
   9
  10 struct sdp_channel {
  11         bool is_sdp_mask_set;
  12         uint16_t channel;
  13         uint16_t mask;
  14 };
  15
  16 static int
  17 parse_outb_nb_desc(const char *key, const char *value, void *extra_args)
  18 {
  19         RTE_SET_USED(key);
  20         uint32_t val;
  21
  22         val = atoi(value);
  23
  24         *(uint16_t *)extra_args = val;
  25
  26         return 0;
  27 }
  28
  29 static int
  30 parse_outb_nb_crypto_qs(const char *key, const char *value, void *extra_args)
  31 {
  32         RTE_SET_USED(key);
  33         uint32_t val;
  34
  35         val = atoi(value);
  36
  37         if (val < 1 || val > 64)
  38                 return -EINVAL;
  39
  40         *(uint16_t *)extra_args = val;
  41
  42         return 0;
  43 }
  44
  45 static int
  46 parse_ipsec_in_max_spi(const char *key, const char *value, void *extra_args)
  47 {
  48         RTE_SET_USED(key);
  49         uint32_t val;
  50
  51         val = atoi(value);
  52
  53         *(uint16_t *)extra_args = val;
  54
  55         return 0;
  56 }
  57
  58 static int
  59 parse_ipsec_out_max_sa(const char *key, const char *value, void *extra_args)
  60 {
  61         RTE_SET_USED(key);
  62         uint32_t val;
  63
  64         val = atoi(value);
  65
  66         *(uint16_t *)extra_args = val;
  67
  68         return 0;
  69 }
  70
  71 static int
  72 parse_flow_max_priority(const char *key, const char *value, void *extra_args)
  73 {
  74         RTE_SET_USED(key);
  75         uint16_t val;
  76
  77         val = atoi(value);
  78
  79         /* Limit the max priority to 32 */
  80         if (val < 1 || val > 32)
  81                 return -EINVAL;
  82
  83         *(uint16_t *)extra_args = val;
  84
  85         return 0;
  86 }
  87
  88 static int
  89 parse_flow_prealloc_size(const char *key, const char *value, void *extra_args)
  90 {
  91         RTE_SET_USED(key);
  92         uint16_t val;
  93
  94         val = atoi(value);
  95
  96         /* Limit the prealloc size to 32 */
  97         if (val < 1 || val > 32)
  98                 return -EINVAL;
  99
 100         *(uint16_t *)extra_args = val;
 101
 102         return 0;
 103 }
 104
 105 static int
 106 parse_reta_size(const char *key, const char *value, void *extra_args)
 107 {
 108         RTE_SET_USED(key);
 109         uint32_t val;
 110
 111         val = atoi(value);
 112
 113         if (val <= RTE_ETH_RSS_RETA_SIZE_64)
 114                 val = ROC_NIX_RSS_RETA_SZ_64;
 115         else if (val > RTE_ETH_RSS_RETA_SIZE_64 && val <= RTE_ETH_RSS_RETA_SIZE_128)
 116                 val = ROC_NIX_RSS_RETA_SZ_128;
 117         else if (val > RTE_ETH_RSS_RETA_SIZE_128 && val <= RTE_ETH_RSS_RETA_SIZE_256)
 118                 val = ROC_NIX_RSS_RETA_SZ_256;
 119         else
 120                 val = ROC_NIX_RSS_RETA_SZ_64;
 121
 122         *(uint16_t *)extra_args = val;
 123
 124         return 0;
 125 }
 126
 127 static int
 128 parse_flag(const char *key, const char *value, void *extra_args)
 129 {
 130         RTE_SET_USED(key);
 131
 132         *(uint16_t *)extra_args = atoi(value);
 133
 134         return 0;
 135 }
 136
 137 static int
 138 parse_sqb_count(const char *key, const char *value, void *extra_args)
 139 {
 140         RTE_SET_USED(key);
 141         uint32_t val;
 142
 143         val = atoi(value);
 144
 145         *(uint16_t *)extra_args = val;
 146
 147         return 0;
 148 }
 149
 150 static int
 151 parse_switch_header_type(const char *key, const char *value, void *extra_args)
 152 {
 153         RTE_SET_USED(key);
 154
 155         if (strcmp(value, "higig2") == 0)
 156                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_HIGIG;
 157
 158         if (strcmp(value, "dsa") == 0)
 159                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_EDSA;
 160
 161         if (strcmp(value, "chlen90b") == 0)
 162                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_LEN_90B;
 163
 164         if (strcmp(value, "exdsa") == 0)
 165                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_EXDSA;
 166
 167         if (strcmp(value, "vlan_exdsa") == 0)
 168                 *(uint16_t *)extra_args = ROC_PRIV_FLAGS_VLAN_EXDSA;
 169
 170         return 0;
 171 }
 172
 173 static int
 174 parse_sdp_channel_mask(const char *key, const char *value, void *extra_args)
 175 {
 176         RTE_SET_USED(key);
 177         uint16_t chan = 0, mask = 0;
 178         char *next = 0;
 179
 180         /* next will point to the separator '/' */
 181         chan = strtol(value, &next, 16);
 182         mask = strtol(++next, 0, 16);
 183
 184         if (chan > GENMASK(11, 0) || mask > GENMASK(11, 0))
 185                 return -EINVAL;
 186
 187         ((struct sdp_channel *)extra_args)->channel = chan;
 188         ((struct sdp_channel *)extra_args)->mask = mask;
 189         ((struct sdp_channel *)extra_args)->is_sdp_mask_set = true;
 190
 191         return 0;
 192 }
 193
 194 #define CNXK_RSS_RETA_SIZE      "reta_size"
 195 #define CNXK_SCL_ENABLE         "scalar_enable"
 196 #define CNXK_MAX_SQB_COUNT      "max_sqb_count"
 197 #define CNXK_FLOW_PREALLOC_SIZE "flow_prealloc_size"
 198 #define CNXK_FLOW_MAX_PRIORITY  "flow_max_priority"
 199 #define CNXK_SWITCH_HEADER_TYPE "switch_header"
 200 #define CNXK_RSS_TAG_AS_XOR     "tag_as_xor"
 201 #define CNXK_LOCK_RX_CTX        "lock_rx_ctx"
 202 #define CNXK_IPSEC_IN_MAX_SPI   "ipsec_in_max_spi"
 203 #define CNXK_IPSEC_OUT_MAX_SA   "ipsec_out_max_sa"
 204 #define CNXK_OUTB_NB_DESC       "outb_nb_desc"
 205 #define CNXK_FORCE_INB_INL_DEV  "force_inb_inl_dev"
 206 #define CNXK_OUTB_NB_CRYPTO_QS  "outb_nb_crypto_qs"
 207 #define CNXK_SDP_CHANNEL_MASK   "sdp_channel_mask"
 208
 209 int
 210 cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
 211 {
 212         uint16_t reta_sz = ROC_NIX_RSS_RETA_SZ_64;
 213         uint16_t sqb_count = CNXK_NIX_TX_MAX_SQB;
 214         uint16_t ipsec_in_max_spi = BIT(8) - 1;
 215         uint16_t ipsec_out_max_sa = BIT(12);
 216         uint16_t flow_prealloc_size = 1;
 217         uint16_t switch_header_type = 0;
 218         uint16_t flow_max_priority = 3;
 219         uint16_t force_inb_inl_dev = 0;
 220         uint16_t outb_nb_crypto_qs = 1;
 221         uint16_t outb_nb_desc = 8200;
 222         struct sdp_channel sdp_chan;
 223         uint16_t rss_tag_as_xor = 0;
 224         uint16_t scalar_enable = 0;
 225         uint8_t lock_rx_ctx = 0;
 226         struct rte_kvargs *kvlist;
 227
 228         memset(&sdp_chan, 0, sizeof(sdp_chan));
 229
 230         if (devargs == NULL)
 231                 goto null_devargs;
 232
 233         kvlist = rte_kvargs_parse(devargs->args, NULL);
 234         if (kvlist == NULL)
 235                 goto exit;
 236
 237         rte_kvargs_process(kvlist, CNXK_RSS_RETA_SIZE, &parse_reta_size,
 238                            &reta_sz);
 239         rte_kvargs_process(kvlist, CNXK_SCL_ENABLE, &parse_flag,
 240                            &scalar_enable);
 241         rte_kvargs_process(kvlist, CNXK_MAX_SQB_COUNT, &parse_sqb_count,
 242                            &sqb_count);
 243         rte_kvargs_process(kvlist, CNXK_FLOW_PREALLOC_SIZE,
 244                            &parse_flow_prealloc_size, &flow_prealloc_size);
 245         rte_kvargs_process(kvlist, CNXK_FLOW_MAX_PRIORITY,
 246                            &parse_flow_max_priority, &flow_max_priority);
 247         rte_kvargs_process(kvlist, CNXK_SWITCH_HEADER_TYPE,
 248                            &parse_switch_header_type, &switch_header_type);
 249         rte_kvargs_process(kvlist, CNXK_RSS_TAG_AS_XOR, &parse_flag,
 250                            &rss_tag_as_xor);
 251         rte_kvargs_process(kvlist, CNXK_LOCK_RX_CTX, &parse_flag, &lock_rx_ctx);
 252         rte_kvargs_process(kvlist, CNXK_IPSEC_IN_MAX_SPI,
 253                            &parse_ipsec_in_max_spi, &ipsec_in_max_spi);
 254         rte_kvargs_process(kvlist, CNXK_IPSEC_OUT_MAX_SA,
 255                            &parse_ipsec_out_max_sa, &ipsec_out_max_sa);
 256         rte_kvargs_process(kvlist, CNXK_OUTB_NB_DESC, &parse_outb_nb_desc,
 257                            &outb_nb_desc);
 258         rte_kvargs_process(kvlist, CNXK_OUTB_NB_CRYPTO_QS,
 259                            &parse_outb_nb_crypto_qs, &outb_nb_crypto_qs);
 260         rte_kvargs_process(kvlist, CNXK_FORCE_INB_INL_DEV, &parse_flag,
 261                            &force_inb_inl_dev);
 262         rte_kvargs_process(kvlist, CNXK_SDP_CHANNEL_MASK,
 263                            &parse_sdp_channel_mask, &sdp_chan);
 264         rte_kvargs_free(kvlist);
 265
 266 null_devargs:
 267         dev->scalar_ena = !!scalar_enable;
 268         dev->inb.force_inl_dev = !!force_inb_inl_dev;
 269         dev->inb.max_spi = ipsec_in_max_spi;
 270         dev->outb.max_sa = ipsec_out_max_sa;
 271         dev->outb.nb_desc = outb_nb_desc;
 272         dev->outb.nb_crypto_qs = outb_nb_crypto_qs;
 273         dev->nix.ipsec_in_max_spi = ipsec_in_max_spi;
 274         dev->nix.ipsec_out_max_sa = ipsec_out_max_sa;
 275         dev->nix.rss_tag_as_xor = !!rss_tag_as_xor;
 276         dev->nix.max_sqb_count = sqb_count;
 277         dev->nix.reta_sz = reta_sz;
 278         dev->nix.lock_rx_ctx = lock_rx_ctx;
 279         dev->npc.flow_prealloc_size = flow_prealloc_size;
 280         dev->npc.flow_max_priority = flow_max_priority;
 281         dev->npc.switch_header_type = switch_header_type;
 282         dev->npc.sdp_channel = sdp_chan.channel;
 283         dev->npc.sdp_channel_mask = sdp_chan.mask;
 284         dev->npc.is_sdp_mask_set = sdp_chan.is_sdp_mask_set;
 285         return 0;
 286 exit:
 287         return -EINVAL;
 288 }
 289
 290 RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
 291                               CNXK_RSS_RETA_SIZE "=<64|128|256>"
 292                               CNXK_SCL_ENABLE "=1"
 293                               CNXK_MAX_SQB_COUNT "=<8-512>"
 294                               CNXK_FLOW_PREALLOC_SIZE "=<1-32>"
 295                               CNXK_FLOW_MAX_PRIORITY "=<1-32>"
 296                               CNXK_SWITCH_HEADER_TYPE "=<higig2|dsa|chlen90b>"
 297                               CNXK_RSS_TAG_AS_XOR "=1"
 298                               CNXK_IPSEC_IN_MAX_SPI "=<1-65535>"
 299                               CNXK_OUTB_NB_DESC "=<1-65535>"
 300                               CNXK_OUTB_NB_CRYPTO_QS "=<1-64>"
 301                               CNXK_FORCE_INB_INL_DEV "=1"
 302                               CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>");