1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include <cnxk_ethdev.h>
7 #define CNXK_NIX_INL_SELFTEST "selftest"
8 #define CNXK_NIX_INL_IPSEC_IN_MAX_SPI "ipsec_in_max_spi"
10 #define CNXK_NIX_INL_DEV_NAME RTE_STR(cnxk_nix_inl_dev_)
11 #define CNXK_NIX_INL_DEV_NAME_LEN \
12 (sizeof(CNXK_NIX_INL_DEV_NAME) + PCI_PRI_STR_SIZE)
15 bitmap_ctzll(uint64_t slab)
20 return __builtin_ctzll(slab);
24 cnxk_eth_outb_sa_idx_get(struct cnxk_eth_dev *dev, uint32_t *idx_p)
30 if (!dev->outb.sa_bmap)
35 /* Scan from the beginning */
36 plt_bitmap_scan_init(dev->outb.sa_bmap);
37 /* Scan bitmap to get the free sa index */
38 rc = plt_bitmap_scan(dev->outb.sa_bmap, &pos, &slab);
41 plt_err("Outbound SA' exhausted, use 'ipsec_out_max_sa' "
42 "devargs to increase");
46 /* Get free SA index */
47 idx = pos + bitmap_ctzll(slab);
48 plt_bitmap_clear(dev->outb.sa_bmap, idx);
54 cnxk_eth_outb_sa_idx_put(struct cnxk_eth_dev *dev, uint32_t idx)
56 if (idx >= dev->outb.max_sa)
59 /* Check if it is already free */
60 if (plt_bitmap_get(dev->outb.sa_bmap, idx))
63 /* Mark index as free */
64 plt_bitmap_set(dev->outb.sa_bmap, idx);
68 struct cnxk_eth_sec_sess *
69 cnxk_eth_sec_sess_get_by_spi(struct cnxk_eth_dev *dev, uint32_t spi, bool inb)
71 struct cnxk_eth_sec_sess_list *list;
72 struct cnxk_eth_sec_sess *eth_sec;
74 list = inb ? &dev->inb.list : &dev->outb.list;
75 TAILQ_FOREACH(eth_sec, list, entry) {
76 if (eth_sec->spi == spi)
83 struct cnxk_eth_sec_sess *
84 cnxk_eth_sec_sess_get_by_sess(struct cnxk_eth_dev *dev,
85 struct rte_security_session *sess)
87 struct cnxk_eth_sec_sess *eth_sec = NULL;
89 /* Search in inbound list */
90 TAILQ_FOREACH(eth_sec, &dev->inb.list, entry) {
91 if (eth_sec->sess == sess)
95 /* Search in outbound list */
96 TAILQ_FOREACH(eth_sec, &dev->outb.list, entry) {
97 if (eth_sec->sess == sess)
105 cnxk_eth_sec_session_get_size(void *device __rte_unused)
107 return sizeof(struct cnxk_eth_sec_sess);
110 struct rte_security_ops cnxk_eth_sec_ops = {
111 .session_get_size = cnxk_eth_sec_session_get_size
115 parse_ipsec_in_max_spi(const char *key, const char *value, void *extra_args)
122 *(uint16_t *)extra_args = val;
128 parse_selftest(const char *key, const char *value, void *extra_args)
135 *(uint8_t *)extra_args = !!(val == 1);
140 nix_inl_parse_devargs(struct rte_devargs *devargs,
141 struct roc_nix_inl_dev *inl_dev)
143 uint32_t ipsec_in_max_spi = BIT(8) - 1;
144 struct rte_kvargs *kvlist;
145 uint8_t selftest = 0;
150 kvlist = rte_kvargs_parse(devargs->args, NULL);
154 rte_kvargs_process(kvlist, CNXK_NIX_INL_SELFTEST, &parse_selftest,
156 rte_kvargs_process(kvlist, CNXK_NIX_INL_IPSEC_IN_MAX_SPI,
157 &parse_ipsec_in_max_spi, &ipsec_in_max_spi);
158 rte_kvargs_free(kvlist);
161 inl_dev->ipsec_in_max_spi = ipsec_in_max_spi;
162 inl_dev->selftest = selftest;
169 nix_inl_dev_to_name(struct rte_pci_device *pci_dev, char *name)
171 snprintf(name, CNXK_NIX_INL_DEV_NAME_LEN,
172 CNXK_NIX_INL_DEV_NAME PCI_PRI_FMT, pci_dev->addr.domain,
173 pci_dev->addr.bus, pci_dev->addr.devid,
174 pci_dev->addr.function);
180 cnxk_nix_inl_dev_remove(struct rte_pci_device *pci_dev)
182 char name[CNXK_NIX_INL_DEV_NAME_LEN];
183 const struct rte_memzone *mz;
184 struct roc_nix_inl_dev *dev;
187 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
190 mz = rte_memzone_lookup(nix_inl_dev_to_name(pci_dev, name));
196 /* Cleanup inline dev */
197 rc = roc_nix_inl_dev_fini(dev);
199 plt_err("Failed to cleanup inl dev, rc=%d(%s)", rc,
200 roc_error_msg_get(rc));
204 rte_memzone_free(mz);
209 cnxk_nix_inl_dev_probe(struct rte_pci_driver *pci_drv,
210 struct rte_pci_device *pci_dev)
212 char name[CNXK_NIX_INL_DEV_NAME_LEN];
213 struct roc_nix_inl_dev *inl_dev;
214 const struct rte_memzone *mz;
217 RTE_SET_USED(pci_drv);
221 plt_err("Failed to initialize platform model, rc=%d", rc);
225 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
228 mz = rte_memzone_reserve_aligned(nix_inl_dev_to_name(pci_dev, name),
229 sizeof(*inl_dev), SOCKET_ID_ANY, 0,
230 RTE_CACHE_LINE_SIZE);
235 inl_dev->pci_dev = pci_dev;
237 /* Parse devargs string */
238 rc = nix_inl_parse_devargs(pci_dev->device.devargs, inl_dev);
240 plt_err("Failed to parse devargs rc=%d", rc);
244 rc = roc_nix_inl_dev_init(inl_dev);
246 plt_err("Failed to init nix inl device, rc=%d(%s)", rc,
247 roc_error_msg_get(rc));
253 rte_memzone_free(mz);
257 static const struct rte_pci_id cnxk_nix_inl_pci_map[] = {
258 {RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CNXK_RVU_NIX_INL_PF)},
259 {RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CNXK_RVU_NIX_INL_VF)},
265 static struct rte_pci_driver cnxk_nix_inl_pci = {
266 .id_table = cnxk_nix_inl_pci_map,
267 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
268 .probe = cnxk_nix_inl_dev_probe,
269 .remove = cnxk_nix_inl_dev_remove,
272 RTE_PMD_REGISTER_PCI(cnxk_nix_inl, cnxk_nix_inl_pci);
273 RTE_PMD_REGISTER_PCI_TABLE(cnxk_nix_inl, cnxk_nix_inl_pci_map);
274 RTE_PMD_REGISTER_KMOD_DEP(cnxk_nix_inl, "vfio-pci");
276 RTE_PMD_REGISTER_PARAM_STRING(cnxk_nix_inl,
277 CNXK_NIX_INL_SELFTEST "=1"
278 CNXK_NIX_INL_IPSEC_IN_MAX_SPI "=<1-65535>");