1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include "cnxk_ethdev.h"
7 /* This function calculates two parameters "clk_freq_mult" and
8 * "clk_delta" which is useful in deriving PTP HI clock from
9 * timestamp counter (tsc) value.
12 cnxk_nix_tsc_convert(struct cnxk_eth_dev *dev)
14 uint64_t ticks_base = 0, ticks = 0, tsc = 0, t_freq;
15 struct roc_nix *nix = &dev->nix;
18 /* Calculating the frequency at which PTP HI clock is running */
19 rc = roc_nix_ptp_clock_read(nix, &ticks_base, &tsc, false);
21 plt_err("Failed to read the raw clock value: %d", rc);
27 rc = roc_nix_ptp_clock_read(nix, &ticks, &tsc, false);
29 plt_err("Failed to read the raw clock value: %d", rc);
33 t_freq = (ticks - ticks_base) * 10;
35 /* Calculating the freq multiplier viz the ratio between the
36 * frequency at which PTP HI clock works and tsc clock runs
39 (double)pow(10, floor(log10(t_freq))) / rte_get_timer_hz();
42 #ifdef RTE_ARM_EAL_RDTSC_USE_PMU
45 rc = roc_nix_ptp_clock_read(nix, &ticks, &tsc, val);
47 plt_err("Failed to read the raw clock value: %d", rc);
51 /* Calculating delta between PTP HI clock and tsc */
52 dev->clk_delta = ((uint64_t)(ticks / dev->clk_freq_mult) - tsc);
59 cnxk_nix_timesync_read_time(struct rte_eth_dev *eth_dev, struct timespec *ts)
61 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
62 struct roc_nix *nix = &dev->nix;
66 rc = roc_nix_ptp_clock_read(nix, &clock, NULL, false);
70 ns = rte_timecounter_update(&dev->systime_tc, clock);
71 *ts = rte_ns_to_timespec(ns);
76 cnxk_nix_timesync_write_time(struct rte_eth_dev *eth_dev,
77 const struct timespec *ts)
79 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
82 ns = rte_timespec_to_ns(ts);
83 /* Set the time counters to a new value. */
84 dev->systime_tc.nsec = ns;
85 dev->rx_tstamp_tc.nsec = ns;
86 dev->tx_tstamp_tc.nsec = ns;
92 cnxk_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta)
94 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
95 struct roc_nix *nix = &dev->nix;
98 /* Adjust the frequent to make tics increments in 10^9 tics per sec */
99 if (delta < ROC_NIX_PTP_FREQ_ADJUST &&
100 delta > -ROC_NIX_PTP_FREQ_ADJUST) {
101 rc = roc_nix_ptp_sync_time_adjust(nix, delta);
105 /* Since the frequency of PTP comp register is tuned, delta and
106 * freq mult calculation for deriving PTP_HI from timestamp
107 * counter should be done again.
109 rc = cnxk_nix_tsc_convert(dev);
111 plt_err("Failed to calculate delta and freq mult");
114 dev->systime_tc.nsec += delta;
115 dev->rx_tstamp_tc.nsec += delta;
116 dev->tx_tstamp_tc.nsec += delta;
122 cnxk_nix_timesync_read_rx_timestamp(struct rte_eth_dev *eth_dev,
123 struct timespec *timestamp, uint32_t flags)
125 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
126 struct cnxk_timesync_info *tstamp = &dev->tstamp;
131 if (!tstamp->rx_ready)
134 ns = rte_timecounter_update(&dev->rx_tstamp_tc, tstamp->rx_tstamp);
135 *timestamp = rte_ns_to_timespec(ns);
136 tstamp->rx_ready = 0;
141 cnxk_nix_timesync_read_tx_timestamp(struct rte_eth_dev *eth_dev,
142 struct timespec *timestamp)
144 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
145 struct cnxk_timesync_info *tstamp = &dev->tstamp;
148 if (*tstamp->tx_tstamp == 0)
151 ns = rte_timecounter_update(&dev->tx_tstamp_tc, *tstamp->tx_tstamp);
152 *timestamp = rte_ns_to_timespec(ns);
153 *tstamp->tx_tstamp = 0;
160 cnxk_nix_timesync_enable(struct rte_eth_dev *eth_dev)
162 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
163 struct cnxk_timesync_info *tstamp = &dev->tstamp;
164 struct roc_nix *nix = &dev->nix;
165 const struct rte_memzone *ts;
168 /* If we are VF/SDP/LBK, ptp cannot not be enabled */
169 if (roc_nix_is_vf_or_sdp(nix) || roc_nix_is_lbk(nix)) {
170 plt_err("PTP cannot be enabled for VF/SDP/LBK");
177 if (dev->ptype_disable) {
178 plt_err("Ptype offload is disabled, it should be enabled");
182 if (dev->npc.switch_header_type == ROC_PRIV_FLAGS_HIGIG) {
183 plt_err("Both PTP and switch header cannot be enabled");
187 /* Allocating a iova address for tx tstamp */
188 ts = rte_eth_dma_zone_reserve(eth_dev, "cnxk_ts", 0, 128, 128, 0);
190 plt_err("Failed to allocate mem for tx tstamp addr");
194 tstamp->tx_tstamp_iova = ts->iova;
195 tstamp->tx_tstamp = ts->addr;
197 rc = rte_mbuf_dyn_rx_timestamp_register(&tstamp->tstamp_dynfield_offset,
198 &tstamp->rx_tstamp_dynflag);
200 plt_err("Failed to register Rx timestamp field/flag");
204 /* System time should be already on by default */
205 memset(&dev->systime_tc, 0, sizeof(struct rte_timecounter));
206 memset(&dev->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
207 memset(&dev->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
209 dev->systime_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;
210 dev->rx_tstamp_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;
211 dev->tx_tstamp_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;
213 dev->rx_offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
215 rc = roc_nix_ptp_rx_ena_dis(nix, true);
217 rc = roc_nix_ptp_tx_ena_dis(nix, true);
219 roc_nix_ptp_rx_ena_dis(nix, false);
224 rc = nix_recalc_mtu(eth_dev);
226 plt_err("Failed to set MTU size for ptp");
233 rte_eth_dma_zone_free(eth_dev, "cnxk_ts", 0);
234 dev->tstamp.tx_tstamp_iova = 0;
235 dev->tstamp.tx_tstamp = NULL;
240 cnxk_nix_timesync_disable(struct rte_eth_dev *eth_dev)
242 struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
243 uint64_t rx_offloads = DEV_RX_OFFLOAD_TIMESTAMP;
244 struct roc_nix *nix = &dev->nix;
247 /* If we are VF/SDP/LBK, ptp cannot not be disabled */
248 if (roc_nix_is_vf_or_sdp(nix) || roc_nix_is_lbk(nix))
254 dev->rx_offloads &= ~rx_offloads;
256 rc = roc_nix_ptp_rx_ena_dis(nix, false);
258 rc = roc_nix_ptp_tx_ena_dis(nix, false);
260 roc_nix_ptp_rx_ena_dis(nix, true);
265 rc = nix_recalc_mtu(eth_dev);
267 plt_err("Failed to set MTU size for ptp");