4 * Copyright(c) 2014-2015 Chelsio Communications.
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34 #ifndef __T4_CHIP_TYPE_H__
35 #define __T4_CHIP_TYPE_H__
38 * All T4 and later chips have their PCI-E Device IDs encoded as 0xVFPP where:
40 * V = "4" for T4; "5" for T5, etc. or
41 * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
42 * PP = adapter product designation
44 * We use the "version" (V) of the adpater to code the Chip Version above.
46 #define CHELSIO_PCI_ID_VER(devid) ((devid) >> 12)
47 #define CHELSIO_PCI_ID_FUNC(devid) (((devid) >> 8) & 0xf)
48 #define CHELSIO_PCI_ID_PROD(devid) ((devid) & 0xff)
50 #define CHELSIO_T4 0x4
51 #define CHELSIO_T5 0x5
53 #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
54 #define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
55 #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
58 T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
59 T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
63 T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
64 T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
69 static inline int is_t4(enum chip_type chip)
71 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4);
74 static inline int is_t5(enum chip_type chip)
76 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5);
79 #endif /* __T4_CHIP_TYPE_H__ */