net/bnxt: fix RSS table sizes
[dpdk.git] / drivers / net / cxgbe / cxgbe.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2018 Chelsio Communications.
3  * All rights reserved.
4  */
5
6 #ifndef _CXGBE_H_
7 #define _CXGBE_H_
8
9 #include "base/common.h"
10 #include "base/t4_regs.h"
11
12 #define CXGBE_MIN_RING_DESC_SIZE      128  /* Min TX/RX descriptor ring size */
13 #define CXGBE_MAX_RING_DESC_SIZE      4096 /* Max TX/RX descriptor ring size */
14
15 #define CXGBE_DEFAULT_TX_DESC_SIZE    1024 /* Default TX ring size */
16 #define CXGBE_DEFAULT_RX_DESC_SIZE    1024 /* Default RX ring size */
17
18 #define CXGBE_MIN_RX_BUFSIZE RTE_ETHER_MIN_MTU /* min buf size */
19 #define CXGBE_MAX_RX_PKTLEN (9000 + RTE_ETHER_HDR_LEN + \
20                                 RTE_ETHER_CRC_LEN) /* max pkt */
21
22 /* Max poll time is 100 * 100msec = 10 sec */
23 #define CXGBE_LINK_STATUS_POLL_MS 100 /* 100ms */
24 #define CXGBE_LINK_STATUS_POLL_CNT 100 /* Max number of times to poll */
25
26 #define CXGBE_DEFAULT_RSS_KEY_LEN     40 /* 320-bits */
27 #define CXGBE_RSS_HF_IPV4_MASK (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | \
28                                 ETH_RSS_NONFRAG_IPV4_OTHER)
29 #define CXGBE_RSS_HF_IPV6_MASK (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | \
30                                 ETH_RSS_NONFRAG_IPV6_OTHER | \
31                                 ETH_RSS_IPV6_EX)
32 #define CXGBE_RSS_HF_TCP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_TCP | \
33                                     ETH_RSS_IPV6_TCP_EX)
34 #define CXGBE_RSS_HF_UDP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_UDP | \
35                                     ETH_RSS_IPV6_UDP_EX)
36 #define CXGBE_RSS_HF_ALL (ETH_RSS_IP | ETH_RSS_TCP | ETH_RSS_UDP)
37
38 /* Tx/Rx Offloads supported */
39 #define CXGBE_TX_OFFLOADS (DEV_TX_OFFLOAD_VLAN_INSERT | \
40                            DEV_TX_OFFLOAD_IPV4_CKSUM | \
41                            DEV_TX_OFFLOAD_UDP_CKSUM | \
42                            DEV_TX_OFFLOAD_TCP_CKSUM | \
43                            DEV_TX_OFFLOAD_TCP_TSO)
44
45 #define CXGBE_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_STRIP | \
46                            DEV_RX_OFFLOAD_IPV4_CKSUM | \
47                            DEV_RX_OFFLOAD_UDP_CKSUM | \
48                            DEV_RX_OFFLOAD_TCP_CKSUM | \
49                            DEV_RX_OFFLOAD_JUMBO_FRAME | \
50                            DEV_RX_OFFLOAD_SCATTER)
51
52
53 #define CXGBE_DEVARG_KEEP_OVLAN "keep_ovlan"
54 #define CXGBE_DEVARG_FORCE_LINK_UP "force_link_up"
55
56 bool cxgbe_force_linkup(struct adapter *adap);
57 int cxgbe_probe(struct adapter *adapter);
58 int cxgbevf_probe(struct adapter *adapter);
59 void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps);
60 int cxgbe_set_link_status(struct port_info *pi, bool status);
61 int cxgbe_up(struct adapter *adap);
62 int cxgbe_down(struct port_info *pi);
63 void cxgbe_close(struct adapter *adapter);
64 void cxgbe_stats_get(struct port_info *pi, struct port_stats *stats);
65 void cxgbevf_stats_get(struct port_info *pi, struct port_stats *stats);
66 void cxgbe_stats_reset(struct port_info *pi);
67 int cxgbe_poll_for_completion(struct sge_rspq *q, unsigned int us,
68                               unsigned int cnt, struct t4_completion *c);
69 int cxgbe_link_start(struct port_info *pi);
70 int cxgbe_setup_sge_fwevtq(struct adapter *adapter);
71 int cxgbe_setup_sge_ctrl_txq(struct adapter *adapter);
72 void cxgbe_cfg_queues(struct rte_eth_dev *eth_dev);
73 int cxgbe_cfg_queue_count(struct rte_eth_dev *eth_dev);
74 int cxgbe_init_rss(struct adapter *adap);
75 int cxgbe_setup_rss(struct port_info *pi);
76 void cxgbe_enable_rx_queues(struct port_info *pi);
77 void cxgbe_print_port_info(struct adapter *adap);
78 void cxgbe_print_adapter_info(struct adapter *adap);
79 int cxgbe_get_devargs(struct rte_devargs *devargs, const char *key);
80 void cxgbe_configure_max_ethqsets(struct adapter *adapter);
81
82 #endif /* _CXGBE_H_ */