4 * Copyright(c) 2014-2017 Chelsio Communications.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Chelsio Communications nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 #define CXGBE_MIN_RING_DESC_SIZE 128 /* Min TX/RX descriptor ring size */
41 #define CXGBE_MAX_RING_DESC_SIZE 4096 /* Max TX/RX descriptor ring size */
43 #define CXGBE_DEFAULT_TX_DESC_SIZE 1024 /* Default TX ring size */
44 #define CXGBE_DEFAULT_RX_DESC_SIZE 1024 /* Default RX ring size */
46 #define CXGBE_MIN_RX_BUFSIZE ETHER_MIN_MTU /* min buf size */
47 #define CXGBE_MAX_RX_PKTLEN (9000 + ETHER_HDR_LEN + ETHER_CRC_LEN) /* max pkt */
49 #define CXGBE_DEFAULT_RSS_KEY_LEN 40 /* 320-bits */
50 #define CXGBE_RSS_HF_ALL (ETH_RSS_IPV4 | ETH_RSS_IPV6 | \
51 ETH_RSS_NONFRAG_IPV4_TCP | \
52 ETH_RSS_NONFRAG_IPV4_UDP | \
53 ETH_RSS_NONFRAG_IPV6_TCP | \
54 ETH_RSS_NONFRAG_IPV6_UDP)
56 int cxgbe_probe(struct adapter *adapter);
57 int cxgbevf_probe(struct adapter *adapter);
58 void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps);
59 int cxgbe_up(struct adapter *adap);
60 int cxgbe_down(struct port_info *pi);
61 void cxgbe_close(struct adapter *adapter);
62 void cxgbe_stats_get(struct port_info *pi, struct port_stats *stats);
63 void cxgbevf_stats_get(struct port_info *pi, struct port_stats *stats);
64 void cxgbe_stats_reset(struct port_info *pi);
65 int link_start(struct port_info *pi);
66 void init_rspq(struct adapter *adap, struct sge_rspq *q, unsigned int us,
67 unsigned int cnt, unsigned int size, unsigned int iqe_size);
68 int setup_sge_fwevtq(struct adapter *adapter);
69 void cfg_queues(struct rte_eth_dev *eth_dev);
70 int cfg_queue_count(struct rte_eth_dev *eth_dev);
71 int init_rss(struct adapter *adap);
72 int setup_rss(struct port_info *pi);
73 void cxgbe_enable_rx_queues(struct port_info *pi);
74 void print_port_info(struct adapter *adap);
75 void print_adapter_info(struct adapter *adap);
77 #endif /* _CXGBE_H_ */