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[dpdk.git] / drivers / net / cxgbe / cxgbe_ethdev.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2014-2015 Chelsio Communications.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Chelsio Communications nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <sys/queue.h>
35 #include <stdio.h>
36 #include <errno.h>
37 #include <stdint.h>
38 #include <string.h>
39 #include <unistd.h>
40 #include <stdarg.h>
41 #include <inttypes.h>
42 #include <netinet/in.h>
43
44 #include <rte_byteorder.h>
45 #include <rte_common.h>
46 #include <rte_cycles.h>
47 #include <rte_interrupts.h>
48 #include <rte_log.h>
49 #include <rte_debug.h>
50 #include <rte_pci.h>
51 #include <rte_atomic.h>
52 #include <rte_branch_prediction.h>
53 #include <rte_memory.h>
54 #include <rte_memzone.h>
55 #include <rte_tailq.h>
56 #include <rte_eal.h>
57 #include <rte_alarm.h>
58 #include <rte_ether.h>
59 #include <rte_ethdev.h>
60 #include <rte_atomic.h>
61 #include <rte_malloc.h>
62 #include <rte_random.h>
63 #include <rte_dev.h>
64
65 #include "cxgbe.h"
66
67 /*
68  * Macros needed to support the PCI Device ID Table ...
69  */
70 #define CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN \
71         static struct rte_pci_id cxgb4_pci_tbl[] = {
72 #define CH_PCI_DEVICE_ID_FUNCTION 0x4
73
74 #define PCI_VENDOR_ID_CHELSIO 0x1425
75
76 #define CH_PCI_ID_TABLE_ENTRY(devid) \
77                 { RTE_PCI_DEVICE(PCI_VENDOR_ID_CHELSIO, (devid)) }
78
79 #define CH_PCI_DEVICE_ID_TABLE_DEFINE_END \
80                 { .vendor_id = 0, } \
81         }
82
83 /*
84  *... and the PCI ID Table itself ...
85  */
86 #include "t4_pci_id_tbl.h"
87
88 static uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
89                                 uint16_t nb_pkts)
90 {
91         struct sge_eth_txq *txq = (struct sge_eth_txq *)tx_queue;
92         uint16_t pkts_sent, pkts_remain;
93         uint16_t total_sent = 0;
94         int ret = 0;
95
96         CXGBE_DEBUG_TX(adapter, "%s: txq = %p; tx_pkts = %p; nb_pkts = %d\n",
97                        __func__, txq, tx_pkts, nb_pkts);
98
99         t4_os_lock(&txq->txq_lock);
100         /* free up desc from already completed tx */
101         reclaim_completed_tx(&txq->q);
102         while (total_sent < nb_pkts) {
103                 pkts_remain = nb_pkts - total_sent;
104
105                 for (pkts_sent = 0; pkts_sent < pkts_remain; pkts_sent++) {
106                         ret = t4_eth_xmit(txq, tx_pkts[total_sent + pkts_sent]);
107                         if (ret < 0)
108                                 break;
109                 }
110                 if (!pkts_sent)
111                         break;
112                 total_sent += pkts_sent;
113                 /* reclaim as much as possible */
114                 reclaim_completed_tx(&txq->q);
115         }
116
117         t4_os_unlock(&txq->txq_lock);
118         return total_sent;
119 }
120
121 static uint16_t cxgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
122                                 uint16_t nb_pkts)
123 {
124         struct sge_eth_rxq *rxq = (struct sge_eth_rxq *)rx_queue;
125         unsigned int work_done;
126
127         CXGBE_DEBUG_RX(adapter, "%s: rxq->rspq.cntxt_id = %u; nb_pkts = %d\n",
128                        __func__, rxq->rspq.cntxt_id, nb_pkts);
129
130         if (cxgbe_poll(&rxq->rspq, rx_pkts, (unsigned int)nb_pkts, &work_done))
131                 dev_err(adapter, "error in cxgbe poll\n");
132
133         CXGBE_DEBUG_RX(adapter, "%s: work_done = %u\n", __func__, work_done);
134         return work_done;
135 }
136
137 static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
138                                struct rte_eth_dev_info *device_info)
139 {
140         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
141         struct adapter *adapter = pi->adapter;
142         int max_queues = adapter->sge.max_ethqsets / adapter->params.nports;
143
144         device_info->min_rx_bufsize = 68; /* XXX: Smallest pkt size */
145         device_info->max_rx_pktlen = 1500; /* XXX: For now we support mtu */
146         device_info->max_rx_queues = max_queues;
147         device_info->max_tx_queues = max_queues;
148         device_info->max_mac_addrs = 1;
149         /* XXX: For now we support one MAC/port */
150         device_info->max_vfs = adapter->params.arch.vfcount;
151         device_info->max_vmdq_pools = 0; /* XXX: For now no support for VMDQ */
152
153         device_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
154                                        DEV_RX_OFFLOAD_IPV4_CKSUM |
155                                        DEV_RX_OFFLOAD_UDP_CKSUM |
156                                        DEV_RX_OFFLOAD_TCP_CKSUM;
157
158         device_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
159                                        DEV_TX_OFFLOAD_IPV4_CKSUM |
160                                        DEV_TX_OFFLOAD_UDP_CKSUM |
161                                        DEV_TX_OFFLOAD_TCP_CKSUM |
162                                        DEV_TX_OFFLOAD_TCP_TSO;
163
164         device_info->reta_size = pi->rss_size;
165 }
166
167 static void cxgbe_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
168 {
169         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
170         struct adapter *adapter = pi->adapter;
171
172         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
173                       1, -1, 1, -1, false);
174 }
175
176 static void cxgbe_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
177 {
178         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
179         struct adapter *adapter = pi->adapter;
180
181         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
182                       0, -1, 1, -1, false);
183 }
184
185 static void cxgbe_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
186 {
187         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
188         struct adapter *adapter = pi->adapter;
189
190         /* TODO: address filters ?? */
191
192         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
193                       -1, 1, 1, -1, false);
194 }
195
196 static void cxgbe_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
197 {
198         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
199         struct adapter *adapter = pi->adapter;
200
201         /* TODO: address filters ?? */
202
203         t4_set_rxmode(adapter, adapter->mbox, pi->viid, -1,
204                       -1, 0, 1, -1, false);
205 }
206
207 static int cxgbe_dev_link_update(struct rte_eth_dev *eth_dev,
208                                  __rte_unused int wait_to_complete)
209 {
210         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
211         struct adapter *adapter = pi->adapter;
212         struct sge *s = &adapter->sge;
213         struct rte_eth_link *old_link = &eth_dev->data->dev_link;
214         unsigned int work_done, budget = 4;
215
216         cxgbe_poll(&s->fw_evtq, NULL, budget, &work_done);
217         if (old_link->link_status == pi->link_cfg.link_ok)
218                 return -1;  /* link not changed */
219
220         eth_dev->data->dev_link.link_status = pi->link_cfg.link_ok;
221         eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
222         eth_dev->data->dev_link.link_speed = pi->link_cfg.speed;
223
224         /* link has changed */
225         return 0;
226 }
227
228 static int cxgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
229                                     uint16_t tx_queue_id);
230 static int cxgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
231                                     uint16_t tx_queue_id);
232 static void cxgbe_dev_tx_queue_release(void *q);
233 static void cxgbe_dev_rx_queue_release(void *q);
234
235 /*
236  * Stop device.
237  */
238 static void cxgbe_dev_close(struct rte_eth_dev *eth_dev)
239 {
240         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
241         struct adapter *adapter = pi->adapter;
242         int i, dev_down = 0;
243
244         CXGBE_FUNC_TRACE();
245
246         if (!(adapter->flags & FULL_INIT_DONE))
247                 return;
248
249         cxgbe_down(pi);
250
251         /*
252          *  We clear queues only if both tx and rx path of the port
253          *  have been disabled
254          */
255         t4_sge_eth_clear_queues(pi);
256
257         /*  See if all ports are down */
258         for_each_port(adapter, i) {
259                 pi = adap2pinfo(adapter, i);
260                 /*
261                  * Skip first port of the adapter since it will be closed
262                  * by DPDK
263                  */
264                 if (i == 0)
265                         continue;
266                 dev_down += (pi->eth_dev->data->dev_started == 0) ? 1 : 0;
267         }
268
269         /* If rest of the ports are stopped, then free up resources */
270         if (dev_down == (adapter->params.nports - 1))
271                 cxgbe_close(adapter);
272 }
273
274 /* Start the device.
275  * It returns 0 on success.
276  */
277 static int cxgbe_dev_start(struct rte_eth_dev *eth_dev)
278 {
279         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
280         struct adapter *adapter = pi->adapter;
281         int err = 0, i;
282
283         CXGBE_FUNC_TRACE();
284
285         /*
286          * If we don't have a connection to the firmware there's nothing we
287          * can do.
288          */
289         if (!(adapter->flags & FW_OK)) {
290                 err = -ENXIO;
291                 goto out;
292         }
293
294         if (!(adapter->flags & FULL_INIT_DONE)) {
295                 err = cxgbe_up(adapter);
296                 if (err < 0)
297                         goto out;
298         }
299
300         err = setup_rss(pi);
301         if (err)
302                 goto out;
303
304         for (i = 0; i < pi->n_tx_qsets; i++) {
305                 err = cxgbe_dev_tx_queue_start(eth_dev, i);
306                 if (err)
307                         goto out;
308         }
309
310         for (i = 0; i < pi->n_rx_qsets; i++) {
311                 err = cxgbe_dev_rx_queue_start(eth_dev, i);
312                 if (err)
313                         goto out;
314         }
315
316         err = link_start(pi);
317         if (err)
318                 goto out;
319
320 out:
321         return err;
322 }
323
324 /*
325  * Stop device: disable rx and tx functions to allow for reconfiguring.
326  */
327 static void cxgbe_dev_stop(struct rte_eth_dev *eth_dev)
328 {
329         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
330         struct adapter *adapter = pi->adapter;
331
332         CXGBE_FUNC_TRACE();
333
334         if (!(adapter->flags & FULL_INIT_DONE))
335                 return;
336
337         cxgbe_down(pi);
338
339         /*
340          *  We clear queues only if both tx and rx path of the port
341          *  have been disabled
342          */
343         t4_sge_eth_clear_queues(pi);
344 }
345
346 static int cxgbe_dev_configure(struct rte_eth_dev *eth_dev)
347 {
348         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
349         struct adapter *adapter = pi->adapter;
350         int err;
351
352         CXGBE_FUNC_TRACE();
353
354         if (!(adapter->flags & FW_QUEUE_BOUND)) {
355                 err = setup_sge_fwevtq(adapter);
356                 if (err)
357                         return err;
358                 adapter->flags |= FW_QUEUE_BOUND;
359         }
360
361         err = cfg_queue_count(eth_dev);
362         if (err)
363                 return err;
364
365         return 0;
366 }
367
368 static int cxgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
369                                     uint16_t tx_queue_id)
370 {
371         struct sge_eth_txq *txq = (struct sge_eth_txq *)
372                                   (eth_dev->data->tx_queues[tx_queue_id]);
373
374         dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id);
375
376         return t4_sge_eth_txq_start(txq);
377 }
378
379 static int cxgbe_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
380                                    uint16_t tx_queue_id)
381 {
382         struct sge_eth_txq *txq = (struct sge_eth_txq *)
383                                   (eth_dev->data->tx_queues[tx_queue_id]);
384
385         dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id);
386
387         return t4_sge_eth_txq_stop(txq);
388 }
389
390 static int cxgbe_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
391                                     uint16_t queue_idx, uint16_t nb_desc,
392                                     unsigned int socket_id,
393                                     const struct rte_eth_txconf *tx_conf)
394 {
395         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
396         struct adapter *adapter = pi->adapter;
397         struct sge *s = &adapter->sge;
398         struct sge_eth_txq *txq = &s->ethtxq[pi->first_qset + queue_idx];
399         int err = 0;
400         unsigned int temp_nb_desc;
401
402         RTE_SET_USED(tx_conf);
403
404         dev_debug(adapter, "%s: eth_dev->data->nb_tx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id = %d; pi->first_qset = %u\n",
405                   __func__, eth_dev->data->nb_tx_queues, queue_idx, nb_desc,
406                   socket_id, pi->first_qset);
407
408         /*  Free up the existing queue  */
409         if (eth_dev->data->tx_queues[queue_idx]) {
410                 cxgbe_dev_tx_queue_release(eth_dev->data->tx_queues[queue_idx]);
411                 eth_dev->data->tx_queues[queue_idx] = NULL;
412         }
413
414         eth_dev->data->tx_queues[queue_idx] = (void *)txq;
415
416         /* Sanity Checking
417          *
418          * nb_desc should be > 1023 and <= CXGBE_MAX_RING_DESC_SIZE
419          */
420         temp_nb_desc = nb_desc;
421         if (nb_desc < CXGBE_MIN_RING_DESC_SIZE) {
422                 dev_warn(adapter, "%s: number of descriptors must be >= %d. Using default [%d]\n",
423                          __func__, CXGBE_MIN_RING_DESC_SIZE,
424                          CXGBE_DEFAULT_TX_DESC_SIZE);
425                 temp_nb_desc = CXGBE_DEFAULT_TX_DESC_SIZE;
426         } else if (nb_desc > CXGBE_MAX_RING_DESC_SIZE) {
427                 dev_err(adapter, "%s: number of descriptors must be between %d and %d inclusive. Default [%d]\n",
428                         __func__, CXGBE_MIN_RING_DESC_SIZE,
429                         CXGBE_MAX_RING_DESC_SIZE, CXGBE_DEFAULT_TX_DESC_SIZE);
430                 return -(EINVAL);
431         }
432
433         txq->q.size = temp_nb_desc;
434
435         err = t4_sge_alloc_eth_txq(adapter, txq, eth_dev, queue_idx,
436                                    s->fw_evtq.cntxt_id, socket_id);
437
438         dev_debug(adapter, "%s: txq->q.cntxt_id= %d err = %d\n",
439                   __func__, txq->q.cntxt_id, err);
440
441         return err;
442 }
443
444 static void cxgbe_dev_tx_queue_release(void *q)
445 {
446         struct sge_eth_txq *txq = (struct sge_eth_txq *)q;
447
448         if (txq) {
449                 struct port_info *pi = (struct port_info *)
450                                        (txq->eth_dev->data->dev_private);
451                 struct adapter *adap = pi->adapter;
452
453                 dev_debug(adapter, "%s: pi->port_id = %d; tx_queue_id = %d\n",
454                           __func__, pi->port_id, txq->q.cntxt_id);
455
456                 t4_sge_eth_txq_release(adap, txq);
457         }
458 }
459
460 static int cxgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
461                                     uint16_t rx_queue_id)
462 {
463         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
464         struct adapter *adap = pi->adapter;
465         struct sge_rspq *q;
466
467         dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
468                   __func__, pi->port_id, rx_queue_id);
469
470         q = eth_dev->data->rx_queues[rx_queue_id];
471         return t4_sge_eth_rxq_start(adap, q);
472 }
473
474 static int cxgbe_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
475                                    uint16_t rx_queue_id)
476 {
477         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
478         struct adapter *adap = pi->adapter;
479         struct sge_rspq *q;
480
481         dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
482                   __func__, pi->port_id, rx_queue_id);
483
484         q = eth_dev->data->rx_queues[rx_queue_id];
485         return t4_sge_eth_rxq_stop(adap, q);
486 }
487
488 static int cxgbe_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
489                                     uint16_t queue_idx, uint16_t nb_desc,
490                                     unsigned int socket_id,
491                                     const struct rte_eth_rxconf *rx_conf,
492                                     struct rte_mempool *mp)
493 {
494         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
495         struct adapter *adapter = pi->adapter;
496         struct sge *s = &adapter->sge;
497         struct sge_eth_rxq *rxq = &s->ethrxq[pi->first_qset + queue_idx];
498         int err = 0;
499         int msi_idx = 0;
500         unsigned int temp_nb_desc;
501
502         RTE_SET_USED(rx_conf);
503
504         dev_debug(adapter, "%s: eth_dev->data->nb_rx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id = %d; mp = %p\n",
505                   __func__, eth_dev->data->nb_rx_queues, queue_idx, nb_desc,
506                   socket_id, mp);
507
508         /*  Free up the existing queue  */
509         if (eth_dev->data->rx_queues[queue_idx]) {
510                 cxgbe_dev_rx_queue_release(eth_dev->data->rx_queues[queue_idx]);
511                 eth_dev->data->rx_queues[queue_idx] = NULL;
512         }
513
514         eth_dev->data->rx_queues[queue_idx] = (void *)rxq;
515
516         /* Sanity Checking
517          *
518          * nb_desc should be > 0 and <= CXGBE_MAX_RING_DESC_SIZE
519          */
520         temp_nb_desc = nb_desc;
521         if (nb_desc < CXGBE_MIN_RING_DESC_SIZE) {
522                 dev_warn(adapter, "%s: number of descriptors must be >= %d. Using default [%d]\n",
523                          __func__, CXGBE_MIN_RING_DESC_SIZE,
524                          CXGBE_DEFAULT_RX_DESC_SIZE);
525                 temp_nb_desc = CXGBE_DEFAULT_RX_DESC_SIZE;
526         } else if (nb_desc > CXGBE_MAX_RING_DESC_SIZE) {
527                 dev_err(adapter, "%s: number of descriptors must be between %d and %d inclusive. Default [%d]\n",
528                         __func__, CXGBE_MIN_RING_DESC_SIZE,
529                         CXGBE_MAX_RING_DESC_SIZE, CXGBE_DEFAULT_RX_DESC_SIZE);
530                 return -(EINVAL);
531         }
532
533         rxq->rspq.size = temp_nb_desc;
534         if ((&rxq->fl) != NULL)
535                 rxq->fl.size = temp_nb_desc;
536
537         err = t4_sge_alloc_rxq(adapter, &rxq->rspq, false, eth_dev, msi_idx,
538                                &rxq->fl, t4_ethrx_handler,
539                                t4_get_mps_bg_map(adapter, pi->tx_chan), mp,
540                                queue_idx, socket_id);
541
542         dev_debug(adapter, "%s: err = %d; port_id = %d; cntxt_id = %u\n",
543                   __func__, err, pi->port_id, rxq->rspq.cntxt_id);
544         return err;
545 }
546
547 static void cxgbe_dev_rx_queue_release(void *q)
548 {
549         struct sge_eth_rxq *rxq = (struct sge_eth_rxq *)q;
550         struct sge_rspq *rq = &rxq->rspq;
551
552         if (rq) {
553                 struct port_info *pi = (struct port_info *)
554                                        (rq->eth_dev->data->dev_private);
555                 struct adapter *adap = pi->adapter;
556
557                 dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
558                           __func__, pi->port_id, rxq->rspq.cntxt_id);
559
560                 t4_sge_eth_rxq_release(adap, rxq);
561         }
562 }
563
564 /*
565  * Get port statistics.
566  */
567 static void cxgbe_dev_stats_get(struct rte_eth_dev *eth_dev,
568                                 struct rte_eth_stats *eth_stats)
569 {
570         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
571         struct adapter *adapter = pi->adapter;
572         struct sge *s = &adapter->sge;
573         struct port_stats ps;
574         unsigned int i;
575
576         cxgbe_stats_get(pi, &ps);
577
578         /* RX Stats */
579         eth_stats->ipackets = ps.rx_frames;
580         eth_stats->ibytes   = ps.rx_octets;
581         eth_stats->imcasts  = ps.rx_mcast_frames;
582         eth_stats->imissed  = ps.rx_ovflow0 + ps.rx_ovflow1 +
583                               ps.rx_ovflow2 + ps.rx_ovflow3 +
584                               ps.rx_trunc0 + ps.rx_trunc1 +
585                               ps.rx_trunc2 + ps.rx_trunc3;
586         eth_stats->ibadcrc  = ps.rx_fcs_err;
587         eth_stats->ibadlen  = ps.rx_jabber + ps.rx_too_long + ps.rx_runt;
588         eth_stats->ierrors  = ps.rx_symbol_err + eth_stats->ibadcrc +
589                               eth_stats->ibadlen + ps.rx_len_err +
590                               eth_stats->imissed;
591         eth_stats->rx_pause_xon  = ps.rx_pause;
592
593         /* TX Stats */
594         eth_stats->opackets = ps.tx_frames;
595         eth_stats->obytes   = ps.tx_octets;
596         eth_stats->oerrors  = ps.tx_error_frames;
597         eth_stats->tx_pause_xon  = ps.tx_pause;
598
599         for (i = 0; i < pi->n_rx_qsets; i++) {
600                 struct sge_eth_rxq *rxq =
601                         &s->ethrxq[pi->first_qset + i];
602
603                 eth_stats->q_ipackets[i] = rxq->stats.pkts;
604                 eth_stats->q_ibytes[i] = rxq->stats.rx_bytes;
605         }
606
607         for (i = 0; i < pi->n_tx_qsets; i++) {
608                 struct sge_eth_txq *txq =
609                         &s->ethtxq[pi->first_qset + i];
610
611                 eth_stats->q_opackets[i] = txq->stats.pkts;
612                 eth_stats->q_obytes[i] = txq->stats.tx_bytes;
613                 eth_stats->q_errors[i] = txq->stats.mapping_err;
614         }
615 }
616
617 /*
618  * Reset port statistics.
619  */
620 static void cxgbe_dev_stats_reset(struct rte_eth_dev *eth_dev)
621 {
622         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
623         struct adapter *adapter = pi->adapter;
624         struct sge *s = &adapter->sge;
625         unsigned int i;
626
627         cxgbe_stats_reset(pi);
628         for (i = 0; i < pi->n_rx_qsets; i++) {
629                 struct sge_eth_rxq *rxq =
630                         &s->ethrxq[pi->first_qset + i];
631
632                 rxq->stats.pkts = 0;
633                 rxq->stats.rx_bytes = 0;
634         }
635         for (i = 0; i < pi->n_tx_qsets; i++) {
636                 struct sge_eth_txq *txq =
637                         &s->ethtxq[pi->first_qset + i];
638
639                 txq->stats.pkts = 0;
640                 txq->stats.tx_bytes = 0;
641                 txq->stats.mapping_err = 0;
642         }
643 }
644
645 static int cxgbe_flow_ctrl_get(struct rte_eth_dev *eth_dev,
646                                struct rte_eth_fc_conf *fc_conf)
647 {
648         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
649         struct link_config *lc = &pi->link_cfg;
650         int rx_pause, tx_pause;
651
652         fc_conf->autoneg = lc->fc & PAUSE_AUTONEG;
653         rx_pause = lc->fc & PAUSE_RX;
654         tx_pause = lc->fc & PAUSE_TX;
655
656         if (rx_pause && tx_pause)
657                 fc_conf->mode = RTE_FC_FULL;
658         else if (rx_pause)
659                 fc_conf->mode = RTE_FC_RX_PAUSE;
660         else if (tx_pause)
661                 fc_conf->mode = RTE_FC_TX_PAUSE;
662         else
663                 fc_conf->mode = RTE_FC_NONE;
664         return 0;
665 }
666
667 static int cxgbe_flow_ctrl_set(struct rte_eth_dev *eth_dev,
668                                struct rte_eth_fc_conf *fc_conf)
669 {
670         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
671         struct adapter *adapter = pi->adapter;
672         struct link_config *lc = &pi->link_cfg;
673
674         if (lc->supported & FW_PORT_CAP_ANEG) {
675                 if (fc_conf->autoneg)
676                         lc->requested_fc |= PAUSE_AUTONEG;
677                 else
678                         lc->requested_fc &= ~PAUSE_AUTONEG;
679         }
680
681         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
682             (fc_conf->mode & RTE_FC_RX_PAUSE))
683                 lc->requested_fc |= PAUSE_RX;
684         else
685                 lc->requested_fc &= ~PAUSE_RX;
686
687         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
688             (fc_conf->mode & RTE_FC_TX_PAUSE))
689                 lc->requested_fc |= PAUSE_TX;
690         else
691                 lc->requested_fc &= ~PAUSE_TX;
692
693         return t4_link_l1cfg(adapter, adapter->mbox, pi->tx_chan,
694                              &pi->link_cfg);
695 }
696
697 static struct eth_dev_ops cxgbe_eth_dev_ops = {
698         .dev_start              = cxgbe_dev_start,
699         .dev_stop               = cxgbe_dev_stop,
700         .dev_close              = cxgbe_dev_close,
701         .promiscuous_enable     = cxgbe_dev_promiscuous_enable,
702         .promiscuous_disable    = cxgbe_dev_promiscuous_disable,
703         .allmulticast_enable    = cxgbe_dev_allmulticast_enable,
704         .allmulticast_disable   = cxgbe_dev_allmulticast_disable,
705         .dev_configure          = cxgbe_dev_configure,
706         .dev_infos_get          = cxgbe_dev_info_get,
707         .link_update            = cxgbe_dev_link_update,
708         .tx_queue_setup         = cxgbe_dev_tx_queue_setup,
709         .tx_queue_start         = cxgbe_dev_tx_queue_start,
710         .tx_queue_stop          = cxgbe_dev_tx_queue_stop,
711         .tx_queue_release       = cxgbe_dev_tx_queue_release,
712         .rx_queue_setup         = cxgbe_dev_rx_queue_setup,
713         .rx_queue_start         = cxgbe_dev_rx_queue_start,
714         .rx_queue_stop          = cxgbe_dev_rx_queue_stop,
715         .rx_queue_release       = cxgbe_dev_rx_queue_release,
716         .stats_get              = cxgbe_dev_stats_get,
717         .stats_reset            = cxgbe_dev_stats_reset,
718         .flow_ctrl_get          = cxgbe_flow_ctrl_get,
719         .flow_ctrl_set          = cxgbe_flow_ctrl_set,
720 };
721
722 /*
723  * Initialize driver
724  * It returns 0 on success.
725  */
726 static int eth_cxgbe_dev_init(struct rte_eth_dev *eth_dev)
727 {
728         struct rte_pci_device *pci_dev;
729         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
730         struct adapter *adapter = NULL;
731         char name[RTE_ETH_NAME_MAX_LEN];
732         int err = 0;
733
734         CXGBE_FUNC_TRACE();
735
736         eth_dev->dev_ops = &cxgbe_eth_dev_ops;
737         eth_dev->rx_pkt_burst = &cxgbe_recv_pkts;
738         eth_dev->tx_pkt_burst = &cxgbe_xmit_pkts;
739
740         /* for secondary processes, we don't initialise any further as primary
741          * has already done this work.
742          */
743         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
744                 return 0;
745
746         pci_dev = eth_dev->pci_dev;
747         snprintf(name, sizeof(name), "cxgbeadapter%d", eth_dev->data->port_id);
748         adapter = rte_zmalloc(name, sizeof(*adapter), 0);
749         if (!adapter)
750                 return -1;
751
752         adapter->use_unpacked_mode = 1;
753         adapter->regs = (void *)pci_dev->mem_resource[0].addr;
754         if (!adapter->regs) {
755                 dev_err(adapter, "%s: cannot map device registers\n", __func__);
756                 err = -ENOMEM;
757                 goto out_free_adapter;
758         }
759         adapter->pdev = pci_dev;
760         adapter->eth_dev = eth_dev;
761         pi->adapter = adapter;
762
763         err = cxgbe_probe(adapter);
764         if (err)
765                 dev_err(adapter, "%s: cxgbe probe failed with err %d\n",
766                         __func__, err);
767
768 out_free_adapter:
769         return err;
770 }
771
772 static struct eth_driver rte_cxgbe_pmd = {
773         {
774                 .name = "rte_cxgbe_pmd",
775                 .id_table = cxgb4_pci_tbl,
776                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
777         },
778         .eth_dev_init = eth_cxgbe_dev_init,
779         .dev_private_size = sizeof(struct port_info),
780 };
781
782 /*
783  * Driver initialization routine.
784  * Invoked once at EAL init time.
785  * Register itself as the [Poll Mode] Driver of PCI CXGBE devices.
786  */
787 static int rte_cxgbe_pmd_init(const char *name __rte_unused,
788                               const char *params __rte_unused)
789 {
790         CXGBE_FUNC_TRACE();
791
792         rte_eth_driver_register(&rte_cxgbe_pmd);
793         return 0;
794 }
795
796 static struct rte_driver rte_cxgbe_driver = {
797         .name = "cxgbe_driver",
798         .type = PMD_PDEV,
799         .init = rte_cxgbe_pmd_init,
800 };
801
802 PMD_REGISTER_DRIVER(rte_cxgbe_driver);