1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Chelsio Communications.
6 #include "base/common.h"
10 * cxgbe_l2t_release - Release associated L2T entry
11 * @e: L2T entry to release
13 * Releases ref count and frees up an L2T entry from L2T table
15 void cxgbe_l2t_release(struct l2t_entry *e)
17 if (rte_atomic32_read(&e->refcnt) != 0)
18 rte_atomic32_dec(&e->refcnt);
22 * Process a CPL_L2T_WRITE_RPL. Note that the TID in the reply is really
23 * the L2T index it refers to.
25 void do_l2t_write_rpl(struct adapter *adap, const struct cpl_l2t_write_rpl *rpl)
27 struct l2t_data *d = adap->l2t;
28 unsigned int tid = GET_TID(rpl);
29 unsigned int l2t_idx = tid % L2T_SIZE;
31 if (unlikely(rpl->status != CPL_ERR_NONE)) {
33 "Unexpected L2T_WRITE_RPL status %u for entry %u\n",
34 rpl->status, l2t_idx);
38 if (tid & F_SYNC_WR) {
39 struct l2t_entry *e = &d->l2tab[l2t_idx - d->l2t_start];
42 if (e->state != L2T_STATE_SWITCHING)
43 e->state = L2T_STATE_VALID;
44 t4_os_unlock(&e->lock);
49 * Write an L2T entry. Must be called with the entry locked.
50 * The write may be synchronous or asynchronous.
52 static int write_l2e(struct rte_eth_dev *dev, struct l2t_entry *e, int sync,
53 bool loopback, bool arpmiss)
55 struct adapter *adap = ethdev2adap(dev);
56 struct l2t_data *d = adap->l2t;
57 struct rte_mbuf *mbuf;
58 struct cpl_l2t_write_req *req;
59 struct sge_ctrl_txq *ctrlq;
60 unsigned int l2t_idx = e->idx + d->l2t_start;
61 unsigned int port_id = ethdev2pinfo(dev)->port_id;
63 ctrlq = &adap->sge.ctrlq[port_id];
64 mbuf = rte_pktmbuf_alloc(ctrlq->mb_pool);
68 mbuf->data_len = sizeof(*req);
69 mbuf->pkt_len = mbuf->data_len;
71 req = rte_pktmbuf_mtod(mbuf, struct cpl_l2t_write_req *);
75 cpu_to_be32(MK_OPCODE_TID(CPL_L2T_WRITE_REQ,
76 l2t_idx | V_SYNC_WR(sync) |
77 V_TID_QID(adap->sge.fw_evtq.abs_id)));
78 req->params = cpu_to_be16(V_L2T_W_PORT(e->lport) |
79 V_L2T_W_LPBK(loopback) |
80 V_L2T_W_ARPMISS(arpmiss) |
81 V_L2T_W_NOREPLY(!sync));
82 req->l2t_idx = cpu_to_be16(l2t_idx);
83 req->vlan = cpu_to_be16(e->vlan);
84 rte_memcpy(req->dst_mac, e->dmac, RTE_ETHER_ADDR_LEN);
87 memset(req->dst_mac, 0, RTE_ETHER_ADDR_LEN);
89 t4_mgmt_tx(ctrlq, mbuf);
91 if (sync && e->state != L2T_STATE_SWITCHING)
92 e->state = L2T_STATE_SYNC_WRITE;
98 * find_or_alloc_l2e - Find/Allocate a free L2T entry
100 * @vlan: VLAN id to compare/add
101 * @port: port id to compare/add
102 * @dmac: Destination MAC address to compare/add
103 * Returns pointer to the L2T entry found/created
105 * Finds/Allocates an L2T entry to be used by switching rule of a filter.
107 static struct l2t_entry *find_or_alloc_l2e(struct l2t_data *d, u16 vlan,
110 struct l2t_entry *end, *e;
111 struct l2t_entry *first_free = NULL;
113 for (e = &d->l2tab[0], end = &d->l2tab[d->l2t_size]; e != end; ++e) {
114 if (rte_atomic32_read(&e->refcnt) == 0) {
118 if (e->state == L2T_STATE_SWITCHING) {
119 if ((!memcmp(e->dmac, dmac, RTE_ETHER_ADDR_LEN)) &&
120 e->vlan == vlan && e->lport == port)
134 e->state = L2T_STATE_UNUSED;
140 static struct l2t_entry *t4_l2t_alloc_switching(struct rte_eth_dev *dev,
144 struct adapter *adap = ethdev2adap(dev);
145 struct l2t_data *d = adap->l2t;
149 t4_os_write_lock(&d->lock);
150 e = find_or_alloc_l2e(d, vlan, port, eth_addr);
152 t4_os_lock(&e->lock);
153 if (!rte_atomic32_read(&e->refcnt)) {
154 e->state = L2T_STATE_SWITCHING;
157 rte_memcpy(e->dmac, eth_addr, RTE_ETHER_ADDR_LEN);
158 rte_atomic32_set(&e->refcnt, 1);
159 ret = write_l2e(dev, e, 0, !L2T_LPBK, !L2T_ARPMISS);
161 dev_debug(adap, "Failed to write L2T entry: %d",
164 rte_atomic32_inc(&e->refcnt);
166 t4_os_unlock(&e->lock);
168 t4_os_write_unlock(&d->lock);
170 return ret ? NULL : e;
174 * cxgbe_l2t_alloc_switching - Allocate a L2T entry for switching rule
175 * @dev: rte_eth_dev pointer
177 * @port: Associated port
178 * @dmac: Destination MAC address to add to L2T
179 * Returns pointer to the allocated l2t entry
181 * Allocates a L2T entry for use by switching rule of a filter
183 struct l2t_entry *cxgbe_l2t_alloc_switching(struct rte_eth_dev *dev, u16 vlan,
186 return t4_l2t_alloc_switching(dev, vlan, port, dmac);
190 * Initialize L2 Table
192 struct l2t_data *t4_init_l2t(unsigned int l2t_start, unsigned int l2t_end)
194 unsigned int l2t_size;
198 if (l2t_start >= l2t_end || l2t_end >= L2T_SIZE)
200 l2t_size = l2t_end - l2t_start + 1;
202 d = t4_os_alloc(sizeof(*d) + l2t_size * sizeof(struct l2t_entry));
206 d->l2t_start = l2t_start;
207 d->l2t_size = l2t_size;
209 t4_os_rwlock_init(&d->lock);
211 for (i = 0; i < d->l2t_size; ++i) {
213 d->l2tab[i].state = L2T_STATE_UNUSED;
214 t4_os_lock_init(&d->l2tab[i].lock);
215 rte_atomic32_set(&d->l2tab[i].refcnt, 0);
224 void t4_cleanup_l2t(struct adapter *adap)
227 t4_os_free(adap->l2t);