drivers/net/dpaa/dpaa_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017 NXP
   5  *
   6  */
   7 /* System headers */
   8 #include <stdio.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <limits.h>
  12 #include <sched.h>
  13 #include <signal.h>
  14 #include <pthread.h>
  15 #include <sys/types.h>
  16 #include <sys/syscall.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_common.h>
  20 #include <rte_interrupts.h>
  21 #include <rte_log.h>
  22 #include <rte_debug.h>
  23 #include <rte_pci.h>
  24 #include <rte_atomic.h>
  25 #include <rte_branch_prediction.h>
  26 #include <rte_memory.h>
  27 #include <rte_tailq.h>
  28 #include <rte_eal.h>
  29 #include <rte_alarm.h>
  30 #include <rte_ether.h>
  31 #include <rte_ethdev_driver.h>
  32 #include <rte_malloc.h>
  33 #include <rte_ring.h>
  34
  35 #include <rte_dpaa_bus.h>
  36 #include <rte_dpaa_logs.h>
  37 #include <dpaa_mempool.h>
  38
  39 #include <dpaa_ethdev.h>
  40 #include <dpaa_rxtx.h>
  41 #include <rte_pmd_dpaa.h>
  42
  43 #include <fsl_usd.h>
  44 #include <fsl_qman.h>
  45 #include <fsl_bman.h>
  46 #include <fsl_fman.h>
  47
  48 /* Supported Rx offloads */
  49 static uint64_t dev_rx_offloads_sup =
  50                 DEV_RX_OFFLOAD_JUMBO_FRAME;
  51
  52 /* Rx offloads which cannot be disabled */
  53 static uint64_t dev_rx_offloads_nodis =
  54                 DEV_RX_OFFLOAD_IPV4_CKSUM |
  55                 DEV_RX_OFFLOAD_UDP_CKSUM |
  56                 DEV_RX_OFFLOAD_TCP_CKSUM |
  57                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  58                 DEV_RX_OFFLOAD_SCATTER;
  59
  60 /* Supported Tx offloads */
  61 static uint64_t dev_tx_offloads_sup;
  62
  63 /* Tx offloads which cannot be disabled */
  64 static uint64_t dev_tx_offloads_nodis =
  65                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  66                 DEV_TX_OFFLOAD_UDP_CKSUM |
  67                 DEV_TX_OFFLOAD_TCP_CKSUM |
  68                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  69                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  70                 DEV_TX_OFFLOAD_MULTI_SEGS |
  71                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  72                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  73
  74 /* Keep track of whether QMAN and BMAN have been globally initialized */
  75 static int is_global_init;
  76 static int default_q;   /* use default queue - FMC is not executed*/
  77 /* At present we only allow up to 4 push mode queues as default - as each of
  78  * this queue need dedicated portal and we are short of portals.
  79  */
  80 #define DPAA_MAX_PUSH_MODE_QUEUE       8
  81 #define DPAA_DEFAULT_PUSH_MODE_QUEUE   4
  82
  83 static int dpaa_push_mode_max_queue = DPAA_DEFAULT_PUSH_MODE_QUEUE;
  84 static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
  85
  86
  87 /* Per FQ Taildrop in frame count */
  88 static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
  89
  90 struct rte_dpaa_xstats_name_off {
  91         char name[RTE_ETH_XSTATS_NAME_SIZE];
  92         uint32_t offset;
  93 };
  94
  95 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
  96         {"rx_align_err",
  97                 offsetof(struct dpaa_if_stats, raln)},
  98         {"rx_valid_pause",
  99                 offsetof(struct dpaa_if_stats, rxpf)},
 100         {"rx_fcs_err",
 101                 offsetof(struct dpaa_if_stats, rfcs)},
 102         {"rx_vlan_frame",
 103                 offsetof(struct dpaa_if_stats, rvlan)},
 104         {"rx_frame_err",
 105                 offsetof(struct dpaa_if_stats, rerr)},
 106         {"rx_drop_err",
 107                 offsetof(struct dpaa_if_stats, rdrp)},
 108         {"rx_undersized",
 109                 offsetof(struct dpaa_if_stats, rund)},
 110         {"rx_oversize_err",
 111                 offsetof(struct dpaa_if_stats, rovr)},
 112         {"rx_fragment_pkt",
 113                 offsetof(struct dpaa_if_stats, rfrg)},
 114         {"tx_valid_pause",
 115                 offsetof(struct dpaa_if_stats, txpf)},
 116         {"tx_fcs_err",
 117                 offsetof(struct dpaa_if_stats, terr)},
 118         {"tx_vlan_frame",
 119                 offsetof(struct dpaa_if_stats, tvlan)},
 120         {"rx_undersized",
 121                 offsetof(struct dpaa_if_stats, tund)},
 122 };
 123
 124 static struct rte_dpaa_driver rte_dpaa_pmd;
 125
 126 static void
 127 dpaa_eth_dev_info(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info);
 128
 129 static inline void
 130 dpaa_poll_queue_default_config(struct qm_mcc_initfq *opts)
 131 {
 132         memset(opts, 0, sizeof(struct qm_mcc_initfq));
 133         opts->we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 134         opts->fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
 135                            QM_FQCTRL_PREFERINCACHE;
 136         opts->fqd.context_a.stashing.exclusive = 0;
 137         if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 138                 opts->fqd.context_a.stashing.annotation_cl =
 139                                                 DPAA_IF_RX_ANNOTATION_STASH;
 140         opts->fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 141         opts->fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
 142 }
 143
 144 static int
 145 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 146 {
 147         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 148         uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
 149                                 + VLAN_TAG_SIZE;
 150
 151         PMD_INIT_FUNC_TRACE();
 152
 153         if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN)
 154                 return -EINVAL;
 155         if (frame_size > ETHER_MAX_LEN)
 156                 dev->data->dev_conf.rxmode.offloads &=
 157                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 158         else
 159                 dev->data->dev_conf.rxmode.offloads &=
 160                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 161
 162         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 163
 164         fman_if_set_maxfrm(dpaa_intf->fif, frame_size);
 165
 166         return 0;
 167 }
 168
 169 static int
 170 dpaa_eth_dev_configure(struct rte_eth_dev *dev)
 171 {
 172         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 173         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 174         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 175         uint64_t tx_offloads = eth_conf->txmode.offloads;
 176
 177         PMD_INIT_FUNC_TRACE();
 178
 179         /* Rx offloads validation */
 180         if (dev_rx_offloads_nodis & ~rx_offloads) {
 181                 DPAA_PMD_WARN(
 182                 "Rx offloads non configurable - requested 0x%" PRIx64
 183                 " ignored 0x%" PRIx64,
 184                         rx_offloads, dev_rx_offloads_nodis);
 185         }
 186
 187         /* Tx offloads validation */
 188         if (dev_tx_offloads_nodis & ~tx_offloads) {
 189                 DPAA_PMD_WARN(
 190                 "Tx offloads non configurable - requested 0x%" PRIx64
 191                 " ignored 0x%" PRIx64,
 192                         tx_offloads, dev_tx_offloads_nodis);
 193         }
 194
 195         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 196                 uint32_t max_len;
 197
 198                 DPAA_PMD_DEBUG("enabling jumbo");
 199
 200                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
 201                     DPAA_MAX_RX_PKT_LEN)
 202                         max_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
 203                 else {
 204                         DPAA_PMD_INFO("enabling jumbo override conf max len=%d "
 205                                 "supported is %d",
 206                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
 207                                 DPAA_MAX_RX_PKT_LEN);
 208                         max_len = DPAA_MAX_RX_PKT_LEN;
 209                 }
 210
 211                 fman_if_set_maxfrm(dpaa_intf->fif, max_len);
 212                 dev->data->mtu = max_len
 213                                 - ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 214         }
 215         return 0;
 216 }
 217
 218 static const uint32_t *
 219 dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
 220 {
 221         static const uint32_t ptypes[] = {
 222                 /*todo -= add more types */
 223                 RTE_PTYPE_L2_ETHER,
 224                 RTE_PTYPE_L3_IPV4,
 225                 RTE_PTYPE_L3_IPV4_EXT,
 226                 RTE_PTYPE_L3_IPV6,
 227                 RTE_PTYPE_L3_IPV6_EXT,
 228                 RTE_PTYPE_L4_TCP,
 229                 RTE_PTYPE_L4_UDP,
 230                 RTE_PTYPE_L4_SCTP
 231         };
 232
 233         PMD_INIT_FUNC_TRACE();
 234
 235         if (dev->rx_pkt_burst == dpaa_eth_queue_rx)
 236                 return ptypes;
 237         return NULL;
 238 }
 239
 240 static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 241 {
 242         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 243
 244         PMD_INIT_FUNC_TRACE();
 245
 246         /* Change tx callback to the real one */
 247         dev->tx_pkt_burst = dpaa_eth_queue_tx;
 248         fman_if_enable_rx(dpaa_intf->fif);
 249
 250         return 0;
 251 }
 252
 253 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 254 {
 255         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 256
 257         PMD_INIT_FUNC_TRACE();
 258
 259         fman_if_disable_rx(dpaa_intf->fif);
 260         dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 261 }
 262
 263 static void dpaa_eth_dev_close(struct rte_eth_dev *dev)
 264 {
 265         PMD_INIT_FUNC_TRACE();
 266
 267         dpaa_eth_dev_stop(dev);
 268 }
 269
 270 static int
 271 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
 272                      char *fw_version,
 273                      size_t fw_size)
 274 {
 275         int ret;
 276         FILE *svr_file = NULL;
 277         unsigned int svr_ver = 0;
 278
 279         PMD_INIT_FUNC_TRACE();
 280
 281         svr_file = fopen(DPAA_SOC_ID_FILE, "r");
 282         if (!svr_file) {
 283                 DPAA_PMD_ERR("Unable to open SoC device");
 284                 return -ENOTSUP; /* Not supported on this infra */
 285         }
 286         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
 287                 dpaa_svr_family = svr_ver & SVR_MASK;
 288         else
 289                 DPAA_PMD_ERR("Unable to read SoC device");
 290
 291         fclose(svr_file);
 292
 293         ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
 294                        svr_ver, fman_ip_rev);
 295         ret += 1; /* add the size of '\0' */
 296
 297         if (fw_size < (uint32_t)ret)
 298                 return ret;
 299         else
 300                 return 0;
 301 }
 302
 303 static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 304                               struct rte_eth_dev_info *dev_info)
 305 {
 306         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 307
 308         PMD_INIT_FUNC_TRACE();
 309
 310         dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 311         dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
 312         dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE;
 313         dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
 314         dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
 315         dev_info->max_hash_mac_addrs = 0;
 316         dev_info->max_vfs = 0;
 317         dev_info->max_vmdq_pools = ETH_16_POOLS;
 318         dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
 319         dev_info->speed_capa = (ETH_LINK_SPEED_1G |
 320                                 ETH_LINK_SPEED_10G);
 321         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 322                                         dev_rx_offloads_nodis;
 323         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 324                                         dev_tx_offloads_nodis;
 325         dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE;
 326         dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE;
 327 }
 328
 329 static int dpaa_eth_link_update(struct rte_eth_dev *dev,
 330                                 int wait_to_complete __rte_unused)
 331 {
 332         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 333         struct rte_eth_link *link = &dev->data->dev_link;
 334
 335         PMD_INIT_FUNC_TRACE();
 336
 337         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 338                 link->link_speed = ETH_SPEED_NUM_1G;
 339         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 340                 link->link_speed = ETH_SPEED_NUM_10G;
 341         else
 342                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 343                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 344
 345         link->link_status = dpaa_intf->valid;
 346         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 347         link->link_autoneg = ETH_LINK_AUTONEG;
 348         return 0;
 349 }
 350
 351 static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
 352                                struct rte_eth_stats *stats)
 353 {
 354         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 355
 356         PMD_INIT_FUNC_TRACE();
 357
 358         fman_if_stats_get(dpaa_intf->fif, stats);
 359         return 0;
 360 }
 361
 362 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
 363 {
 364         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 365
 366         PMD_INIT_FUNC_TRACE();
 367
 368         fman_if_stats_reset(dpaa_intf->fif);
 369 }
 370
 371 static int
 372 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 373                     unsigned int n)
 374 {
 375         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 376         unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
 377         uint64_t values[sizeof(struct dpaa_if_stats) / 8];
 378
 379         if (n < num)
 380                 return num;
 381
 382         if (xstats == NULL)
 383                 return 0;
 384
 385         fman_if_stats_get_all(dpaa_intf->fif, values,
 386                               sizeof(struct dpaa_if_stats) / 8);
 387
 388         for (i = 0; i < num; i++) {
 389                 xstats[i].id = i;
 390                 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
 391         }
 392         return i;
 393 }
 394
 395 static int
 396 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 397                       struct rte_eth_xstat_name *xstats_names,
 398                       unsigned int limit)
 399 {
 400         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 401
 402         if (limit < stat_cnt)
 403                 return stat_cnt;
 404
 405         if (xstats_names != NULL)
 406                 for (i = 0; i < stat_cnt; i++)
 407                         snprintf(xstats_names[i].name,
 408                                  sizeof(xstats_names[i].name),
 409                                  "%s",
 410                                  dpaa_xstats_strings[i].name);
 411
 412         return stat_cnt;
 413 }
 414
 415 static int
 416 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 417                       uint64_t *values, unsigned int n)
 418 {
 419         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 420         uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
 421
 422         if (!ids) {
 423                 struct dpaa_if *dpaa_intf = dev->data->dev_private;
 424
 425                 if (n < stat_cnt)
 426                         return stat_cnt;
 427
 428                 if (!values)
 429                         return 0;
 430
 431                 fman_if_stats_get_all(dpaa_intf->fif, values_copy,
 432                                       sizeof(struct dpaa_if_stats) / 8);
 433
 434                 for (i = 0; i < stat_cnt; i++)
 435                         values[i] =
 436                                 values_copy[dpaa_xstats_strings[i].offset / 8];
 437
 438                 return stat_cnt;
 439         }
 440
 441         dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
 442
 443         for (i = 0; i < n; i++) {
 444                 if (ids[i] >= stat_cnt) {
 445                         DPAA_PMD_ERR("id value isn't valid");
 446                         return -1;
 447                 }
 448                 values[i] = values_copy[ids[i]];
 449         }
 450         return n;
 451 }
 452
 453 static int
 454 dpaa_xstats_get_names_by_id(
 455         struct rte_eth_dev *dev,
 456         struct rte_eth_xstat_name *xstats_names,
 457         const uint64_t *ids,
 458         unsigned int limit)
 459 {
 460         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 461         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
 462
 463         if (!ids)
 464                 return dpaa_xstats_get_names(dev, xstats_names, limit);
 465
 466         dpaa_xstats_get_names(dev, xstats_names_copy, limit);
 467
 468         for (i = 0; i < limit; i++) {
 469                 if (ids[i] >= stat_cnt) {
 470                         DPAA_PMD_ERR("id value isn't valid");
 471                         return -1;
 472                 }
 473                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 474         }
 475         return limit;
 476 }
 477
 478 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
 479 {
 480         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 481
 482         PMD_INIT_FUNC_TRACE();
 483
 484         fman_if_promiscuous_enable(dpaa_intf->fif);
 485 }
 486
 487 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
 488 {
 489         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 490
 491         PMD_INIT_FUNC_TRACE();
 492
 493         fman_if_promiscuous_disable(dpaa_intf->fif);
 494 }
 495
 496 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
 497 {
 498         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 499
 500         PMD_INIT_FUNC_TRACE();
 501
 502         fman_if_set_mcast_filter_table(dpaa_intf->fif);
 503 }
 504
 505 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
 506 {
 507         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 508
 509         PMD_INIT_FUNC_TRACE();
 510
 511         fman_if_reset_mcast_filter_table(dpaa_intf->fif);
 512 }
 513
 514 static
 515 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 516                             uint16_t nb_desc,
 517                             unsigned int socket_id __rte_unused,
 518                             const struct rte_eth_rxconf *rx_conf __rte_unused,
 519                             struct rte_mempool *mp)
 520 {
 521         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 522         struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
 523         struct qm_mcc_initfq opts = {0};
 524         u32 flags = 0;
 525         int ret;
 526
 527         PMD_INIT_FUNC_TRACE();
 528
 529         if (queue_idx >= dev->data->nb_rx_queues) {
 530                 rte_errno = EOVERFLOW;
 531                 DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
 532                       (void *)dev, queue_idx, dev->data->nb_rx_queues);
 533                 return -rte_errno;
 534         }
 535
 536         DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)",
 537                         queue_idx, rxq->fqid);
 538
 539         if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
 540                 struct fman_if_ic_params icp;
 541                 uint32_t fd_offset;
 542                 uint32_t bp_size;
 543
 544                 if (!mp->pool_data) {
 545                         DPAA_PMD_ERR("Not an offloaded buffer pool!");
 546                         return -1;
 547                 }
 548                 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 549
 550                 memset(&icp, 0, sizeof(icp));
 551                 /* set ICEOF for to the default value , which is 0*/
 552                 icp.iciof = DEFAULT_ICIOF;
 553                 icp.iceof = DEFAULT_RX_ICEOF;
 554                 icp.icsz = DEFAULT_ICSZ;
 555                 fman_if_set_ic_params(dpaa_intf->fif, &icp);
 556
 557                 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
 558                 fman_if_set_fdoff(dpaa_intf->fif, fd_offset);
 559
 560                 /* Buffer pool size should be equal to Dataroom Size*/
 561                 bp_size = rte_pktmbuf_data_room_size(mp);
 562                 fman_if_set_bp(dpaa_intf->fif, mp->size,
 563                                dpaa_intf->bp_info->bpid, bp_size);
 564                 dpaa_intf->valid = 1;
 565                 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d",
 566                             dpaa_intf->name, fd_offset,
 567                         fman_if_get_fdoff(dpaa_intf->fif));
 568         }
 569         /* checking if push mode only, no error check for now */
 570         if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 571                 dpaa_push_queue_idx++;
 572                 opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 573                 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
 574                                    QM_FQCTRL_CTXASTASHING |
 575                                    QM_FQCTRL_PREFERINCACHE;
 576                 opts.fqd.context_a.stashing.exclusive = 0;
 577                 /* In muticore scenario stashing becomes a bottleneck on LS1046.
 578                  * So do not enable stashing in this case
 579                  */
 580                 if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 581                         opts.fqd.context_a.stashing.annotation_cl =
 582                                                 DPAA_IF_RX_ANNOTATION_STASH;
 583                 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 584                 opts.fqd.context_a.stashing.context_cl =
 585                                                 DPAA_IF_RX_CONTEXT_STASH;
 586
 587                 /*Create a channel and associate given queue with the channel*/
 588                 qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
 589                 opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 590                 opts.fqd.dest.channel = rxq->ch_id;
 591                 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
 592                 flags = QMAN_INITFQ_FLAG_SCHED;
 593
 594                 /* Configure tail drop */
 595                 if (dpaa_intf->cgr_rx) {
 596                         opts.we_mask |= QM_INITFQ_WE_CGID;
 597                         opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
 598                         opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 599                 }
 600                 ret = qman_init_fq(rxq, flags, &opts);
 601                 if (ret) {
 602                         DPAA_PMD_ERR("Channel/Q association failed. fqid 0x%x "
 603                                 "ret:%d(%s)", rxq->fqid, ret, strerror(ret));
 604                         return ret;
 605                 }
 606                 rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb;
 607                 rxq->cb.dqrr_prepare = dpaa_rx_cb_prepare;
 608                 rxq->is_static = true;
 609         }
 610         dev->data->rx_queues[queue_idx] = rxq;
 611
 612         /* configure the CGR size as per the desc size */
 613         if (dpaa_intf->cgr_rx) {
 614                 struct qm_mcc_initcgr cgr_opts = {0};
 615
 616                 /* Enable tail drop with cgr on this queue */
 617                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
 618                 ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
 619                 if (ret) {
 620                         DPAA_PMD_WARN(
 621                                 "rx taildrop modify fail on fqid %d (ret=%d)",
 622                                 rxq->fqid, ret);
 623                 }
 624         }
 625
 626         return 0;
 627 }
 628
 629 int
 630 dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
 631                 int eth_rx_queue_id,
 632                 u16 ch_id,
 633                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 634 {
 635         int ret;
 636         u32 flags = 0;
 637         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 638         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 639         struct qm_mcc_initfq opts = {0};
 640
 641         if (dpaa_push_mode_max_queue)
 642                 DPAA_PMD_WARN("PUSH mode already enabled for first %d queues.\n"
 643                               "To disable set DPAA_PUSH_QUEUES_NUMBER to 0\n",
 644                               dpaa_push_mode_max_queue);
 645
 646         dpaa_poll_queue_default_config(&opts);
 647
 648         switch (queue_conf->ev.sched_type) {
 649         case RTE_SCHED_TYPE_ATOMIC:
 650                 opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
 651                 /* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
 652                  * configuration with HOLD_ACTIVE setting
 653                  */
 654                 opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
 655                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_atomic;
 656                 break;
 657         case RTE_SCHED_TYPE_ORDERED:
 658                 DPAA_PMD_ERR("Ordered queue schedule type is not supported\n");
 659                 return -1;
 660         default:
 661                 opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
 662                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_parallel;
 663                 break;
 664         }
 665
 666         opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 667         opts.fqd.dest.channel = ch_id;
 668         opts.fqd.dest.wq = queue_conf->ev.priority;
 669
 670         if (dpaa_intf->cgr_rx) {
 671                 opts.we_mask |= QM_INITFQ_WE_CGID;
 672                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 673                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 674         }
 675
 676         flags = QMAN_INITFQ_FLAG_SCHED;
 677
 678         ret = qman_init_fq(rxq, flags, &opts);
 679         if (ret) {
 680                 DPAA_PMD_ERR("Ev-Channel/Q association failed. fqid 0x%x "
 681                                 "ret:%d(%s)", rxq->fqid, ret, strerror(ret));
 682                 return ret;
 683         }
 684
 685         /* copy configuration which needs to be filled during dequeue */
 686         memcpy(&rxq->ev, &queue_conf->ev, sizeof(struct rte_event));
 687         dev->data->rx_queues[eth_rx_queue_id] = rxq;
 688
 689         return ret;
 690 }
 691
 692 int
 693 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
 694                 int eth_rx_queue_id)
 695 {
 696         struct qm_mcc_initfq opts;
 697         int ret;
 698         u32 flags = 0;
 699         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 700         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 701
 702         dpaa_poll_queue_default_config(&opts);
 703
 704         if (dpaa_intf->cgr_rx) {
 705                 opts.we_mask |= QM_INITFQ_WE_CGID;
 706                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 707                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 708         }
 709
 710         ret = qman_init_fq(rxq, flags, &opts);
 711         if (ret) {
 712                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d",
 713                              rxq->fqid, ret);
 714         }
 715
 716         rxq->cb.dqrr_dpdk_cb = NULL;
 717         dev->data->rx_queues[eth_rx_queue_id] = NULL;
 718
 719         return 0;
 720 }
 721
 722 static
 723 void dpaa_eth_rx_queue_release(void *rxq __rte_unused)
 724 {
 725         PMD_INIT_FUNC_TRACE();
 726 }
 727
 728 static
 729 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 730                             uint16_t nb_desc __rte_unused,
 731                 unsigned int socket_id __rte_unused,
 732                 const struct rte_eth_txconf *tx_conf __rte_unused)
 733 {
 734         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 735
 736         PMD_INIT_FUNC_TRACE();
 737
 738         if (queue_idx >= dev->data->nb_tx_queues) {
 739                 rte_errno = EOVERFLOW;
 740                 DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
 741                       (void *)dev, queue_idx, dev->data->nb_tx_queues);
 742                 return -rte_errno;
 743         }
 744
 745         DPAA_PMD_INFO("Tx queue setup for queue index: %d fq_id (0x%x)",
 746                         queue_idx, dpaa_intf->tx_queues[queue_idx].fqid);
 747         dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];
 748         return 0;
 749 }
 750
 751 static void dpaa_eth_tx_queue_release(void *txq __rte_unused)
 752 {
 753         PMD_INIT_FUNC_TRACE();
 754 }
 755
 756 static uint32_t
 757 dpaa_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 758 {
 759         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 760         struct qman_fq *rxq = &dpaa_intf->rx_queues[rx_queue_id];
 761         u32 frm_cnt = 0;
 762
 763         PMD_INIT_FUNC_TRACE();
 764
 765         if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
 766                 RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
 767                         rx_queue_id, frm_cnt);
 768         }
 769         return frm_cnt;
 770 }
 771
 772 static int dpaa_link_down(struct rte_eth_dev *dev)
 773 {
 774         PMD_INIT_FUNC_TRACE();
 775
 776         dpaa_eth_dev_stop(dev);
 777         return 0;
 778 }
 779
 780 static int dpaa_link_up(struct rte_eth_dev *dev)
 781 {
 782         PMD_INIT_FUNC_TRACE();
 783
 784         dpaa_eth_dev_start(dev);
 785         return 0;
 786 }
 787
 788 static int
 789 dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
 790                    struct rte_eth_fc_conf *fc_conf)
 791 {
 792         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 793         struct rte_eth_fc_conf *net_fc;
 794
 795         PMD_INIT_FUNC_TRACE();
 796
 797         if (!(dpaa_intf->fc_conf)) {
 798                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 799                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 800                 if (!dpaa_intf->fc_conf) {
 801                         DPAA_PMD_ERR("unable to save flow control info");
 802                         return -ENOMEM;
 803                 }
 804         }
 805         net_fc = dpaa_intf->fc_conf;
 806
 807         if (fc_conf->high_water < fc_conf->low_water) {
 808                 DPAA_PMD_ERR("Incorrect Flow Control Configuration");
 809                 return -EINVAL;
 810         }
 811
 812         if (fc_conf->mode == RTE_FC_NONE) {
 813                 return 0;
 814         } else if (fc_conf->mode == RTE_FC_TX_PAUSE ||
 815                  fc_conf->mode == RTE_FC_FULL) {
 816                 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water,
 817                                          fc_conf->low_water,
 818                                 dpaa_intf->bp_info->bpid);
 819                 if (fc_conf->pause_time)
 820                         fman_if_set_fc_quanta(dpaa_intf->fif,
 821                                               fc_conf->pause_time);
 822         }
 823
 824         /* Save the information in dpaa device */
 825         net_fc->pause_time = fc_conf->pause_time;
 826         net_fc->high_water = fc_conf->high_water;
 827         net_fc->low_water = fc_conf->low_water;
 828         net_fc->send_xon = fc_conf->send_xon;
 829         net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
 830         net_fc->mode = fc_conf->mode;
 831         net_fc->autoneg = fc_conf->autoneg;
 832
 833         return 0;
 834 }
 835
 836 static int
 837 dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
 838                    struct rte_eth_fc_conf *fc_conf)
 839 {
 840         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 841         struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
 842         int ret;
 843
 844         PMD_INIT_FUNC_TRACE();
 845
 846         if (net_fc) {
 847                 fc_conf->pause_time = net_fc->pause_time;
 848                 fc_conf->high_water = net_fc->high_water;
 849                 fc_conf->low_water = net_fc->low_water;
 850                 fc_conf->send_xon = net_fc->send_xon;
 851                 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
 852                 fc_conf->mode = net_fc->mode;
 853                 fc_conf->autoneg = net_fc->autoneg;
 854                 return 0;
 855         }
 856         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 857         if (ret) {
 858                 fc_conf->mode = RTE_FC_TX_PAUSE;
 859                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 860         } else {
 861                 fc_conf->mode = RTE_FC_NONE;
 862         }
 863
 864         return 0;
 865 }
 866
 867 static int
 868 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
 869                              struct ether_addr *addr,
 870                              uint32_t index,
 871                              __rte_unused uint32_t pool)
 872 {
 873         int ret;
 874         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 875
 876         PMD_INIT_FUNC_TRACE();
 877
 878         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index);
 879
 880         if (ret)
 881                 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
 882                         " err = %d", ret);
 883         return 0;
 884 }
 885
 886 static void
 887 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
 888                           uint32_t index)
 889 {
 890         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 891
 892         PMD_INIT_FUNC_TRACE();
 893
 894         fman_if_clear_mac_addr(dpaa_intf->fif, index);
 895 }
 896
 897 static int
 898 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 899                        struct ether_addr *addr)
 900 {
 901         int ret;
 902         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 903
 904         PMD_INIT_FUNC_TRACE();
 905
 906         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0);
 907         if (ret)
 908                 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
 909
 910         return ret;
 911 }
 912
 913 static struct eth_dev_ops dpaa_devops = {
 914         .dev_configure            = dpaa_eth_dev_configure,
 915         .dev_start                = dpaa_eth_dev_start,
 916         .dev_stop                 = dpaa_eth_dev_stop,
 917         .dev_close                = dpaa_eth_dev_close,
 918         .dev_infos_get            = dpaa_eth_dev_info,
 919         .dev_supported_ptypes_get = dpaa_supported_ptypes_get,
 920
 921         .rx_queue_setup           = dpaa_eth_rx_queue_setup,
 922         .tx_queue_setup           = dpaa_eth_tx_queue_setup,
 923         .rx_queue_release         = dpaa_eth_rx_queue_release,
 924         .tx_queue_release         = dpaa_eth_tx_queue_release,
 925         .rx_queue_count           = dpaa_dev_rx_queue_count,
 926
 927         .flow_ctrl_get            = dpaa_flow_ctrl_get,
 928         .flow_ctrl_set            = dpaa_flow_ctrl_set,
 929
 930         .link_update              = dpaa_eth_link_update,
 931         .stats_get                = dpaa_eth_stats_get,
 932         .xstats_get               = dpaa_dev_xstats_get,
 933         .xstats_get_by_id         = dpaa_xstats_get_by_id,
 934         .xstats_get_names_by_id   = dpaa_xstats_get_names_by_id,
 935         .xstats_get_names         = dpaa_xstats_get_names,
 936         .xstats_reset             = dpaa_eth_stats_reset,
 937         .stats_reset              = dpaa_eth_stats_reset,
 938         .promiscuous_enable       = dpaa_eth_promiscuous_enable,
 939         .promiscuous_disable      = dpaa_eth_promiscuous_disable,
 940         .allmulticast_enable      = dpaa_eth_multicast_enable,
 941         .allmulticast_disable     = dpaa_eth_multicast_disable,
 942         .mtu_set                  = dpaa_mtu_set,
 943         .dev_set_link_down        = dpaa_link_down,
 944         .dev_set_link_up          = dpaa_link_up,
 945         .mac_addr_add             = dpaa_dev_add_mac_addr,
 946         .mac_addr_remove          = dpaa_dev_remove_mac_addr,
 947         .mac_addr_set             = dpaa_dev_set_mac_addr,
 948
 949         .fw_version_get           = dpaa_fw_version_get,
 950 };
 951
 952 static bool
 953 is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
 954 {
 955         if (strcmp(dev->device->driver->name,
 956                    drv->driver.name))
 957                 return false;
 958
 959         return true;
 960 }
 961
 962 static bool
 963 is_dpaa_supported(struct rte_eth_dev *dev)
 964 {
 965         return is_device_supported(dev, &rte_dpaa_pmd);
 966 }
 967
 968 int
 969 rte_pmd_dpaa_set_tx_loopback(uint8_t port, uint8_t on)
 970 {
 971         struct rte_eth_dev *dev;
 972         struct dpaa_if *dpaa_intf;
 973
 974         RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
 975
 976         dev = &rte_eth_devices[port];
 977
 978         if (!is_dpaa_supported(dev))
 979                 return -ENOTSUP;
 980
 981         dpaa_intf = dev->data->dev_private;
 982
 983         if (on)
 984                 fman_if_loopback_enable(dpaa_intf->fif);
 985         else
 986                 fman_if_loopback_disable(dpaa_intf->fif);
 987
 988         return 0;
 989 }
 990
 991 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf)
 992 {
 993         struct rte_eth_fc_conf *fc_conf;
 994         int ret;
 995
 996         PMD_INIT_FUNC_TRACE();
 997
 998         if (!(dpaa_intf->fc_conf)) {
 999                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
1000                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
1001                 if (!dpaa_intf->fc_conf) {
1002                         DPAA_PMD_ERR("unable to save flow control info");
1003                         return -ENOMEM;
1004                 }
1005         }
1006         fc_conf = dpaa_intf->fc_conf;
1007         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
1008         if (ret) {
1009                 fc_conf->mode = RTE_FC_TX_PAUSE;
1010                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
1011         } else {
1012                 fc_conf->mode = RTE_FC_NONE;
1013         }
1014
1015         return 0;
1016 }
1017
1018 /* Initialise an Rx FQ */
1019 static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
1020                               uint32_t fqid)
1021 {
1022         struct qm_mcc_initfq opts = {0};
1023         int ret;
1024         u32 flags = QMAN_FQ_FLAG_NO_ENQUEUE;
1025         struct qm_mcc_initcgr cgr_opts = {
1026                 .we_mask = QM_CGR_WE_CS_THRES |
1027                                 QM_CGR_WE_CSTD_EN |
1028                                 QM_CGR_WE_MODE,
1029                 .cgr = {
1030                         .cstd_en = QM_CGR_EN,
1031                         .mode = QMAN_CGR_MODE_FRAME
1032                 }
1033         };
1034
1035         PMD_INIT_FUNC_TRACE();
1036
1037         if (fqid) {
1038                 ret = qman_reserve_fqid(fqid);
1039                 if (ret) {
1040                         DPAA_PMD_ERR("reserve rx fqid 0x%x failed with ret: %d",
1041                                      fqid, ret);
1042                         return -EINVAL;
1043                 }
1044         } else {
1045                 flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
1046         }
1047         DPAA_PMD_DEBUG("creating rx fq %p, fqid 0x%x", fq, fqid);
1048         ret = qman_create_fq(fqid, flags, fq);
1049         if (ret) {
1050                 DPAA_PMD_ERR("create rx fqid 0x%x failed with ret: %d",
1051                         fqid, ret);
1052                 return ret;
1053         }
1054         fq->is_static = false;
1055
1056         dpaa_poll_queue_default_config(&opts);
1057
1058         if (cgr_rx) {
1059                 /* Enable tail drop with cgr on this queue */
1060                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
1061                 cgr_rx->cb = NULL;
1062                 ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
1063                                       &cgr_opts);
1064                 if (ret) {
1065                         DPAA_PMD_WARN(
1066                                 "rx taildrop init fail on rx fqid 0x%x(ret=%d)",
1067                                 fq->fqid, ret);
1068                         goto without_cgr;
1069                 }
1070                 opts.we_mask |= QM_INITFQ_WE_CGID;
1071                 opts.fqd.cgid = cgr_rx->cgrid;
1072                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
1073         }
1074 without_cgr:
1075         ret = qman_init_fq(fq, 0, &opts);
1076         if (ret)
1077                 DPAA_PMD_ERR("init rx fqid 0x%x failed with ret:%d", fqid, ret);
1078         return ret;
1079 }
1080
1081 /* Initialise a Tx FQ */
1082 static int dpaa_tx_queue_init(struct qman_fq *fq,
1083                               struct fman_if *fman_intf)
1084 {
1085         struct qm_mcc_initfq opts = {0};
1086         int ret;
1087
1088         PMD_INIT_FUNC_TRACE();
1089
1090         ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
1091                              QMAN_FQ_FLAG_TO_DCPORTAL, fq);
1092         if (ret) {
1093                 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
1094                 return ret;
1095         }
1096         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
1097                        QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
1098         opts.fqd.dest.channel = fman_intf->tx_channel_id;
1099         opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
1100         opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
1101         opts.fqd.context_b = 0;
1102         /* no tx-confirmation */
1103         opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
1104         opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
1105         DPAA_PMD_DEBUG("init tx fq %p, fqid 0x%x", fq, fq->fqid);
1106         ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
1107         if (ret)
1108                 DPAA_PMD_ERR("init tx fqid 0x%x failed %d", fq->fqid, ret);
1109         return ret;
1110 }
1111
1112 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1113 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
1114 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
1115 {
1116         struct qm_mcc_initfq opts = {0};
1117         int ret;
1118
1119         PMD_INIT_FUNC_TRACE();
1120
1121         ret = qman_reserve_fqid(fqid);
1122         if (ret) {
1123                 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
1124                         fqid, ret);
1125                 return -EINVAL;
1126         }
1127         /* "map" this Rx FQ to one of the interfaces Tx FQID */
1128         DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
1129         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
1130         if (ret) {
1131                 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
1132                         fqid, ret);
1133                 return ret;
1134         }
1135         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
1136         opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
1137         ret = qman_init_fq(fq, 0, &opts);
1138         if (ret)
1139                 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
1140                             fqid, ret);
1141         return ret;
1142 }
1143 #endif
1144
1145 /* Initialise a network interface */
1146 static int
1147 dpaa_dev_init(struct rte_eth_dev *eth_dev)
1148 {
1149         int num_cores, num_rx_fqs, fqid;
1150         int loop, ret = 0;
1151         int dev_id;
1152         struct rte_dpaa_device *dpaa_device;
1153         struct dpaa_if *dpaa_intf;
1154         struct fm_eth_port_cfg *cfg;
1155         struct fman_if *fman_intf;
1156         struct fman_if_bpool *bp, *tmp_bp;
1157         uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
1158
1159         PMD_INIT_FUNC_TRACE();
1160
1161         /* For secondary processes, the primary has done all the work */
1162         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1163                 return 0;
1164
1165         dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
1166         dev_id = dpaa_device->id.dev_id;
1167         dpaa_intf = eth_dev->data->dev_private;
1168         cfg = &dpaa_netcfg->port_cfg[dev_id];
1169         fman_intf = cfg->fman_if;
1170
1171         dpaa_intf->name = dpaa_device->name;
1172
1173         /* save fman_if & cfg in the interface struture */
1174         dpaa_intf->fif = fman_intf;
1175         dpaa_intf->ifid = dev_id;
1176         dpaa_intf->cfg = cfg;
1177
1178         /* Initialize Rx FQ's */
1179         if (default_q) {
1180                 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1181         } else {
1182                 if (getenv("DPAA_NUM_RX_QUEUES"))
1183                         num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
1184                 else
1185                         num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1186         }
1187
1188
1189         /* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX
1190          * queues.
1191          */
1192         if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) {
1193                 DPAA_PMD_ERR("Invalid number of RX queues\n");
1194                 return -EINVAL;
1195         }
1196
1197         dpaa_intf->rx_queues = rte_zmalloc(NULL,
1198                 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
1199         if (!dpaa_intf->rx_queues) {
1200                 DPAA_PMD_ERR("Failed to alloc mem for RX queues\n");
1201                 return -ENOMEM;
1202         }
1203
1204         /* If congestion control is enabled globally*/
1205         if (td_threshold) {
1206                 dpaa_intf->cgr_rx = rte_zmalloc(NULL,
1207                         sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
1208                 if (!dpaa_intf->cgr_rx) {
1209                         DPAA_PMD_ERR("Failed to alloc mem for cgr_rx\n");
1210                         ret = -ENOMEM;
1211                         goto free_rx;
1212                 }
1213
1214                 ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
1215                 if (ret != num_rx_fqs) {
1216                         DPAA_PMD_WARN("insufficient CGRIDs available");
1217                         ret = -EINVAL;
1218                         goto free_rx;
1219                 }
1220         } else {
1221                 dpaa_intf->cgr_rx = NULL;
1222         }
1223
1224         for (loop = 0; loop < num_rx_fqs; loop++) {
1225                 if (default_q)
1226                         fqid = cfg->rx_def;
1227                 else
1228                         fqid = DPAA_PCD_FQID_START + dpaa_intf->fif->mac_idx *
1229                                 DPAA_PCD_FQID_MULTIPLIER + loop;
1230
1231                 if (dpaa_intf->cgr_rx)
1232                         dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
1233
1234                 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
1235                         dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
1236                         fqid);
1237                 if (ret)
1238                         goto free_rx;
1239                 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
1240         }
1241         dpaa_intf->nb_rx_queues = num_rx_fqs;
1242
1243         /* Initialise Tx FQs.free_rx Have as many Tx FQ's as number of cores */
1244         num_cores = rte_lcore_count();
1245         dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
1246                 num_cores, MAX_CACHELINE);
1247         if (!dpaa_intf->tx_queues) {
1248                 DPAA_PMD_ERR("Failed to alloc mem for TX queues\n");
1249                 ret = -ENOMEM;
1250                 goto free_rx;
1251         }
1252
1253         for (loop = 0; loop < num_cores; loop++) {
1254                 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
1255                                          fman_intf);
1256                 if (ret)
1257                         goto free_tx;
1258                 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
1259         }
1260         dpaa_intf->nb_tx_queues = num_cores;
1261
1262 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1263         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1264                 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
1265         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
1266         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1267                 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
1268         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
1269 #endif
1270
1271         DPAA_PMD_DEBUG("All frame queues created");
1272
1273         /* Get the initial configuration for flow control */
1274         dpaa_fc_set_default(dpaa_intf);
1275
1276         /* reset bpool list, initialize bpool dynamically */
1277         list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
1278                 list_del(&bp->node);
1279                 free(bp);
1280         }
1281
1282         /* Populate ethdev structure */
1283         eth_dev->dev_ops = &dpaa_devops;
1284         eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
1285         eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
1286
1287         /* Allocate memory for storing MAC addresses */
1288         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
1289                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
1290         if (eth_dev->data->mac_addrs == NULL) {
1291                 DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
1292                                                 "store MAC addresses",
1293                                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
1294                 ret = -ENOMEM;
1295                 goto free_tx;
1296         }
1297
1298         /* copy the primary mac address */
1299         ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
1300
1301         RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n",
1302                 dpaa_device->name,
1303                 fman_intf->mac_addr.addr_bytes[0],
1304                 fman_intf->mac_addr.addr_bytes[1],
1305                 fman_intf->mac_addr.addr_bytes[2],
1306                 fman_intf->mac_addr.addr_bytes[3],
1307                 fman_intf->mac_addr.addr_bytes[4],
1308                 fman_intf->mac_addr.addr_bytes[5]);
1309
1310         /* Disable RX mode */
1311         fman_if_discard_rx_errors(fman_intf);
1312         fman_if_disable_rx(fman_intf);
1313         /* Disable promiscuous mode */
1314         fman_if_promiscuous_disable(fman_intf);
1315         /* Disable multicast */
1316         fman_if_reset_mcast_filter_table(fman_intf);
1317         /* Reset interface statistics */
1318         fman_if_stats_reset(fman_intf);
1319
1320         return 0;
1321
1322 free_tx:
1323         rte_free(dpaa_intf->tx_queues);
1324         dpaa_intf->tx_queues = NULL;
1325         dpaa_intf->nb_tx_queues = 0;
1326
1327 free_rx:
1328         rte_free(dpaa_intf->cgr_rx);
1329         rte_free(dpaa_intf->rx_queues);
1330         dpaa_intf->rx_queues = NULL;
1331         dpaa_intf->nb_rx_queues = 0;
1332         return ret;
1333 }
1334
1335 static int
1336 dpaa_dev_uninit(struct rte_eth_dev *dev)
1337 {
1338         struct dpaa_if *dpaa_intf = dev->data->dev_private;
1339         int loop;
1340
1341         PMD_INIT_FUNC_TRACE();
1342
1343         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1344                 return -EPERM;
1345
1346         if (!dpaa_intf) {
1347                 DPAA_PMD_WARN("Already closed or not started");
1348                 return -1;
1349         }
1350
1351         dpaa_eth_dev_close(dev);
1352
1353         /* release configuration memory */
1354         if (dpaa_intf->fc_conf)
1355                 rte_free(dpaa_intf->fc_conf);
1356
1357         /* Release RX congestion Groups */
1358         if (dpaa_intf->cgr_rx) {
1359                 for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
1360                         qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
1361
1362                 qman_release_cgrid_range(dpaa_intf->cgr_rx[loop].cgrid,
1363                                          dpaa_intf->nb_rx_queues);
1364         }
1365
1366         rte_free(dpaa_intf->cgr_rx);
1367         dpaa_intf->cgr_rx = NULL;
1368
1369         rte_free(dpaa_intf->rx_queues);
1370         dpaa_intf->rx_queues = NULL;
1371
1372         rte_free(dpaa_intf->tx_queues);
1373         dpaa_intf->tx_queues = NULL;
1374
1375         /* free memory for storing MAC addresses */
1376         rte_free(dev->data->mac_addrs);
1377         dev->data->mac_addrs = NULL;
1378
1379         dev->dev_ops = NULL;
1380         dev->rx_pkt_burst = NULL;
1381         dev->tx_pkt_burst = NULL;
1382
1383         return 0;
1384 }
1385
1386 static int
1387 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused,
1388                struct rte_dpaa_device *dpaa_dev)
1389 {
1390         int diag;
1391         int ret;
1392         struct rte_eth_dev *eth_dev;
1393
1394         PMD_INIT_FUNC_TRACE();
1395
1396         /* In case of secondary process, the device is already configured
1397          * and no further action is required, except portal initialization
1398          * and verifying secondary attachment to port name.
1399          */
1400         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1401                 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
1402                 if (!eth_dev)
1403                         return -ENOMEM;
1404                 eth_dev->device = &dpaa_dev->device;
1405                 eth_dev->dev_ops = &dpaa_devops;
1406                 rte_eth_dev_probing_finish(eth_dev);
1407                 return 0;
1408         }
1409
1410         if (!is_global_init) {
1411                 /* One time load of Qman/Bman drivers */
1412                 ret = qman_global_init();
1413                 if (ret) {
1414                         DPAA_PMD_ERR("QMAN initialization failed: %d",
1415                                      ret);
1416                         return ret;
1417                 }
1418                 ret = bman_global_init();
1419                 if (ret) {
1420                         DPAA_PMD_ERR("BMAN initialization failed: %d",
1421                                      ret);
1422                         return ret;
1423                 }
1424
1425                 if (access("/tmp/fmc.bin", F_OK) == -1) {
1426                         RTE_LOG(INFO, PMD,
1427                                 "* FMC not configured.Enabling default mode\n");
1428                         default_q = 1;
1429                 }
1430
1431                 /* disabling the default push mode for LS1043 */
1432                 if (dpaa_svr_family == SVR_LS1043A_FAMILY)
1433                         dpaa_push_mode_max_queue = 0;
1434
1435                 /* if push mode queues to be enabled. Currenly we are allowing
1436                  * only one queue per thread.
1437                  */
1438                 if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
1439                         dpaa_push_mode_max_queue =
1440                                         atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
1441                         if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
1442                             dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
1443                 }
1444
1445                 is_global_init = 1;
1446         }
1447
1448         if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
1449                 ret = rte_dpaa_portal_init((void *)1);
1450                 if (ret) {
1451                         DPAA_PMD_ERR("Unable to initialize portal");
1452                         return ret;
1453                 }
1454         }
1455
1456         eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
1457         if (eth_dev == NULL)
1458                 return -ENOMEM;
1459
1460         eth_dev->data->dev_private = rte_zmalloc(
1461                                         "ethdev private structure",
1462                                         sizeof(struct dpaa_if),
1463                                         RTE_CACHE_LINE_SIZE);
1464         if (!eth_dev->data->dev_private) {
1465                 DPAA_PMD_ERR("Cannot allocate memzone for port data");
1466                 rte_eth_dev_release_port(eth_dev);
1467                 return -ENOMEM;
1468         }
1469
1470         eth_dev->device = &dpaa_dev->device;
1471         dpaa_dev->eth_dev = eth_dev;
1472
1473         /* Invoke PMD device initialization function */
1474         diag = dpaa_dev_init(eth_dev);
1475         if (diag == 0) {
1476                 rte_eth_dev_probing_finish(eth_dev);
1477                 return 0;
1478         }
1479
1480         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1481                 rte_free(eth_dev->data->dev_private);
1482
1483         rte_eth_dev_release_port(eth_dev);
1484         return diag;
1485 }
1486
1487 static int
1488 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
1489 {
1490         struct rte_eth_dev *eth_dev;
1491
1492         PMD_INIT_FUNC_TRACE();
1493
1494         eth_dev = dpaa_dev->eth_dev;
1495         dpaa_dev_uninit(eth_dev);
1496
1497         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1498                 rte_free(eth_dev->data->dev_private);
1499
1500         rte_eth_dev_release_port(eth_dev);
1501
1502         return 0;
1503 }
1504
1505 static struct rte_dpaa_driver rte_dpaa_pmd = {
1506         .drv_type = FSL_DPAA_ETH,
1507         .probe = rte_dpaa_probe,
1508         .remove = rte_dpaa_remove,
1509 };
1510
1511 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);