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34 #ifndef __DPDK_RXTX_H__
35 #define __DPDK_RXTX_H__
37 /* internal offset from where IC is copied to packet buffer*/
38 #define DEFAULT_ICIOF 32
39 /* IC transfer size */
40 #define DEFAULT_ICSZ 48
42 /* IC offsets from buffer header address */
43 #define DEFAULT_RX_ICEOF 16
45 #define DPAA_MAX_DEQUEUE_NUM_FRAMES 63
46 /** <Maximum number of frames to be dequeued in a single rx call*/
47 /* FD structure masks and offset */
48 #define DPAA_FD_FORMAT_MASK 0xE0000000
49 #define DPAA_FD_OFFSET_MASK 0x1FF00000
50 #define DPAA_FD_LENGTH_MASK 0xFFFFF
51 #define DPAA_FD_FORMAT_SHIFT 29
52 #define DPAA_FD_OFFSET_SHIFT 20
54 uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
56 uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
58 uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused,
59 struct rte_mbuf **bufs __rte_unused,
60 uint16_t nb_bufs __rte_unused);