1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
8 #ifndef __DPDK_RXTX_H__
9 #define __DPDK_RXTX_H__
11 /* internal offset from where IC is copied to packet buffer*/
12 #define DEFAULT_ICIOF 32
13 /* IC transfer size */
14 #define DEFAULT_ICSZ 48
16 /* IC offsets from buffer header address */
17 #define DEFAULT_RX_ICEOF 16
18 #define DEFAULT_TX_ICEOF 16
21 * Values for the L3R field of the FM Parse Results
23 /* L3 Type field: First IP Present IPv4 */
24 #define DPAA_L3_PARSE_RESULT_IPV4 0x80
25 /* L3 Type field: First IP Present IPv6 */
26 #define DPAA_L3_PARSE_RESULT_IPV6 0x40
27 /* Values for the L4R field of the FM Parse Results
28 * See $8.8.4.7.20 - L4 HXS - L4 Results from DPAA-Rev2 Reference Manual.
30 /* L4 Type field: UDP */
31 #define DPAA_L4_PARSE_RESULT_UDP 0x40
32 /* L4 Type field: TCP */
33 #define DPAA_L4_PARSE_RESULT_TCP 0x20
35 #define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */
37 #define DPAA_MAX_DEQUEUE_NUM_FRAMES 63
38 /** <Maximum number of frames to be dequeued in a single rx call*/
40 /* FD structure masks and offset */
41 #define DPAA_FD_FORMAT_MASK 0xE0000000
42 #define DPAA_FD_OFFSET_MASK 0x1FF00000
43 #define DPAA_FD_LENGTH_MASK 0xFFFFF
44 #define DPAA_FD_FORMAT_SHIFT 29
45 #define DPAA_FD_OFFSET_SHIFT 20
47 /* Parsing mask (Little Endian) - 0x00E044ED00800000
48 * Classification Plan ID 0x00
53 * L3R 0xEDC4 (in Big Endian) -
56 * 0x8140 - IPv4 Ext + Frag
59 * 0x4140 - IPv6 Ext + Frag
62 * L2R 0x8000 (in Big Endian) -
63 * 0x8000 - Ethernet type
64 * ShimR & Logical Port ID 0x0000
66 #define DPAA_PARSE_MASK 0x00E044ED00800000
67 #define DPAA_PARSE_VLAN_MASK 0x0000000000700000
69 /* Parsed values (Little Endian) */
70 #define DPAA_PKT_TYPE_NONE 0x0000000000000000
71 #define DPAA_PKT_TYPE_ETHER 0x0000000000800000
72 #define DPAA_PKT_TYPE_IPV4 \
73 (0x0000008000000000 | DPAA_PKT_TYPE_ETHER)
74 #define DPAA_PKT_TYPE_IPV6 \
75 (0x0000004000000000 | DPAA_PKT_TYPE_ETHER)
76 #define DPAA_PKT_TYPE_GRE \
77 (0x0000002000000000 | DPAA_PKT_TYPE_ETHER)
78 #define DPAA_PKT_TYPE_IPV4_FRAG \
79 (0x0000400000000000 | DPAA_PKT_TYPE_IPV4)
80 #define DPAA_PKT_TYPE_IPV6_FRAG \
81 (0x0000400000000000 | DPAA_PKT_TYPE_IPV6)
82 #define DPAA_PKT_TYPE_IPV4_EXT \
83 (0x0000000100000000 | DPAA_PKT_TYPE_IPV4)
84 #define DPAA_PKT_TYPE_IPV6_EXT \
85 (0x0000000100000000 | DPAA_PKT_TYPE_IPV6)
86 #define DPAA_PKT_TYPE_IPV4_TCP \
87 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4)
88 #define DPAA_PKT_TYPE_IPV6_TCP \
89 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6)
90 #define DPAA_PKT_TYPE_IPV4_UDP \
91 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4)
92 #define DPAA_PKT_TYPE_IPV6_UDP \
93 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6)
94 #define DPAA_PKT_TYPE_IPV4_SCTP \
95 (0x0080000000000000 | DPAA_PKT_TYPE_IPV4)
96 #define DPAA_PKT_TYPE_IPV6_SCTP \
97 (0x0080000000000000 | DPAA_PKT_TYPE_IPV6)
98 #define DPAA_PKT_TYPE_IPV4_FRAG_TCP \
99 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
100 #define DPAA_PKT_TYPE_IPV6_FRAG_TCP \
101 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
102 #define DPAA_PKT_TYPE_IPV4_FRAG_UDP \
103 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
104 #define DPAA_PKT_TYPE_IPV6_FRAG_UDP \
105 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
106 #define DPAA_PKT_TYPE_IPV4_FRAG_SCTP \
107 (0x0080000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
108 #define DPAA_PKT_TYPE_IPV6_FRAG_SCTP \
109 (0x0080000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
110 #define DPAA_PKT_TYPE_IPV4_EXT_UDP \
111 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
112 #define DPAA_PKT_TYPE_IPV6_EXT_UDP \
113 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
114 #define DPAA_PKT_TYPE_IPV4_EXT_TCP \
115 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
116 #define DPAA_PKT_TYPE_IPV6_EXT_TCP \
117 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
118 #define DPAA_PKT_TYPE_TUNNEL_4_4 \
119 (0x0000000800000000 | DPAA_PKT_TYPE_IPV4)
120 #define DPAA_PKT_TYPE_TUNNEL_6_6 \
121 (0x0000000400000000 | DPAA_PKT_TYPE_IPV6)
122 #define DPAA_PKT_TYPE_TUNNEL_4_6 \
123 (0x0000000400000000 | DPAA_PKT_TYPE_IPV4)
124 #define DPAA_PKT_TYPE_TUNNEL_6_4 \
125 (0x0000000800000000 | DPAA_PKT_TYPE_IPV6)
126 #define DPAA_PKT_TYPE_TUNNEL_4_4_UDP \
127 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
128 #define DPAA_PKT_TYPE_TUNNEL_6_6_UDP \
129 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
130 #define DPAA_PKT_TYPE_TUNNEL_4_6_UDP \
131 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
132 #define DPAA_PKT_TYPE_TUNNEL_6_4_UDP \
133 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
134 #define DPAA_PKT_TYPE_TUNNEL_4_4_TCP \
135 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
136 #define DPAA_PKT_TYPE_TUNNEL_6_6_TCP \
137 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
138 #define DPAA_PKT_TYPE_TUNNEL_4_6_TCP \
139 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
140 #define DPAA_PKT_TYPE_TUNNEL_6_4_TCP \
141 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
142 #define DPAA_PKT_L3_LEN_SHIFT 7
145 * FMan parse result array
147 struct dpaa_eth_parse_results_t {
148 uint8_t lpid; /**< Logical port id */
149 uint8_t shimr; /**< Shim header result */
151 uint16_t l2r; /**< Layer 2 result */
153 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
160 uint16_t unknown_eth_proto:1;
161 uint16_t eth_frame_type:2;
163 /*00-unicast, 01-multicast, 11-broadcast*/
166 uint16_t eth_frame_type:2;
167 uint16_t unknown_eth_proto:1;
175 } __attribute__((__packed__));
176 } __attribute__((__packed__));
178 uint16_t l3r; /**< Layer 3 result */
180 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
181 uint16_t first_ipv4:1;
182 uint16_t first_ipv6:1;
185 uint16_t last_ipv4:1;
186 uint16_t last_ipv6:1;
187 uint16_t first_info_err:1;/*0 info, 1 error*/
188 uint16_t first_ip_err_code:5;
189 uint16_t last_info_err:1; /*0 info, 1 error*/
190 uint16_t last_ip_err_code:3;
192 uint16_t last_ip_err_code:3;
193 uint16_t last_info_err:1; /*0 info, 1 error*/
194 uint16_t first_ip_err_code:5;
195 uint16_t first_info_err:1;/*0 info, 1 error*/
196 uint16_t last_ipv6:1;
197 uint16_t last_ipv4:1;
200 uint16_t first_ipv6:1;
201 uint16_t first_ipv4:1;
203 } __attribute__((__packed__));
204 } __attribute__((__packed__));
206 uint8_t l4r; /**< Layer 4 result */
208 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
210 uint8_t l4_info_err:1;
212 /* if type IPSec: 1 ESP, 2 AH */
215 /* if type IPSec: 1 ESP, 2 AH */
216 uint8_t l4_info_err:1;
219 } __attribute__((__packed__));
220 } __attribute__((__packed__));
221 uint8_t cplan; /**< Classification plan id */
222 uint16_t nxthdr; /**< Next Header */
223 uint16_t cksum; /**< Checksum */
224 uint32_t lcv; /**< LCV */
225 uint8_t shim_off[3]; /**< Shim offset */
226 uint8_t eth_off; /**< ETH offset */
227 uint8_t llc_snap_off; /**< LLC_SNAP offset */
228 uint8_t vlan_off[2]; /**< VLAN offset */
229 uint8_t etype_off; /**< ETYPE offset */
230 uint8_t pppoe_off; /**< PPP offset */
231 uint8_t mpls_off[2]; /**< MPLS offset */
232 uint8_t ip_off[2]; /**< IP offset */
233 uint8_t gre_off; /**< GRE offset */
234 uint8_t l4_off; /**< Layer 4 offset */
235 uint8_t nxthdr_off; /**< Parser end point */
236 } __attribute__ ((__packed__));
238 /* The structure is the Prepended Data to the Frame which is used by FMAN */
239 struct annotations_t {
240 uint8_t reserved[DEFAULT_RX_ICEOF];
241 struct dpaa_eth_parse_results_t parse; /**< Pointer to Parsed result*/
243 uint64_t hash; /**< Hash Result */
246 #define GET_ANNOTATIONS(_buf) \
247 (struct annotations_t *)(_buf)
249 #define GET_RX_PRS(_buf) \
250 (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
253 #define GET_TX_PRS(_buf) \
254 (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
257 uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
259 uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
261 uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused,
262 struct rte_mbuf **bufs __rte_unused,
263 uint16_t nb_bufs __rte_unused);
265 struct rte_mbuf *dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid);
267 int dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
271 void dpaa_rx_cb(struct qman_fq **fq,
272 struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs);
274 void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs);