1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2 * Copyright 2009-2012 Freescale Semiconductor Inc.
3 * Copyright 2017-2020 NXP
6 #ifndef __DPAA_INTEGRATION_H
7 #define __DPAA_INTEGRATION_H
11 #define DPAA_VERSION 11
13 #define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */
15 #define INTG_MAX_NUM_OF_FM 2
18 #define FM_MAX_NUM_OF_1G_MACS 6
19 #define FM_MAX_NUM_OF_10G_MACS 2
20 #define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
21 #define FM_MAX_NUM_OF_OH_PORTS 6
23 #define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS
24 #define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS
25 #define FM_MAX_NUM_OF_RX_PORTS \
26 (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
28 #define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS
29 #define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS
30 #define FM_MAX_NUM_OF_TX_PORTS \
31 (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
33 #define FM_PORT_MAX_NUM_OF_EXT_POOLS 4
34 /**< Number of external BM pools per Rx port */
35 #define FM_NUM_CONG_GRPS 256
36 /**< Total number of congestion groups in QM */
37 #define FM_MAX_NUM_OF_SUB_PORTALS 16
38 #define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0
41 #define FM_PCD_PLCR_NUM_ENTRIES 256
42 /**< Total number of policer profiles */
43 #define FM_PCD_KG_NUM_OF_SCHEMES 32
44 /**< Total number of KG schemes */
45 #define FM_PCD_MAX_NUM_OF_CLS_PLANS 256
46 /**< Number of classification plan entries. */
48 #define FM_MAX_PFC_PRIO 8
50 #endif /* __DPAA_INTEGRATION_H */