1 /* * SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
12 #include <rte_ethdev_driver.h>
13 #include <rte_malloc.h>
14 #include <rte_memcpy.h>
15 #include <rte_string_fns.h>
16 #include <rte_cycles.h>
17 #include <rte_kvargs.h>
19 #include <rte_fslmc.h>
21 #include "dpaa2_pmd_logs.h"
22 #include <fslmc_vfio.h>
23 #include <dpaa2_hw_pvt.h>
24 #include <dpaa2_hw_mempool.h>
25 #include <dpaa2_hw_dpio.h>
26 #include <mc/fsl_dpmng.h>
27 #include "dpaa2_ethdev.h"
28 #include <fsl_qbman_debug.h>
30 /* Supported Rx offloads */
31 static uint64_t dev_rx_offloads_sup =
32 DEV_RX_OFFLOAD_VLAN_STRIP |
33 DEV_RX_OFFLOAD_IPV4_CKSUM |
34 DEV_RX_OFFLOAD_UDP_CKSUM |
35 DEV_RX_OFFLOAD_TCP_CKSUM |
36 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
37 DEV_RX_OFFLOAD_VLAN_FILTER |
38 DEV_RX_OFFLOAD_JUMBO_FRAME;
40 /* Rx offloads which cannot be disabled */
41 static uint64_t dev_rx_offloads_nodis =
42 DEV_RX_OFFLOAD_SCATTER;
44 /* Supported Tx offloads */
45 static uint64_t dev_tx_offloads_sup =
46 DEV_TX_OFFLOAD_VLAN_INSERT |
47 DEV_TX_OFFLOAD_IPV4_CKSUM |
48 DEV_TX_OFFLOAD_UDP_CKSUM |
49 DEV_TX_OFFLOAD_TCP_CKSUM |
50 DEV_TX_OFFLOAD_SCTP_CKSUM |
51 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
53 /* Tx offloads which cannot be disabled */
54 static uint64_t dev_tx_offloads_nodis =
55 DEV_TX_OFFLOAD_MULTI_SEGS |
56 DEV_TX_OFFLOAD_MT_LOCKFREE |
57 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
59 /* enable timestamp in mbuf */
60 enum pmd_dpaa2_ts dpaa2_enable_ts;
62 struct rte_dpaa2_xstats_name_off {
63 char name[RTE_ETH_XSTATS_NAME_SIZE];
64 uint8_t page_id; /* dpni statistics page id */
65 uint8_t stats_id; /* stats id in the given page */
68 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
69 {"ingress_multicast_frames", 0, 2},
70 {"ingress_multicast_bytes", 0, 3},
71 {"ingress_broadcast_frames", 0, 4},
72 {"ingress_broadcast_bytes", 0, 5},
73 {"egress_multicast_frames", 1, 2},
74 {"egress_multicast_bytes", 1, 3},
75 {"egress_broadcast_frames", 1, 4},
76 {"egress_broadcast_bytes", 1, 5},
77 {"ingress_filtered_frames", 2, 0},
78 {"ingress_discarded_frames", 2, 1},
79 {"ingress_nobuffer_discards", 2, 2},
80 {"egress_discarded_frames", 2, 3},
81 {"egress_confirmed_frames", 2, 4},
84 static struct rte_dpaa2_driver rte_dpaa2_pmd;
85 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
86 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
87 int wait_to_complete);
88 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
89 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
90 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
92 int dpaa2_logtype_pmd;
94 __rte_experimental void
95 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
97 dpaa2_enable_ts = enable;
101 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
104 struct dpaa2_dev_priv *priv = dev->data->dev_private;
105 struct fsl_mc_io *dpni = priv->hw;
107 PMD_INIT_FUNC_TRACE();
110 DPAA2_PMD_ERR("dpni is NULL");
115 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
116 priv->token, vlan_id);
118 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
119 priv->token, vlan_id);
122 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
123 ret, vlan_id, priv->hw_id);
129 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
131 struct dpaa2_dev_priv *priv = dev->data->dev_private;
132 struct fsl_mc_io *dpni = priv->hw;
135 PMD_INIT_FUNC_TRACE();
137 if (mask & ETH_VLAN_FILTER_MASK) {
138 /* VLAN Filter not avaialble */
139 if (!priv->max_vlan_filters) {
140 DPAA2_PMD_INFO("VLAN filter not available");
144 if (dev->data->dev_conf.rxmode.offloads &
145 DEV_RX_OFFLOAD_VLAN_FILTER)
146 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
149 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
152 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
155 if (mask & ETH_VLAN_EXTEND_MASK) {
156 if (dev->data->dev_conf.rxmode.offloads &
157 DEV_RX_OFFLOAD_VLAN_EXTEND)
158 DPAA2_PMD_INFO("VLAN extend offload not supported");
165 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
166 enum rte_vlan_type vlan_type __rte_unused,
169 struct dpaa2_dev_priv *priv = dev->data->dev_private;
170 struct fsl_mc_io *dpni = priv->hw;
173 PMD_INIT_FUNC_TRACE();
175 /* nothing to be done for standard vlan tpids */
176 if (tpid == 0x8100 || tpid == 0x88A8)
179 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
182 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
183 /* if already configured tpids, remove them first */
185 struct dpni_custom_tpid_cfg tpid_list = {0};
187 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
188 priv->token, &tpid_list);
191 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
192 priv->token, tpid_list.tpid1);
195 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
203 dpaa2_fw_version_get(struct rte_eth_dev *dev,
208 struct dpaa2_dev_priv *priv = dev->data->dev_private;
209 struct fsl_mc_io *dpni = priv->hw;
210 struct mc_soc_version mc_plat_info = {0};
211 struct mc_version mc_ver_info = {0};
213 PMD_INIT_FUNC_TRACE();
215 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
216 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
218 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
219 DPAA2_PMD_WARN("\tmc_get_version failed");
221 ret = snprintf(fw_version, fw_size,
226 mc_ver_info.revision);
228 ret += 1; /* add the size of '\0' */
229 if (fw_size < (uint32_t)ret)
236 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
238 struct dpaa2_dev_priv *priv = dev->data->dev_private;
240 PMD_INIT_FUNC_TRACE();
242 dev_info->if_index = priv->hw_id;
244 dev_info->max_mac_addrs = priv->max_mac_filters;
245 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
246 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
247 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
248 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
249 dev_info->rx_offload_capa = dev_rx_offloads_sup |
250 dev_rx_offloads_nodis;
251 dev_info->tx_offload_capa = dev_tx_offloads_sup |
252 dev_tx_offloads_nodis;
253 dev_info->speed_capa = ETH_LINK_SPEED_1G |
254 ETH_LINK_SPEED_2_5G |
257 dev_info->max_hash_mac_addrs = 0;
258 dev_info->max_vfs = 0;
259 dev_info->max_vmdq_pools = ETH_16_POOLS;
260 dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
264 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
266 struct dpaa2_dev_priv *priv = dev->data->dev_private;
269 struct dpaa2_queue *mc_q, *mcq;
272 struct dpaa2_queue *dpaa2_q;
274 PMD_INIT_FUNC_TRACE();
276 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
277 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
278 RTE_CACHE_LINE_SIZE);
280 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
284 for (i = 0; i < priv->nb_rx_queues; i++) {
285 mc_q->eth_data = dev->data;
286 priv->rx_vq[i] = mc_q++;
287 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
288 dpaa2_q->q_storage = rte_malloc("dq_storage",
289 sizeof(struct queue_storage_info_t),
290 RTE_CACHE_LINE_SIZE);
291 if (!dpaa2_q->q_storage)
294 memset(dpaa2_q->q_storage, 0,
295 sizeof(struct queue_storage_info_t));
296 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
300 for (i = 0; i < priv->nb_tx_queues; i++) {
301 mc_q->eth_data = dev->data;
302 mc_q->flow_id = 0xffff;
303 priv->tx_vq[i] = mc_q++;
304 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
305 dpaa2_q->cscn = rte_malloc(NULL,
306 sizeof(struct qbman_result), 16);
312 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
313 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
314 mcq->tc_index = DPAA2_DEF_TC;
315 mcq->flow_id = dist_idx;
323 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
324 rte_free(dpaa2_q->cscn);
325 priv->tx_vq[i--] = NULL;
327 i = priv->nb_rx_queues;
330 mc_q = priv->rx_vq[0];
332 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
333 dpaa2_free_dq_storage(dpaa2_q->q_storage);
334 rte_free(dpaa2_q->q_storage);
335 priv->rx_vq[i--] = NULL;
342 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
344 struct dpaa2_dev_priv *priv = dev->data->dev_private;
345 struct dpaa2_queue *dpaa2_q;
348 PMD_INIT_FUNC_TRACE();
350 /* Queue allocation base */
351 if (priv->rx_vq[0]) {
352 /* cleaning up queue storage */
353 for (i = 0; i < priv->nb_rx_queues; i++) {
354 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
355 if (dpaa2_q->q_storage)
356 rte_free(dpaa2_q->q_storage);
358 /* cleanup tx queue cscn */
359 for (i = 0; i < priv->nb_tx_queues; i++) {
360 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
361 rte_free(dpaa2_q->cscn);
363 /*free memory for all queues (RX+TX) */
364 rte_free(priv->rx_vq[0]);
365 priv->rx_vq[0] = NULL;
370 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
372 struct dpaa2_dev_priv *priv = dev->data->dev_private;
373 struct fsl_mc_io *dpni = priv->hw;
374 struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
375 uint64_t rx_offloads = eth_conf->rxmode.offloads;
376 uint64_t tx_offloads = eth_conf->txmode.offloads;
377 int rx_l3_csum_offload = false;
378 int rx_l4_csum_offload = false;
379 int tx_l3_csum_offload = false;
380 int tx_l4_csum_offload = false;
383 PMD_INIT_FUNC_TRACE();
385 /* Rx offloads validation */
386 if (dev_rx_offloads_nodis & ~rx_offloads) {
388 "Rx offloads non configurable - requested 0x%" PRIx64
389 " ignored 0x%" PRIx64,
390 rx_offloads, dev_rx_offloads_nodis);
393 /* Tx offloads validation */
394 if (dev_tx_offloads_nodis & ~tx_offloads) {
396 "Tx offloads non configurable - requested 0x%" PRIx64
397 " ignored 0x%" PRIx64,
398 tx_offloads, dev_tx_offloads_nodis);
401 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
402 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
403 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
404 priv->token, eth_conf->rxmode.max_rx_pkt_len);
407 "Unable to set mtu. check config");
415 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
416 ret = dpaa2_setup_flow_dist(dev,
417 eth_conf->rx_adv_conf.rss_conf.rss_hf);
419 DPAA2_PMD_ERR("Unable to set flow distribution."
420 "Check queue config");
425 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
426 rx_l3_csum_offload = true;
428 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
429 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
430 rx_l4_csum_offload = true;
432 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
433 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
435 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
439 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
440 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
442 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
446 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
447 tx_l3_csum_offload = true;
449 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
450 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
451 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
452 tx_l4_csum_offload = true;
454 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
455 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
457 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
461 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
462 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
464 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
468 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
469 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
470 * to 0 for LS2 in the hardware thus disabling data/annotation
471 * stashing. For LX2 this is fixed in hardware and thus hash result and
472 * parse results can be received in FD using this option.
474 if (dpaa2_svr_family == SVR_LX2160A) {
475 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
476 DPNI_FLCTYPE_HASH, true);
478 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
483 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
484 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
486 /* update the current status */
487 dpaa2_dev_link_update(dev, 0);
492 /* Function to setup RX flow information. It contains traffic class ID,
493 * flow ID, destination configuration etc.
496 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
497 uint16_t rx_queue_id,
498 uint16_t nb_rx_desc __rte_unused,
499 unsigned int socket_id __rte_unused,
500 const struct rte_eth_rxconf *rx_conf __rte_unused,
501 struct rte_mempool *mb_pool)
503 struct dpaa2_dev_priv *priv = dev->data->dev_private;
504 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
505 struct dpaa2_queue *dpaa2_q;
506 struct dpni_queue cfg;
512 PMD_INIT_FUNC_TRACE();
514 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
515 dev, rx_queue_id, mb_pool, rx_conf);
517 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
518 bpid = mempool_to_bpid(mb_pool);
519 ret = dpaa2_attach_bp_list(priv,
520 rte_dpaa2_bpid_info[bpid].bp_list);
524 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
525 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
526 dpaa2_q->bp_array = rte_dpaa2_bpid_info;
528 /*Get the flow id from given VQ id*/
529 flow_id = rx_queue_id % priv->nb_rx_queues;
530 memset(&cfg, 0, sizeof(struct dpni_queue));
532 options = options | DPNI_QUEUE_OPT_USER_CTX;
533 cfg.user_context = (size_t)(dpaa2_q);
535 /*if ls2088 or rev2 device, enable the stashing */
537 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
538 options |= DPNI_QUEUE_OPT_FLC;
539 cfg.flc.stash_control = true;
540 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
541 /* 00 00 00 - last 6 bit represent annotation, context stashing,
542 * data stashing setting 01 01 00 (0x14)
543 * (in following order ->DS AS CS)
544 * to enable 1 line data, 1 line annotation.
545 * For LX2, this setting should be 01 00 00 (0x10)
547 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
548 cfg.flc.value |= 0x10;
550 cfg.flc.value |= 0x14;
552 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
553 dpaa2_q->tc_index, flow_id, options, &cfg);
555 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
559 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
560 struct dpni_taildrop taildrop;
563 /*enabling per rx queue congestion control */
564 taildrop.threshold = CONG_THRESHOLD_RX_Q;
565 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
566 taildrop.oal = CONG_RX_OAL;
567 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
569 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
570 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
571 dpaa2_q->tc_index, flow_id, &taildrop);
573 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
579 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
584 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
585 uint16_t tx_queue_id,
586 uint16_t nb_tx_desc __rte_unused,
587 unsigned int socket_id __rte_unused,
588 const struct rte_eth_txconf *tx_conf __rte_unused)
590 struct dpaa2_dev_priv *priv = dev->data->dev_private;
591 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
592 priv->tx_vq[tx_queue_id];
593 struct fsl_mc_io *dpni = priv->hw;
594 struct dpni_queue tx_conf_cfg;
595 struct dpni_queue tx_flow_cfg;
596 uint8_t options = 0, flow_id;
600 PMD_INIT_FUNC_TRACE();
602 /* Return if queue already configured */
603 if (dpaa2_q->flow_id != 0xffff) {
604 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
608 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
609 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
614 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
615 tc_id, flow_id, options, &tx_flow_cfg);
617 DPAA2_PMD_ERR("Error in setting the tx flow: "
618 "tc_id=%d, flow=%d err=%d",
619 tc_id, flow_id, ret);
623 dpaa2_q->flow_id = flow_id;
625 if (tx_queue_id == 0) {
626 /*Set tx-conf and error configuration*/
627 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
631 DPAA2_PMD_ERR("Error in set tx conf mode settings: "
636 dpaa2_q->tc_index = tc_id;
638 if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
639 struct dpni_congestion_notification_cfg cong_notif_cfg;
641 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
642 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
643 /* Notify that the queue is not congested when the data in
644 * the queue is below this thershold.
646 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
647 cong_notif_cfg.message_ctx = 0;
648 cong_notif_cfg.message_iova =
649 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
650 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
651 cong_notif_cfg.notification_mode =
652 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
653 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
654 DPNI_CONG_OPT_COHERENT_WRITE;
656 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
663 "Error in setting tx congestion notification: "
668 dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
669 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
674 dpaa2_dev_rx_queue_release(void *q __rte_unused)
676 PMD_INIT_FUNC_TRACE();
680 dpaa2_dev_tx_queue_release(void *q __rte_unused)
682 PMD_INIT_FUNC_TRACE();
686 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
689 struct dpaa2_dev_priv *priv = dev->data->dev_private;
690 struct dpaa2_queue *dpaa2_q;
691 struct qbman_swp *swp;
692 struct qbman_fq_query_np_rslt state;
693 uint32_t frame_cnt = 0;
695 PMD_INIT_FUNC_TRACE();
697 if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
698 ret = dpaa2_affine_qbman_swp();
700 DPAA2_PMD_ERR("Failure in affining portal");
704 swp = DPAA2_PER_LCORE_PORTAL;
706 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
708 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
709 frame_cnt = qbman_fq_state_frame_count(&state);
710 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
711 rx_queue_id, frame_cnt);
716 static const uint32_t *
717 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
719 static const uint32_t ptypes[] = {
720 /*todo -= add more types */
723 RTE_PTYPE_L3_IPV4_EXT,
725 RTE_PTYPE_L3_IPV6_EXT,
733 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
739 * Dpaa2 link Interrupt handler
742 * The address of parameter (struct rte_eth_dev *) regsitered before.
748 dpaa2_interrupt_handler(void *param)
750 struct rte_eth_dev *dev = param;
751 struct dpaa2_dev_priv *priv = dev->data->dev_private;
752 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
754 int irq_index = DPNI_IRQ_INDEX;
755 unsigned int status = 0, clear = 0;
757 PMD_INIT_FUNC_TRACE();
760 DPAA2_PMD_ERR("dpni is NULL");
764 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
767 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
772 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
773 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
774 dpaa2_dev_link_update(dev, 0);
775 /* calling all the apps registered for link status event */
776 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
780 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
783 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
787 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
790 struct dpaa2_dev_priv *priv = dev->data->dev_private;
791 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
792 int irq_index = DPNI_IRQ_INDEX;
793 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
795 PMD_INIT_FUNC_TRACE();
797 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
800 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
805 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
808 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
815 dpaa2_dev_start(struct rte_eth_dev *dev)
817 struct rte_device *rdev = dev->device;
818 struct rte_dpaa2_device *dpaa2_dev;
819 struct rte_eth_dev_data *data = dev->data;
820 struct dpaa2_dev_priv *priv = data->dev_private;
821 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
822 struct dpni_queue cfg;
823 struct dpni_error_cfg err_cfg;
825 struct dpni_queue_id qid;
826 struct dpaa2_queue *dpaa2_q;
828 struct rte_intr_handle *intr_handle;
830 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
831 intr_handle = &dpaa2_dev->intr_handle;
833 PMD_INIT_FUNC_TRACE();
835 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
837 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
842 /* Power up the phy. Needed to make the link go UP */
843 dpaa2_dev_set_link_up(dev);
845 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
846 DPNI_QUEUE_TX, &qdid);
848 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
853 for (i = 0; i < data->nb_rx_queues; i++) {
854 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
855 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
856 DPNI_QUEUE_RX, dpaa2_q->tc_index,
857 dpaa2_q->flow_id, &cfg, &qid);
859 DPAA2_PMD_ERR("Error in getting flow information: "
863 dpaa2_q->fqid = qid.fqid;
866 /*checksum errors, send them to normal path and set it in annotation */
867 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
869 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
870 err_cfg.set_frame_annotation = true;
872 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
873 priv->token, &err_cfg);
875 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
880 /* if the interrupts were configured on this devices*/
881 if (intr_handle && (intr_handle->fd) &&
882 (dev->data->dev_conf.intr_conf.lsc != 0)) {
883 /* Registering LSC interrupt handler */
884 rte_intr_callback_register(intr_handle,
885 dpaa2_interrupt_handler,
888 /* enable vfio intr/eventfd mapping
889 * Interrupt index 0 is required, so we can not use
892 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
894 /* enable dpni_irqs */
895 dpaa2_eth_setup_irqs(dev, 1);
898 /* Change the tx burst function if ordered queues are used */
899 if (priv->en_ordered)
900 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
906 * This routine disables all traffic on the adapter by issuing a
907 * global reset on the MAC.
910 dpaa2_dev_stop(struct rte_eth_dev *dev)
912 struct dpaa2_dev_priv *priv = dev->data->dev_private;
913 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
915 struct rte_eth_link link;
916 struct rte_intr_handle *intr_handle = dev->intr_handle;
918 PMD_INIT_FUNC_TRACE();
920 /* reset interrupt callback */
921 if (intr_handle && (intr_handle->fd) &&
922 (dev->data->dev_conf.intr_conf.lsc != 0)) {
923 /*disable dpni irqs */
924 dpaa2_eth_setup_irqs(dev, 0);
926 /* disable vfio intr before callback unregister */
927 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
929 /* Unregistering LSC interrupt handler */
930 rte_intr_callback_unregister(intr_handle,
931 dpaa2_interrupt_handler,
935 dpaa2_dev_set_link_down(dev);
937 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
939 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
944 /* clear the recorded link status */
945 memset(&link, 0, sizeof(link));
946 rte_eth_linkstatus_set(dev, &link);
950 dpaa2_dev_close(struct rte_eth_dev *dev)
952 struct dpaa2_dev_priv *priv = dev->data->dev_private;
953 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
955 struct rte_eth_link link;
957 PMD_INIT_FUNC_TRACE();
959 /* Clean the device first */
960 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
962 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
966 memset(&link, 0, sizeof(link));
967 rte_eth_linkstatus_set(dev, &link);
971 dpaa2_dev_promiscuous_enable(
972 struct rte_eth_dev *dev)
975 struct dpaa2_dev_priv *priv = dev->data->dev_private;
976 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
978 PMD_INIT_FUNC_TRACE();
981 DPAA2_PMD_ERR("dpni is NULL");
985 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
987 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
989 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
991 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
995 dpaa2_dev_promiscuous_disable(
996 struct rte_eth_dev *dev)
999 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1000 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1002 PMD_INIT_FUNC_TRACE();
1005 DPAA2_PMD_ERR("dpni is NULL");
1009 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1011 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1013 if (dev->data->all_multicast == 0) {
1014 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1015 priv->token, false);
1017 DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1023 dpaa2_dev_allmulticast_enable(
1024 struct rte_eth_dev *dev)
1027 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1028 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1030 PMD_INIT_FUNC_TRACE();
1033 DPAA2_PMD_ERR("dpni is NULL");
1037 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1039 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1043 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1046 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1047 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1049 PMD_INIT_FUNC_TRACE();
1052 DPAA2_PMD_ERR("dpni is NULL");
1056 /* must remain on for all promiscuous */
1057 if (dev->data->promiscuous == 1)
1060 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1062 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1066 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1069 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1070 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1071 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
1074 PMD_INIT_FUNC_TRACE();
1077 DPAA2_PMD_ERR("dpni is NULL");
1081 /* check that mtu is within the allowed range */
1082 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
1085 if (frame_size > ETHER_MAX_LEN)
1086 dev->data->dev_conf.rxmode.offloads &=
1087 DEV_RX_OFFLOAD_JUMBO_FRAME;
1089 dev->data->dev_conf.rxmode.offloads &=
1090 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1092 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1094 /* Set the Max Rx frame length as 'mtu' +
1095 * Maximum Ethernet header length
1097 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1100 DPAA2_PMD_ERR("Setting the max frame length failed");
1103 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1108 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1109 struct ether_addr *addr,
1110 __rte_unused uint32_t index,
1111 __rte_unused uint32_t pool)
1114 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1115 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1117 PMD_INIT_FUNC_TRACE();
1120 DPAA2_PMD_ERR("dpni is NULL");
1124 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1125 priv->token, addr->addr_bytes);
1128 "error: Adding the MAC ADDR failed: err = %d", ret);
1133 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1137 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1138 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1139 struct rte_eth_dev_data *data = dev->data;
1140 struct ether_addr *macaddr;
1142 PMD_INIT_FUNC_TRACE();
1144 macaddr = &data->mac_addrs[index];
1147 DPAA2_PMD_ERR("dpni is NULL");
1151 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1152 priv->token, macaddr->addr_bytes);
1155 "error: Removing the MAC ADDR failed: err = %d", ret);
1159 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1160 struct ether_addr *addr)
1163 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1164 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1166 PMD_INIT_FUNC_TRACE();
1169 DPAA2_PMD_ERR("dpni is NULL");
1173 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1174 priv->token, addr->addr_bytes);
1178 "error: Setting the MAC ADDR failed %d", ret);
1184 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1185 struct rte_eth_stats *stats)
1187 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1188 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1190 uint8_t page0 = 0, page1 = 1, page2 = 2;
1191 union dpni_statistics value;
1193 struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1195 memset(&value, 0, sizeof(union dpni_statistics));
1197 PMD_INIT_FUNC_TRACE();
1200 DPAA2_PMD_ERR("dpni is NULL");
1205 DPAA2_PMD_ERR("stats is NULL");
1209 /*Get Counters from page_0*/
1210 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1215 stats->ipackets = value.page_0.ingress_all_frames;
1216 stats->ibytes = value.page_0.ingress_all_bytes;
1218 /*Get Counters from page_1*/
1219 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1224 stats->opackets = value.page_1.egress_all_frames;
1225 stats->obytes = value.page_1.egress_all_bytes;
1227 /*Get Counters from page_2*/
1228 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1233 /* Ingress drop frame count due to configured rules */
1234 stats->ierrors = value.page_2.ingress_filtered_frames;
1235 /* Ingress drop frame count due to error */
1236 stats->ierrors += value.page_2.ingress_discarded_frames;
1238 stats->oerrors = value.page_2.egress_discarded_frames;
1239 stats->imissed = value.page_2.ingress_nobuffer_discards;
1241 /* Fill in per queue stats */
1242 for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1243 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1244 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1245 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1247 stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1249 stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1251 /* Byte counting is not implemented */
1252 stats->q_ibytes[i] = 0;
1253 stats->q_obytes[i] = 0;
1259 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1264 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1267 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1268 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1270 union dpni_statistics value[3] = {};
1271 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1279 /* Get Counters from page_0*/
1280 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1285 /* Get Counters from page_1*/
1286 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1291 /* Get Counters from page_2*/
1292 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1297 for (i = 0; i < num; i++) {
1299 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1300 raw.counter[dpaa2_xstats_strings[i].stats_id];
1304 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1309 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1310 struct rte_eth_xstat_name *xstats_names,
1313 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1315 if (limit < stat_cnt)
1318 if (xstats_names != NULL)
1319 for (i = 0; i < stat_cnt; i++)
1320 snprintf(xstats_names[i].name,
1321 sizeof(xstats_names[i].name),
1323 dpaa2_xstats_strings[i].name);
1329 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1330 uint64_t *values, unsigned int n)
1332 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1333 uint64_t values_copy[stat_cnt];
1336 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1337 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1339 union dpni_statistics value[3] = {};
1347 /* Get Counters from page_0*/
1348 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1353 /* Get Counters from page_1*/
1354 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1359 /* Get Counters from page_2*/
1360 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1365 for (i = 0; i < stat_cnt; i++) {
1366 values[i] = value[dpaa2_xstats_strings[i].page_id].
1367 raw.counter[dpaa2_xstats_strings[i].stats_id];
1372 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1374 for (i = 0; i < n; i++) {
1375 if (ids[i] >= stat_cnt) {
1376 DPAA2_PMD_ERR("xstats id value isn't valid");
1379 values[i] = values_copy[ids[i]];
1385 dpaa2_xstats_get_names_by_id(
1386 struct rte_eth_dev *dev,
1387 struct rte_eth_xstat_name *xstats_names,
1388 const uint64_t *ids,
1391 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1392 struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1395 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1397 dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1399 for (i = 0; i < limit; i++) {
1400 if (ids[i] >= stat_cnt) {
1401 DPAA2_PMD_ERR("xstats id value isn't valid");
1404 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1410 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1412 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1413 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1416 struct dpaa2_queue *dpaa2_q;
1418 PMD_INIT_FUNC_TRACE();
1421 DPAA2_PMD_ERR("dpni is NULL");
1425 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1429 /* Reset the per queue stats in dpaa2_queue structure */
1430 for (i = 0; i < priv->nb_rx_queues; i++) {
1431 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1433 dpaa2_q->rx_pkts = 0;
1436 for (i = 0; i < priv->nb_tx_queues; i++) {
1437 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1439 dpaa2_q->tx_pkts = 0;
1445 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1449 /* return 0 means link status changed, -1 means not changed */
1451 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1452 int wait_to_complete __rte_unused)
1455 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1456 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1457 struct rte_eth_link link;
1458 struct dpni_link_state state = {0};
1461 DPAA2_PMD_ERR("dpni is NULL");
1465 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1467 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1471 memset(&link, 0, sizeof(struct rte_eth_link));
1472 link.link_status = state.up;
1473 link.link_speed = state.rate;
1475 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1476 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1478 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1480 ret = rte_eth_linkstatus_set(dev, &link);
1482 DPAA2_PMD_DEBUG("No change in status");
1484 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1485 link.link_status ? "Up" : "Down");
1491 * Toggle the DPNI to enable, if not already enabled.
1492 * This is not strictly PHY up/down - it is more of logical toggling.
1495 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1498 struct dpaa2_dev_priv *priv;
1499 struct fsl_mc_io *dpni;
1501 struct dpni_link_state state = {0};
1503 priv = dev->data->dev_private;
1504 dpni = (struct fsl_mc_io *)priv->hw;
1507 DPAA2_PMD_ERR("dpni is NULL");
1511 /* Check if DPNI is currently enabled */
1512 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1514 /* Unable to obtain dpni status; Not continuing */
1515 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1519 /* Enable link if not already enabled */
1521 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1523 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1527 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1529 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1533 /* changing tx burst function to start enqueues */
1534 dev->tx_pkt_burst = dpaa2_dev_tx;
1535 dev->data->dev_link.link_status = state.up;
1538 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1540 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1545 * Toggle the DPNI to disable, if not already disabled.
1546 * This is not strictly PHY up/down - it is more of logical toggling.
1549 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1552 struct dpaa2_dev_priv *priv;
1553 struct fsl_mc_io *dpni;
1554 int dpni_enabled = 0;
1557 PMD_INIT_FUNC_TRACE();
1559 priv = dev->data->dev_private;
1560 dpni = (struct fsl_mc_io *)priv->hw;
1563 DPAA2_PMD_ERR("Device has not yet been configured");
1567 /*changing tx burst function to avoid any more enqueues */
1568 dev->tx_pkt_burst = dummy_dev_tx;
1570 /* Loop while dpni_disable() attempts to drain the egress FQs
1571 * and confirm them back to us.
1574 ret = dpni_disable(dpni, 0, priv->token);
1576 DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1579 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1581 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1585 /* Allow the MC some slack */
1586 rte_delay_us(100 * 1000);
1587 } while (dpni_enabled && --retries);
1590 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1591 /* todo- we may have to manually cleanup queues.
1594 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1595 dev->data->port_id);
1598 dev->data->dev_link.link_status = 0;
1604 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1607 struct dpaa2_dev_priv *priv;
1608 struct fsl_mc_io *dpni;
1609 struct dpni_link_state state = {0};
1611 PMD_INIT_FUNC_TRACE();
1613 priv = dev->data->dev_private;
1614 dpni = (struct fsl_mc_io *)priv->hw;
1616 if (dpni == NULL || fc_conf == NULL) {
1617 DPAA2_PMD_ERR("device not configured");
1621 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1623 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1627 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1628 if (state.options & DPNI_LINK_OPT_PAUSE) {
1629 /* DPNI_LINK_OPT_PAUSE set
1630 * if ASYM_PAUSE not set,
1631 * RX Side flow control (handle received Pause frame)
1632 * TX side flow control (send Pause frame)
1633 * if ASYM_PAUSE set,
1634 * RX Side flow control (handle received Pause frame)
1635 * No TX side flow control (send Pause frame disabled)
1637 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1638 fc_conf->mode = RTE_FC_FULL;
1640 fc_conf->mode = RTE_FC_RX_PAUSE;
1642 /* DPNI_LINK_OPT_PAUSE not set
1643 * if ASYM_PAUSE set,
1644 * TX side flow control (send Pause frame)
1645 * No RX side flow control (No action on pause frame rx)
1646 * if ASYM_PAUSE not set,
1647 * Flow control disabled
1649 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1650 fc_conf->mode = RTE_FC_TX_PAUSE;
1652 fc_conf->mode = RTE_FC_NONE;
1659 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1662 struct dpaa2_dev_priv *priv;
1663 struct fsl_mc_io *dpni;
1664 struct dpni_link_state state = {0};
1665 struct dpni_link_cfg cfg = {0};
1667 PMD_INIT_FUNC_TRACE();
1669 priv = dev->data->dev_private;
1670 dpni = (struct fsl_mc_io *)priv->hw;
1673 DPAA2_PMD_ERR("dpni is NULL");
1677 /* It is necessary to obtain the current state before setting fc_conf
1678 * as MC would return error in case rate, autoneg or duplex values are
1681 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1683 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1687 /* Disable link before setting configuration */
1688 dpaa2_dev_set_link_down(dev);
1690 /* Based on fc_conf, update cfg */
1691 cfg.rate = state.rate;
1692 cfg.options = state.options;
1694 /* update cfg with fc_conf */
1695 switch (fc_conf->mode) {
1697 /* Full flow control;
1698 * OPT_PAUSE set, ASYM_PAUSE not set
1700 cfg.options |= DPNI_LINK_OPT_PAUSE;
1701 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1703 case RTE_FC_TX_PAUSE:
1704 /* Enable RX flow control
1705 * OPT_PAUSE not set;
1708 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1709 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1711 case RTE_FC_RX_PAUSE:
1712 /* Enable TX Flow control
1716 cfg.options |= DPNI_LINK_OPT_PAUSE;
1717 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1720 /* Disable Flow control
1722 * ASYM_PAUSE not set
1724 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1725 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1728 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1733 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1735 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1739 dpaa2_dev_set_link_up(dev);
1745 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1746 struct rte_eth_rss_conf *rss_conf)
1748 struct rte_eth_dev_data *data = dev->data;
1749 struct rte_eth_conf *eth_conf = &data->dev_conf;
1752 PMD_INIT_FUNC_TRACE();
1754 if (rss_conf->rss_hf) {
1755 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1757 DPAA2_PMD_ERR("Unable to set flow dist");
1761 ret = dpaa2_remove_flow_dist(dev, 0);
1763 DPAA2_PMD_ERR("Unable to remove flow dist");
1767 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1772 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1773 struct rte_eth_rss_conf *rss_conf)
1775 struct rte_eth_dev_data *data = dev->data;
1776 struct rte_eth_conf *eth_conf = &data->dev_conf;
1778 /* dpaa2 does not support rss_key, so length should be 0*/
1779 rss_conf->rss_key_len = 0;
1780 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1784 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1785 int eth_rx_queue_id,
1787 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1789 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1790 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1791 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1792 uint8_t flow_id = dpaa2_ethq->flow_id;
1793 struct dpni_queue cfg;
1797 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1798 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1799 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1800 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1801 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
1802 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
1806 memset(&cfg, 0, sizeof(struct dpni_queue));
1807 options = DPNI_QUEUE_OPT_DEST;
1808 cfg.destination.type = DPNI_DEST_DPCON;
1809 cfg.destination.id = dpcon_id;
1810 cfg.destination.priority = queue_conf->ev.priority;
1812 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1813 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1814 cfg.destination.hold_active = 1;
1817 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
1818 !eth_priv->en_ordered) {
1819 struct opr_cfg ocfg;
1821 /* Restoration window size = 256 frames */
1823 /* Restoration window size = 512 frames for LX2 */
1824 if (dpaa2_svr_family == SVR_LX2160A)
1826 /* Auto advance NESN window enabled */
1828 /* Late arrival window size disabled */
1830 /* ORL resource exhaustaion advance NESN disabled */
1832 /* Loose ordering enabled */
1834 eth_priv->en_loose_ordered = 1;
1835 /* Strict ordering enabled if explicitly set */
1836 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
1838 eth_priv->en_loose_ordered = 0;
1841 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
1842 dpaa2_ethq->tc_index, flow_id,
1843 OPR_OPT_CREATE, &ocfg);
1845 DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
1849 eth_priv->en_ordered = 1;
1852 options |= DPNI_QUEUE_OPT_USER_CTX;
1853 cfg.user_context = (size_t)(dpaa2_ethq);
1855 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1856 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1858 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1862 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
1867 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
1868 int eth_rx_queue_id)
1870 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1871 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1872 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1873 uint8_t flow_id = dpaa2_ethq->flow_id;
1874 struct dpni_queue cfg;
1878 memset(&cfg, 0, sizeof(struct dpni_queue));
1879 options = DPNI_QUEUE_OPT_DEST;
1880 cfg.destination.type = DPNI_DEST_NONE;
1882 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1883 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1885 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1890 static struct eth_dev_ops dpaa2_ethdev_ops = {
1891 .dev_configure = dpaa2_eth_dev_configure,
1892 .dev_start = dpaa2_dev_start,
1893 .dev_stop = dpaa2_dev_stop,
1894 .dev_close = dpaa2_dev_close,
1895 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1896 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1897 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1898 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1899 .dev_set_link_up = dpaa2_dev_set_link_up,
1900 .dev_set_link_down = dpaa2_dev_set_link_down,
1901 .link_update = dpaa2_dev_link_update,
1902 .stats_get = dpaa2_dev_stats_get,
1903 .xstats_get = dpaa2_dev_xstats_get,
1904 .xstats_get_by_id = dpaa2_xstats_get_by_id,
1905 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1906 .xstats_get_names = dpaa2_xstats_get_names,
1907 .stats_reset = dpaa2_dev_stats_reset,
1908 .xstats_reset = dpaa2_dev_stats_reset,
1909 .fw_version_get = dpaa2_fw_version_get,
1910 .dev_infos_get = dpaa2_dev_info_get,
1911 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1912 .mtu_set = dpaa2_dev_mtu_set,
1913 .vlan_filter_set = dpaa2_vlan_filter_set,
1914 .vlan_offload_set = dpaa2_vlan_offload_set,
1915 .vlan_tpid_set = dpaa2_vlan_tpid_set,
1916 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1917 .rx_queue_release = dpaa2_dev_rx_queue_release,
1918 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1919 .tx_queue_release = dpaa2_dev_tx_queue_release,
1920 .rx_queue_count = dpaa2_dev_rx_queue_count,
1921 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1922 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1923 .mac_addr_add = dpaa2_dev_add_mac_addr,
1924 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1925 .mac_addr_set = dpaa2_dev_set_mac_addr,
1926 .rss_hash_update = dpaa2_dev_rss_hash_update,
1927 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
1930 /* Populate the mac address from physically available (u-boot/firmware) and/or
1931 * one set by higher layers like MC (restool) etc.
1932 * Returns the table of MAC entries (multiple entries)
1935 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
1936 struct ether_addr *mac_entry)
1939 struct ether_addr phy_mac, prime_mac;
1941 memset(&phy_mac, 0, sizeof(struct ether_addr));
1942 memset(&prime_mac, 0, sizeof(struct ether_addr));
1944 /* Get the physical device MAC address */
1945 ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
1946 phy_mac.addr_bytes);
1948 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
1952 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
1953 prime_mac.addr_bytes);
1955 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
1959 /* Now that both MAC have been obtained, do:
1960 * if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
1962 * If empty_mac(phy), return prime.
1963 * if both are empty, create random MAC, set as prime and return
1965 if (!is_zero_ether_addr(&phy_mac)) {
1966 /* If the addresses are not same, overwrite prime */
1967 if (!is_same_ether_addr(&phy_mac, &prime_mac)) {
1968 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1970 phy_mac.addr_bytes);
1972 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
1976 memcpy(&prime_mac, &phy_mac, sizeof(struct ether_addr));
1978 } else if (is_zero_ether_addr(&prime_mac)) {
1979 /* In case phys and prime, both are zero, create random MAC */
1980 eth_random_addr(prime_mac.addr_bytes);
1981 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1983 prime_mac.addr_bytes);
1985 DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
1990 /* prime_mac the final MAC address */
1991 memcpy(mac_entry, &prime_mac, sizeof(struct ether_addr));
1999 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2001 struct rte_device *dev = eth_dev->device;
2002 struct rte_dpaa2_device *dpaa2_dev;
2003 struct fsl_mc_io *dpni_dev;
2004 struct dpni_attr attr;
2005 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2006 struct dpni_buffer_layout layout;
2009 PMD_INIT_FUNC_TRACE();
2011 /* For secondary processes, the primary has done all the work */
2012 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2013 /* In case of secondary, only burst and ops API need to be
2016 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2017 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2018 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2022 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2024 hw_id = dpaa2_dev->object_id;
2026 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2028 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2032 dpni_dev->regs = rte_mcp_ptr_list[0];
2033 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2036 "Failure in opening dpni@%d with err code %d",
2042 /* Clean the device first */
2043 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2045 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2050 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2053 "Failure in get dpni@%d attribute, err code %d",
2058 priv->num_rx_tc = attr.num_rx_tcs;
2060 /* Resetting the "num_rx_queues" to equal number of queues in first TC
2061 * as only one TC is supported on Rx Side. Once Multiple TCs will be
2062 * in use for Rx processing then this will be changed or removed.
2064 priv->nb_rx_queues = attr.num_queues;
2066 /* Using number of TX queues as number of TX TCs */
2067 priv->nb_tx_queues = attr.num_tx_tcs;
2069 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
2070 priv->num_rx_tc, priv->nb_rx_queues,
2071 priv->nb_tx_queues);
2073 priv->hw = dpni_dev;
2074 priv->hw_id = hw_id;
2075 priv->options = attr.options;
2076 priv->max_mac_filters = attr.mac_filter_entries;
2077 priv->max_vlan_filters = attr.vlan_filter_entries;
2080 /* Allocate memory for hardware structure for queues */
2081 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2083 DPAA2_PMD_ERR("Queue allocation Failed");
2087 /* Allocate memory for storing MAC addresses.
2088 * Table of mac_filter_entries size is allocated so that RTE ether lib
2089 * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2091 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2092 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2093 if (eth_dev->data->mac_addrs == NULL) {
2095 "Failed to allocate %d bytes needed to store MAC addresses",
2096 ETHER_ADDR_LEN * attr.mac_filter_entries);
2101 ret = populate_mac_addr(dpni_dev, priv, ð_dev->data->mac_addrs[0]);
2103 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2104 rte_free(eth_dev->data->mac_addrs);
2105 eth_dev->data->mac_addrs = NULL;
2109 /* ... tx buffer layout ... */
2110 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2111 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2112 layout.pass_frame_status = 1;
2113 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2114 DPNI_QUEUE_TX, &layout);
2116 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2120 /* ... tx-conf and error buffer layout ... */
2121 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2122 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2123 layout.pass_frame_status = 1;
2124 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2125 DPNI_QUEUE_TX_CONFIRM, &layout);
2127 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2132 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2134 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2135 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2137 RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2140 dpaa2_dev_uninit(eth_dev);
2145 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2147 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2148 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
2151 PMD_INIT_FUNC_TRACE();
2153 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2157 DPAA2_PMD_WARN("Already closed or not started");
2161 dpaa2_dev_close(eth_dev);
2163 dpaa2_free_rx_tx_queues(eth_dev);
2165 /* Close the device at underlying layer*/
2166 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2169 "Failure closing dpni device with err code %d",
2173 /* Free the allocated memory for ethernet private data and dpni*/
2177 eth_dev->dev_ops = NULL;
2178 eth_dev->rx_pkt_burst = NULL;
2179 eth_dev->tx_pkt_burst = NULL;
2181 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2186 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2187 struct rte_dpaa2_device *dpaa2_dev)
2189 struct rte_eth_dev *eth_dev;
2192 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2193 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2196 eth_dev->data->dev_private = rte_zmalloc(
2197 "ethdev private structure",
2198 sizeof(struct dpaa2_dev_priv),
2199 RTE_CACHE_LINE_SIZE);
2200 if (eth_dev->data->dev_private == NULL) {
2202 "Unable to allocate memory for private data");
2203 rte_eth_dev_release_port(eth_dev);
2207 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2212 eth_dev->device = &dpaa2_dev->device;
2214 dpaa2_dev->eth_dev = eth_dev;
2215 eth_dev->data->rx_mbuf_alloc_failed = 0;
2217 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2218 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2220 /* Invoke PMD device initialization function */
2221 diag = dpaa2_dev_init(eth_dev);
2223 rte_eth_dev_probing_finish(eth_dev);
2227 rte_eth_dev_release_port(eth_dev);
2232 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2234 struct rte_eth_dev *eth_dev;
2236 eth_dev = dpaa2_dev->eth_dev;
2237 dpaa2_dev_uninit(eth_dev);
2239 rte_eth_dev_release_port(eth_dev);
2244 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2245 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2246 .drv_type = DPAA2_ETH,
2247 .probe = rte_dpaa2_probe,
2248 .remove = rte_dpaa2_remove,
2251 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2253 RTE_INIT(dpaa2_pmd_init_log)
2255 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2256 if (dpaa2_logtype_pmd >= 0)
2257 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);