4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5 * Copyright (c) 2016 NXP. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_memcpy.h>
41 #include <rte_string_fns.h>
42 #include <rte_cycles.h>
43 #include <rte_kvargs.h>
45 #include <rte_ethdev.h>
46 #include <rte_fslmc.h>
48 #include <fslmc_logs.h>
49 #include <fslmc_vfio.h>
50 #include <dpaa2_hw_pvt.h>
51 #include <dpaa2_hw_mempool.h>
52 #include <dpaa2_hw_dpio.h>
54 #include "dpaa2_ethdev.h"
56 static struct rte_dpaa2_driver rte_dpaa2_pmd;
57 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
60 * Atomically reads the link status information from global
61 * structure rte_eth_dev.
64 * - Pointer to the structure rte_eth_dev to read from.
65 * - Pointer to the buffer to be saved with the link status.
69 * - On failure, negative value.
72 dpaa2_dev_atomic_read_link_status(struct rte_eth_dev *dev,
73 struct rte_eth_link *link)
75 struct rte_eth_link *dst = link;
76 struct rte_eth_link *src = &dev->data->dev_link;
78 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
79 *(uint64_t *)src) == 0)
86 * Atomically writes the link status information into global
87 * structure rte_eth_dev.
90 * - Pointer to the structure rte_eth_dev to read from.
91 * - Pointer to the buffer to be saved with the link status.
95 * - On failure, negative value.
98 dpaa2_dev_atomic_write_link_status(struct rte_eth_dev *dev,
99 struct rte_eth_link *link)
101 struct rte_eth_link *dst = &dev->data->dev_link;
102 struct rte_eth_link *src = link;
104 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
105 *(uint64_t *)src) == 0)
112 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
115 struct dpaa2_dev_priv *priv = dev->data->dev_private;
116 struct fsl_mc_io *dpni = priv->hw;
118 PMD_INIT_FUNC_TRACE();
121 RTE_LOG(ERR, PMD, "dpni is NULL");
126 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
127 priv->token, vlan_id);
129 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
130 priv->token, vlan_id);
133 PMD_DRV_LOG(ERR, "ret = %d Unable to add/rem vlan %d hwid =%d",
134 ret, vlan_id, priv->hw_id);
140 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
142 struct dpaa2_dev_priv *priv = dev->data->dev_private;
143 struct fsl_mc_io *dpni = priv->hw;
146 PMD_INIT_FUNC_TRACE();
148 if (mask & ETH_VLAN_FILTER_MASK) {
149 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
150 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
153 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
156 RTE_LOG(ERR, PMD, "Unable to set vlan filter ret = %d",
162 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
164 struct dpaa2_dev_priv *priv = dev->data->dev_private;
166 PMD_INIT_FUNC_TRACE();
168 dev_info->if_index = priv->hw_id;
170 dev_info->max_mac_addrs = priv->max_mac_filters;
171 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
172 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
173 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
174 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
175 dev_info->rx_offload_capa =
176 DEV_RX_OFFLOAD_IPV4_CKSUM |
177 DEV_RX_OFFLOAD_UDP_CKSUM |
178 DEV_RX_OFFLOAD_TCP_CKSUM |
179 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
180 dev_info->tx_offload_capa =
181 DEV_TX_OFFLOAD_IPV4_CKSUM |
182 DEV_TX_OFFLOAD_UDP_CKSUM |
183 DEV_TX_OFFLOAD_TCP_CKSUM |
184 DEV_TX_OFFLOAD_SCTP_CKSUM |
185 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
186 dev_info->speed_capa = ETH_LINK_SPEED_1G |
187 ETH_LINK_SPEED_2_5G |
192 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
194 struct dpaa2_dev_priv *priv = dev->data->dev_private;
197 struct dpaa2_queue *mc_q, *mcq;
200 struct dpaa2_queue *dpaa2_q;
202 PMD_INIT_FUNC_TRACE();
204 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
205 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
206 RTE_CACHE_LINE_SIZE);
208 PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n");
212 for (i = 0; i < priv->nb_rx_queues; i++) {
214 priv->rx_vq[i] = mc_q++;
215 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
216 dpaa2_q->q_storage = rte_malloc("dq_storage",
217 sizeof(struct queue_storage_info_t),
218 RTE_CACHE_LINE_SIZE);
219 if (!dpaa2_q->q_storage)
222 memset(dpaa2_q->q_storage, 0,
223 sizeof(struct queue_storage_info_t));
224 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
228 for (i = 0; i < priv->nb_tx_queues; i++) {
230 mc_q->flow_id = 0xffff;
231 priv->tx_vq[i] = mc_q++;
232 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
233 dpaa2_q->cscn = rte_malloc(NULL,
234 sizeof(struct qbman_result), 16);
240 for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[DPAA2_DEF_TC];
242 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
243 mcq->tc_index = DPAA2_DEF_TC;
244 mcq->flow_id = dist_idx;
252 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
253 rte_free(dpaa2_q->cscn);
254 priv->tx_vq[i--] = NULL;
256 i = priv->nb_rx_queues;
259 mc_q = priv->rx_vq[0];
261 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
262 dpaa2_free_dq_storage(dpaa2_q->q_storage);
263 rte_free(dpaa2_q->q_storage);
264 priv->rx_vq[i--] = NULL;
271 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
273 struct rte_eth_dev_data *data = dev->data;
274 struct rte_eth_conf *eth_conf = &data->dev_conf;
277 PMD_INIT_FUNC_TRACE();
279 /* Check for correct configuration */
280 if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
281 data->nb_rx_queues > 1) {
282 PMD_INIT_LOG(ERR, "Distribution is not enabled, "
283 "but Rx queues more than 1\n");
287 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
288 /* Return in case number of Rx queues is 1 */
289 if (data->nb_rx_queues == 1)
291 ret = dpaa2_setup_flow_dist(dev,
292 eth_conf->rx_adv_conf.rss_conf.rss_hf);
294 PMD_INIT_LOG(ERR, "unable to set flow distribution."
295 "please check queue config\n");
302 /* Function to setup RX flow information. It contains traffic class ID,
303 * flow ID, destination configuration etc.
306 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
307 uint16_t rx_queue_id,
308 uint16_t nb_rx_desc __rte_unused,
309 unsigned int socket_id __rte_unused,
310 const struct rte_eth_rxconf *rx_conf __rte_unused,
311 struct rte_mempool *mb_pool)
313 struct dpaa2_dev_priv *priv = dev->data->dev_private;
314 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
315 struct dpaa2_queue *dpaa2_q;
316 struct dpni_queue cfg;
322 PMD_INIT_FUNC_TRACE();
324 PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
325 dev, rx_queue_id, mb_pool, rx_conf);
327 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
328 bpid = mempool_to_bpid(mb_pool);
329 ret = dpaa2_attach_bp_list(priv,
330 rte_dpaa2_bpid_info[bpid].bp_list);
334 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
335 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
337 /*Get the tc id and flow id from given VQ id*/
338 flow_id = rx_queue_id % priv->num_dist_per_tc[dpaa2_q->tc_index];
339 memset(&cfg, 0, sizeof(struct dpni_queue));
341 options = options | DPNI_QUEUE_OPT_USER_CTX;
342 cfg.user_context = (uint64_t)(dpaa2_q);
344 /*if ls2088 or rev2 device, enable the stashing */
345 if ((qbman_get_version() & 0xFFFF0000) > QMAN_REV_4000) {
346 options |= DPNI_QUEUE_OPT_FLC;
347 cfg.flc.stash_control = true;
348 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
349 /* 00 00 00 - last 6 bit represent annotation, context stashing,
350 * data stashing setting 01 01 00 (0x14) to enable
351 * 1 line data, 1 line annotation
353 cfg.flc.value |= 0x14;
355 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
356 dpaa2_q->tc_index, flow_id, options, &cfg);
358 PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
362 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
363 struct dpni_taildrop taildrop;
366 /*enabling per rx queue congestion control */
367 taildrop.threshold = CONG_THRESHOLD_RX_Q;
368 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
369 PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
371 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
372 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
373 dpaa2_q->tc_index, flow_id, &taildrop);
375 PMD_INIT_LOG(ERR, "Error in setting the rx flow"
376 " err : = %d\n", ret);
381 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
386 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
387 uint16_t tx_queue_id,
388 uint16_t nb_tx_desc __rte_unused,
389 unsigned int socket_id __rte_unused,
390 const struct rte_eth_txconf *tx_conf __rte_unused)
392 struct dpaa2_dev_priv *priv = dev->data->dev_private;
393 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
394 priv->tx_vq[tx_queue_id];
395 struct fsl_mc_io *dpni = priv->hw;
396 struct dpni_queue tx_conf_cfg;
397 struct dpni_queue tx_flow_cfg;
398 uint8_t options = 0, flow_id;
402 PMD_INIT_FUNC_TRACE();
404 /* Return if queue already configured */
405 if (dpaa2_q->flow_id != 0xffff)
408 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
409 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
411 if (priv->num_tc == 1) {
413 flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
419 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
420 tc_id, flow_id, options, &tx_flow_cfg);
422 PMD_INIT_LOG(ERR, "Error in setting the tx flow: "
423 "tc_id=%d, flow =%d ErrorCode = %x\n",
424 tc_id, flow_id, -ret);
428 dpaa2_q->flow_id = flow_id;
430 if (tx_queue_id == 0) {
431 /*Set tx-conf and error configuration*/
432 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
436 PMD_INIT_LOG(ERR, "Error in set tx conf mode settings"
437 " ErrorCode = %x", ret);
441 dpaa2_q->tc_index = tc_id;
443 if (priv->flags & DPAA2_TX_CGR_SUPPORT) {
444 struct dpni_congestion_notification_cfg cong_notif_cfg;
446 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_BYTES;
447 /* Notify about congestion when the queue size is 32 KB */
448 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
449 /* Notify that the queue is not congested when the data in
450 * the queue is below this thershold.
452 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
453 cong_notif_cfg.message_ctx = 0;
454 cong_notif_cfg.message_iova = (uint64_t)dpaa2_q->cscn;
455 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
456 cong_notif_cfg.notification_mode =
457 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
458 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
459 DPNI_CONG_OPT_COHERENT_WRITE;
461 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
468 "Error in setting tx congestion notification: = %d",
473 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
478 dpaa2_dev_rx_queue_release(void *q __rte_unused)
480 PMD_INIT_FUNC_TRACE();
484 dpaa2_dev_tx_queue_release(void *q __rte_unused)
486 PMD_INIT_FUNC_TRACE();
489 static const uint32_t *
490 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
492 static const uint32_t ptypes[] = {
493 /*todo -= add more types */
496 RTE_PTYPE_L3_IPV4_EXT,
498 RTE_PTYPE_L3_IPV6_EXT,
506 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
512 dpaa2_dev_start(struct rte_eth_dev *dev)
514 struct rte_eth_dev_data *data = dev->data;
515 struct dpaa2_dev_priv *priv = data->dev_private;
516 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
517 struct dpni_queue cfg;
518 struct dpni_error_cfg err_cfg;
520 struct dpni_queue_id qid;
521 struct dpaa2_queue *dpaa2_q;
524 PMD_INIT_FUNC_TRACE();
526 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
528 PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n",
533 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
534 DPNI_QUEUE_TX, &qdid);
536 PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
541 for (i = 0; i < data->nb_rx_queues; i++) {
542 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
543 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
544 DPNI_QUEUE_RX, dpaa2_q->tc_index,
545 dpaa2_q->flow_id, &cfg, &qid);
547 PMD_INIT_LOG(ERR, "Error to get flow "
548 "information Error code = %d\n", ret);
551 dpaa2_q->fqid = qid.fqid;
554 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
555 DPNI_OFF_RX_L3_CSUM, true);
557 PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
561 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
562 DPNI_OFF_RX_L4_CSUM, true);
564 PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
568 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
569 DPNI_OFF_TX_L3_CSUM, true);
571 PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
575 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
576 DPNI_OFF_TX_L4_CSUM, true);
578 PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
582 /*checksum errors, send them to normal path and set it in annotation */
583 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
585 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
586 err_cfg.set_frame_annotation = true;
588 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
589 priv->token, &err_cfg);
591 PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
595 /* VLAN Offload Settings */
596 if (priv->max_vlan_filters)
597 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
603 * This routine disables all traffic on the adapter by issuing a
604 * global reset on the MAC.
607 dpaa2_dev_stop(struct rte_eth_dev *dev)
609 struct dpaa2_dev_priv *priv = dev->data->dev_private;
610 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
612 struct rte_eth_link link;
614 PMD_INIT_FUNC_TRACE();
616 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
618 PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n",
623 /* clear the recorded link status */
624 memset(&link, 0, sizeof(link));
625 dpaa2_dev_atomic_write_link_status(dev, &link);
629 dpaa2_dev_close(struct rte_eth_dev *dev)
631 struct rte_eth_dev_data *data = dev->data;
632 struct dpaa2_dev_priv *priv = dev->data->dev_private;
633 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
635 struct dpaa2_queue *dpaa2_q;
637 PMD_INIT_FUNC_TRACE();
639 for (i = 0; i < data->nb_tx_queues; i++) {
640 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
641 if (!dpaa2_q->cscn) {
642 rte_free(dpaa2_q->cscn);
643 dpaa2_q->cscn = NULL;
647 /* Clean the device first */
648 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
650 PMD_INIT_LOG(ERR, "Failure cleaning dpni device with"
651 " error code %d\n", ret);
657 dpaa2_dev_promiscuous_enable(
658 struct rte_eth_dev *dev)
661 struct dpaa2_dev_priv *priv = dev->data->dev_private;
662 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
664 PMD_INIT_FUNC_TRACE();
667 RTE_LOG(ERR, PMD, "dpni is NULL");
671 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
673 RTE_LOG(ERR, PMD, "Unable to enable U promisc mode %d", ret);
675 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
677 RTE_LOG(ERR, PMD, "Unable to enable M promisc mode %d", ret);
681 dpaa2_dev_promiscuous_disable(
682 struct rte_eth_dev *dev)
685 struct dpaa2_dev_priv *priv = dev->data->dev_private;
686 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
688 PMD_INIT_FUNC_TRACE();
691 RTE_LOG(ERR, PMD, "dpni is NULL");
695 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
697 RTE_LOG(ERR, PMD, "Unable to disable U promisc mode %d", ret);
699 if (dev->data->all_multicast == 0) {
700 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
703 RTE_LOG(ERR, PMD, "Unable to disable M promisc mode %d",
709 dpaa2_dev_allmulticast_enable(
710 struct rte_eth_dev *dev)
713 struct dpaa2_dev_priv *priv = dev->data->dev_private;
714 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
716 PMD_INIT_FUNC_TRACE();
719 RTE_LOG(ERR, PMD, "dpni is NULL");
723 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
725 RTE_LOG(ERR, PMD, "Unable to enable multicast mode %d", ret);
729 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
732 struct dpaa2_dev_priv *priv = dev->data->dev_private;
733 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
735 PMD_INIT_FUNC_TRACE();
738 RTE_LOG(ERR, PMD, "dpni is NULL");
742 /* must remain on for all promiscuous */
743 if (dev->data->promiscuous == 1)
746 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
748 RTE_LOG(ERR, PMD, "Unable to disable multicast mode %d", ret);
752 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
755 struct dpaa2_dev_priv *priv = dev->data->dev_private;
756 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
757 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
759 PMD_INIT_FUNC_TRACE();
762 RTE_LOG(ERR, PMD, "dpni is NULL");
766 /* check that mtu is within the allowed range */
767 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
770 /* Set the Max Rx frame length as 'mtu' +
771 * Maximum Ethernet header length
773 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
774 mtu + ETH_VLAN_HLEN);
776 PMD_DRV_LOG(ERR, "setting the max frame length failed");
779 PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
784 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
785 struct ether_addr *addr,
786 __rte_unused uint32_t index,
787 __rte_unused uint32_t pool)
790 struct dpaa2_dev_priv *priv = dev->data->dev_private;
791 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
793 PMD_INIT_FUNC_TRACE();
796 RTE_LOG(ERR, PMD, "dpni is NULL");
800 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
801 priv->token, addr->addr_bytes);
803 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
809 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
813 struct dpaa2_dev_priv *priv = dev->data->dev_private;
814 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
815 struct rte_eth_dev_data *data = dev->data;
816 struct ether_addr *macaddr;
818 PMD_INIT_FUNC_TRACE();
820 macaddr = &data->mac_addrs[index];
823 RTE_LOG(ERR, PMD, "dpni is NULL");
827 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
828 priv->token, macaddr->addr_bytes);
830 RTE_LOG(ERR, PMD, "error: Removing the MAC ADDR failed:"
835 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
836 struct ether_addr *addr)
839 struct dpaa2_dev_priv *priv = dev->data->dev_private;
840 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
842 PMD_INIT_FUNC_TRACE();
845 RTE_LOG(ERR, PMD, "dpni is NULL");
849 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
850 priv->token, addr->addr_bytes);
853 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
856 void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
857 struct rte_eth_stats *stats)
859 struct dpaa2_dev_priv *priv = dev->data->dev_private;
860 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
862 uint8_t page0 = 0, page1 = 1, page2 = 2;
863 union dpni_statistics value;
865 memset(&value, 0, sizeof(union dpni_statistics));
867 PMD_INIT_FUNC_TRACE();
870 RTE_LOG(ERR, PMD, "dpni is NULL");
875 RTE_LOG(ERR, PMD, "stats is NULL");
879 /*Get Counters from page_0*/
880 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
885 stats->ipackets = value.page_0.ingress_all_frames;
886 stats->ibytes = value.page_0.ingress_all_bytes;
888 /*Get Counters from page_1*/
889 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
894 stats->opackets = value.page_1.egress_all_frames;
895 stats->obytes = value.page_1.egress_all_bytes;
897 /*Get Counters from page_2*/
898 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
903 /* Ingress drop frame count due to configured rules */
904 stats->ierrors = value.page_2.ingress_filtered_frames;
905 /* Ingress drop frame count due to error */
906 stats->ierrors += value.page_2.ingress_discarded_frames;
908 stats->oerrors = value.page_2.egress_discarded_frames;
909 stats->imissed = value.page_2.ingress_nobuffer_discards;
914 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
919 void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
921 struct dpaa2_dev_priv *priv = dev->data->dev_private;
922 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
925 PMD_INIT_FUNC_TRACE();
928 RTE_LOG(ERR, PMD, "dpni is NULL");
932 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
939 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
943 /* return 0 means link status changed, -1 means not changed */
945 dpaa2_dev_link_update(struct rte_eth_dev *dev,
946 int wait_to_complete __rte_unused)
949 struct dpaa2_dev_priv *priv = dev->data->dev_private;
950 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
951 struct rte_eth_link link, old;
952 struct dpni_link_state state = {0};
954 PMD_INIT_FUNC_TRACE();
957 RTE_LOG(ERR, PMD, "error : dpni is NULL");
960 memset(&old, 0, sizeof(old));
961 dpaa2_dev_atomic_read_link_status(dev, &old);
963 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
965 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret);
969 if ((old.link_status == state.up) && (old.link_speed == state.rate)) {
970 RTE_LOG(DEBUG, PMD, "No change in status\n");
974 memset(&link, 0, sizeof(struct rte_eth_link));
975 link.link_status = state.up;
976 link.link_speed = state.rate;
978 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
979 link.link_duplex = ETH_LINK_HALF_DUPLEX;
981 link.link_duplex = ETH_LINK_FULL_DUPLEX;
983 dpaa2_dev_atomic_write_link_status(dev, &link);
985 if (link.link_status)
986 PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
988 PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id);
992 static struct eth_dev_ops dpaa2_ethdev_ops = {
993 .dev_configure = dpaa2_eth_dev_configure,
994 .dev_start = dpaa2_dev_start,
995 .dev_stop = dpaa2_dev_stop,
996 .dev_close = dpaa2_dev_close,
997 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
998 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
999 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1000 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1001 .link_update = dpaa2_dev_link_update,
1002 .stats_get = dpaa2_dev_stats_get,
1003 .stats_reset = dpaa2_dev_stats_reset,
1004 .dev_infos_get = dpaa2_dev_info_get,
1005 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1006 .mtu_set = dpaa2_dev_mtu_set,
1007 .vlan_filter_set = dpaa2_vlan_filter_set,
1008 .vlan_offload_set = dpaa2_vlan_offload_set,
1009 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1010 .rx_queue_release = dpaa2_dev_rx_queue_release,
1011 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1012 .tx_queue_release = dpaa2_dev_tx_queue_release,
1013 .mac_addr_add = dpaa2_dev_add_mac_addr,
1014 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1015 .mac_addr_set = dpaa2_dev_set_mac_addr,
1019 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
1021 struct rte_device *dev = eth_dev->device;
1022 struct rte_dpaa2_device *dpaa2_dev;
1023 struct fsl_mc_io *dpni_dev;
1024 struct dpni_attr attr;
1025 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1026 struct dpni_buffer_layout layout;
1029 PMD_INIT_FUNC_TRACE();
1031 /* For secondary processes, the primary has done all the work */
1032 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1035 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1037 hw_id = dpaa2_dev->object_id;
1039 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
1041 PMD_INIT_LOG(ERR, "malloc failed for dpni device\n");
1045 dpni_dev->regs = rte_mcp_ptr_list[0];
1046 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
1049 "Failure in opening dpni@%d with err code %d\n",
1055 /* Clean the device first */
1056 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
1059 "Failure cleaning dpni@%d with err code %d\n",
1064 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
1067 "Failure in get dpni@%d attribute, err code %d\n",
1072 priv->num_tc = attr.num_tcs;
1073 for (i = 0; i < attr.num_tcs; i++) {
1074 priv->num_dist_per_tc[i] = attr.num_queues;
1078 /* Distribution is per Tc only,
1079 * so choosing RX queues from default TC only
1081 priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
1083 if (attr.num_tcs == 1)
1084 priv->nb_tx_queues = attr.num_queues;
1086 priv->nb_tx_queues = attr.num_tcs;
1088 PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
1089 PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
1091 priv->hw = dpni_dev;
1092 priv->hw_id = hw_id;
1093 priv->options = attr.options;
1094 priv->max_mac_filters = attr.mac_filter_entries;
1095 priv->max_vlan_filters = attr.vlan_filter_entries;
1098 priv->flags |= DPAA2_TX_CGR_SUPPORT;
1099 PMD_INIT_LOG(INFO, "Enable the tx congestion control support");
1101 /* Allocate memory for hardware structure for queues */
1102 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
1104 PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
1108 /* Allocate memory for storing MAC addresses */
1109 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
1110 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
1111 if (eth_dev->data->mac_addrs == NULL) {
1113 "Failed to allocate %d bytes needed to store MAC addresses",
1114 ETHER_ADDR_LEN * attr.mac_filter_entries);
1119 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1121 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
1123 PMD_INIT_LOG(ERR, "DPNI get mac address failed:Err Code = %d\n",
1128 /* ... tx buffer layout ... */
1129 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1130 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1131 layout.pass_frame_status = 1;
1132 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1133 DPNI_QUEUE_TX, &layout);
1135 PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer layout",
1140 /* ... tx-conf and error buffer layout ... */
1141 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1142 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1143 layout.pass_frame_status = 1;
1144 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1145 DPNI_QUEUE_TX_CONFIRM, &layout);
1147 PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer layout",
1152 eth_dev->dev_ops = &dpaa2_ethdev_ops;
1153 eth_dev->data->drv_name = rte_dpaa2_pmd.driver.name;
1155 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
1156 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
1157 rte_fslmc_vfio_dmamap();
1161 dpaa2_dev_uninit(eth_dev);
1166 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
1168 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1169 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1171 struct dpaa2_queue *dpaa2_q;
1173 PMD_INIT_FUNC_TRACE();
1175 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1179 PMD_INIT_LOG(WARNING, "Already closed or not started");
1183 dpaa2_dev_close(eth_dev);
1185 if (priv->rx_vq[0]) {
1186 /* cleaning up queue storage */
1187 for (i = 0; i < priv->nb_rx_queues; i++) {
1188 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1189 if (dpaa2_q->q_storage)
1190 rte_free(dpaa2_q->q_storage);
1192 /*free the all queue memory */
1193 rte_free(priv->rx_vq[0]);
1194 priv->rx_vq[0] = NULL;
1197 /* free memory for storing MAC addresses */
1198 if (eth_dev->data->mac_addrs) {
1199 rte_free(eth_dev->data->mac_addrs);
1200 eth_dev->data->mac_addrs = NULL;
1203 /* Close the device at underlying layer*/
1204 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
1207 "Failure closing dpni device with err code %d\n",
1211 /* Free the allocated memory for ethernet private data and dpni*/
1215 eth_dev->dev_ops = NULL;
1216 eth_dev->rx_pkt_burst = NULL;
1217 eth_dev->tx_pkt_burst = NULL;
1223 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
1224 struct rte_dpaa2_device *dpaa2_dev)
1226 struct rte_eth_dev *eth_dev;
1227 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
1231 sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id);
1233 eth_dev = rte_eth_dev_allocate(ethdev_name);
1234 if (eth_dev == NULL)
1237 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1238 eth_dev->data->dev_private = rte_zmalloc(
1239 "ethdev private structure",
1240 sizeof(struct dpaa2_dev_priv),
1241 RTE_CACHE_LINE_SIZE);
1242 if (eth_dev->data->dev_private == NULL) {
1243 PMD_INIT_LOG(CRIT, "Cannot allocate memzone for"
1244 " private port data\n");
1245 rte_eth_dev_release_port(eth_dev);
1249 eth_dev->device = &dpaa2_dev->device;
1250 dpaa2_dev->eth_dev = eth_dev;
1251 eth_dev->data->rx_mbuf_alloc_failed = 0;
1253 /* Invoke PMD device initialization function */
1254 diag = dpaa2_dev_init(eth_dev);
1258 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1259 rte_free(eth_dev->data->dev_private);
1260 rte_eth_dev_release_port(eth_dev);
1265 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
1267 struct rte_eth_dev *eth_dev;
1269 eth_dev = dpaa2_dev->eth_dev;
1270 dpaa2_dev_uninit(eth_dev);
1272 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1273 rte_free(eth_dev->data->dev_private);
1274 rte_eth_dev_release_port(eth_dev);
1279 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
1280 .drv_type = DPAA2_MC_DPNI_DEVID,
1281 .probe = rte_dpaa2_probe,
1282 .remove = rte_dpaa2_remove,
1285 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);